diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2008-07-11 15:31:35 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2008-07-16 18:57:52 -0400 |
commit | 0332f000cd010e9db0a04181284b9ac91dac5ea7 (patch) | |
tree | f6be4337d47ec08048ee8c95a74abe9fe82c368e /arch/powerpc | |
parent | 6cfd8990e27d3a491c1c605d6cbc18a46ae51fef (diff) |
powerpc/fsl: Minor TLBSYNC cleanup for FSL Book-E
Use the TLBSYNC macro defined in ppc_asm.h rather than our own ifdefs.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/kernel/head_fsl_booke.S | 19 |
1 files changed, 4 insertions, 15 deletions
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index 7d554968b635..3cb52fa0eda3 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S | |||
@@ -151,16 +151,11 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
151 | /* Invalidate TLB0 */ | 151 | /* Invalidate TLB0 */ |
152 | li r6,0x04 | 152 | li r6,0x04 |
153 | tlbivax 0,r6 | 153 | tlbivax 0,r6 |
154 | #ifdef CONFIG_SMP | 154 | TLBSYNC |
155 | tlbsync | ||
156 | #endif | ||
157 | /* Invalidate TLB1 */ | 155 | /* Invalidate TLB1 */ |
158 | li r6,0x0c | 156 | li r6,0x0c |
159 | tlbivax 0,r6 | 157 | tlbivax 0,r6 |
160 | #ifdef CONFIG_SMP | 158 | TLBSYNC |
161 | tlbsync | ||
162 | #endif | ||
163 | msync | ||
164 | 159 | ||
165 | /* 3. Setup a temp mapping and jump to it */ | 160 | /* 3. Setup a temp mapping and jump to it */ |
166 | andi. r5, r3, 0x1 /* Find an entry not used and is non-zero */ | 161 | andi. r5, r3, 0x1 /* Find an entry not used and is non-zero */ |
@@ -238,10 +233,7 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
238 | /* Invalidate TLB1 */ | 233 | /* Invalidate TLB1 */ |
239 | li r9,0x0c | 234 | li r9,0x0c |
240 | tlbivax 0,r9 | 235 | tlbivax 0,r9 |
241 | #ifdef CONFIG_SMP | 236 | TLBSYNC |
242 | tlbsync | ||
243 | #endif | ||
244 | msync | ||
245 | 237 | ||
246 | /* 6. Setup KERNELBASE mapping in TLB1[0] */ | 238 | /* 6. Setup KERNELBASE mapping in TLB1[0] */ |
247 | lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */ | 239 | lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */ |
@@ -283,10 +275,7 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
283 | /* Invalidate TLB1 */ | 275 | /* Invalidate TLB1 */ |
284 | li r9,0x0c | 276 | li r9,0x0c |
285 | tlbivax 0,r9 | 277 | tlbivax 0,r9 |
286 | #ifdef CONFIG_SMP | 278 | TLBSYNC |
287 | tlbsync | ||
288 | #endif | ||
289 | msync | ||
290 | 279 | ||
291 | /* Establish the interrupt vector offsets */ | 280 | /* Establish the interrupt vector offsets */ |
292 | SET_IVOR(0, CriticalInput); | 281 | SET_IVOR(0, CriticalInput); |