diff options
author | Michael Neuling <mikey@neuling.org> | 2012-09-06 17:24:56 -0400 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2012-09-09 19:59:10 -0400 |
commit | 4474ef055c5d8cb8eaf002d69e49af71e3aa3a88 (patch) | |
tree | e57b99bfa78d7c3faf4125ab4a08f17fed2c41d8 /arch/powerpc/xmon | |
parent | 3ab96a02e829131c19db8ed99239289acdb4e3dc (diff) |
powerpc: Rework set_dabr so it can take a DABRX value as well
Rework set_dabr to take a DABRX value as well.
Both the pseries and PS3 hypervisors do some checks on the DABRX
values that are passed in the hcall. This patch stops bogus values
from being passed to hypervisor. Also, in the case where we are
clearing the breakpoint, where DABR and DABRX are zero, we modify the
DABRX value to make it valid so that the hcall won't fail.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/xmon')
-rw-r--r-- | arch/powerpc/xmon/xmon.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index 9b49c65ee7a4..987f441525cb 100644 --- a/arch/powerpc/xmon/xmon.c +++ b/arch/powerpc/xmon/xmon.c | |||
@@ -740,7 +740,7 @@ static void insert_bpts(void) | |||
740 | static void insert_cpu_bpts(void) | 740 | static void insert_cpu_bpts(void) |
741 | { | 741 | { |
742 | if (dabr.enabled) | 742 | if (dabr.enabled) |
743 | set_dabr(dabr.address | (dabr.enabled & 7)); | 743 | set_dabr(dabr.address | (dabr.enabled & 7), DABRX_ALL); |
744 | if (iabr && cpu_has_feature(CPU_FTR_IABR)) | 744 | if (iabr && cpu_has_feature(CPU_FTR_IABR)) |
745 | mtspr(SPRN_IABR, iabr->address | 745 | mtspr(SPRN_IABR, iabr->address |
746 | | (iabr->enabled & (BP_IABR|BP_IABR_TE))); | 746 | | (iabr->enabled & (BP_IABR|BP_IABR_TE))); |
@@ -768,7 +768,7 @@ static void remove_bpts(void) | |||
768 | 768 | ||
769 | static void remove_cpu_bpts(void) | 769 | static void remove_cpu_bpts(void) |
770 | { | 770 | { |
771 | set_dabr(0); | 771 | set_dabr(0, 0); |
772 | if (cpu_has_feature(CPU_FTR_IABR)) | 772 | if (cpu_has_feature(CPU_FTR_IABR)) |
773 | mtspr(SPRN_IABR, 0); | 773 | mtspr(SPRN_IABR, 0); |
774 | } | 774 | } |