diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2014-01-14 22:22:35 -0500 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2014-01-14 22:22:35 -0500 |
commit | fac515db45207718168cb55ca4d0a390e43b61af (patch) | |
tree | 7dd2fe9b94f769a2009ff6c7402c52ef3dd3b640 /arch/powerpc/sysdev | |
parent | 3ac8ff1c475bda7174fce63230c0932454287cd5 (diff) | |
parent | d064f30e5063ec54ab50af08c64fb5055e759bfd (diff) |
Merge remote-tracking branch 'scott/next' into next
Freescale updates from Scott:
<<
Highlights include 32-bit booke relocatable support, e6500 hardware
tablewalk support, various e500 SPE fixes, some new/revived boards, and
e6500 deeper idle and altivec powerdown modes.
>>
Diffstat (limited to 'arch/powerpc/sysdev')
-rw-r--r-- | arch/powerpc/sysdev/fsl_lbc.c | 31 | ||||
-rw-r--r-- | arch/powerpc/sysdev/fsl_pci.c | 3 | ||||
-rw-r--r-- | arch/powerpc/sysdev/indirect_pci.c | 6 | ||||
-rw-r--r-- | arch/powerpc/sysdev/mpic_timer.c | 10 |
4 files changed, 37 insertions, 13 deletions
diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c index 6bc5a546d49f..d631022ffb4b 100644 --- a/arch/powerpc/sysdev/fsl_lbc.c +++ b/arch/powerpc/sysdev/fsl_lbc.c | |||
@@ -214,10 +214,14 @@ static irqreturn_t fsl_lbc_ctrl_irq(int irqno, void *data) | |||
214 | struct fsl_lbc_ctrl *ctrl = data; | 214 | struct fsl_lbc_ctrl *ctrl = data; |
215 | struct fsl_lbc_regs __iomem *lbc = ctrl->regs; | 215 | struct fsl_lbc_regs __iomem *lbc = ctrl->regs; |
216 | u32 status; | 216 | u32 status; |
217 | unsigned long flags; | ||
217 | 218 | ||
219 | spin_lock_irqsave(&fsl_lbc_lock, flags); | ||
218 | status = in_be32(&lbc->ltesr); | 220 | status = in_be32(&lbc->ltesr); |
219 | if (!status) | 221 | if (!status) { |
222 | spin_unlock_irqrestore(&fsl_lbc_lock, flags); | ||
220 | return IRQ_NONE; | 223 | return IRQ_NONE; |
224 | } | ||
221 | 225 | ||
222 | out_be32(&lbc->ltesr, LTESR_CLEAR); | 226 | out_be32(&lbc->ltesr, LTESR_CLEAR); |
223 | out_be32(&lbc->lteatr, 0); | 227 | out_be32(&lbc->lteatr, 0); |
@@ -260,6 +264,7 @@ static irqreturn_t fsl_lbc_ctrl_irq(int irqno, void *data) | |||
260 | if (status & ~LTESR_MASK) | 264 | if (status & ~LTESR_MASK) |
261 | dev_err(ctrl->dev, "Unknown error: " | 265 | dev_err(ctrl->dev, "Unknown error: " |
262 | "LTESR 0x%08X\n", status); | 266 | "LTESR 0x%08X\n", status); |
267 | spin_unlock_irqrestore(&fsl_lbc_lock, flags); | ||
263 | return IRQ_HANDLED; | 268 | return IRQ_HANDLED; |
264 | } | 269 | } |
265 | 270 | ||
@@ -298,8 +303,8 @@ static int fsl_lbc_ctrl_probe(struct platform_device *dev) | |||
298 | goto err; | 303 | goto err; |
299 | } | 304 | } |
300 | 305 | ||
301 | fsl_lbc_ctrl_dev->irq = irq_of_parse_and_map(dev->dev.of_node, 0); | 306 | fsl_lbc_ctrl_dev->irq[0] = irq_of_parse_and_map(dev->dev.of_node, 0); |
302 | if (fsl_lbc_ctrl_dev->irq == NO_IRQ) { | 307 | if (!fsl_lbc_ctrl_dev->irq[0]) { |
303 | dev_err(&dev->dev, "failed to get irq resource\n"); | 308 | dev_err(&dev->dev, "failed to get irq resource\n"); |
304 | ret = -ENODEV; | 309 | ret = -ENODEV; |
305 | goto err; | 310 | goto err; |
@@ -311,20 +316,34 @@ static int fsl_lbc_ctrl_probe(struct platform_device *dev) | |||
311 | if (ret < 0) | 316 | if (ret < 0) |
312 | goto err; | 317 | goto err; |
313 | 318 | ||
314 | ret = request_irq(fsl_lbc_ctrl_dev->irq, fsl_lbc_ctrl_irq, 0, | 319 | ret = request_irq(fsl_lbc_ctrl_dev->irq[0], fsl_lbc_ctrl_irq, 0, |
315 | "fsl-lbc", fsl_lbc_ctrl_dev); | 320 | "fsl-lbc", fsl_lbc_ctrl_dev); |
316 | if (ret != 0) { | 321 | if (ret != 0) { |
317 | dev_err(&dev->dev, "failed to install irq (%d)\n", | 322 | dev_err(&dev->dev, "failed to install irq (%d)\n", |
318 | fsl_lbc_ctrl_dev->irq); | 323 | fsl_lbc_ctrl_dev->irq[0]); |
319 | ret = fsl_lbc_ctrl_dev->irq; | 324 | ret = fsl_lbc_ctrl_dev->irq[0]; |
320 | goto err; | 325 | goto err; |
321 | } | 326 | } |
322 | 327 | ||
328 | fsl_lbc_ctrl_dev->irq[1] = irq_of_parse_and_map(dev->dev.of_node, 1); | ||
329 | if (fsl_lbc_ctrl_dev->irq[1]) { | ||
330 | ret = request_irq(fsl_lbc_ctrl_dev->irq[1], fsl_lbc_ctrl_irq, | ||
331 | IRQF_SHARED, "fsl-lbc-err", fsl_lbc_ctrl_dev); | ||
332 | if (ret) { | ||
333 | dev_err(&dev->dev, "failed to install irq (%d)\n", | ||
334 | fsl_lbc_ctrl_dev->irq[1]); | ||
335 | ret = fsl_lbc_ctrl_dev->irq[1]; | ||
336 | goto err1; | ||
337 | } | ||
338 | } | ||
339 | |||
323 | /* Enable interrupts for any detected events */ | 340 | /* Enable interrupts for any detected events */ |
324 | out_be32(&fsl_lbc_ctrl_dev->regs->lteir, LTEIR_ENABLE); | 341 | out_be32(&fsl_lbc_ctrl_dev->regs->lteir, LTEIR_ENABLE); |
325 | 342 | ||
326 | return 0; | 343 | return 0; |
327 | 344 | ||
345 | err1: | ||
346 | free_irq(fsl_lbc_ctrl_dev->irq[0], fsl_lbc_ctrl_dev); | ||
328 | err: | 347 | err: |
329 | iounmap(fsl_lbc_ctrl_dev->regs); | 348 | iounmap(fsl_lbc_ctrl_dev->regs); |
330 | kfree(fsl_lbc_ctrl_dev); | 349 | kfree(fsl_lbc_ctrl_dev); |
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 7066e5262468..a625dcf26b2b 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c | |||
@@ -454,7 +454,7 @@ void fsl_pcibios_fixup_bus(struct pci_bus *bus) | |||
454 | } | 454 | } |
455 | } | 455 | } |
456 | 456 | ||
457 | int __init fsl_add_bridge(struct platform_device *pdev, int is_primary) | 457 | int fsl_add_bridge(struct platform_device *pdev, int is_primary) |
458 | { | 458 | { |
459 | int len; | 459 | int len; |
460 | struct pci_controller *hose; | 460 | struct pci_controller *hose; |
@@ -1035,6 +1035,7 @@ static const struct of_device_id pci_ids[] = { | |||
1035 | { .compatible = "fsl,mpc8548-pcie", }, | 1035 | { .compatible = "fsl,mpc8548-pcie", }, |
1036 | { .compatible = "fsl,mpc8610-pci", }, | 1036 | { .compatible = "fsl,mpc8610-pci", }, |
1037 | { .compatible = "fsl,mpc8641-pcie", }, | 1037 | { .compatible = "fsl,mpc8641-pcie", }, |
1038 | { .compatible = "fsl,qoriq-pcie", }, | ||
1038 | { .compatible = "fsl,qoriq-pcie-v2.1", }, | 1039 | { .compatible = "fsl,qoriq-pcie-v2.1", }, |
1039 | { .compatible = "fsl,qoriq-pcie-v2.2", }, | 1040 | { .compatible = "fsl,qoriq-pcie-v2.2", }, |
1040 | { .compatible = "fsl,qoriq-pcie-v2.3", }, | 1041 | { .compatible = "fsl,qoriq-pcie-v2.3", }, |
diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c index c6c8b526a4f6..1f6c570d66d4 100644 --- a/arch/powerpc/sysdev/indirect_pci.c +++ b/arch/powerpc/sysdev/indirect_pci.c | |||
@@ -152,10 +152,8 @@ static struct pci_ops indirect_pci_ops = | |||
152 | .write = indirect_write_config, | 152 | .write = indirect_write_config, |
153 | }; | 153 | }; |
154 | 154 | ||
155 | void __init | 155 | void setup_indirect_pci(struct pci_controller *hose, resource_size_t cfg_addr, |
156 | setup_indirect_pci(struct pci_controller* hose, | 156 | resource_size_t cfg_data, u32 flags) |
157 | resource_size_t cfg_addr, | ||
158 | resource_size_t cfg_data, u32 flags) | ||
159 | { | 157 | { |
160 | resource_size_t base = cfg_addr & PAGE_MASK; | 158 | resource_size_t base = cfg_addr & PAGE_MASK; |
161 | void __iomem *mbase; | 159 | void __iomem *mbase; |
diff --git a/arch/powerpc/sysdev/mpic_timer.c b/arch/powerpc/sysdev/mpic_timer.c index 22d7d57eead9..9d9b06217f8b 100644 --- a/arch/powerpc/sysdev/mpic_timer.c +++ b/arch/powerpc/sysdev/mpic_timer.c | |||
@@ -41,6 +41,7 @@ | |||
41 | #define MPIC_TIMER_TCR_ROVR_OFFSET 24 | 41 | #define MPIC_TIMER_TCR_ROVR_OFFSET 24 |
42 | 42 | ||
43 | #define TIMER_STOP 0x80000000 | 43 | #define TIMER_STOP 0x80000000 |
44 | #define GTCCR_TOG 0x80000000 | ||
44 | #define TIMERS_PER_GROUP 4 | 45 | #define TIMERS_PER_GROUP 4 |
45 | #define MAX_TICKS (~0U >> 1) | 46 | #define MAX_TICKS (~0U >> 1) |
46 | #define MAX_TICKS_CASCADE (~0U) | 47 | #define MAX_TICKS_CASCADE (~0U) |
@@ -96,8 +97,11 @@ static void convert_ticks_to_time(struct timer_group_priv *priv, | |||
96 | time->tv_sec = (__kernel_time_t)div_u64(ticks, priv->timerfreq); | 97 | time->tv_sec = (__kernel_time_t)div_u64(ticks, priv->timerfreq); |
97 | tmp_sec = (u64)time->tv_sec * (u64)priv->timerfreq; | 98 | tmp_sec = (u64)time->tv_sec * (u64)priv->timerfreq; |
98 | 99 | ||
99 | time->tv_usec = (__kernel_suseconds_t) | 100 | time->tv_usec = 0; |
100 | div_u64((ticks - tmp_sec) * 1000000, priv->timerfreq); | 101 | |
102 | if (tmp_sec <= ticks) | ||
103 | time->tv_usec = (__kernel_suseconds_t) | ||
104 | div_u64((ticks - tmp_sec) * 1000000, priv->timerfreq); | ||
101 | 105 | ||
102 | return; | 106 | return; |
103 | } | 107 | } |
@@ -327,11 +331,13 @@ void mpic_get_remain_time(struct mpic_timer *handle, struct timeval *time) | |||
327 | casc_priv = priv->timer[handle->num].cascade_handle; | 331 | casc_priv = priv->timer[handle->num].cascade_handle; |
328 | if (casc_priv) { | 332 | if (casc_priv) { |
329 | tmp_ticks = in_be32(&priv->regs[handle->num].gtccr); | 333 | tmp_ticks = in_be32(&priv->regs[handle->num].gtccr); |
334 | tmp_ticks &= ~GTCCR_TOG; | ||
330 | ticks = ((u64)tmp_ticks & UINT_MAX) * (u64)MAX_TICKS_CASCADE; | 335 | ticks = ((u64)tmp_ticks & UINT_MAX) * (u64)MAX_TICKS_CASCADE; |
331 | tmp_ticks = in_be32(&priv->regs[handle->num - 1].gtccr); | 336 | tmp_ticks = in_be32(&priv->regs[handle->num - 1].gtccr); |
332 | ticks += tmp_ticks; | 337 | ticks += tmp_ticks; |
333 | } else { | 338 | } else { |
334 | ticks = in_be32(&priv->regs[handle->num].gtccr); | 339 | ticks = in_be32(&priv->regs[handle->num].gtccr); |
340 | ticks &= ~GTCCR_TOG; | ||
335 | } | 341 | } |
336 | 342 | ||
337 | convert_ticks_to_time(priv, ticks, time); | 343 | convert_ticks_to_time(priv, ticks, time); |