diff options
| author | Kim Phillips <kim.phillips@freescale.com> | 2015-01-22 20:05:06 -0500 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2015-01-29 20:56:15 -0500 |
| commit | 6d5f6a0eba15c1d2cfd367f1c3fb77ab2bfe8ca8 (patch) | |
| tree | 7ffda044bd5380059212cabb603970c6d688737b /arch/powerpc/sysdev | |
| parent | 31494cf3532cfee0bf5c913ac9962971aab7b1d4 (diff) | |
powerpc/fsl_pci: Fix pci stack build bug with FRAME_WARN
Fix this:
CC arch/powerpc/sysdev/fsl_pci.o
arch/powerpc/sysdev/fsl_pci.c: In function 'fsl_pcie_check_link':
arch/powerpc/sysdev/fsl_pci.c:91:1: error: the frame size of 1360 bytes is larger than 1024 bytes [-Werror=frame-larger-than=]
when configuring FRAME_WARN, by refactoring indirect_read_config()
to take hose and bus number instead of the 1344-byte struct pci_bus.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/sysdev')
| -rw-r--r-- | arch/powerpc/sysdev/fsl_pci.c | 11 | ||||
| -rw-r--r-- | arch/powerpc/sysdev/indirect_pci.c | 25 |
2 files changed, 21 insertions, 15 deletions
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index 6455c1eada1a..7cc215e86d82 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c | |||
| @@ -68,13 +68,10 @@ static int fsl_pcie_check_link(struct pci_controller *hose) | |||
| 68 | u32 val = 0; | 68 | u32 val = 0; |
| 69 | 69 | ||
| 70 | if (hose->indirect_type & PPC_INDIRECT_TYPE_FSL_CFG_REG_LINK) { | 70 | if (hose->indirect_type & PPC_INDIRECT_TYPE_FSL_CFG_REG_LINK) { |
| 71 | if (hose->ops->read == fsl_indirect_read_config) { | 71 | if (hose->ops->read == fsl_indirect_read_config) |
| 72 | struct pci_bus bus; | 72 | __indirect_read_config(hose, hose->first_busno, 0, |
| 73 | bus.number = hose->first_busno; | 73 | PCIE_LTSSM, 4, &val); |
| 74 | bus.sysdata = hose; | 74 | else |
| 75 | bus.ops = hose->ops; | ||
| 76 | indirect_read_config(&bus, 0, PCIE_LTSSM, 4, &val); | ||
| 77 | } else | ||
| 78 | early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val); | 75 | early_read_config_dword(hose, 0, 0, PCIE_LTSSM, &val); |
| 79 | if (val < PCIE_LTSSM_L0) | 76 | if (val < PCIE_LTSSM_L0) |
| 80 | return 1; | 77 | return 1; |
diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c index 1f6c570d66d4..692de9dbc680 100644 --- a/arch/powerpc/sysdev/indirect_pci.c +++ b/arch/powerpc/sysdev/indirect_pci.c | |||
| @@ -20,31 +20,31 @@ | |||
| 20 | #include <asm/pci-bridge.h> | 20 | #include <asm/pci-bridge.h> |
| 21 | #include <asm/machdep.h> | 21 | #include <asm/machdep.h> |
| 22 | 22 | ||
| 23 | int indirect_read_config(struct pci_bus *bus, unsigned int devfn, | 23 | int __indirect_read_config(struct pci_controller *hose, |
| 24 | int offset, int len, u32 *val) | 24 | unsigned char bus_number, unsigned int devfn, |
| 25 | int offset, int len, u32 *val) | ||
| 25 | { | 26 | { |
| 26 | struct pci_controller *hose = pci_bus_to_host(bus); | ||
| 27 | volatile void __iomem *cfg_data; | 27 | volatile void __iomem *cfg_data; |
| 28 | u8 cfg_type = 0; | 28 | u8 cfg_type = 0; |
| 29 | u32 bus_no, reg; | 29 | u32 bus_no, reg; |
| 30 | 30 | ||
| 31 | if (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK) { | 31 | if (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK) { |
| 32 | if (bus->number != hose->first_busno) | 32 | if (bus_number != hose->first_busno) |
| 33 | return PCIBIOS_DEVICE_NOT_FOUND; | 33 | return PCIBIOS_DEVICE_NOT_FOUND; |
| 34 | if (devfn != 0) | 34 | if (devfn != 0) |
| 35 | return PCIBIOS_DEVICE_NOT_FOUND; | 35 | return PCIBIOS_DEVICE_NOT_FOUND; |
| 36 | } | 36 | } |
| 37 | 37 | ||
| 38 | if (ppc_md.pci_exclude_device) | 38 | if (ppc_md.pci_exclude_device) |
| 39 | if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) | 39 | if (ppc_md.pci_exclude_device(hose, bus_number, devfn)) |
| 40 | return PCIBIOS_DEVICE_NOT_FOUND; | 40 | return PCIBIOS_DEVICE_NOT_FOUND; |
| 41 | 41 | ||
| 42 | if (hose->indirect_type & PPC_INDIRECT_TYPE_SET_CFG_TYPE) | 42 | if (hose->indirect_type & PPC_INDIRECT_TYPE_SET_CFG_TYPE) |
| 43 | if (bus->number != hose->first_busno) | 43 | if (bus_number != hose->first_busno) |
| 44 | cfg_type = 1; | 44 | cfg_type = 1; |
| 45 | 45 | ||
| 46 | bus_no = (bus->number == hose->first_busno) ? | 46 | bus_no = (bus_number == hose->first_busno) ? |
| 47 | hose->self_busno : bus->number; | 47 | hose->self_busno : bus_number; |
| 48 | 48 | ||
| 49 | if (hose->indirect_type & PPC_INDIRECT_TYPE_EXT_REG) | 49 | if (hose->indirect_type & PPC_INDIRECT_TYPE_EXT_REG) |
| 50 | reg = ((offset & 0xf00) << 16) | (offset & 0xfc); | 50 | reg = ((offset & 0xf00) << 16) | (offset & 0xfc); |
| @@ -77,6 +77,15 @@ int indirect_read_config(struct pci_bus *bus, unsigned int devfn, | |||
| 77 | return PCIBIOS_SUCCESSFUL; | 77 | return PCIBIOS_SUCCESSFUL; |
| 78 | } | 78 | } |
| 79 | 79 | ||
| 80 | int indirect_read_config(struct pci_bus *bus, unsigned int devfn, | ||
| 81 | int offset, int len, u32 *val) | ||
| 82 | { | ||
| 83 | struct pci_controller *hose = pci_bus_to_host(bus); | ||
| 84 | |||
| 85 | return __indirect_read_config(hose, bus->number, devfn, offset, len, | ||
| 86 | val); | ||
| 87 | } | ||
| 88 | |||
| 80 | int indirect_write_config(struct pci_bus *bus, unsigned int devfn, | 89 | int indirect_write_config(struct pci_bus *bus, unsigned int devfn, |
| 81 | int offset, int len, u32 val) | 90 | int offset, int len, u32 val) |
| 82 | { | 91 | { |
