Merge remote-tracking branch 'origin' into irqdomain/next

6 files changed, 86 insertions, 6 deletions

diff --git a/arch/powerpc/sysdev/6xx-suspend.S b/arch/powerpc/sysdev/6xx-suspend.S
index 21cda085d926..cf48e9cb2575 100644
--- a/arch/powerpc/sysdev/6xx-suspend.S
+++ b/arch/powerpc/sysdev/6xx-suspend.S
@@ -29,7 +29,7 @@ _GLOBAL(mpc6xx_enter_standby)
         ori     r5, r5, ret_from_standby@l
         mtlr    r5
 
-        rlwinm  r5, r1, 0, 0, 31-THREAD_SHIFT
+        CURRENT_THREAD_INFO(r5, r1)
         lwz     r6, TI_LOCAL_FLAGS(r5)
         ori     r6, r6, _TLF_SLEEPING
         stw     r6, TI_LOCAL_FLAGS(r5)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 6073288fed29..a7b2a600d0a4 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -1,7 +1,7 @@
 /*
  * MPC83xx/85xx/86xx PCI/PCIE support routing.
  *
- * Copyright 2007-2011 Freescale Semiconductor, Inc.
+ * Copyright 2007-2012 Freescale Semiconductor, Inc.
  * Copyright 2008-2009 MontaVista Software, Inc.
  *
  * Initial author: Xianghua Xiao <x.xiao@freescale.com>
@@ -36,7 +36,7 @@
 
 static int fsl_pcie_bus_fixup, is_mpc83xx_pci;
 
-static void __init quirk_fsl_pcie_header(struct pci_dev *dev)
+static void __devinit quirk_fsl_pcie_header(struct pci_dev *dev)
 {
         u8 progif;
 
@@ -807,3 +807,72 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose)
 
         return 0;
 }
+
+#if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
+static const struct of_device_id pci_ids[] = {
+        { .compatible = "fsl,mpc8540-pci", },
+        { .compatible = "fsl,mpc8548-pcie", },
+        { .compatible = "fsl,mpc8610-pci", },
+        { .compatible = "fsl,mpc8641-pcie", },
+        { .compatible = "fsl,p1022-pcie", },
+        { .compatible = "fsl,p1010-pcie", },
+        { .compatible = "fsl,p1023-pcie", },
+        { .compatible = "fsl,p4080-pcie", },
+        { .compatible = "fsl,qoriq-pcie-v2.3", },
+        { .compatible = "fsl,qoriq-pcie-v2.2", },
+        {},
+};
+
+struct device_node *fsl_pci_primary;
+
+void __devinit fsl_pci_init(void)
+{
+        struct device_node *node;
+        struct pci_controller *hose;
+        dma_addr_t max = 0xffffffff;
+
+        /* Callers can specify the primary bus using other means. */
+        if (!fsl_pci_primary) {
+                /* If a PCI host bridge contains an ISA node, it's primary. */
+                node = of_find_node_by_type(NULL, "isa");
+                while ((fsl_pci_primary = of_get_parent(node))) {
+                        of_node_put(node);
+                        node = fsl_pci_primary;
+
+                        if (of_match_node(pci_ids, node))
+                                break;
+                }
+        }
+
+        node = NULL;
+        for_each_node_by_type(node, "pci") {
+                if (of_match_node(pci_ids, node)) {
+                        /*
+                         * If there's no PCI host bridge with ISA, arbitrarily
+                         * designate one as primary.  This can go away once
+                         * various bugs with primary-less systems are fixed.
+                         */
+                        if (!fsl_pci_primary)
+                                fsl_pci_primary = node;
+
+                        fsl_add_bridge(node, fsl_pci_primary == node);
+                        hose = pci_find_hose_for_OF_device(node);
+                        max = min(max, hose->dma_window_base_cur +
+                                        hose->dma_window_size);
+                }
+        }
+
+#ifdef CONFIG_SWIOTLB
+        /*
+         * if we couldn't map all of DRAM via the dma windows
+         * we need SWIOTLB to handle buffers located outside of
+         * dma capable memory region
+         */
+        if (memblock_end_of_DRAM() - 1 > max) {
+                ppc_swiotlb_enable = 1;
+                set_pci_dma_ops(&swiotlb_dma_ops);
+                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
+        }
+#endif
+}
+#endif
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index a39ed5cc2c5a..baa0fd18289f 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -93,5 +93,13 @@ extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);
 extern int mpc83xx_add_bridge(struct device_node *dev);
 u64 fsl_pci_immrbar_base(struct pci_controller *hose);
 
+extern struct device_node *fsl_pci_primary;
+
+#ifdef CONFIG_FSL_PCI
+void fsl_pci_init(void);
+#else
+static inline void fsl_pci_init(void) {}
+#endif
+
 #endif /* __POWERPC_FSL_PCI_H */
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 395af1347749..bfc6211e5422 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1211,7 +1211,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
         if (of_get_property(node, "single-cpu-affinity", NULL))
                 flags |= MPIC_SINGLE_DEST_CPU;
         if (of_device_is_compatible(node, "fsl,mpic"))
-                flags |= MPIC_FSL;
+                flags |= MPIC_FSL | MPIC_LARGE_VECTORS;
 
         mpic = kzalloc(sizeof(struct mpic), GFP_KERNEL);
         if (mpic == NULL)
@@ -1376,7 +1376,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
         mpic->isu_mask = (1 << mpic->isu_shift) - 1;
 
         mpic->irqhost = irq_domain_add_linear(mpic->node,
-                                       last_irq + 1,
+                                       intvec_top,
                                        &mpic_host_ops, mpic);
 
         /*
diff --git a/arch/powerpc/sysdev/mv64x60_pci.c b/arch/powerpc/sysdev/mv64x60_pci.c
index b0037cefaada..364b14d4754b 100644
--- a/arch/powerpc/sysdev/mv64x60_pci.c
+++ b/arch/powerpc/sysdev/mv64x60_pci.c
@@ -104,7 +104,7 @@ subsys_initcall(mv64x60_sysfs_init);
 
 #endif /* CONFIG_SYSFS */
 
-static void __init mv64x60_pci_fixup_early(struct pci_dev *dev)
+static void __devinit mv64x60_pci_fixup_early(struct pci_dev *dev)
 {
         /*
          * Set the host bridge hdr_type to an invalid value so that
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 818e763f8265..b04367529729 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -395,6 +395,9 @@ static void qe_upload_microcode(const void *base,
 
         for (i = 0; i < be32_to_cpu(ucode->count); i++)
                 out_be32(&qe_immr->iram.idata, be32_to_cpu(code[i]));
+        
+        /* Set I-RAM Ready Register */
+        out_be32(&qe_immr->iram.iready, be32_to_cpu(QE_IRAM_READY));
 }
 
 /*