Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git

Conflicts:
	drivers/mtd/mtd_blkdevs.c

Merge Grant's device-tree bits so that we can apply the subsequent fixes.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

14 files changed, 698 insertions, 237 deletions

diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 5642924fb9fb..0bef9dacb64e 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -1,8 +1,6 @@
 subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
 
-ifeq ($(CONFIG_PPC64),y)
-EXTRA_CFLAGS                    += -mno-minimal-toc
-endif
+ccflags-$(CONFIG_PPC64)         := -mno-minimal-toc
 
 mpic-msi-obj-$(CONFIG_PCI_MSI)  += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o
 obj-$(CONFIG_MPIC)              += mpic.o $(mpic-msi-obj-y)
@@ -20,6 +18,7 @@ obj-$(CONFIG_FSL_PMC)		+= fsl_pmc.o
 obj-$(CONFIG_FSL_LBC)           += fsl_lbc.o
 obj-$(CONFIG_FSL_GTM)           += fsl_gtm.o
 obj-$(CONFIG_MPC8xxx_GPIO)      += mpc8xxx_gpio.o
+obj-$(CONFIG_FSL_85XX_CACHE_SRAM)       += fsl_85xx_l2ctlr.o fsl_85xx_cache_sram.o
 obj-$(CONFIG_SIMPLE_GPIO)       += simple_gpio.o
 obj-$(CONFIG_RAPIDIO)           += fsl_rio.o
 obj-$(CONFIG_TSI108_BRIDGE)     += tsi108_pci.o tsi108_dev.o
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c
index 559db2b846a9..17cf15ec38be 100644
--- a/arch/powerpc/sysdev/dart_iommu.c
+++ b/arch/powerpc/sysdev/dart_iommu.c
@@ -70,6 +70,8 @@ static int iommu_table_dart_inited;
 static int dart_dirty;
 static int dart_is_u4;
 
+#define DART_U4_BYPASS_BASE     0x8000000000ull
+
 #define DBG(...)
 
 static inline void dart_tlb_invalidate_all(void)
@@ -292,12 +294,20 @@ static void iommu_table_dart_setup(void)
         set_bit(iommu_table_dart.it_size - 1, iommu_table_dart.it_map);
 }
 
-static void pci_dma_dev_setup_dart(struct pci_dev *dev)
+static void dma_dev_setup_dart(struct device *dev)
 {
         /* We only have one iommu table on the mac for now, which makes
          * things simple. Setup all PCI devices to point to this table
          */
-        set_iommu_table_base(&dev->dev, &iommu_table_dart);
+        if (get_dma_ops(dev) == &dma_direct_ops)
+                set_dma_offset(dev, DART_U4_BYPASS_BASE);
+        else
+                set_iommu_table_base(dev, &iommu_table_dart);
+}
+
+static void pci_dma_dev_setup_dart(struct pci_dev *dev)
+{
+        dma_dev_setup_dart(&dev->dev);
 }
 
 static void pci_dma_bus_setup_dart(struct pci_bus *bus)
@@ -315,6 +325,45 @@ static void pci_dma_bus_setup_dart(struct pci_bus *bus)
                 PCI_DN(dn)->iommu_table = &iommu_table_dart;
 }
 
+static bool dart_device_on_pcie(struct device *dev)
+{
+        struct device_node *np = of_node_get(dev->of_node);
+
+        while(np) {
+                if (of_device_is_compatible(np, "U4-pcie") ||
+                    of_device_is_compatible(np, "u4-pcie")) {
+                        of_node_put(np);
+                        return true;
+                }
+                np = of_get_next_parent(np);
+        }
+        return false;
+}
+
+static int dart_dma_set_mask(struct device *dev, u64 dma_mask)
+{
+        if (!dev->dma_mask || !dma_supported(dev, dma_mask))
+                return -EIO;
+
+        /* U4 supports a DART bypass, we use it for 64-bit capable
+         * devices to improve performances. However, that only works
+         * for devices connected to U4 own PCIe interface, not bridged
+         * through hypertransport. We need the device to support at
+         * least 40 bits of addresses.
+         */
+        if (dart_device_on_pcie(dev) && dma_mask >= DMA_BIT_MASK(40)) {
+                dev_info(dev, "Using 64-bit DMA iommu bypass\n");
+                set_dma_ops(dev, &dma_direct_ops);
+        } else {
+                dev_info(dev, "Using 32-bit DMA via iommu\n");
+                set_dma_ops(dev, &dma_iommu_ops);
+        }
+        dma_dev_setup_dart(dev);
+
+        *dev->dma_mask = dma_mask;
+        return 0;
+}
+
 void __init iommu_init_early_dart(void)
 {
         struct device_node *dn;
@@ -328,20 +377,25 @@ void __init iommu_init_early_dart(void)
                 dart_is_u4 = 1;
         }
 
+        /* Initialize the DART HW */
+        if (dart_init(dn) != 0)
+                goto bail;
+
         /* Setup low level TCE operations for the core IOMMU code */
         ppc_md.tce_build = dart_build;
         ppc_md.tce_free  = dart_free;
         ppc_md.tce_flush = dart_flush;
 
-        /* Initialize the DART HW */
-        if (dart_init(dn) == 0) {
-                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_dart;
-                ppc_md.pci_dma_bus_setup = pci_dma_bus_setup_dart;
+        /* Setup bypass if supported */
+        if (dart_is_u4)
+                ppc_md.dma_set_mask = dart_dma_set_mask;
 
-                /* Setup pci_dma ops */
-                set_pci_dma_ops(&dma_iommu_ops);
-                return;
-        }
+        ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_dart;
+        ppc_md.pci_dma_bus_setup = pci_dma_bus_setup_dart;
+
+        /* Setup pci_dma ops */
+        set_pci_dma_ops(&dma_iommu_ops);
+        return;
 
  bail:
         /* If init failed, use direct iommu and null setup functions */
diff --git a/arch/powerpc/sysdev/fsl_85xx_cache_ctlr.h b/arch/powerpc/sysdev/fsl_85xx_cache_ctlr.h
new file mode 100644
index 000000000000..60c9c0bd5ba2
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_85xx_cache_ctlr.h
@@ -0,0 +1,101 @@
+/*
+ * Copyright 2009-2010 Freescale Semiconductor, Inc
+ *
+ * QorIQ based Cache Controller Memory Mapped Registers
+ *
+ * Author: Vivek Mahajan <vivek.mahajan@freescale.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of