diff options
| author | Michael Ellerman <mpe@ellerman.id.au> | 2015-04-06 23:07:42 -0400 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2015-04-06 23:07:42 -0400 |
| commit | 28ea605caac49497e5e34a73ee4f4682fc035f1d (patch) | |
| tree | a9218849d16d167c7c3890a9fd33c239018bf166 /arch/powerpc/sysdev | |
| parent | 6a840791182c7dab3428c6f005776b50e62e53ef (diff) | |
| parent | d41444daba1fd65e5a998c83398f44524f638d07 (diff) | |
Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux into next
Freescale updates from Scott:
"Highlights include BMan device tree nodes, an MSI erratum workaround, a
couple minor performance improvements, config updates, and misc
fixes/cleanup."
Diffstat (limited to 'arch/powerpc/sysdev')
| -rw-r--r-- | arch/powerpc/sysdev/fsl_msi.c | 29 | ||||
| -rw-r--r-- | arch/powerpc/sysdev/fsl_msi.h | 2 | ||||
| -rw-r--r-- | arch/powerpc/sysdev/mpic.c | 11 | ||||
| -rw-r--r-- | arch/powerpc/sysdev/qe_lib/qe_io.c | 25 |
4 files changed, 38 insertions, 29 deletions
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c index 4bbb4b8dfd09..f086c6f22dc9 100644 --- a/arch/powerpc/sysdev/fsl_msi.c +++ b/arch/powerpc/sysdev/fsl_msi.c | |||
| @@ -162,7 +162,17 @@ static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq, | |||
| 162 | msg->address_lo = lower_32_bits(address); | 162 | msg->address_lo = lower_32_bits(address); |
| 163 | msg->address_hi = upper_32_bits(address); | 163 | msg->address_hi = upper_32_bits(address); |
| 164 | 164 | ||
| 165 | msg->data = hwirq; | 165 | /* |
| 166 | * MPIC version 2.0 has erratum PIC1. It causes | ||
| 167 | * that neither MSI nor MSI-X can work fine. | ||
| 168 | * This is a workaround to allow MSI-X to function | ||
| 169 | * properly. It only works for MSI-X, we prevent | ||
| 170 | * MSI on buggy chips in fsl_setup_msi_irqs(). | ||
| 171 | */ | ||
| 172 | if (msi_data->feature & MSI_HW_ERRATA_ENDIAN) | ||
| 173 | msg->data = __swab32(hwirq); | ||
| 174 | else | ||
| 175 | msg->data = hwirq; | ||
| 166 | 176 | ||
| 167 | pr_debug("%s: allocated srs: %d, ibs: %d\n", __func__, | 177 | pr_debug("%s: allocated srs: %d, ibs: %d\n", __func__, |
| 168 | (hwirq >> msi_data->srs_shift) & MSI_SRS_MASK, | 178 | (hwirq >> msi_data->srs_shift) & MSI_SRS_MASK, |
| @@ -180,8 +190,16 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | |||
| 180 | struct msi_msg msg; | 190 | struct msi_msg msg; |
| 181 | struct fsl_msi *msi_data; | 191 | struct fsl_msi *msi_data; |
| 182 | 192 | ||
| 183 | if (type == PCI_CAP_ID_MSIX) | 193 | if (type == PCI_CAP_ID_MSI) { |
| 184 | pr_debug("fslmsi: MSI-X untested, trying anyway.\n"); | 194 | /* |
| 195 | * MPIC version 2.0 has erratum PIC1. For now MSI | ||
| 196 | * could not work. So check to prevent MSI from | ||
| 197 | * being used on the board with this erratum. | ||
| 198 | */ | ||
| 199 | list_for_each_entry(msi_data, &msi_head, list) | ||
| 200 | if (msi_data->feature & MSI_HW_ERRATA_ENDIAN) | ||
| 201 | return -EINVAL; | ||
| 202 | } | ||
| 185 | 203 | ||
| 186 | /* | 204 | /* |
| 187 | * If the PCI node has an fsl,msi property, then we need to use it | 205 | * If the PCI node has an fsl,msi property, then we need to use it |
| @@ -446,6 +464,11 @@ static int fsl_of_msi_probe(struct platform_device *dev) | |||
| 446 | 464 | ||
| 447 | msi->feature = features->fsl_pic_ip; | 465 | msi->feature = features->fsl_pic_ip; |
| 448 | 466 | ||
| 467 | /* For erratum PIC1 on MPIC version 2.0*/ | ||
| 468 | if ((features->fsl_pic_ip & FSL_PIC_IP_MASK) == FSL_PIC_IP_MPIC | ||
| 469 | && (fsl_mpic_primary_get_version() == 0x0200)) | ||
| 470 | msi->feature |= MSI_HW_ERRATA_ENDIAN; | ||
| 471 | |||
| 449 | /* | 472 | /* |
| 450 | * Remember the phandle, so that we can match with any PCI nodes | 473 | * Remember the phandle, so that we can match with any PCI nodes |
| 451 | * that have an "fsl,msi" property. | 474 | * that have an "fsl,msi" property. |
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h index 420cfcbdac01..a67359d993e5 100644 --- a/arch/powerpc/sysdev/fsl_msi.h +++ b/arch/powerpc/sysdev/fsl_msi.h | |||
| @@ -27,6 +27,8 @@ | |||
| 27 | #define FSL_PIC_IP_IPIC 0x00000002 | 27 | #define FSL_PIC_IP_IPIC 0x00000002 |
| 28 | #define FSL_PIC_IP_VMPIC 0x00000003 | 28 | #define FSL_PIC_IP_VMPIC 0x00000003 |
| 29 | 29 | ||
| 30 | #define MSI_HW_ERRATA_ENDIAN 0x00000010 | ||
| 31 | |||
| 30 | struct fsl_msi_cascade_data; | 32 | struct fsl_msi_cascade_data; |
| 31 | 33 | ||
| 32 | struct fsl_msi { | 34 | struct fsl_msi { |
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index f72b592d60cc..fb19084c5860 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
| @@ -655,7 +655,6 @@ static inline struct mpic * mpic_from_irq_data(struct irq_data *d) | |||
| 655 | static inline void mpic_eoi(struct mpic *mpic) | 655 | static inline void mpic_eoi(struct mpic *mpic) |
| 656 | { | 656 | { |
| 657 | mpic_cpu_write(MPIC_INFO(CPU_EOI), 0); | 657 | mpic_cpu_write(MPIC_INFO(CPU_EOI), 0); |
| 658 | (void)mpic_cpu_read(MPIC_INFO(CPU_WHOAMI)); | ||
| 659 | } | 658 | } |
| 660 | 659 | ||
| 661 | /* | 660 | /* |
| @@ -1219,6 +1218,16 @@ static u32 fsl_mpic_get_version(struct mpic *mpic) | |||
| 1219 | * Exported functions | 1218 | * Exported functions |
| 1220 | */ | 1219 | */ |
| 1221 | 1220 | ||
| 1221 | u32 fsl_mpic_primary_get_version(void) | ||
| 1222 | { | ||
| 1223 | struct mpic *mpic = mpic_primary; | ||
| 1224 | |||
| 1225 | if (mpic) | ||
| 1226 | return fsl_mpic_get_version(mpic); | ||
| 1227 | |||
| 1228 | return 0; | ||
| 1229 | } | ||
| 1230 | |||
| 1222 | struct mpic * __init mpic_alloc(struct device_node *node, | 1231 | struct mpic * __init mpic_alloc(struct device_node *node, |
| 1223 | phys_addr_t phys_addr, | 1232 | phys_addr_t phys_addr, |
| 1224 | unsigned int flags, | 1233 | unsigned int flags, |
diff --git a/arch/powerpc/sysdev/qe_lib/qe_io.c b/arch/powerpc/sysdev/qe_lib/qe_io.c index d09994164daf..7ea0174f6d3d 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_io.c +++ b/arch/powerpc/sysdev/qe_lib/qe_io.c | |||
| @@ -190,28 +190,3 @@ int par_io_of_config(struct device_node *np) | |||
| 190 | return 0; | 190 | return 0; |
| 191 | } | 191 | } |
| 192 | EXPORT_SYMBOL(par_io_of_config); | 192 | EXPORT_SYMBOL(par_io_of_config); |
| 193 | |||
| 194 | #ifdef DEBUG | ||
| 195 | static void dump_par_io(void) | ||
| 196 | { | ||
| 197 | unsigned int i; | ||
| 198 | |||
| 199 | printk(KERN_INFO "%s: par_io=%p\n", __func__, par_io); | ||
| 200 | for (i = 0; i < num_par_io_ports; i++) { | ||
| 201 | printk(KERN_INFO " cpodr[%u]=%08x\n", i, | ||
| 202 | in_be32(&par_io[i].cpodr)); | ||
| 203 | printk(KERN_INFO " cpdata[%u]=%08x\n", i, | ||
| 204 | in_be32(&par_io[i].cpdata)); | ||
| 205 | printk(KERN_INFO " cpdir1[%u]=%08x\n", i, | ||
| 206 | in_be32(&par_io[i].cpdir1)); | ||
| 207 | printk(KERN_INFO " cpdir2[%u]=%08x\n", i, | ||
| 208 | in_be32(&par_io[i].cpdir2)); | ||
| 209 | printk(KERN_INFO " cppar1[%u]=%08x\n", i, | ||
| 210 | in_be32(&par_io[i].cppar1)); | ||
| 211 | printk(KERN_INFO " cppar2[%u]=%08x\n", i, | ||
| 212 | in_be32(&par_io[i].cppar2)); | ||
| 213 | } | ||
| 214 | |||
| 215 | } | ||
| 216 | EXPORT_SYMBOL(dump_par_io); | ||
| 217 | #endif /* DEBUG */ | ||
