Merge commit 'kumar/next' into merge

3 files changed, 47 insertions, 10 deletions

diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index 971483f0dfac..1709ac5aac7c 100644
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -143,13 +143,23 @@ static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type)
         struct irq_desc *desc = irq_to_desc(virq);
         unsigned int vold, vnew, edibit;
 
-        if (flow_type == IRQ_TYPE_NONE)
-                flow_type = IRQ_TYPE_LEVEL_LOW;
-
-        if (flow_type & IRQ_TYPE_EDGE_RISING) {
-                printk(KERN_ERR "CPM2 PIC: sense type 0x%x not supported\n",
-                        flow_type);
-                return -EINVAL;
+        /* Port C interrupts are either IRQ_TYPE_EDGE_FALLING or
+         * IRQ_TYPE_EDGE_BOTH (default).  All others are IRQ_TYPE_EDGE_FALLING
+         * or IRQ_TYPE_LEVEL_LOW (default)
+         */
+        if (src >= CPM2_IRQ_PORTC15 && src <= CPM2_IRQ_PORTC0) {
+                if (flow_type == IRQ_TYPE_NONE)
+                        flow_type = IRQ_TYPE_EDGE_BOTH;
+
+                if (flow_type != IRQ_TYPE_EDGE_BOTH &&
+                    flow_type != IRQ_TYPE_EDGE_FALLING)
+                        goto err_sense;
+        } else {
+                if (flow_type == IRQ_TYPE_NONE)
+                        flow_type = IRQ_TYPE_LEVEL_LOW;
+
+                if (flow_type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_HIGH))
+                        goto err_sense;
         }
 
         desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
@@ -181,6 +191,10 @@ static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type)
         if (vold != vnew)
                 out_be32(&cpm2_intctl->ic_siexr, vnew);
         return 0;
+
+err_sense:
+        pr_err("CPM2 PIC: sense type 0x%x not supported\n", flow_type);
+        return -EINVAL;
 }
 
 static struct irq_chip cpm2_pic = {
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 4e3a3e345ab3..e1a028c1f18d 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -464,8 +464,7 @@ static void __iomem *mpc83xx_pcie_remap_cfg(struct pci_bus *bus,
 {
         struct pci_controller *hose = pci_bus_to_host(bus);
         struct mpc83xx_pcie_priv *pcie = hose->dn->data;
-        u8 bus_no = bus->number - hose->first_busno;
-        u32 dev_base = bus_no << 24 | devfn << 16;
+        u32 dev_base = bus->number << 24 | devfn << 16;
         int ret;
 
         ret = mpc83xx_pcie_exclude_device(bus, devfn);
@@ -515,12 +514,17 @@ static int mpc83xx_pcie_read_config(struct pci_bus *bus, unsigned int devfn,
 static int mpc83xx_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
                                      int offset, int len, u32 val)
 {
+        struct pci_controller *hose = pci_bus_to_host(bus);
         void __iomem *cfg_addr;
 
         cfg_addr = mpc83xx_pcie_remap_cfg(bus, devfn, offset);
         if (!cfg_addr)
                 return PCIBIOS_DEVICE_NOT_FOUND;
 
+        /* PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS */
+        if (offset == PCI_PRIMARY_BUS && bus->number == hose->first_busno)
+                val &= 0xffffff00;
+
         switch (len) {
         case 1:
                 out_8(cfg_addr, val);
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c b/arch/powerpc/sysdev/mpc8xxx_gpio.c
index 103eace36194..ee1c0e1cf4a7 100644
--- a/arch/powerpc/sysdev/mpc8xxx_gpio.c
+++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c
@@ -54,6 +54,22 @@ static void mpc8xxx_gpio_save_regs(struct of_mm_gpio_chip *mm)
         mpc8xxx_gc->data = in_be32(mm->regs + GPIO_DAT);
 }
 
+/* Workaround GPIO 1 errata on MPC8572/MPC8536. The status of GPIOs
+ * defined as output cannot be determined by reading GPDAT register,
+ * so we use shadow data register instead. The status of input pins
+ * is determined by reading GPDAT register.
+ */
+static int mpc8572_gpio_get(struct gpio_chip *gc, unsigned int gpio)
+{
+        u32 val;
+        struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
+        struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm);
+
+        val = in_be32(mm->regs + GPIO_DAT) & ~in_be32(mm->regs + GPIO_DIR);
+
+        return (val | mpc8xxx_gc->data) & mpc8xxx_gpio2mask(gpio);
+}
+
 static int mpc8xxx_gpio_get(struct gpio_chip *gc, unsigned int gpio)
 {
         struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);
@@ -136,7 +152,10 @@ static void __init mpc8xxx_add_controller(struct device_node *np)
         gc->ngpio = MPC8XXX_GPIO_PINS;
         gc->direction_input = mpc8xxx_gpio_dir_in;
         gc->direction_output = mpc8xxx_gpio_dir_out;
-        gc->get = mpc8xxx_gpio_get;
+        if (of_device_is_compatible(np, "fsl,mpc8572-gpio"))
+                gc->get = mpc8572_gpio_get;
+        else
+                gc->get = mpc8xxx_gpio_get;
         gc->set = mpc8xxx_gpio_set;
 
         ret = of_mm_gpiochip_add(np, mm_gc);