diff options
author | Andrea Bastoni <bastoni@cs.unc.edu> | 2010-05-30 19:16:45 -0400 |
---|---|---|
committer | Andrea Bastoni <bastoni@cs.unc.edu> | 2010-05-30 19:16:45 -0400 |
commit | ada47b5fe13d89735805b566185f4885f5a3f750 (patch) | |
tree | 644b88f8a71896307d71438e9b3af49126ffb22b /arch/powerpc/sysdev | |
parent | 43e98717ad40a4ae64545b5ba047c7b86aa44f4f (diff) | |
parent | 3280f21d43ee541f97f8cda5792150d2dbec20d5 (diff) |
Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master
Diffstat (limited to 'arch/powerpc/sysdev')
39 files changed, 410 insertions, 177 deletions
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 9d4b17462f13..5642924fb9fb 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile | |||
@@ -16,6 +16,7 @@ obj-$(CONFIG_U3_DART) += dart_iommu.o | |||
16 | obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o | 16 | obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o |
17 | obj-$(CONFIG_FSL_SOC) += fsl_soc.o | 17 | obj-$(CONFIG_FSL_SOC) += fsl_soc.o |
18 | obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y) | 18 | obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y) |
19 | obj-$(CONFIG_FSL_PMC) += fsl_pmc.o | ||
19 | obj-$(CONFIG_FSL_LBC) += fsl_lbc.o | 20 | obj-$(CONFIG_FSL_LBC) += fsl_lbc.o |
20 | obj-$(CONFIG_FSL_GTM) += fsl_gtm.o | 21 | obj-$(CONFIG_FSL_GTM) += fsl_gtm.o |
21 | obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o | 22 | obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o |
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c index 82424cd7e128..8d103ca6d6ab 100644 --- a/arch/powerpc/sysdev/cpm1.c +++ b/arch/powerpc/sysdev/cpm1.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include <linux/irq.h> | 31 | #include <linux/irq.h> |
32 | #include <linux/module.h> | 32 | #include <linux/module.h> |
33 | #include <linux/spinlock.h> | 33 | #include <linux/spinlock.h> |
34 | #include <linux/slab.h> | ||
34 | #include <asm/page.h> | 35 | #include <asm/page.h> |
35 | #include <asm/pgtable.h> | 36 | #include <asm/pgtable.h> |
36 | #include <asm/8xx_immap.h> | 37 | #include <asm/8xx_immap.h> |
@@ -77,7 +78,7 @@ static void cpm_end_irq(unsigned int irq) | |||
77 | } | 78 | } |
78 | 79 | ||
79 | static struct irq_chip cpm_pic = { | 80 | static struct irq_chip cpm_pic = { |
80 | .typename = " CPM PIC ", | 81 | .name = "CPM PIC", |
81 | .mask = cpm_mask_irq, | 82 | .mask = cpm_mask_irq, |
82 | .unmask = cpm_unmask_irq, | 83 | .unmask = cpm_unmask_irq, |
83 | .eoi = cpm_end_irq, | 84 | .eoi = cpm_end_irq, |
@@ -102,7 +103,7 @@ static int cpm_pic_host_map(struct irq_host *h, unsigned int virq, | |||
102 | { | 103 | { |
103 | pr_debug("cpm_pic_host_map(%d, 0x%lx)\n", virq, hw); | 104 | pr_debug("cpm_pic_host_map(%d, 0x%lx)\n", virq, hw); |
104 | 105 | ||
105 | get_irq_desc(virq)->status |= IRQ_LEVEL; | 106 | irq_to_desc(virq)->status |= IRQ_LEVEL; |
106 | set_irq_chip_and_handler(virq, &cpm_pic, handle_fasteoi_irq); | 107 | set_irq_chip_and_handler(virq, &cpm_pic, handle_fasteoi_irq); |
107 | return 0; | 108 | return 0; |
108 | } | 109 | } |
@@ -485,9 +486,6 @@ int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode) | |||
485 | return -EINVAL; | 486 | return -EINVAL; |
486 | } | 487 | } |
487 | 488 | ||
488 | if (reg == &mpc8xx_immr->im_cpm.cp_sicr && mode == CPM_CLK_RX) | ||
489 | shift += 3; | ||
490 | |||
491 | for (i = 0; i < ARRAY_SIZE(clk_map); i++) { | 489 | for (i = 0; i < ARRAY_SIZE(clk_map); i++) { |
492 | if (clk_map[i][0] == target && clk_map[i][1] == clock) { | 490 | if (clk_map[i][0] == target && clk_map[i][1] == clock) { |
493 | bits = clk_map[i][2]; | 491 | bits = clk_map[i][2]; |
@@ -502,6 +500,17 @@ int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode) | |||
502 | 500 | ||
503 | bits <<= shift; | 501 | bits <<= shift; |
504 | mask <<= shift; | 502 | mask <<= shift; |
503 | |||
504 | if (reg == &mpc8xx_immr->im_cpm.cp_sicr) { | ||
505 | if (mode == CPM_CLK_RTX) { | ||
506 | bits |= bits << 3; | ||
507 | mask |= mask << 3; | ||
508 | } else if (mode == CPM_CLK_RX) { | ||
509 | bits <<= 3; | ||
510 | mask <<= 3; | ||
511 | } | ||
512 | } | ||
513 | |||
505 | out_be32(reg, (in_be32(reg) & ~mask) | bits); | 514 | out_be32(reg, (in_be32(reg) & ~mask) | bits); |
506 | 515 | ||
507 | return 0; | 516 | return 0; |
diff --git a/arch/powerpc/sysdev/cpm2.c b/arch/powerpc/sysdev/cpm2.c index eb5927212fab..8dc1e24f3c23 100644 --- a/arch/powerpc/sysdev/cpm2.c +++ b/arch/powerpc/sysdev/cpm2.c | |||
@@ -244,9 +244,6 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode) | |||
244 | return -EINVAL; | 244 | return -EINVAL; |
245 | } | 245 | } |
246 | 246 | ||
247 | if (mode == CPM_CLK_RX) | ||
248 | shift += 3; | ||
249 | |||
250 | for (i = 0; i < ARRAY_SIZE(clk_map); i++) { | 247 | for (i = 0; i < ARRAY_SIZE(clk_map); i++) { |
251 | if (clk_map[i][0] == target && clk_map[i][1] == clock) { | 248 | if (clk_map[i][0] == target && clk_map[i][1] == clock) { |
252 | bits = clk_map[i][2]; | 249 | bits = clk_map[i][2]; |
@@ -259,6 +256,14 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode) | |||
259 | bits <<= shift; | 256 | bits <<= shift; |
260 | mask <<= shift; | 257 | mask <<= shift; |
261 | 258 | ||
259 | if (mode == CPM_CLK_RTX) { | ||
260 | bits |= bits << 3; | ||
261 | mask |= mask << 3; | ||
262 | } else if (mode == CPM_CLK_RX) { | ||
263 | bits <<= 3; | ||
264 | mask <<= 3; | ||
265 | } | ||
266 | |||
262 | out_be32(reg, (in_be32(reg) & ~mask) | bits); | 267 | out_be32(reg, (in_be32(reg) & ~mask) | bits); |
263 | 268 | ||
264 | cpm2_unmap(im_cpmux); | 269 | cpm2_unmap(im_cpmux); |
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c index 78f1f7cca0a0..fcea4ff825dd 100644 --- a/arch/powerpc/sysdev/cpm2_pic.c +++ b/arch/powerpc/sysdev/cpm2_pic.c | |||
@@ -115,11 +115,13 @@ static void cpm2_ack(unsigned int virq) | |||
115 | 115 | ||
116 | static void cpm2_end_irq(unsigned int virq) | 116 | static void cpm2_end_irq(unsigned int virq) |
117 | { | 117 | { |
118 | struct irq_desc *desc; | ||
118 | int bit, word; | 119 | int bit, word; |
119 | unsigned int irq_nr = virq_to_hw(virq); | 120 | unsigned int irq_nr = virq_to_hw(virq); |
120 | 121 | ||
121 | if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)) | 122 | desc = irq_to_desc(irq_nr); |
122 | && irq_desc[irq_nr].action) { | 123 | if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)) |
124 | && desc->action) { | ||
123 | 125 | ||
124 | bit = irq_to_siubit[irq_nr]; | 126 | bit = irq_to_siubit[irq_nr]; |
125 | word = irq_to_siureg[irq_nr]; | 127 | word = irq_to_siureg[irq_nr]; |
@@ -138,16 +140,26 @@ static void cpm2_end_irq(unsigned int virq) | |||
138 | static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type) | 140 | static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type) |
139 | { | 141 | { |
140 | unsigned int src = virq_to_hw(virq); | 142 | unsigned int src = virq_to_hw(virq); |
141 | struct irq_desc *desc = get_irq_desc(virq); | 143 | struct irq_desc *desc = irq_to_desc(virq); |
142 | unsigned int vold, vnew, edibit; | 144 | unsigned int vold, vnew, edibit; |
143 | 145 | ||
144 | if (flow_type == IRQ_TYPE_NONE) | 146 | /* Port C interrupts are either IRQ_TYPE_EDGE_FALLING or |
145 | flow_type = IRQ_TYPE_LEVEL_LOW; | 147 | * IRQ_TYPE_EDGE_BOTH (default). All others are IRQ_TYPE_EDGE_FALLING |
146 | 148 | * or IRQ_TYPE_LEVEL_LOW (default) | |
147 | if (flow_type & IRQ_TYPE_EDGE_RISING) { | 149 | */ |
148 | printk(KERN_ERR "CPM2 PIC: sense type 0x%x not supported\n", | 150 | if (src >= CPM2_IRQ_PORTC15 && src <= CPM2_IRQ_PORTC0) { |
149 | flow_type); | 151 | if (flow_type == IRQ_TYPE_NONE) |
150 | return -EINVAL; | 152 | flow_type = IRQ_TYPE_EDGE_BOTH; |
153 | |||
154 | if (flow_type != IRQ_TYPE_EDGE_BOTH && | ||
155 | flow_type != IRQ_TYPE_EDGE_FALLING) | ||
156 | goto err_sense; | ||
157 | } else { | ||
158 | if (flow_type == IRQ_TYPE_NONE) | ||
159 | flow_type = IRQ_TYPE_LEVEL_LOW; | ||
160 | |||
161 | if (flow_type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_HIGH)) | ||
162 | goto err_sense; | ||
151 | } | 163 | } |
152 | 164 | ||
153 | desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); | 165 | desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); |
@@ -179,10 +191,14 @@ static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type) | |||
179 | if (vold != vnew) | 191 | if (vold != vnew) |
180 | out_be32(&cpm2_intctl->ic_siexr, vnew); | 192 | out_be32(&cpm2_intctl->ic_siexr, vnew); |
181 | return 0; | 193 | return 0; |
194 | |||
195 | err_sense: | ||
196 | pr_err("CPM2 PIC: sense type 0x%x not supported\n", flow_type); | ||
197 | return -EINVAL; | ||
182 | } | 198 | } |
183 | 199 | ||
184 | static struct irq_chip cpm2_pic = { | 200 | static struct irq_chip cpm2_pic = { |
185 | .typename = " CPM2 SIU ", | 201 | .name = "CPM2 SIU", |
186 | .mask = cpm2_mask_irq, | 202 | .mask = cpm2_mask_irq, |
187 | .unmask = cpm2_unmask_irq, | 203 | .unmask = cpm2_unmask_irq, |
188 | .ack = cpm2_ack, | 204 | .ack = cpm2_ack, |
@@ -210,13 +226,13 @@ static int cpm2_pic_host_map(struct irq_host *h, unsigned int virq, | |||
210 | { | 226 | { |
211 | pr_debug("cpm2_pic_host_map(%d, 0x%lx)\n", virq, hw); | 227 | pr_debug("cpm2_pic_host_map(%d, 0x%lx)\n", virq, hw); |
212 | 228 | ||
213 | get_irq_desc(virq)->status |= IRQ_LEVEL; | 229 | irq_to_desc(virq)->status |= IRQ_LEVEL; |
214 | set_irq_chip_and_handler(virq, &cpm2_pic, handle_level_irq); | 230 | set_irq_chip_and_handler(virq, &cpm2_pic, handle_level_irq); |
215 | return 0; | 231 | return 0; |
216 | } | 232 | } |
217 | 233 | ||
218 | static int cpm2_pic_host_xlate(struct irq_host *h, struct device_node *ct, | 234 | static int cpm2_pic_host_xlate(struct irq_host *h, struct device_node *ct, |
219 | u32 *intspec, unsigned int intsize, | 235 | const u32 *intspec, unsigned int intsize, |
220 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | 236 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) |
221 | { | 237 | { |
222 | *out_hwirq = intspec[0]; | 238 | *out_hwirq = intspec[0]; |
diff --git a/arch/powerpc/sysdev/cpm2_pic.h b/arch/powerpc/sysdev/cpm2_pic.h index 30e5828a2781..2c5f70c24485 100644 --- a/arch/powerpc/sysdev/cpm2_pic.h +++ b/arch/powerpc/sysdev/cpm2_pic.h | |||
@@ -3,6 +3,6 @@ | |||
3 | 3 | ||
4 | extern unsigned int cpm2_get_irq(void); | 4 | extern unsigned int cpm2_get_irq(void); |
5 | 5 | ||
6 | extern void cpm2_pic_init(struct device_node*); | 6 | extern void cpm2_pic_init(struct device_node *); |
7 | 7 | ||
8 | #endif /* _PPC_KERNEL_CPM2_H */ | 8 | #endif /* _PPC_KERNEL_CPM2_H */ |
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c index e4b6d66d93de..88b9812c854f 100644 --- a/arch/powerpc/sysdev/cpm_common.c +++ b/arch/powerpc/sysdev/cpm_common.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/of_device.h> | 21 | #include <linux/of_device.h> |
22 | #include <linux/spinlock.h> | 22 | #include <linux/spinlock.h> |
23 | #include <linux/of.h> | 23 | #include <linux/of.h> |
24 | #include <linux/slab.h> | ||
24 | 25 | ||
25 | #include <asm/udbg.h> | 26 | #include <asm/udbg.h> |
26 | #include <asm/io.h> | 27 | #include <asm/io.h> |
@@ -72,7 +73,7 @@ static phys_addr_t muram_pbase; | |||
72 | /* Max address size we deal with */ | 73 | /* Max address size we deal with */ |
73 | #define OF_MAX_ADDR_CELLS 4 | 74 | #define OF_MAX_ADDR_CELLS 4 |
74 | 75 | ||
75 | int __init cpm_muram_init(void) | 76 | int cpm_muram_init(void) |
76 | { | 77 | { |
77 | struct device_node *np; | 78 | struct device_node *np; |
78 | struct resource r; | 79 | struct resource r; |
@@ -81,6 +82,9 @@ int __init cpm_muram_init(void) | |||
81 | int i = 0; | 82 | int i = 0; |
82 | int ret = 0; | 83 | int ret = 0; |
83 | 84 | ||
85 | if (muram_pbase) | ||
86 | return 0; | ||
87 | |||
84 | spin_lock_init(&cpm_muram_lock); | 88 | spin_lock_init(&cpm_muram_lock); |
85 | /* initialize the info header */ | 89 | /* initialize the info header */ |
86 | rh_init(&cpm_muram_info, 1, | 90 | rh_init(&cpm_muram_info, 1, |
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c index ae3c4db86fe8..c8b96ed7c015 100644 --- a/arch/powerpc/sysdev/dart_iommu.c +++ b/arch/powerpc/sysdev/dart_iommu.c | |||
@@ -29,7 +29,6 @@ | |||
29 | 29 | ||
30 | #include <linux/init.h> | 30 | #include <linux/init.h> |
31 | #include <linux/types.h> | 31 | #include <linux/types.h> |
32 | #include <linux/slab.h> | ||
33 | #include <linux/mm.h> | 32 | #include <linux/mm.h> |
34 | #include <linux/spinlock.h> | 33 | #include <linux/spinlock.h> |
35 | #include <linux/string.h> | 34 | #include <linux/string.h> |
@@ -38,6 +37,7 @@ | |||
38 | #include <linux/vmalloc.h> | 37 | #include <linux/vmalloc.h> |
39 | #include <linux/suspend.h> | 38 | #include <linux/suspend.h> |
40 | #include <linux/lmb.h> | 39 | #include <linux/lmb.h> |
40 | #include <linux/gfp.h> | ||
41 | #include <asm/io.h> | 41 | #include <asm/io.h> |
42 | #include <asm/prom.h> | 42 | #include <asm/prom.h> |
43 | #include <asm/iommu.h> | 43 | #include <asm/iommu.h> |
@@ -160,7 +160,7 @@ static int dart_build(struct iommu_table *tbl, long index, | |||
160 | 160 | ||
161 | dp = ((unsigned int*)tbl->it_base) + index; | 161 | dp = ((unsigned int*)tbl->it_base) + index; |
162 | 162 | ||
163 | /* On U3, all memory is contigous, so we can move this | 163 | /* On U3, all memory is contiguous, so we can move this |
164 | * out of the loop. | 164 | * out of the loop. |
165 | */ | 165 | */ |
166 | l = npages; | 166 | l = npages; |
diff --git a/arch/powerpc/sysdev/fsl_gtm.c b/arch/powerpc/sysdev/fsl_gtm.c index 714ec02fed2e..eca4545dd52e 100644 --- a/arch/powerpc/sysdev/fsl_gtm.c +++ b/arch/powerpc/sysdev/fsl_gtm.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/of.h> | 20 | #include <linux/of.h> |
21 | #include <linux/spinlock.h> | 21 | #include <linux/spinlock.h> |
22 | #include <linux/bitops.h> | 22 | #include <linux/bitops.h> |
23 | #include <linux/slab.h> | ||
23 | #include <asm/fsl_gtm.h> | 24 | #include <asm/fsl_gtm.h> |
24 | 25 | ||
25 | #define GTCFR_STP(x) ((x) & 1 ? 1 << 5 : 1 << 1) | 26 | #define GTCFR_STP(x) ((x) & 1 ? 1 << 5 : 1 << 1) |
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c index da38a1ff97bb..3482e3fd89c0 100644 --- a/arch/powerpc/sysdev/fsl_msi.c +++ b/arch/powerpc/sysdev/fsl_msi.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/bootmem.h> | 16 | #include <linux/bootmem.h> |
17 | #include <linux/msi.h> | 17 | #include <linux/msi.h> |
18 | #include <linux/pci.h> | 18 | #include <linux/pci.h> |
19 | #include <linux/slab.h> | ||
19 | #include <linux/of_platform.h> | 20 | #include <linux/of_platform.h> |
20 | #include <sysdev/fsl_soc.h> | 21 | #include <sysdev/fsl_soc.h> |
21 | #include <asm/prom.h> | 22 | #include <asm/prom.h> |
@@ -47,7 +48,7 @@ static struct irq_chip fsl_msi_chip = { | |||
47 | .mask = mask_msi_irq, | 48 | .mask = mask_msi_irq, |
48 | .unmask = unmask_msi_irq, | 49 | .unmask = unmask_msi_irq, |
49 | .ack = fsl_msi_end_irq, | 50 | .ack = fsl_msi_end_irq, |
50 | .typename = " FSL-MSI ", | 51 | .name = "FSL-MSI", |
51 | }; | 52 | }; |
52 | 53 | ||
53 | static int fsl_msi_host_map(struct irq_host *h, unsigned int virq, | 54 | static int fsl_msi_host_map(struct irq_host *h, unsigned int virq, |
@@ -55,7 +56,7 @@ static int fsl_msi_host_map(struct irq_host *h, unsigned int virq, | |||
55 | { | 56 | { |
56 | struct irq_chip *chip = &fsl_msi_chip; | 57 | struct irq_chip *chip = &fsl_msi_chip; |
57 | 58 | ||
58 | get_irq_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING; | 59 | irq_to_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING; |
59 | 60 | ||
60 | set_irq_chip_and_handler(virq, chip, handle_edge_irq); | 61 | set_irq_chip_and_handler(virq, chip, handle_edge_irq); |
61 | 62 | ||
@@ -173,7 +174,7 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) | |||
173 | u32 intr_index; | 174 | u32 intr_index; |
174 | u32 have_shift = 0; | 175 | u32 have_shift = 0; |
175 | 176 | ||
176 | spin_lock(&desc->lock); | 177 | raw_spin_lock(&desc->lock); |
177 | if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) { | 178 | if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) { |
178 | if (desc->chip->mask_ack) | 179 | if (desc->chip->mask_ack) |
179 | desc->chip->mask_ack(irq); | 180 | desc->chip->mask_ack(irq); |
@@ -225,7 +226,7 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) | |||
225 | break; | 226 | break; |
226 | } | 227 | } |
227 | unlock: | 228 | unlock: |
228 | spin_unlock(&desc->lock); | 229 | raw_spin_unlock(&desc->lock); |
229 | } | 230 | } |
230 | 231 | ||
231 | static int __devinit fsl_of_msi_probe(struct of_device *dev, | 232 | static int __devinit fsl_of_msi_probe(struct of_device *dev, |
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index ae88b1448018..a14760fe513a 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/bootmem.h> | 25 | #include <linux/bootmem.h> |
26 | #include <linux/lmb.h> | 26 | #include <linux/lmb.h> |
27 | #include <linux/log2.h> | 27 | #include <linux/log2.h> |
28 | #include <linux/slab.h> | ||
28 | 29 | ||
29 | #include <asm/io.h> | 30 | #include <asm/io.h> |
30 | #include <asm/prom.h> | 31 | #include <asm/prom.h> |
@@ -56,7 +57,7 @@ static int __init fsl_pcie_check_link(struct pci_controller *hose) | |||
56 | return 0; | 57 | return 0; |
57 | } | 58 | } |
58 | 59 | ||
59 | #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx) | 60 | #if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx) |
60 | static int __init setup_one_atmu(struct ccsr_pci __iomem *pci, | 61 | static int __init setup_one_atmu(struct ccsr_pci __iomem *pci, |
61 | unsigned int index, const struct resource *res, | 62 | unsigned int index, const struct resource *res, |
62 | resource_size_t offset) | 63 | resource_size_t offset) |
@@ -392,9 +393,23 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8536, quirk_fsl_pcie_header); | |||
392 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header); | 393 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header); |
393 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header); | 394 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header); |
394 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header); | 395 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header); |
396 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1011E, quirk_fsl_pcie_header); | ||
397 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1011, quirk_fsl_pcie_header); | ||
398 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1013E, quirk_fsl_pcie_header); | ||
399 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1013, quirk_fsl_pcie_header); | ||
400 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1020E, quirk_fsl_pcie_header); | ||
401 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1020, quirk_fsl_pcie_header); | ||
402 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1022E, quirk_fsl_pcie_header); | ||
403 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P1022, quirk_fsl_pcie_header); | ||
404 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2010E, quirk_fsl_pcie_header); | ||
405 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2010, quirk_fsl_pcie_header); | ||
395 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020E, quirk_fsl_pcie_header); | 406 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020E, quirk_fsl_pcie_header); |
396 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020, quirk_fsl_pcie_header); | 407 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020, quirk_fsl_pcie_header); |
397 | #endif /* CONFIG_PPC_85xx || CONFIG_PPC_86xx */ | 408 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4040E, quirk_fsl_pcie_header); |
409 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4040, quirk_fsl_pcie_header); | ||
410 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4080E, quirk_fsl_pcie_header); | ||
411 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4080, quirk_fsl_pcie_header); | ||
412 | #endif /* CONFIG_FSL_SOC_BOOKE || CONFIG_PPC_86xx */ | ||
398 | 413 | ||
399 | #if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x) | 414 | #if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x) |
400 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314E, quirk_fsl_pcie_header); | 415 | DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8314E, quirk_fsl_pcie_header); |
@@ -450,8 +465,7 @@ static void __iomem *mpc83xx_pcie_remap_cfg(struct pci_bus *bus, | |||
450 | { | 465 | { |
451 | struct pci_controller *hose = pci_bus_to_host(bus); | 466 | struct pci_controller *hose = pci_bus_to_host(bus); |
452 | struct mpc83xx_pcie_priv *pcie = hose->dn->data; | 467 | struct mpc83xx_pcie_priv *pcie = hose->dn->data; |
453 | u8 bus_no = bus->number - hose->first_busno; | 468 | u32 dev_base = bus->number << 24 | devfn << 16; |
454 | u32 dev_base = bus_no << 24 | devfn << 16; | ||
455 | int ret; | 469 | int ret; |
456 | 470 | ||
457 | ret = mpc83xx_pcie_exclude_device(bus, devfn); | 471 | ret = mpc83xx_pcie_exclude_device(bus, devfn); |
@@ -501,12 +515,17 @@ static int mpc83xx_pcie_read_config(struct pci_bus *bus, unsigned int devfn, | |||
501 | static int mpc83xx_pcie_write_config(struct pci_bus *bus, unsigned int devfn, | 515 | static int mpc83xx_pcie_write_config(struct pci_bus *bus, unsigned int devfn, |
502 | int offset, int len, u32 val) | 516 | int offset, int len, u32 val) |
503 | { | 517 | { |
518 | struct pci_controller *hose = pci_bus_to_host(bus); | ||
504 | void __iomem *cfg_addr; | 519 | void __iomem *cfg_addr; |
505 | 520 | ||
506 | cfg_addr = mpc83xx_pcie_remap_cfg(bus, devfn, offset); | 521 | cfg_addr = mpc83xx_pcie_remap_cfg(bus, devfn, offset); |
507 | if (!cfg_addr) | 522 | if (!cfg_addr) |
508 | return PCIBIOS_DEVICE_NOT_FOUND; | 523 | return PCIBIOS_DEVICE_NOT_FOUND; |
509 | 524 | ||
525 | /* PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS */ | ||
526 | if (offset == PCI_PRIMARY_BUS && bus->number == hose->first_busno) | ||
527 | val &= 0xffffff00; | ||
528 | |||
510 | switch (len) { | 529 | switch (len) { |
511 | case 1: | 530 | case 1: |
512 | out_8(cfg_addr, val); | 531 | out_8(cfg_addr, val); |
diff --git a/arch/powerpc/sysdev/fsl_pmc.c b/arch/powerpc/sysdev/fsl_pmc.c new file mode 100644 index 000000000000..a7635a993dca --- /dev/null +++ b/arch/powerpc/sysdev/fsl_pmc.c | |||
@@ -0,0 +1,88 @@ | |||
1 | /* | ||
2 | * Suspend/resume support | ||
3 | * | ||
4 | * Copyright 2009 MontaVista Software, Inc. | ||
5 | * | ||
6 | * Author: Anton Vorontsov <avorontsov@ru.mvista.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | */ | ||
13 | |||
14 | #include <linux/init.h> | ||
15 | #include <linux/types.h> | ||
16 | #include <linux/errno.h> | ||
17 | #include <linux/suspend.h> | ||
18 | #include <linux/delay.h> | ||
19 | #include <linux/device.h> | ||
20 | #include <linux/of_platform.h> | ||
21 | |||
22 | struct pmc_regs { | ||
23 | __be32 devdisr; | ||
24 | __be32 devdisr2; | ||
25 | __be32 :32; | ||
26 | __be32 :32; | ||
27 | __be32 pmcsr; | ||
28 | #define PMCSR_SLP (1 << 17) | ||
29 | }; | ||
30 | |||
31 | static struct device *pmc_dev; | ||
32 | static struct pmc_regs __iomem *pmc_regs; | ||
33 | |||
34 | static int pmc_suspend_enter(suspend_state_t state) | ||
35 | { | ||
36 | int ret; | ||
37 | |||
38 | setbits32(&pmc_regs->pmcsr, PMCSR_SLP); | ||
39 | /* At this point, the CPU is asleep. */ | ||
40 | |||
41 | /* Upon resume, wait for SLP bit to be clear. */ | ||
42 | ret = spin_event_timeout((in_be32(&pmc_regs->pmcsr) & PMCSR_SLP) == 0, | ||
43 | 10000, 10) ? 0 : -ETIMEDOUT; | ||
44 | if (ret) | ||
45 | dev_err(pmc_dev, "tired waiting for SLP bit to clear\n"); | ||
46 | return ret; | ||
47 | } | ||
48 | |||
49 | static int pmc_suspend_valid(suspend_state_t state) | ||
50 | { | ||
51 | if (state != PM_SUSPEND_STANDBY) | ||
52 | return 0; | ||
53 | return 1; | ||
54 | } | ||
55 | |||
56 | static struct platform_suspend_ops pmc_suspend_ops = { | ||
57 | .valid = pmc_suspend_valid, | ||
58 | .enter = pmc_suspend_enter, | ||
59 | }; | ||
60 | |||
61 | static int pmc_probe(struct of_device *ofdev, const struct of_device_id *id) | ||
62 | { | ||
63 | pmc_regs = of_iomap(ofdev->node, 0); | ||
64 | if (!pmc_regs) | ||
65 | return -ENOMEM; | ||
66 | |||
67 | pmc_dev = &ofdev->dev; | ||
68 | suspend_set_ops(&pmc_suspend_ops); | ||
69 | return 0; | ||
70 | } | ||
71 | |||
72 | static const struct of_device_id pmc_ids[] = { | ||
73 | { .compatible = "fsl,mpc8548-pmc", }, | ||
74 | { .compatible = "fsl,mpc8641d-pmc", }, | ||
75 | { }, | ||
76 | }; | ||
77 | |||
78 | static struct of_platform_driver pmc_driver = { | ||
79 | .driver.name = "fsl-pmc", | ||
80 | .match_table = pmc_ids, | ||
81 | .probe = pmc_probe, | ||
82 | }; | ||
83 | |||
84 | static int __init pmc_init(void) | ||
85 | { | ||
86 | return of_register_platform_driver(&pmc_driver); | ||
87 | } | ||
88 | device_initcall(pmc_init); | ||
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c index 757a83fe5e59..71fba88f50db 100644 --- a/arch/powerpc/sysdev/fsl_rio.c +++ b/arch/powerpc/sysdev/fsl_rio.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/rio_drv.h> | 23 | #include <linux/rio_drv.h> |
24 | #include <linux/of_platform.h> | 24 | #include <linux/of_platform.h> |
25 | #include <linux/delay.h> | 25 | #include <linux/delay.h> |
26 | #include <linux/slab.h> | ||
26 | 27 | ||
27 | #include <asm/io.h> | 28 | #include <asm/io.h> |
28 | 29 | ||
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index adca4affcf1f..b91f7acdda6f 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c | |||
@@ -372,7 +372,7 @@ err: | |||
372 | 372 | ||
373 | arch_initcall(fsl_usb_of_init); | 373 | arch_initcall(fsl_usb_of_init); |
374 | 374 | ||
375 | #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx) | 375 | #if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx) |
376 | static __be32 __iomem *rstcr; | 376 | static __be32 __iomem *rstcr; |
377 | 377 | ||
378 | static int __init setup_rstcr(void) | 378 | static int __init setup_rstcr(void) |
diff --git a/arch/powerpc/sysdev/grackle.c b/arch/powerpc/sysdev/grackle.c index 5da37c2f22ee..cf27df6e508b 100644 --- a/arch/powerpc/sysdev/grackle.c +++ b/arch/powerpc/sysdev/grackle.c | |||
@@ -56,9 +56,9 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable) | |||
56 | void __init setup_grackle(struct pci_controller *hose) | 56 | void __init setup_grackle(struct pci_controller *hose) |
57 | { | 57 | { |
58 | setup_indirect_pci(hose, 0xfec00000, 0xfee00000, 0); | 58 | setup_indirect_pci(hose, 0xfec00000, 0xfee00000, 0); |
59 | if (machine_is_compatible("PowerMac1,1")) | 59 | if (of_machine_is_compatible("PowerMac1,1")) |
60 | ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS); | 60 | ppc_pci_add_flags(PPC_PCI_REASSIGN_ALL_BUS); |
61 | if (machine_is_compatible("AAPL,PowerBook1998")) | 61 | if (of_machine_is_compatible("AAPL,PowerBook1998")) |
62 | grackle_set_loop_snoop(hose, 1); | 62 | grackle_set_loop_snoop(hose, 1); |
63 | #if 0 /* Disabled for now, HW problems ??? */ | 63 | #if 0 /* Disabled for now, HW problems ??? */ |
64 | grackle_set_stg(hose, 1); | 64 | grackle_set_stg(hose, 1); |
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c index a96584ab33dd..6323e70e6bf4 100644 --- a/arch/powerpc/sysdev/i8259.c +++ b/arch/powerpc/sysdev/i8259.c | |||
@@ -23,7 +23,7 @@ static unsigned char cached_8259[2] = { 0xff, 0xff }; | |||
23 | #define cached_A1 (cached_8259[0]) | 23 | #define cached_A1 (cached_8259[0]) |
24 | #define cached_21 (cached_8259[1]) | 24 | #define cached_21 (cached_8259[1]) |
25 | 25 | ||
26 | static DEFINE_SPINLOCK(i8259_lock); | 26 | static DEFINE_RAW_SPINLOCK(i8259_lock); |
27 | 27 | ||
28 | static struct irq_host *i8259_host; | 28 | static struct irq_host *i8259_host; |
29 | 29 | ||
@@ -42,7 +42,7 @@ unsigned int i8259_irq(void) | |||
42 | if (pci_intack) | 42 | if (pci_intack) |
43 | irq = readb(pci_intack); | 43 | irq = readb(pci_intack); |
44 | else { | 44 | else { |
45 | spin_lock(&i8259_lock); | 45 | raw_spin_lock(&i8259_lock); |
46 | lock = 1; | 46 | lock = 1; |
47 | 47 | ||
48 | /* Perform an interrupt acknowledge cycle on controller 1. */ | 48 | /* Perform an interrupt acknowledge cycle on controller 1. */ |
@@ -74,7 +74,7 @@ unsigned int i8259_irq(void) | |||
74 | irq = NO_IRQ; | 74 | irq = NO_IRQ; |
75 | 75 | ||
76 | if (lock) | 76 | if (lock) |
77 | spin_unlock(&i8259_lock); | 77 | raw_spin_unlock(&i8259_lock); |
78 | return irq; | 78 | return irq; |
79 | } | 79 | } |
80 | 80 | ||
@@ -82,7 +82,7 @@ static void i8259_mask_and_ack_irq(unsigned int irq_nr) | |||
82 | { | 82 | { |
83 | unsigned long flags; | 83 | unsigned long flags; |
84 | 84 | ||
85 | spin_lock_irqsave(&i8259_lock, flags); | 85 | raw_spin_lock_irqsave(&i8259_lock, flags); |
86 | if (irq_nr > 7) { | 86 | if (irq_nr > 7) { |
87 | cached_A1 |= 1 << (irq_nr-8); | 87 | cached_A1 |= 1 << (irq_nr-8); |
88 | inb(0xA1); /* DUMMY */ | 88 | inb(0xA1); /* DUMMY */ |
@@ -95,7 +95,7 @@ static void i8259_mask_and_ack_irq(unsigned int irq_nr) | |||
95 | outb(cached_21, 0x21); | 95 | outb(cached_21, 0x21); |
96 | outb(0x20, 0x20); /* Non-specific EOI */ | 96 | outb(0x20, 0x20); /* Non-specific EOI */ |
97 | } | 97 | } |
98 | spin_unlock_irqrestore(&i8259_lock, flags); | 98 | raw_spin_unlock_irqrestore(&i8259_lock, flags); |
99 | } | 99 | } |
100 | 100 | ||
101 | static void i8259_set_irq_mask(int irq_nr) | 101 | static void i8259_set_irq_mask(int irq_nr) |
@@ -110,13 +110,13 @@ static void i8259_mask_irq(unsigned int irq_nr) | |||
110 | 110 | ||
111 | pr_debug("i8259_mask_irq(%d)\n", irq_nr); | 111 | pr_debug("i8259_mask_irq(%d)\n", irq_nr); |
112 | 112 | ||
113 | spin_lock_irqsave(&i8259_lock, flags); | 113 | raw_spin_lock_irqsave(&i8259_lock, flags); |
114 | if (irq_nr < 8) | 114 | if (irq_nr < 8) |
115 | cached_21 |= 1 << irq_nr; | 115 | cached_21 |= 1 << irq_nr; |
116 | else | 116 | else |
117 | cached_A1 |= 1 << (irq_nr-8); | 117 | cached_A1 |= 1 << (irq_nr-8); |
118 | i8259_set_irq_mask(irq_nr); | 118 | i8259_set_irq_mask(irq_nr); |
119 | spin_unlock_irqrestore(&i8259_lock, flags); | 119 | raw_spin_unlock_irqrestore(&i8259_lock, flags); |
120 | } | 120 | } |
121 | 121 | ||
122 | static void i8259_unmask_irq(unsigned int irq_nr) | 122 | static void i8259_unmask_irq(unsigned int irq_nr) |
@@ -125,17 +125,17 @@ static void i8259_unmask_irq(unsigned int irq_nr) | |||
125 | 125 | ||
126 | pr_debug("i8259_unmask_irq(%d)\n", irq_nr); | 126 | pr_debug("i8259_unmask_irq(%d)\n", irq_nr); |
127 | 127 | ||
128 | spin_lock_irqsave(&i8259_lock, flags); | 128 | raw_spin_lock_irqsave(&i8259_lock, flags); |
129 | if (irq_nr < 8) | 129 | if (irq_nr < 8) |
130 | cached_21 &= ~(1 << irq_nr); | 130 | cached_21 &= ~(1 << irq_nr); |
131 | else | 131 | else |
132 | cached_A1 &= ~(1 << (irq_nr-8)); | 132 | cached_A1 &= ~(1 << (irq_nr-8)); |
133 | i8259_set_irq_mask(irq_nr); | 133 | i8259_set_irq_mask(irq_nr); |
134 | spin_unlock_irqrestore(&i8259_lock, flags); | 134 | raw_spin_unlock_irqrestore(&i8259_lock, flags); |
135 | } | 135 | } |
136 | 136 | ||
137 | static struct irq_chip i8259_pic = { | 137 | static struct irq_chip i8259_pic = { |
138 | .typename = " i8259 ", | 138 | .name = "i8259", |
139 | .mask = i8259_mask_irq, | 139 | .mask = i8259_mask_irq, |
140 | .disable = i8259_mask_irq, | 140 | .disable = i8259_mask_irq, |
141 | .unmask = i8259_unmask_irq, | 141 | .unmask = i8259_unmask_irq, |
@@ -175,12 +175,12 @@ static int i8259_host_map(struct irq_host *h, unsigned int virq, | |||
175 | 175 | ||
176 | /* We block the internal cascade */ | 176 | /* We block the internal cascade */ |
177 | if (hw == 2) | 177 | if (hw == 2) |
178 | get_irq_desc(virq)->status |= IRQ_NOREQUEST; | 178 | irq_to_desc(virq)->status |= IRQ_NOREQUEST; |
179 | 179 | ||
180 | /* We use the level handler only for now, we might want to | 180 | /* We use the level handler only for now, we might want to |
181 | * be more cautious here but that works for now | 181 | * be more cautious here but that works for now |
182 | */ | 182 | */ |
183 | get_irq_desc(virq)->status |= IRQ_LEVEL; | 183 | irq_to_desc(virq)->status |= IRQ_LEVEL; |
184 | set_irq_chip_and_handler(virq, &i8259_pic, handle_level_irq); | 184 | set_irq_chip_and_handler(virq, &i8259_pic, handle_level_irq); |
185 | return 0; | 185 | return 0; |
186 | } | 186 | } |
@@ -198,7 +198,7 @@ static void i8259_host_unmap(struct irq_host *h, unsigned int virq) | |||
198 | } | 198 | } |
199 | 199 | ||
200 | static int i8259_host_xlate(struct irq_host *h, struct device_node *ct, | 200 | static int i8259_host_xlate(struct irq_host *h, struct device_node *ct, |
201 | u32 *intspec, unsigned int intsize, | 201 | const u32 *intspec, unsigned int intsize, |
202 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | 202 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) |
203 | { | 203 | { |
204 | static unsigned char map_isa_senses[4] = { | 204 | static unsigned char map_isa_senses[4] = { |
@@ -241,7 +241,7 @@ void i8259_init(struct device_node *node, unsigned long intack_addr) | |||
241 | unsigned long flags; | 241 | unsigned long flags; |
242 | 242 | ||
243 | /* initialize the controller */ | 243 | /* initialize the controller */ |
244 | spin_lock_irqsave(&i8259_lock, flags); | 244 | raw_spin_lock_irqsave(&i8259_lock, flags); |
245 | 245 | ||
246 | /* Mask all first */ | 246 | /* Mask all first */ |
247 | outb(0xff, 0xA1); | 247 | outb(0xff, 0xA1); |
@@ -273,7 +273,7 @@ void i8259_init(struct device_node *node, unsigned long intack_addr) | |||
273 | outb(cached_A1, 0xA1); | 273 | outb(cached_A1, 0xA1); |
274 | outb(cached_21, 0x21); | 274 | outb(cached_21, 0x21); |
275 | 275 | ||
276 | spin_unlock_irqrestore(&i8259_lock, flags); | 276 | raw_spin_unlock_irqrestore(&i8259_lock, flags); |
277 | 277 | ||
278 | /* create a legacy host */ | 278 | /* create a legacy host */ |
279 | i8259_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY, | 279 | i8259_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY, |
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index cb7689c4bfbd..d7b9b9c69287 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c | |||
@@ -32,7 +32,7 @@ | |||
32 | 32 | ||
33 | static struct ipic * primary_ipic; | 33 | static struct ipic * primary_ipic; |
34 | static struct irq_chip ipic_level_irq_chip, ipic_edge_irq_chip; | 34 | static struct irq_chip ipic_level_irq_chip, ipic_edge_irq_chip; |
35 | static DEFINE_SPINLOCK(ipic_lock); | 35 | static DEFINE_RAW_SPINLOCK(ipic_lock); |
36 | 36 | ||
37 | static struct ipic_info ipic_info[] = { | 37 | static struct ipic_info ipic_info[] = { |
38 | [1] = { | 38 | [1] = { |
@@ -530,13 +530,13 @@ static void ipic_unmask_irq(unsigned int virq) | |||
530 | unsigned long flags; | 530 | unsigned long flags; |
531 | u32 temp; | 531 | u32 temp; |
532 | 532 | ||
533 | spin_lock_irqsave(&ipic_lock, flags); | 533 | raw_spin_lock_irqsave(&ipic_lock, flags); |
534 | 534 | ||
535 | temp = ipic_read(ipic->regs, ipic_info[src].mask); | 535 | temp = ipic_read(ipic->regs, ipic_info[src].mask); |
536 | temp |= (1 << (31 - ipic_info[src].bit)); | 536 | temp |= (1 << (31 - ipic_info[src].bit)); |
537 | ipic_write(ipic->regs, ipic_info[src].mask, temp); | 537 | ipic_write(ipic->regs, ipic_info[src].mask, temp); |
538 | 538 | ||
539 | spin_unlock_irqrestore(&ipic_lock, flags); | 539 | raw_spin_unlock_irqrestore(&ipic_lock, flags); |
540 | } | 540 | } |
541 | 541 | ||
542 | static void ipic_mask_irq(unsigned int virq) | 542 | static void ipic_mask_irq(unsigned int virq) |
@@ -546,7 +546,7 @@ static void ipic_mask_irq(unsigned int virq) | |||
546 | unsigned long flags; | 546 | unsigned long flags; |
547 | u32 temp; | 547 | u32 temp; |
548 | 548 | ||
549 | spin_lock_irqsave(&ipic_lock, flags); | 549 | raw_spin_lock_irqsave(&ipic_lock, flags); |
550 | 550 | ||
551 | temp = ipic_read(ipic->regs, ipic_info[src].mask); | 551 | temp = ipic_read(ipic->regs, ipic_info[src].mask); |
552 | temp &= ~(1 << (31 - ipic_info[src].bit)); | 552 | temp &= ~(1 << (31 - ipic_info[src].bit)); |
@@ -556,7 +556,7 @@ static void ipic_mask_irq(unsigned int virq) | |||
556 | * for nearly all cases. */ | 556 | * for nearly all cases. */ |
557 | mb(); | 557 | mb(); |
558 | 558 | ||
559 | spin_unlock_irqrestore(&ipic_lock, flags); | 559 | raw_spin_unlock_irqrestore(&ipic_lock, flags); |
560 | } | 560 | } |
561 | 561 | ||
562 | static void ipic_ack_irq(unsigned int virq) | 562 | static void ipic_ack_irq(unsigned int virq) |
@@ -566,7 +566,7 @@ static void ipic_ack_irq(unsigned int virq) | |||
566 | unsigned long flags; | 566 | unsigned long flags; |
567 | u32 temp; | 567 | u32 temp; |
568 | 568 | ||
569 | spin_lock_irqsave(&ipic_lock, flags); | 569 | raw_spin_lock_irqsave(&ipic_lock, flags); |
570 | 570 | ||
571 | temp = 1 << (31 - ipic_info[src].bit); | 571 | temp = 1 << (31 - ipic_info[src].bit); |
572 | ipic_write(ipic->regs, ipic_info[src].ack, temp); | 572 | ipic_write(ipic->regs, ipic_info[src].ack, temp); |
@@ -575,7 +575,7 @@ static void ipic_ack_irq(unsigned int virq) | |||
575 | * for nearly all cases. */ | 575 | * for nearly all cases. */ |
576 | mb(); | 576 | mb(); |
577 | 577 | ||
578 | spin_unlock_irqrestore(&ipic_lock, flags); | 578 | raw_spin_unlock_irqrestore(&ipic_lock, flags); |
579 | } | 579 | } |
580 | 580 | ||
581 | static void ipic_mask_irq_and_ack(unsigned int virq) | 581 | static void ipic_mask_irq_and_ack(unsigned int virq) |
@@ -585,7 +585,7 @@ static void ipic_mask_irq_and_ack(unsigned int virq) | |||
585 | unsigned long flags; | 585 | unsigned long flags; |
586 | u32 temp; | 586 | u32 temp; |
587 | 587 | ||
588 | spin_lock_irqsave(&ipic_lock, flags); | 588 | raw_spin_lock_irqsave(&ipic_lock, flags); |
589 | 589 | ||
590 | temp = ipic_read(ipic->regs, ipic_info[src].mask); | 590 | temp = ipic_read(ipic->regs, ipic_info[src].mask); |
591 | temp &= ~(1 << (31 - ipic_info[src].bit)); | 591 | temp &= ~(1 << (31 - ipic_info[src].bit)); |
@@ -598,14 +598,14 @@ static void ipic_mask_irq_and_ack(unsigned int virq) | |||
598 | * for nearly all cases. */ | 598 | * for nearly all cases. */ |
599 | mb(); | 599 | mb(); |
600 | 600 | ||
601 | spin_unlock_irqrestore(&ipic_lock, flags); | 601 | raw_spin_unlock_irqrestore(&ipic_lock, flags); |
602 | } | 602 | } |
603 | 603 | ||
604 | static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type) | 604 | static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type) |
605 | { | 605 | { |
606 | struct ipic *ipic = ipic_from_irq(virq); | 606 | struct ipic *ipic = ipic_from_irq(virq); |
607 | unsigned int src = ipic_irq_to_hw(virq); | 607 | unsigned int src = ipic_irq_to_hw(virq); |
608 | struct irq_desc *desc = get_irq_desc(virq); | 608 | struct irq_desc *desc = irq_to_desc(virq); |
609 | unsigned int vold, vnew, edibit; | 609 | unsigned int vold, vnew, edibit; |
610 | 610 | ||
611 | if (flow_type == IRQ_TYPE_NONE) | 611 | if (flow_type == IRQ_TYPE_NONE) |
@@ -660,7 +660,7 @@ static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type) | |||
660 | 660 | ||
661 | /* level interrupts and edge interrupts have different ack operations */ | 661 | /* level interrupts and edge interrupts have different ack operations */ |
662 | static struct irq_chip ipic_level_irq_chip = { | 662 | static struct irq_chip ipic_level_irq_chip = { |
663 | .typename = " IPIC ", | 663 | .name = "IPIC", |
664 | .unmask = ipic_unmask_irq, | 664 | .unmask = ipic_unmask_irq, |
665 | .mask = ipic_mask_irq, | 665 | .mask = ipic_mask_irq, |
666 | .mask_ack = ipic_mask_irq, | 666 | .mask_ack = ipic_mask_irq, |
@@ -668,7 +668,7 @@ static struct irq_chip ipic_level_irq_chip = { | |||
668 | }; | 668 | }; |
669 | 669 | ||
670 | static struct irq_chip ipic_edge_irq_chip = { | 670 | static struct irq_chip ipic_edge_irq_chip = { |
671 | .typename = " IPIC ", | 671 | .name = "IPIC", |
672 | .unmask = ipic_unmask_irq, | 672 | .unmask = ipic_unmask_irq, |
673 | .mask = ipic_mask_irq, | 673 | .mask = ipic_mask_irq, |
674 | .mask_ack = ipic_mask_irq_and_ack, | 674 | .mask_ack = ipic_mask_irq_and_ack, |
@@ -697,7 +697,7 @@ static int ipic_host_map(struct irq_host *h, unsigned int virq, | |||
697 | } | 697 | } |
698 | 698 | ||
699 | static int ipic_host_xlate(struct irq_host *h, struct device_node *ct, | 699 | static int ipic_host_xlate(struct irq_host *h, struct device_node *ct, |
700 | u32 *intspec, unsigned int intsize, | 700 | const u32 *intspec, unsigned int intsize, |
701 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | 701 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) |
702 | 702 | ||
703 | { | 703 | { |
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c index 5d2d5522ef41..8c27d261aba8 100644 --- a/arch/powerpc/sysdev/mpc8xx_pic.c +++ b/arch/powerpc/sysdev/mpc8xx_pic.c | |||
@@ -72,7 +72,7 @@ static void mpc8xx_end_irq(unsigned int virq) | |||
72 | 72 | ||
73 | static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type) | 73 | static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type) |
74 | { | 74 | { |
75 | struct irq_desc *desc = get_irq_desc(virq); | 75 | struct irq_desc *desc = irq_to_desc(virq); |
76 | 76 | ||
77 | desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); | 77 | desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); |
78 | desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; | 78 | desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; |
@@ -94,7 +94,7 @@ static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type) | |||
94 | } | 94 | } |
95 | 95 | ||
96 | static struct irq_chip mpc8xx_pic = { | 96 | static struct irq_chip mpc8xx_pic = { |
97 | .typename = " MPC8XX SIU ", | 97 | .name = "MPC8XX SIU", |
98 | .unmask = mpc8xx_unmask_irq, | 98 | .unmask = mpc8xx_unmask_irq, |
99 | .mask = mpc8xx_mask_irq, | 99 | .mask = mpc8xx_mask_irq, |
100 | .ack = mpc8xx_ack, | 100 | .ack = mpc8xx_ack, |
@@ -130,7 +130,7 @@ static int mpc8xx_pic_host_map(struct irq_host *h, unsigned int virq, | |||
130 | 130 | ||
131 | 131 | ||
132 | static int mpc8xx_pic_host_xlate(struct irq_host *h, struct device_node *ct, | 132 | static int mpc8xx_pic_host_xlate(struct irq_host *h, struct device_node *ct, |
133 | u32 *intspec, unsigned int intsize, | 133 | const u32 *intspec, unsigned int intsize, |
134 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | 134 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) |
135 | { | 135 | { |
136 | static unsigned char map_pic_senses[4] = { | 136 | static unsigned char map_pic_senses[4] = { |
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c b/arch/powerpc/sysdev/mpc8xxx_gpio.c index 103eace36194..6478eb10691a 100644 --- a/arch/powerpc/sysdev/mpc8xxx_gpio.c +++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/of.h> | 15 | #include <linux/of.h> |
16 | #include <linux/of_gpio.h> | 16 | #include <linux/of_gpio.h> |
17 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
18 | #include <linux/slab.h> | ||
18 | 19 | ||
19 | #define MPC8XXX_GPIO_PINS 32 | 20 | #define MPC8XXX_GPIO_PINS 32 |
20 | 21 | ||
@@ -54,6 +55,22 @@ static void mpc8xxx_gpio_save_regs(struct of_mm_gpio_chip *mm) | |||
54 | mpc8xxx_gc->data = in_be32(mm->regs + GPIO_DAT); | 55 | mpc8xxx_gc->data = in_be32(mm->regs + GPIO_DAT); |
55 | } | 56 | } |
56 | 57 | ||
58 | /* Workaround GPIO 1 errata on MPC8572/MPC8536. The status of GPIOs | ||
59 | * defined as output cannot be determined by reading GPDAT register, | ||
60 | * so we use shadow data register instead. The status of input pins | ||
61 | * is determined by reading GPDAT register. | ||
62 | */ | ||
63 | static int mpc8572_gpio_get(struct gpio_chip *gc, unsigned int gpio) | ||
64 | { | ||
65 | u32 val; | ||
66 | struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); | ||
67 | struct mpc8xxx_gpio_chip *mpc8xxx_gc = to_mpc8xxx_gpio_chip(mm); | ||
68 | |||
69 | val = in_be32(mm->regs + GPIO_DAT) & ~in_be32(mm->regs + GPIO_DIR); | ||
70 | |||
71 | return (val | mpc8xxx_gc->data) & mpc8xxx_gpio2mask(gpio); | ||
72 | } | ||
73 | |||
57 | static int mpc8xxx_gpio_get(struct gpio_chip *gc, unsigned int gpio) | 74 | static int mpc8xxx_gpio_get(struct gpio_chip *gc, unsigned int gpio) |
58 | { | 75 | { |
59 | struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); | 76 | struct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc); |
@@ -136,7 +153,10 @@ static void __init mpc8xxx_add_controller(struct device_node *np) | |||
136 | gc->ngpio = MPC8XXX_GPIO_PINS; | 153 | gc->ngpio = MPC8XXX_GPIO_PINS; |
137 | gc->direction_input = mpc8xxx_gpio_dir_in; | 154 | gc->direction_input = mpc8xxx_gpio_dir_in; |
138 | gc->direction_output = mpc8xxx_gpio_dir_out; | 155 | gc->direction_output = mpc8xxx_gpio_dir_out; |
139 | gc->get = mpc8xxx_gpio_get; | 156 | if (of_device_is_compatible(np, "fsl,mpc8572-gpio")) |
157 | gc->get = mpc8572_gpio_get; | ||
158 | else | ||
159 | gc->get = mpc8xxx_gpio_get; | ||
140 | gc->set = mpc8xxx_gpio_set; | 160 | gc->set = mpc8xxx_gpio_set; |
141 | 161 | ||
142 | ret = of_mm_gpiochip_add(np, mm_gc); | 162 | ret = of_mm_gpiochip_add(np, mm_gc); |
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 30c44e6b0413..260295b10557 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/bootmem.h> | 26 | #include <linux/bootmem.h> |
27 | #include <linux/spinlock.h> | 27 | #include <linux/spinlock.h> |
28 | #include <linux/pci.h> | 28 | #include <linux/pci.h> |
29 | #include <linux/slab.h> | ||
29 | 30 | ||
30 | #include <asm/ptrace.h> | 31 | #include <asm/ptrace.h> |
31 | #include <asm/signal.h> | 32 | #include <asm/signal.h> |
@@ -46,7 +47,7 @@ | |||
46 | 47 | ||
47 | static struct mpic *mpics; | 48 | static struct mpic *mpics; |
48 | static struct mpic *mpic_primary; | 49 | static struct mpic *mpic_primary; |
49 | static DEFINE_SPINLOCK(mpic_lock); | 50 | static DEFINE_RAW_SPINLOCK(mpic_lock); |
50 | 51 | ||
51 | #ifdef CONFIG_PPC32 /* XXX for now */ | 52 | #ifdef CONFIG_PPC32 /* XXX for now */ |
52 | #ifdef CONFIG_IRQ_ALL_CPUS | 53 | #ifdef CONFIG_IRQ_ALL_CPUS |
@@ -347,10 +348,10 @@ static inline void mpic_ht_end_irq(struct mpic *mpic, unsigned int source) | |||
347 | unsigned int mask = 1U << (fixup->index & 0x1f); | 348 | unsigned int mask = 1U << (fixup->index & 0x1f); |
348 | writel(mask, fixup->applebase + soff); | 349 | writel(mask, fixup->applebase + soff); |
349 | } else { | 350 | } else { |
350 | spin_lock(&mpic->fixup_lock); | 351 | raw_spin_lock(&mpic->fixup_lock); |
351 | writeb(0x11 + 2 * fixup->index, fixup->base + 2); | 352 | writeb(0x11 + 2 * fixup->index, fixup->base + 2); |
352 | writel(fixup->data, fixup->base + 4); | 353 | writel(fixup->data, fixup->base + 4); |
353 | spin_unlock(&mpic->fixup_lock); | 354 | raw_spin_unlock(&mpic->fixup_lock); |
354 | } | 355 | } |
355 | } | 356 | } |
356 | 357 | ||
@@ -366,7 +367,7 @@ static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source, | |||
366 | 367 | ||
367 | DBG("startup_ht_interrupt(0x%x, 0x%x) index: %d\n", | 368 | DBG("startup_ht_interrupt(0x%x, 0x%x) index: %d\n", |
368 | source, irqflags, fixup->index); | 369 | source, irqflags, fixup->index); |
369 | spin_lock_irqsave(&mpic->fixup_lock, flags); | 370 | raw_spin_lock_irqsave(&mpic->fixup_lock, flags); |
370 | /* Enable and configure */ | 371 | /* Enable and configure */ |
371 | writeb(0x10 + 2 * fixup->index, fixup->base + 2); | 372 | writeb(0x10 + 2 * fixup->index, fixup->base + 2); |
372 | tmp = readl(fixup->base + 4); | 373 | tmp = readl(fixup->base + 4); |
@@ -374,7 +375,7 @@ static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source, | |||
374 | if (irqflags & IRQ_LEVEL) | 375 | if (irqflags & IRQ_LEVEL) |
375 | tmp |= 0x22; | 376 | tmp |= 0x22; |
376 | writel(tmp, fixup->base + 4); | 377 | writel(tmp, fixup->base + 4); |
377 | spin_unlock_irqrestore(&mpic->fixup_lock, flags); | 378 | raw_spin_unlock_irqrestore(&mpic->fixup_lock, flags); |
378 | 379 | ||
379 | #ifdef CONFIG_PM | 380 | #ifdef CONFIG_PM |
380 | /* use the lowest bit inverted to the actual HW, | 381 | /* use the lowest bit inverted to the actual HW, |
@@ -396,12 +397,12 @@ static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source, | |||
396 | DBG("shutdown_ht_interrupt(0x%x, 0x%x)\n", source, irqflags); | 397 | DBG("shutdown_ht_interrupt(0x%x, 0x%x)\n", source, irqflags); |
397 | 398 | ||
398 | /* Disable */ | 399 | /* Disable */ |
399 | spin_lock_irqsave(&mpic->fixup_lock, flags); | 400 | raw_spin_lock_irqsave(&mpic->fixup_lock, flags); |
400 | writeb(0x10 + 2 * fixup->index, fixup->base + 2); | 401 | writeb(0x10 + 2 * fixup->index, fixup->base + 2); |
401 | tmp = readl(fixup->base + 4); | 402 | tmp = readl(fixup->base + 4); |
402 | tmp |= 1; | 403 | tmp |= 1; |
403 | writel(tmp, fixup->base + 4); | 404 | writel(tmp, fixup->base + 4); |
404 | spin_unlock_irqrestore(&mpic->fixup_lock, flags); | 405 | raw_spin_unlock_irqrestore(&mpic->fixup_lock, flags); |
405 | 406 | ||
406 | #ifdef CONFIG_PM | 407 | #ifdef CONFIG_PM |
407 | /* use the lowest bit inverted to the actual HW, | 408 | /* use the lowest bit inverted to the actual HW, |
@@ -515,7 +516,7 @@ static void __init mpic_scan_ht_pics(struct mpic *mpic) | |||
515 | BUG_ON(mpic->fixups == NULL); | 516 | BUG_ON(mpic->fixups == NULL); |
516 | 517 | ||
517 | /* Init spinlock */ | 518 | /* Init spinlock */ |
518 | spin_lock_init(&mpic->fixup_lock); | 519 | raw_spin_lock_init(&mpic->fixup_lock); |
519 | 520 | ||
520 | /* Map U3 config space. We assume all IO-APICs are on the primary bus | 521 | /* Map U3 config space. We assume all IO-APICs are on the primary bus |
521 | * so we only need to map 64kB. | 522 | * so we only need to map 64kB. |
@@ -567,20 +568,18 @@ static void __init mpic_scan_ht_pics(struct mpic *mpic) | |||
567 | #endif /* CONFIG_MPIC_U3_HT_IRQS */ | 568 | #endif /* CONFIG_MPIC_U3_HT_IRQS */ |
568 | 569 | ||
569 | #ifdef CONFIG_SMP | 570 | #ifdef CONFIG_SMP |
570 | static int irq_choose_cpu(unsigned int virt_irq) | 571 | static int irq_choose_cpu(const cpumask_t *mask) |
571 | { | 572 | { |
572 | cpumask_t mask; | ||
573 | int cpuid; | 573 | int cpuid; |
574 | 574 | ||
575 | cpumask_copy(&mask, irq_desc[virt_irq].affinity); | 575 | if (cpumask_equal(mask, cpu_all_mask)) { |
576 | if (cpus_equal(mask, CPU_MASK_ALL)) { | ||
577 | static int irq_rover; | 576 | static int irq_rover; |
578 | static DEFINE_SPINLOCK(irq_rover_lock); | 577 | static DEFINE_RAW_SPINLOCK(irq_rover_lock); |
579 | unsigned long flags; | 578 | unsigned long flags; |
580 | 579 | ||
581 | /* Round-robin distribution... */ | 580 | /* Round-robin distribution... */ |
582 | do_round_robin: | 581 | do_round_robin: |
583 | spin_lock_irqsave(&irq_rover_lock, flags); | 582 | raw_spin_lock_irqsave(&irq_rover_lock, flags); |
584 | 583 | ||
585 | while (!cpu_online(irq_rover)) { | 584 | while (!cpu_online(irq_rover)) { |
586 | if (++irq_rover >= NR_CPUS) | 585 | if (++irq_rover >= NR_CPUS) |
@@ -592,22 +591,17 @@ static int irq_choose_cpu(unsigned int virt_irq) | |||
592 | irq_rover = 0; | 591 | irq_rover = 0; |
593 | } while (!cpu_online(irq_rover)); | 592 | } while (!cpu_online(irq_rover)); |
594 | 593 | ||
595 | spin_unlock_irqrestore(&irq_rover_lock, flags); | 594 | raw_spin_unlock_irqrestore(&irq_rover_lock, flags); |
596 | } else { | 595 | } else { |
597 | cpumask_t tmp; | 596 | cpuid = cpumask_first_and(mask, cpu_online_mask); |
598 | 597 | if (cpuid >= nr_cpu_ids) | |
599 | cpus_and(tmp, cpu_online_map, mask); | ||
600 | |||
601 | if (cpus_empty(tmp)) | ||
602 | goto do_round_robin; | 598 | goto do_round_robin; |
603 | |||
604 | cpuid = first_cpu(tmp); | ||
605 | } | 599 | } |
606 | 600 | ||
607 | return get_hard_smp_processor_id(cpuid); | 601 | return get_hard_smp_processor_id(cpuid); |
608 | } | 602 | } |
609 | #else | 603 | #else |
610 | static int irq_choose_cpu(unsigned int virt_irq) | 604 | static int irq_choose_cpu(const cpumask_t *mask) |
611 | { | 605 | { |
612 | return hard_smp_processor_id(); | 606 | return hard_smp_processor_id(); |
613 | } | 607 | } |
@@ -621,7 +615,7 @@ static struct mpic *mpic_find(unsigned int irq) | |||
621 | if (irq < NUM_ISA_INTERRUPTS) | 615 | if (irq < NUM_ISA_INTERRUPTS) |
622 | return NULL; | 616 | return NULL; |
623 | 617 | ||
624 | return irq_desc[irq].chip_data; | 618 | return irq_to_desc(irq)->chip_data; |
625 | } | 619 | } |
626 | 620 | ||
627 | /* Determine if the linux irq is an IPI */ | 621 | /* Determine if the linux irq is an IPI */ |
@@ -648,14 +642,14 @@ static inline u32 mpic_physmask(u32 cpumask) | |||
648 | /* Get the mpic structure from the IPI number */ | 642 | /* Get the mpic structure from the IPI number */ |
649 | static inline struct mpic * mpic_from_ipi(unsigned int ipi) | 643 | static inline struct mpic * mpic_from_ipi(unsigned int ipi) |
650 | { | 644 | { |
651 | return irq_desc[ipi].chip_data; | 645 | return irq_to_desc(ipi)->chip_data; |
652 | } | 646 | } |
653 | #endif | 647 | #endif |
654 | 648 | ||
655 | /* Get the mpic structure from the irq number */ | 649 | /* Get the mpic structure from the irq number */ |
656 | static inline struct mpic * mpic_from_irq(unsigned int irq) | 650 | static inline struct mpic * mpic_from_irq(unsigned int irq) |
657 | { | 651 | { |
658 | return irq_desc[irq].chip_data; | 652 | return irq_to_desc(irq)->chip_data; |
659 | } | 653 | } |
660 | 654 | ||
661 | /* Send an EOI */ | 655 | /* Send an EOI */ |
@@ -735,7 +729,7 @@ static void mpic_unmask_ht_irq(unsigned int irq) | |||
735 | 729 | ||
736 | mpic_unmask_irq(irq); | 730 | mpic_unmask_irq(irq); |
737 | 731 | ||
738 | if (irq_desc[irq].status & IRQ_LEVEL) | 732 | if (irq_to_desc(irq)->status & IRQ_LEVEL) |
739 | mpic_ht_end_irq(mpic, src); | 733 | mpic_ht_end_irq(mpic, src); |
740 | } | 734 | } |
741 | 735 | ||
@@ -745,7 +739,7 @@ static unsigned int mpic_startup_ht_irq(unsigned int irq) | |||
745 | unsigned int src = mpic_irq_to_hw(irq); | 739 | unsigned int src = mpic_irq_to_hw(irq); |
746 | 740 | ||
747 | mpic_unmask_irq(irq); | 741 | mpic_unmask_irq(irq); |
748 | mpic_startup_ht_interrupt(mpic, src, irq_desc[irq].status); | 742 | mpic_startup_ht_interrupt(mpic, src, irq_to_desc(irq)->status); |
749 | 743 | ||
750 | return 0; | 744 | return 0; |
751 | } | 745 | } |
@@ -755,7 +749,7 @@ static void mpic_shutdown_ht_irq(unsigned int irq) | |||
755 | struct mpic *mpic = mpic_from_irq(irq); | 749 | struct mpic *mpic = mpic_from_irq(irq); |
756 | unsigned int src = mpic_irq_to_hw(irq); | 750 | unsigned int src = mpic_irq_to_hw(irq); |
757 | 751 | ||
758 | mpic_shutdown_ht_interrupt(mpic, src, irq_desc[irq].status); | 752 | mpic_shutdown_ht_interrupt(mpic, src, irq_to_desc(irq)->status); |
759 | mpic_mask_irq(irq); | 753 | mpic_mask_irq(irq); |
760 | } | 754 | } |
761 | 755 | ||
@@ -772,7 +766,7 @@ static void mpic_end_ht_irq(unsigned int irq) | |||
772 | * latched another edge interrupt coming in anyway | 766 | * latched another edge interrupt coming in anyway |
773 | */ | 767 | */ |
774 | 768 | ||
775 | if (irq_desc[irq].status & IRQ_LEVEL) | 769 | if (irq_to_desc(irq)->status & IRQ_LEVEL) |
776 | mpic_ht_end_irq(mpic, src); | 770 | mpic_ht_end_irq(mpic, src); |
777 | mpic_eoi(mpic); | 771 | mpic_eoi(mpic); |
778 | } | 772 | } |
@@ -816,7 +810,7 @@ int mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask) | |||
816 | unsigned int src = mpic_irq_to_hw(irq); | 810 | unsigned int src = mpic_irq_to_hw(irq); |
817 | 811 | ||
818 | if (mpic->flags & MPIC_SINGLE_DEST_CPU) { | 812 | if (mpic->flags & MPIC_SINGLE_DEST_CPU) { |
819 | int cpuid = irq_choose_cpu(irq); | 813 | int cpuid = irq_choose_cpu(cpumask); |
820 | 814 | ||
821 | mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), 1 << cpuid); | 815 | mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), 1 << cpuid); |
822 | } else { | 816 | } else { |
@@ -856,7 +850,7 @@ int mpic_set_irq_type(unsigned int virq, unsigned int flow_type) | |||
856 | { | 850 | { |
857 | struct mpic *mpic = mpic_from_irq(virq); | 851 | struct mpic *mpic = mpic_from_irq(virq); |
858 | unsigned int src = mpic_irq_to_hw(virq); | 852 | unsigned int src = mpic_irq_to_hw(virq); |
859 | struct irq_desc *desc = get_irq_desc(virq); | 853 | struct irq_desc *desc = irq_to_desc(virq); |
860 | unsigned int vecpri, vold, vnew; | 854 | unsigned int vecpri, vold, vnew; |
861 | 855 | ||
862 | DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n", | 856 | DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n", |
@@ -994,7 +988,7 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq, | |||
994 | } | 988 | } |
995 | 989 | ||
996 | static int mpic_host_xlate(struct irq_host *h, struct device_node *ct, | 990 | static int mpic_host_xlate(struct irq_host *h, struct device_node *ct, |
997 | u32 *intspec, unsigned int intsize, | 991 | const u32 *intspec, unsigned int intsize, |
998 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | 992 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) |
999 | 993 | ||
1000 | { | 994 | { |
@@ -1062,19 +1056,19 @@ struct mpic * __init mpic_alloc(struct device_node *node, | |||
1062 | mpic->name = name; | 1056 | mpic->name = name; |
1063 | 1057 | ||
1064 | mpic->hc_irq = mpic_irq_chip; | 1058 | mpic->hc_irq = mpic_irq_chip; |
1065 | mpic->hc_irq.typename = name; | 1059 | mpic->hc_irq.name = name; |
1066 | if (flags & MPIC_PRIMARY) | 1060 | if (flags & MPIC_PRIMARY) |
1067 | mpic->hc_irq.set_affinity = mpic_set_affinity; | 1061 | mpic->hc_irq.set_affinity = mpic_set_affinity; |
1068 | #ifdef CONFIG_MPIC_U3_HT_IRQS | 1062 | #ifdef CONFIG_MPIC_U3_HT_IRQS |
1069 | mpic->hc_ht_irq = mpic_irq_ht_chip; | 1063 | mpic->hc_ht_irq = mpic_irq_ht_chip; |
1070 | mpic->hc_ht_irq.typename = name; | 1064 | mpic->hc_ht_irq.name = name; |
1071 | if (flags & MPIC_PRIMARY) | 1065 | if (flags & MPIC_PRIMARY) |
1072 | mpic->hc_ht_irq.set_affinity = mpic_set_affinity; | 1066 | mpic->hc_ht_irq.set_affinity = mpic_set_affinity; |
1073 | #endif /* CONFIG_MPIC_U3_HT_IRQS */ | 1067 | #endif /* CONFIG_MPIC_U3_HT_IRQS */ |
1074 | 1068 | ||
1075 | #ifdef CONFIG_SMP | 1069 | #ifdef CONFIG_SMP |
1076 | mpic->hc_ipi = mpic_ipi_chip; | 1070 | mpic->hc_ipi = mpic_ipi_chip; |
1077 | mpic->hc_ipi.typename = name; | 1071 | mpic->hc_ipi.name = name; |
1078 | #endif /* CONFIG_SMP */ | 1072 | #endif /* CONFIG_SMP */ |
1079 | 1073 | ||
1080 | mpic->flags = flags; | 1074 | mpic->flags = flags; |
@@ -1375,14 +1369,14 @@ void __init mpic_set_serial_int(struct mpic *mpic, int enable) | |||
1375 | unsigned long flags; | 1369 | unsigned long flags; |
1376 | u32 v; | 1370 | u32 v; |
1377 | 1371 | ||
1378 | spin_lock_irqsave(&mpic_lock, flags); | 1372 | raw_spin_lock_irqsave(&mpic_lock, flags); |
1379 | v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1); | 1373 | v = mpic_read(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1); |
1380 | if (enable) | 1374 | if (enable) |
1381 | v |= MPIC_GREG_GLOBAL_CONF_1_SIE; | 1375 | v |= MPIC_GREG_GLOBAL_CONF_1_SIE; |
1382 | else | 1376 | else |
1383 | v &= ~MPIC_GREG_GLOBAL_CONF_1_SIE; | 1377 | v &= ~MPIC_GREG_GLOBAL_CONF_1_SIE; |
1384 | mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v); | 1378 | mpic_write(mpic->gregs, MPIC_GREG_GLOBAL_CONF_1, v); |
1385 | spin_unlock_irqrestore(&mpic_lock, flags); | 1379 | raw_spin_unlock_irqrestore(&mpic_lock, flags); |
1386 | } | 1380 | } |
1387 | 1381 | ||
1388 | void mpic_irq_set_priority(unsigned int irq, unsigned int pri) | 1382 | void mpic_irq_set_priority(unsigned int irq, unsigned int pri) |
@@ -1395,7 +1389,7 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri) | |||
1395 | if (!mpic) | 1389 | if (!mpic) |
1396 | return; | 1390 | return; |
1397 | 1391 | ||
1398 | spin_lock_irqsave(&mpic_lock, flags); | 1392 | raw_spin_lock_irqsave(&mpic_lock, flags); |
1399 | if (mpic_is_ipi(mpic, irq)) { | 1393 | if (mpic_is_ipi(mpic, irq)) { |
1400 | reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) & | 1394 | reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) & |
1401 | ~MPIC_VECPRI_PRIORITY_MASK; | 1395 | ~MPIC_VECPRI_PRIORITY_MASK; |
@@ -1407,7 +1401,7 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri) | |||
1407 | mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), | 1401 | mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), |
1408 | reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); | 1402 | reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); |
1409 | } | 1403 | } |
1410 | spin_unlock_irqrestore(&mpic_lock, flags); | 1404 | raw_spin_unlock_irqrestore(&mpic_lock, flags); |
1411 | } | 1405 | } |
1412 | 1406 | ||
1413 | void mpic_setup_this_cpu(void) | 1407 | void mpic_setup_this_cpu(void) |
@@ -1422,7 +1416,7 @@ void mpic_setup_this_cpu(void) | |||
1422 | 1416 | ||
1423 | DBG("%s: setup_this_cpu(%d)\n", mpic->name, hard_smp_processor_id()); | 1417 | DBG("%s: setup_this_cpu(%d)\n", mpic->name, hard_smp_processor_id()); |
1424 | 1418 | ||
1425 | spin_lock_irqsave(&mpic_lock, flags); | 1419 | raw_spin_lock_irqsave(&mpic_lock, flags); |
1426 | 1420 | ||
1427 | /* let the mpic know we want intrs. default affinity is 0xffffffff | 1421 | /* let the mpic know we want intrs. default affinity is 0xffffffff |
1428 | * until changed via /proc. That's how it's done on x86. If we want | 1422 | * until changed via /proc. That's how it's done on x86. If we want |
@@ -1438,7 +1432,7 @@ void mpic_setup_this_cpu(void) | |||
1438 | /* Set current processor priority to 0 */ | 1432 | /* Set current processor priority to 0 */ |
1439 | mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0); | 1433 | mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0); |
1440 | 1434 | ||
1441 | spin_unlock_irqrestore(&mpic_lock, flags); | 1435 | raw_spin_unlock_irqrestore(&mpic_lock, flags); |
1442 | #endif /* CONFIG_SMP */ | 1436 | #endif /* CONFIG_SMP */ |
1443 | } | 1437 | } |
1444 | 1438 | ||
@@ -1467,7 +1461,7 @@ void mpic_teardown_this_cpu(int secondary) | |||
1467 | BUG_ON(mpic == NULL); | 1461 | BUG_ON(mpic == NULL); |
1468 | 1462 | ||
1469 | DBG("%s: teardown_this_cpu(%d)\n", mpic->name, hard_smp_processor_id()); | 1463 | DBG("%s: teardown_this_cpu(%d)\n", mpic->name, hard_smp_processor_id()); |
1470 | spin_lock_irqsave(&mpic_lock, flags); | 1464 | raw_spin_lock_irqsave(&mpic_lock, flags); |
1471 | 1465 | ||
1472 | /* let the mpic know we don't want intrs. */ | 1466 | /* let the mpic know we don't want intrs. */ |
1473 | for (i = 0; i < mpic->num_sources ; i++) | 1467 | for (i = 0; i < mpic->num_sources ; i++) |
@@ -1481,7 +1475,7 @@ void mpic_teardown_this_cpu(int secondary) | |||
1481 | */ | 1475 | */ |
1482 | mpic_eoi(mpic); | 1476 | mpic_eoi(mpic); |
1483 | 1477 | ||
1484 | spin_unlock_irqrestore(&mpic_lock, flags); | 1478 | raw_spin_unlock_irqrestore(&mpic_lock, flags); |
1485 | } | 1479 | } |
1486 | 1480 | ||
1487 | 1481 | ||
@@ -1582,7 +1576,7 @@ void mpic_request_ipis(void) | |||
1582 | int i; | 1576 | int i; |
1583 | BUG_ON(mpic == NULL); | 1577 | BUG_ON(mpic == NULL); |
1584 | 1578 | ||
1585 | printk(KERN_INFO "mpic: requesting IPIs ... \n"); | 1579 | printk(KERN_INFO "mpic: requesting IPIs...\n"); |
1586 | 1580 | ||
1587 | for (i = 0; i < 4; i++) { | 1581 | for (i = 0; i < 4; i++) { |
1588 | unsigned int vipi = irq_create_mapping(mpic->irqhost, | 1582 | unsigned int vipi = irq_create_mapping(mpic->irqhost, |
diff --git a/arch/powerpc/sysdev/mpic_msi.c b/arch/powerpc/sysdev/mpic_msi.c index 1d44eee80fa1..0f67cd79d481 100644 --- a/arch/powerpc/sysdev/mpic_msi.c +++ b/arch/powerpc/sysdev/mpic_msi.c | |||
@@ -39,7 +39,12 @@ static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic) | |||
39 | 39 | ||
40 | pr_debug("mpic: found U3, guessing msi allocator setup\n"); | 40 | pr_debug("mpic: found U3, guessing msi allocator setup\n"); |
41 | 41 | ||
42 | /* Reserve source numbers we know are reserved in the HW */ | 42 | /* Reserve source numbers we know are reserved in the HW. |
43 | * | ||
44 | * This is a bit of a mix of U3 and U4 reserves but that's going | ||
45 | * to work fine, we have plenty enugh numbers left so let's just | ||
46 | * mark anything we don't like reserved. | ||
47 | */ | ||
43 | for (i = 0; i < 8; i++) | 48 | for (i = 0; i < 8; i++) |
44 | msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i); | 49 | msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i); |
45 | 50 | ||
@@ -49,6 +54,10 @@ static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic) | |||
49 | for (i = 100; i < 105; i++) | 54 | for (i = 100; i < 105; i++) |
50 | msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i); | 55 | msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i); |
51 | 56 | ||
57 | for (i = 124; i < mpic->irq_count; i++) | ||
58 | msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, i); | ||
59 | |||
60 | |||
52 | np = NULL; | 61 | np = NULL; |
53 | while ((np = of_find_all_nodes(np))) { | 62 | while ((np = of_find_all_nodes(np))) { |
54 | pr_debug("mpic: mapping hwirqs for %s\n", np->full_name); | 63 | pr_debug("mpic: mapping hwirqs for %s\n", np->full_name); |
diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c index 656cb772b691..3b6a9a43718f 100644 --- a/arch/powerpc/sysdev/mpic_pasemi_msi.c +++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c | |||
@@ -60,7 +60,7 @@ static struct irq_chip mpic_pasemi_msi_chip = { | |||
60 | .eoi = mpic_end_irq, | 60 | .eoi = mpic_end_irq, |
61 | .set_type = mpic_set_irq_type, | 61 | .set_type = mpic_set_irq_type, |
62 | .set_affinity = mpic_set_affinity, | 62 | .set_affinity = mpic_set_affinity, |
63 | .typename = "PASEMI-MSI ", | 63 | .name = "PASEMI-MSI", |
64 | }; | 64 | }; |
65 | 65 | ||
66 | static int pasemi_msi_check_device(struct pci_dev *pdev, int nvec, int type) | 66 | static int pasemi_msi_check_device(struct pci_dev *pdev, int nvec, int type) |
diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c index 0a8f5a9e87c9..bcbfe79c704b 100644 --- a/arch/powerpc/sysdev/mpic_u3msi.c +++ b/arch/powerpc/sysdev/mpic_u3msi.c | |||
@@ -42,7 +42,7 @@ static struct irq_chip mpic_u3msi_chip = { | |||
42 | .eoi = mpic_end_irq, | 42 | .eoi = mpic_end_irq, |
43 | .set_type = mpic_set_irq_type, | 43 | .set_type = mpic_set_irq_type, |
44 | .set_affinity = mpic_set_affinity, | 44 | .set_affinity = mpic_set_affinity, |
45 | .typename = "MPIC-U3MSI", | 45 | .name = "MPIC-U3MSI", |
46 | }; | 46 | }; |
47 | 47 | ||
48 | static u64 read_ht_magic_addr(struct pci_dev *pdev, unsigned int pos) | 48 | static u64 read_ht_magic_addr(struct pci_dev *pdev, unsigned int pos) |
@@ -64,12 +64,12 @@ static u64 read_ht_magic_addr(struct pci_dev *pdev, unsigned int pos) | |||
64 | return addr; | 64 | return addr; |
65 | } | 65 | } |
66 | 66 | ||
67 | static u64 find_ht_magic_addr(struct pci_dev *pdev) | 67 | static u64 find_ht_magic_addr(struct pci_dev *pdev, unsigned int hwirq) |
68 | { | 68 | { |
69 | struct pci_bus *bus; | 69 | struct pci_bus *bus; |
70 | unsigned int pos; | 70 | unsigned int pos; |
71 | 71 | ||
72 | for (bus = pdev->bus; bus; bus = bus->parent) { | 72 | for (bus = pdev->bus; bus && bus->self; bus = bus->parent) { |
73 | pos = pci_find_ht_capability(bus->self, HT_CAPTYPE_MSI_MAPPING); | 73 | pos = pci_find_ht_capability(bus->self, HT_CAPTYPE_MSI_MAPPING); |
74 | if (pos) | 74 | if (pos) |
75 | return read_ht_magic_addr(bus->self, pos); | 75 | return read_ht_magic_addr(bus->self, pos); |
@@ -78,13 +78,41 @@ static u64 find_ht_magic_addr(struct pci_dev *pdev) | |||
78 | return 0; | 78 | return 0; |
79 | } | 79 | } |
80 | 80 | ||
81 | static u64 find_u4_magic_addr(struct pci_dev *pdev, unsigned int hwirq) | ||
82 | { | ||
83 | struct pci_controller *hose = pci_bus_to_host(pdev->bus); | ||
84 | |||
85 | /* U4 PCIe MSIs need to write to the special register in | ||
86 | * the bridge that generates interrupts. There should be | ||
87 | * theorically a register at 0xf8005000 where you just write | ||
88 | * the MSI number and that triggers the right interrupt, but | ||
89 | * unfortunately, this is busted in HW, the bridge endian swaps | ||
90 | * the value and hits the wrong nibble in the register. | ||
91 | * | ||
92 | * So instead we use another register set which is used normally | ||
93 | * for converting HT interrupts to MPIC interrupts, which decodes | ||
94 | * the interrupt number as part of the low address bits | ||
95 | * | ||
96 | * This will not work if we ever use more than one legacy MSI in | ||
97 | * a block but we never do. For one MSI or multiple MSI-X where | ||
98 | * each interrupt address can be specified separately, it works | ||
99 | * just fine. | ||
100 | */ | ||
101 | if (of_device_is_compatible(hose->dn, "u4-pcie") || | ||
102 | of_device_is_compatible(hose->dn, "U4-pcie")) | ||
103 | return 0xf8004000 | (hwirq << 4); | ||
104 | |||
105 | return 0; | ||
106 | } | ||
107 | |||
81 | static int u3msi_msi_check_device(struct pci_dev *pdev, int nvec, int type) | 108 | static int u3msi_msi_check_device(struct pci_dev *pdev, int nvec, int type) |
82 | { | 109 | { |
83 | if (type == PCI_CAP_ID_MSIX) | 110 | if (type == PCI_CAP_ID_MSIX) |
84 | pr_debug("u3msi: MSI-X untested, trying anyway.\n"); | 111 | pr_debug("u3msi: MSI-X untested, trying anyway.\n"); |
85 | 112 | ||
86 | /* If we can't find a magic address then MSI ain't gonna work */ | 113 | /* If we can't find a magic address then MSI ain't gonna work */ |
87 | if (find_ht_magic_addr(pdev) == 0) { | 114 | if (find_ht_magic_addr(pdev, 0) == 0 && |
115 | find_u4_magic_addr(pdev, 0) == 0) { | ||
88 | pr_debug("u3msi: no magic address found for %s\n", | 116 | pr_debug("u3msi: no magic address found for %s\n", |
89 | pci_name(pdev)); | 117 | pci_name(pdev)); |
90 | return -ENXIO; | 118 | return -ENXIO; |
@@ -118,10 +146,6 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | |||
118 | u64 addr; | 146 | u64 addr; |
119 | int hwirq; | 147 | int hwirq; |
120 | 148 | ||
121 | addr = find_ht_magic_addr(pdev); | ||
122 | msg.address_lo = addr & 0xFFFFFFFF; | ||
123 | msg.address_hi = addr >> 32; | ||
124 | |||
125 | list_for_each_entry(entry, &pdev->msi_list, list) { | 149 | list_for_each_entry(entry, &pdev->msi_list, list) { |
126 | hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, 1); | 150 | hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, 1); |
127 | if (hwirq < 0) { | 151 | if (hwirq < 0) { |
@@ -129,6 +153,12 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | |||
129 | return hwirq; | 153 | return hwirq; |
130 | } | 154 | } |
131 | 155 | ||
156 | addr = find_ht_magic_addr(pdev, hwirq); | ||
157 | if (addr == 0) | ||
158 | addr = find_u4_magic_addr(pdev, hwirq); | ||
159 | msg.address_lo = addr & 0xFFFFFFFF; | ||
160 | msg.address_hi = addr >> 32; | ||
161 | |||
132 | virq = irq_create_mapping(msi_mpic->irqhost, hwirq); | 162 | virq = irq_create_mapping(msi_mpic->irqhost, hwirq); |
133 | if (virq == NO_IRQ) { | 163 | if (virq == NO_IRQ) { |
134 | pr_debug("u3msi: failed mapping hwirq 0x%x\n", hwirq); | 164 | pr_debug("u3msi: failed mapping hwirq 0x%x\n", hwirq); |
@@ -143,6 +173,8 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | |||
143 | pr_debug("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n", | 173 | pr_debug("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n", |
144 | virq, hwirq, (unsigned long)addr); | 174 | virq, hwirq, (unsigned long)addr); |
145 | 175 | ||
176 | printk("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n", | ||
177 | virq, hwirq, (unsigned long)addr); | ||
146 | msg.data = hwirq; | 178 | msg.data = hwirq; |
147 | write_msi_msg(virq, &msg); | 179 | write_msi_msg(virq, &msg); |
148 | 180 | ||
diff --git a/arch/powerpc/sysdev/msi_bitmap.c b/arch/powerpc/sysdev/msi_bitmap.c index 5a32cbef9b6c..5287e95cec3a 100644 --- a/arch/powerpc/sysdev/msi_bitmap.c +++ b/arch/powerpc/sysdev/msi_bitmap.c | |||
@@ -8,6 +8,7 @@ | |||
8 | * | 8 | * |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <linux/slab.h> | ||
11 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
12 | #include <linux/bitmap.h> | 13 | #include <linux/bitmap.h> |
13 | #include <asm/msi_bitmap.h> | 14 | #include <asm/msi_bitmap.h> |
diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c index b6bd775d2e22..31acd3b1718b 100644 --- a/arch/powerpc/sysdev/mv64x60_dev.c +++ b/arch/powerpc/sysdev/mv64x60_dev.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/mv643xx.h> | 16 | #include <linux/mv643xx.h> |
17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
18 | #include <linux/of_platform.h> | 18 | #include <linux/of_platform.h> |
19 | #include <linux/dma-mapping.h> | ||
19 | 20 | ||
20 | #include <asm/prom.h> | 21 | #include <asm/prom.h> |
21 | 22 | ||
@@ -189,6 +190,7 @@ static int __init mv64x60_mpsc_device_setup(struct device_node *np, int id) | |||
189 | pdev = platform_device_alloc(MPSC_CTLR_NAME, port_number); | 190 | pdev = platform_device_alloc(MPSC_CTLR_NAME, port_number); |
190 | if (!pdev) | 191 | if (!pdev) |
191 | return -ENOMEM; | 192 | return -ENOMEM; |
193 | pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); | ||
192 | 194 | ||
193 | err = platform_device_add_resources(pdev, r, 5); | 195 | err = platform_device_add_resources(pdev, r, 5); |
194 | if (err) | 196 | if (err) |
@@ -302,6 +304,7 @@ static int __init mv64x60_eth_device_setup(struct device_node *np, int id, | |||
302 | if (!pdev) | 304 | if (!pdev) |
303 | return -ENOMEM; | 305 | return -ENOMEM; |
304 | 306 | ||
307 | pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); | ||
305 | err = platform_device_add_resources(pdev, r, 1); | 308 | err = platform_device_add_resources(pdev, r, 1); |
306 | if (err) | 309 | if (err) |
307 | goto error; | 310 | goto error; |
diff --git a/arch/powerpc/sysdev/mv64x60_pic.c b/arch/powerpc/sysdev/mv64x60_pic.c index 2aa4ed066db1..485b92477d7c 100644 --- a/arch/powerpc/sysdev/mv64x60_pic.c +++ b/arch/powerpc/sysdev/mv64x60_pic.c | |||
@@ -213,7 +213,7 @@ static int mv64x60_host_map(struct irq_host *h, unsigned int virq, | |||
213 | { | 213 | { |
214 | int level1; | 214 | int level1; |
215 | 215 | ||
216 | get_irq_desc(virq)->status |= IRQ_LEVEL; | 216 | irq_to_desc(virq)->status |= IRQ_LEVEL; |
217 | 217 | ||
218 | level1 = (hwirq & MV64x60_LEVEL1_MASK) >> MV64x60_LEVEL1_OFFSET; | 218 | level1 = (hwirq & MV64x60_LEVEL1_MASK) >> MV64x60_LEVEL1_OFFSET; |
219 | BUG_ON(level1 > MV64x60_LEVEL1_GPP); | 219 | BUG_ON(level1 > MV64x60_LEVEL1_GPP); |
diff --git a/arch/powerpc/sysdev/of_rtc.c b/arch/powerpc/sysdev/of_rtc.c index 3d54450640c1..c9e803f3e267 100644 --- a/arch/powerpc/sysdev/of_rtc.c +++ b/arch/powerpc/sysdev/of_rtc.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/of.h> | 12 | #include <linux/of.h> |
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <linux/of_platform.h> | 14 | #include <linux/of_platform.h> |
15 | #include <linux/slab.h> | ||
15 | 16 | ||
16 | static __initdata struct { | 17 | static __initdata struct { |
17 | const char *compatible; | 18 | const char *compatible; |
diff --git a/arch/powerpc/sysdev/pmi.c b/arch/powerpc/sysdev/pmi.c index aaa915998eb6..652652db4ce2 100644 --- a/arch/powerpc/sysdev/pmi.c +++ b/arch/powerpc/sysdev/pmi.c | |||
@@ -25,6 +25,7 @@ | |||
25 | */ | 25 | */ |
26 | 26 | ||
27 | #include <linux/interrupt.h> | 27 | #include <linux/interrupt.h> |
28 | #include <linux/slab.h> | ||
28 | #include <linux/completion.h> | 29 | #include <linux/completion.h> |
29 | #include <linux/spinlock.h> | 30 | #include <linux/spinlock.h> |
30 | #include <linux/workqueue.h> | 31 | #include <linux/workqueue.h> |
diff --git a/arch/powerpc/sysdev/ppc4xx_gpio.c b/arch/powerpc/sysdev/ppc4xx_gpio.c index 110efe2a54fc..3812fc366bec 100644 --- a/arch/powerpc/sysdev/ppc4xx_gpio.c +++ b/arch/powerpc/sysdev/ppc4xx_gpio.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/of_gpio.h> | 29 | #include <linux/of_gpio.h> |
30 | #include <linux/gpio.h> | 30 | #include <linux/gpio.h> |
31 | #include <linux/types.h> | 31 | #include <linux/types.h> |
32 | #include <linux/slab.h> | ||
32 | 33 | ||
33 | #define GPIO_MASK(gpio) (0x80000000 >> (gpio)) | 34 | #define GPIO_MASK(gpio) (0x80000000 >> (gpio)) |
34 | #define GPIO_MASK2(gpio) (0xc0000000 >> ((gpio) * 2)) | 35 | #define GPIO_MASK2(gpio) (0xc0000000 >> ((gpio) * 2)) |
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index 6ff9d71b4c0d..106d767bf65b 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/of.h> | 24 | #include <linux/of.h> |
25 | #include <linux/bootmem.h> | 25 | #include <linux/bootmem.h> |
26 | #include <linux/delay.h> | 26 | #include <linux/delay.h> |
27 | #include <linux/slab.h> | ||
27 | 28 | ||
28 | #include <asm/io.h> | 29 | #include <asm/io.h> |
29 | #include <asm/pci-bridge.h> | 30 | #include <asm/pci-bridge.h> |
@@ -569,7 +570,8 @@ static void __init ppc4xx_probe_pcix_bridge(struct device_node *np) | |||
569 | hose->last_busno = bus_range ? bus_range[1] : 0xff; | 570 | hose->last_busno = bus_range ? bus_range[1] : 0xff; |
570 | 571 | ||
571 | /* Setup config space */ | 572 | /* Setup config space */ |
572 | setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 0x4, 0); | 573 | setup_indirect_pci(hose, rsrc_cfg.start, rsrc_cfg.start + 0x4, |
574 | PPC_INDIRECT_TYPE_SET_CFG_TYPE); | ||
573 | 575 | ||
574 | /* Disable all windows */ | 576 | /* Disable all windows */ |
575 | writel(0, reg + PCIX0_POM0SA); | 577 | writel(0, reg + PCIX0_POM0SA); |
diff --git a/arch/powerpc/sysdev/ppc4xx_soc.c b/arch/powerpc/sysdev/ppc4xx_soc.c index 5b32adc9a9b2..5c014350bf16 100644 --- a/arch/powerpc/sysdev/ppc4xx_soc.c +++ b/arch/powerpc/sysdev/ppc4xx_soc.c | |||
@@ -174,7 +174,8 @@ static int __init ppc4xx_l2c_probe(void) | |||
174 | | L2C_CFG_CPIM | L2C_CFG_TPIM | L2C_CFG_LIM | L2C_CFG_SMCM; | 174 | | L2C_CFG_CPIM | L2C_CFG_TPIM | L2C_CFG_LIM | L2C_CFG_SMCM; |
175 | 175 | ||
176 | /* Check for 460EX/GT special handling */ | 176 | /* Check for 460EX/GT special handling */ |
177 | if (of_device_is_compatible(np, "ibm,l2-cache-460ex")) | 177 | if (of_device_is_compatible(np, "ibm,l2-cache-460ex") || |
178 | of_device_is_compatible(np, "ibm,l2-cache-460gt")) | ||
178 | r |= L2C_CFG_RDBW; | 179 | r |= L2C_CFG_RDBW; |
179 | 180 | ||
180 | mtdcr(dcrbase_l2c + DCRN_L2C0_CFG, r); | 181 | mtdcr(dcrbase_l2c + DCRN_L2C0_CFG, r); |
diff --git a/arch/powerpc/sysdev/qe_lib/gpio.c b/arch/powerpc/sysdev/qe_lib/gpio.c index 8e7a7767dd5c..dc8f8d618074 100644 --- a/arch/powerpc/sysdev/qe_lib/gpio.c +++ b/arch/powerpc/sysdev/qe_lib/gpio.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/of.h> | 19 | #include <linux/of.h> |
20 | #include <linux/of_gpio.h> | 20 | #include <linux/of_gpio.h> |
21 | #include <linux/gpio.h> | 21 | #include <linux/gpio.h> |
22 | #include <linux/slab.h> | ||
22 | #include <asm/qe.h> | 23 | #include <asm/qe.h> |
23 | 24 | ||
24 | struct qe_gpio_chip { | 25 | struct qe_gpio_chip { |
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c index 464271bea6c9..149393c02c3f 100644 --- a/arch/powerpc/sysdev/qe_lib/qe.c +++ b/arch/powerpc/sysdev/qe_lib/qe.c | |||
@@ -27,6 +27,8 @@ | |||
27 | #include <linux/delay.h> | 27 | #include <linux/delay.h> |
28 | #include <linux/ioport.h> | 28 | #include <linux/ioport.h> |
29 | #include <linux/crc32.h> | 29 | #include <linux/crc32.h> |
30 | #include <linux/mod_devicetable.h> | ||
31 | #include <linux/of_platform.h> | ||
30 | #include <asm/irq.h> | 32 | #include <asm/irq.h> |
31 | #include <asm/page.h> | 33 | #include <asm/page.h> |
32 | #include <asm/pgtable.h> | 34 | #include <asm/pgtable.h> |
@@ -65,19 +67,6 @@ static unsigned int qe_num_of_snum; | |||
65 | 67 | ||
66 | static phys_addr_t qebase = -1; | 68 | static phys_addr_t qebase = -1; |
67 | 69 | ||
68 | int qe_alive_during_sleep(void) | ||
69 | { | ||
70 | static int ret = -1; | ||
71 | |||
72 | if (ret != -1) | ||
73 | return ret; | ||
74 | |||
75 | ret = !of_find_compatible_node(NULL, NULL, "fsl,mpc8569-pmc"); | ||
76 | |||
77 | return ret; | ||
78 | } | ||
79 | EXPORT_SYMBOL(qe_alive_during_sleep); | ||
80 | |||
81 | phys_addr_t get_qe_base(void) | 70 | phys_addr_t get_qe_base(void) |
82 | { | 71 | { |
83 | struct device_node *qe; | 72 | struct device_node *qe; |
@@ -104,7 +93,7 @@ phys_addr_t get_qe_base(void) | |||
104 | 93 | ||
105 | EXPORT_SYMBOL(get_qe_base); | 94 | EXPORT_SYMBOL(get_qe_base); |
106 | 95 | ||
107 | void __init qe_reset(void) | 96 | void qe_reset(void) |
108 | { | 97 | { |
109 | if (qe_immr == NULL) | 98 | if (qe_immr == NULL) |
110 | qe_immr = ioremap(get_qe_base(), QE_IMMAP_SIZE); | 99 | qe_immr = ioremap(get_qe_base(), QE_IMMAP_SIZE); |
@@ -330,16 +319,18 @@ EXPORT_SYMBOL(qe_put_snum); | |||
330 | static int qe_sdma_init(void) | 319 | static int qe_sdma_init(void) |
331 | { | 320 | { |
332 | struct sdma __iomem *sdma = &qe_immr->sdma; | 321 | struct sdma __iomem *sdma = &qe_immr->sdma; |
333 | unsigned long sdma_buf_offset; | 322 | static unsigned long sdma_buf_offset = (unsigned long)-ENOMEM; |
334 | 323 | ||
335 | if (!sdma) | 324 | if (!sdma) |
336 | return -ENODEV; | 325 | return -ENODEV; |
337 | 326 | ||
338 | /* allocate 2 internal temporary buffers (512 bytes size each) for | 327 | /* allocate 2 internal temporary buffers (512 bytes size each) for |
339 | * the SDMA */ | 328 | * the SDMA */ |
340 | sdma_buf_offset = qe_muram_alloc(512 * 2, 4096); | 329 | if (IS_ERR_VALUE(sdma_buf_offset)) { |
341 | if (IS_ERR_VALUE(sdma_buf_offset)) | 330 | sdma_buf_offset = qe_muram_alloc(512 * 2, 4096); |
342 | return -ENOMEM; | 331 | if (IS_ERR_VALUE(sdma_buf_offset)) |
332 | return -ENOMEM; | ||
333 | } | ||
343 | 334 | ||
344 | out_be32(&sdma->sdebcr, (u32) sdma_buf_offset & QE_SDEBCR_BA_MASK); | 335 | out_be32(&sdma->sdebcr, (u32) sdma_buf_offset & QE_SDEBCR_BA_MASK); |
345 | out_be32(&sdma->sdmr, (QE_SDMR_GLB_1_MSK | | 336 | out_be32(&sdma->sdmr, (QE_SDMR_GLB_1_MSK | |
@@ -349,7 +340,7 @@ static int qe_sdma_init(void) | |||
349 | } | 340 | } |
350 | 341 | ||
351 | /* The maximum number of RISCs we support */ | 342 | /* The maximum number of RISCs we support */ |
352 | #define MAX_QE_RISC 2 | 343 | #define MAX_QE_RISC 4 |
353 | 344 | ||
354 | /* Firmware information stored here for qe_get_firmware_info() */ | 345 | /* Firmware information stored here for qe_get_firmware_info() */ |
355 | static struct qe_firmware_info qe_firmware_info; | 346 | static struct qe_firmware_info qe_firmware_info; |
@@ -658,3 +649,35 @@ unsigned int qe_get_num_of_snums(void) | |||
658 | return num_of_snums; | 649 | return num_of_snums; |
659 | } | 650 | } |
660 | EXPORT_SYMBOL(qe_get_num_of_snums); | 651 | EXPORT_SYMBOL(qe_get_num_of_snums); |
652 | |||
653 | #if defined(CONFIG_SUSPEND) && defined(CONFIG_PPC_85xx) | ||
654 | static int qe_resume(struct of_device *ofdev) | ||
655 | { | ||
656 | if (!qe_alive_during_sleep()) | ||
657 | qe_reset(); | ||
658 | return 0; | ||
659 | } | ||
660 | |||
661 | static int qe_probe(struct of_device *ofdev, const struct of_device_id *id) | ||
662 | { | ||
663 | return 0; | ||
664 | } | ||
665 | |||
666 | static const struct of_device_id qe_ids[] = { | ||
667 | { .compatible = "fsl,qe", }, | ||
668 | { }, | ||
669 | }; | ||
670 | |||
671 | static struct of_platform_driver qe_driver = { | ||
672 | .driver.name = "fsl-qe", | ||
673 | .match_table = qe_ids, | ||
674 | .probe = qe_probe, | ||
675 | .resume = qe_resume, | ||
676 | }; | ||
677 | |||
678 | static int __init qe_drv_init(void) | ||
679 | { | ||
680 | return of_register_platform_driver(&qe_driver); | ||
681 | } | ||
682 | device_initcall(qe_drv_init); | ||
683 | #endif /* defined(CONFIG_SUSPEND) && defined(CONFIG_PPC_85xx) */ | ||
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c index 3faa42e03a85..541ba9863647 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_ic.c +++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c | |||
@@ -33,7 +33,7 @@ | |||
33 | 33 | ||
34 | #include "qe_ic.h" | 34 | #include "qe_ic.h" |
35 | 35 | ||
36 | static DEFINE_SPINLOCK(qe_ic_lock); | 36 | static DEFINE_RAW_SPINLOCK(qe_ic_lock); |
37 | 37 | ||
38 | static struct qe_ic_info qe_ic_info[] = { | 38 | static struct qe_ic_info qe_ic_info[] = { |
39 | [1] = { | 39 | [1] = { |
@@ -189,7 +189,7 @@ static inline void qe_ic_write(volatile __be32 __iomem * base, unsigned int reg | |||
189 | 189 | ||
190 | static inline struct qe_ic *qe_ic_from_irq(unsigned int virq) | 190 | static inline struct qe_ic *qe_ic_from_irq(unsigned int virq) |
191 | { | 191 | { |
192 | return irq_desc[virq].chip_data; | 192 | return irq_to_desc(virq)->chip_data; |
193 | } | 193 | } |
194 | 194 | ||
195 | #define virq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) | 195 | #define virq_to_hw(virq) ((unsigned int)irq_map[virq].hwirq) |
@@ -201,13 +201,13 @@ static void qe_ic_unmask_irq(unsigned int virq) | |||
201 | unsigned long flags; | 201 | unsigned long flags; |
202 | u32 temp; | 202 | u32 temp; |
203 | 203 | ||
204 | spin_lock_irqsave(&qe_ic_lock, flags); | 204 | raw_spin_lock_irqsave(&qe_ic_lock, flags); |
205 | 205 | ||
206 | temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].mask_reg); | 206 | temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].mask_reg); |
207 | qe_ic_write(qe_ic->regs, qe_ic_info[src].mask_reg, | 207 | qe_ic_write(qe_ic->regs, qe_ic_info[src].mask_reg, |
208 | temp | qe_ic_info[src].mask); | 208 | temp | qe_ic_info[src].mask); |
209 | 209 | ||
210 | spin_unlock_irqrestore(&qe_ic_lock, flags); | 210 | raw_spin_unlock_irqrestore(&qe_ic_lock, flags); |
211 | } | 211 | } |
212 | 212 | ||
213 | static void qe_ic_mask_irq(unsigned int virq) | 213 | static void qe_ic_mask_irq(unsigned int virq) |
@@ -217,7 +217,7 @@ static void qe_ic_mask_irq(unsigned int virq) | |||
217 | unsigned long flags; | 217 | unsigned long flags; |
218 | u32 temp; | 218 | u32 temp; |
219 | 219 | ||
220 | spin_lock_irqsave(&qe_ic_lock, flags); | 220 | raw_spin_lock_irqsave(&qe_ic_lock, flags); |
221 | 221 | ||
222 | temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].mask_reg); | 222 | temp = qe_ic_read(qe_ic->regs, qe_ic_info[src].mask_reg); |
223 | qe_ic_write(qe_ic->regs, qe_ic_info[src].mask_reg, | 223 | qe_ic_write(qe_ic->regs, qe_ic_info[src].mask_reg, |
@@ -233,11 +233,11 @@ static void qe_ic_mask_irq(unsigned int virq) | |||
233 | */ | 233 | */ |
234 | mb(); | 234 | mb(); |
235 | 235 | ||
236 | spin_unlock_irqrestore(&qe_ic_lock, flags); | 236 | raw_spin_unlock_irqrestore(&qe_ic_lock, flags); |
237 | } | 237 | } |
238 | 238 | ||
239 | static struct irq_chip qe_ic_irq_chip = { | 239 | static struct irq_chip qe_ic_irq_chip = { |
240 | .typename = " QEIC ", | 240 | .name = "QEIC", |
241 | .unmask = qe_ic_unmask_irq, | 241 | .unmask = qe_ic_unmask_irq, |
242 | .mask = qe_ic_mask_irq, | 242 | .mask = qe_ic_mask_irq, |
243 | .mask_ack = qe_ic_mask_irq, | 243 | .mask_ack = qe_ic_mask_irq, |
@@ -256,14 +256,14 @@ static int qe_ic_host_map(struct irq_host *h, unsigned int virq, | |||
256 | struct irq_chip *chip; | 256 | struct irq_chip *chip; |
257 | 257 | ||
258 | if (qe_ic_info[hw].mask == 0) { | 258 | if (qe_ic_info[hw].mask == 0) { |
259 | printk(KERN_ERR "Can't map reserved IRQ \n"); | 259 | printk(KERN_ERR "Can't map reserved IRQ\n"); |
260 | return -EINVAL; | 260 | return -EINVAL; |
261 | } | 261 | } |
262 | /* Default chip */ | 262 | /* Default chip */ |
263 | chip = &qe_ic->hc_irq; | 263 | chip = &qe_ic->hc_irq; |
264 | 264 | ||
265 | set_irq_chip_data(virq, qe_ic); | 265 | set_irq_chip_data(virq, qe_ic); |
266 | get_irq_desc(virq)->status |= IRQ_LEVEL; | 266 | irq_to_desc(virq)->status |= IRQ_LEVEL; |
267 | 267 | ||
268 | set_irq_chip_and_handler(virq, chip, handle_level_irq); | 268 | set_irq_chip_and_handler(virq, chip, handle_level_irq); |
269 | 269 | ||
@@ -271,7 +271,7 @@ static int qe_ic_host_map(struct irq_host *h, unsigned int virq, | |||
271 | } | 271 | } |
272 | 272 | ||
273 | static int qe_ic_host_xlate(struct irq_host *h, struct device_node *ct, | 273 | static int qe_ic_host_xlate(struct irq_host *h, struct device_node *ct, |
274 | u32 * intspec, unsigned int intsize, | 274 | const u32 * intspec, unsigned int intsize, |
275 | irq_hw_number_t * out_hwirq, | 275 | irq_hw_number_t * out_hwirq, |
276 | unsigned int *out_flags) | 276 | unsigned int *out_flags) |
277 | { | 277 | { |
diff --git a/arch/powerpc/sysdev/qe_lib/qe_io.c b/arch/powerpc/sysdev/qe_lib/qe_io.c index 7c87460179ef..77e4934b88c5 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_io.c +++ b/arch/powerpc/sysdev/qe_lib/qe_io.c | |||
@@ -157,13 +157,13 @@ int par_io_of_config(struct device_node *np) | |||
157 | const unsigned int *pio_map; | 157 | const unsigned int *pio_map; |
158 | 158 | ||
159 | if (par_io == NULL) { | 159 | if (par_io == NULL) { |
160 | printk(KERN_ERR "par_io not initialized \n"); | 160 | printk(KERN_ERR "par_io not initialized\n"); |
161 | return -1; | 161 | return -1; |
162 | } | 162 | } |
163 | 163 | ||
164 | ph = of_get_property(np, "pio-handle", NULL); | 164 | ph = of_get_property(np, "pio-handle", NULL); |
165 | if (ph == NULL) { | 165 | if (ph == NULL) { |
166 | printk(KERN_ERR "pio-handle not available \n"); | 166 | printk(KERN_ERR "pio-handle not available\n"); |
167 | return -1; | 167 | return -1; |
168 | } | 168 | } |
169 | 169 | ||
@@ -171,12 +171,12 @@ int par_io_of_config(struct device_node *np) | |||
171 | 171 | ||
172 | pio_map = of_get_property(pio, "pio-map", &pio_map_len); | 172 | pio_map = of_get_property(pio, "pio-map", &pio_map_len); |
173 | if (pio_map == NULL) { | 173 | if (pio_map == NULL) { |
174 | printk(KERN_ERR "pio-map is not set! \n"); | 174 | printk(KERN_ERR "pio-map is not set!\n"); |
175 | return -1; | 175 | return -1; |
176 | } | 176 | } |
177 | pio_map_len /= sizeof(unsigned int); | 177 | pio_map_len /= sizeof(unsigned int); |
178 | if ((pio_map_len % 6) != 0) { | 178 | if ((pio_map_len % 6) != 0) { |
179 | printk(KERN_ERR "pio-map format wrong! \n"); | 179 | printk(KERN_ERR "pio-map format wrong!\n"); |
180 | return -1; | 180 | return -1; |
181 | } | 181 | } |
182 | 182 | ||
diff --git a/arch/powerpc/sysdev/qe_lib/ucc.c b/arch/powerpc/sysdev/qe_lib/ucc.c index ebb442ea1917..fa589b21dbcd 100644 --- a/arch/powerpc/sysdev/qe_lib/ucc.c +++ b/arch/powerpc/sysdev/qe_lib/ucc.c | |||
@@ -16,7 +16,6 @@ | |||
16 | #include <linux/kernel.h> | 16 | #include <linux/kernel.h> |
17 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <linux/errno.h> | 18 | #include <linux/errno.h> |
19 | #include <linux/slab.h> | ||
20 | #include <linux/stddef.h> | 19 | #include <linux/stddef.h> |
21 | #include <linux/spinlock.h> | 20 | #include <linux/spinlock.h> |
22 | #include <linux/module.h> | 21 | #include <linux/module.h> |
diff --git a/arch/powerpc/sysdev/simple_gpio.c b/arch/powerpc/sysdev/simple_gpio.c index 43c4569e24b7..d5fb173e588c 100644 --- a/arch/powerpc/sysdev/simple_gpio.c +++ b/arch/powerpc/sysdev/simple_gpio.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/of.h> | 21 | #include <linux/of.h> |
22 | #include <linux/of_gpio.h> | 22 | #include <linux/of_gpio.h> |
23 | #include <linux/gpio.h> | 23 | #include <linux/gpio.h> |
24 | #include <linux/slab.h> | ||
24 | #include <asm/prom.h> | 25 | #include <asm/prom.h> |
25 | #include "simple_gpio.h" | 26 | #include "simple_gpio.h" |
26 | 27 | ||
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c index cf244a419e96..0ab9281e49ae 100644 --- a/arch/powerpc/sysdev/tsi108_pci.c +++ b/arch/powerpc/sysdev/tsi108_pci.c | |||
@@ -24,7 +24,6 @@ | |||
24 | #include <linux/kernel.h> | 24 | #include <linux/kernel.h> |
25 | #include <linux/init.h> | 25 | #include <linux/init.h> |
26 | #include <linux/pci.h> | 26 | #include <linux/pci.h> |
27 | #include <linux/slab.h> | ||
28 | #include <linux/irq.h> | 27 | #include <linux/irq.h> |
29 | #include <linux/interrupt.h> | 28 | #include <linux/interrupt.h> |
30 | 29 | ||
@@ -376,7 +375,7 @@ static void tsi108_pci_irq_end(u_int irq) | |||
376 | */ | 375 | */ |
377 | 376 | ||
378 | static struct irq_chip tsi108_pci_irq = { | 377 | static struct irq_chip tsi108_pci_irq = { |
379 | .typename = "tsi108_PCI_int", | 378 | .name = "tsi108_PCI_int", |
380 | .mask = tsi108_pci_irq_disable, | 379 | .mask = tsi108_pci_irq_disable, |
381 | .ack = tsi108_pci_irq_ack, | 380 | .ack = tsi108_pci_irq_ack, |
382 | .end = tsi108_pci_irq_end, | 381 | .end = tsi108_pci_irq_end, |
@@ -384,7 +383,7 @@ static struct irq_chip tsi108_pci_irq = { | |||
384 | }; | 383 | }; |
385 | 384 | ||
386 | static int pci_irq_host_xlate(struct irq_host *h, struct device_node *ct, | 385 | static int pci_irq_host_xlate(struct irq_host *h, struct device_node *ct, |
387 | u32 *intspec, unsigned int intsize, | 386 | const u32 *intspec, unsigned int intsize, |
388 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) | 387 | irq_hw_number_t *out_hwirq, unsigned int *out_flags) |
389 | { | 388 | { |
390 | *out_hwirq = intspec[0]; | 389 | *out_hwirq = intspec[0]; |
@@ -398,7 +397,7 @@ static int pci_irq_host_map(struct irq_host *h, unsigned int virq, | |||
398 | DBG("%s(%d, 0x%lx)\n", __func__, virq, hw); | 397 | DBG("%s(%d, 0x%lx)\n", __func__, virq, hw); |
399 | if ((virq >= 1) && (virq <= 4)){ | 398 | if ((virq >= 1) && (virq <= 4)){ |
400 | irq = virq + IRQ_PCI_INTAD_BASE - 1; | 399 | irq = virq + IRQ_PCI_INTAD_BASE - 1; |
401 | get_irq_desc(irq)->status |= IRQ_LEVEL; | 400 | irq_to_desc(irq)->status |= IRQ_LEVEL; |
402 | set_irq_chip(irq, &tsi108_pci_irq); | 401 | set_irq_chip(irq, &tsi108_pci_irq); |
403 | } | 402 | } |
404 | return 0; | 403 | return 0; |
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c index 466ce9ace127..0038fb78f094 100644 --- a/arch/powerpc/sysdev/uic.c +++ b/arch/powerpc/sysdev/uic.c | |||
@@ -57,7 +57,7 @@ struct uic { | |||
57 | 57 | ||
58 | static void uic_unmask_irq(unsigned int virq) | 58 | static void uic_unmask_irq(unsigned int virq) |
59 | { | 59 | { |
60 | struct irq_desc *desc = get_irq_desc(virq); | 60 | struct irq_desc *desc = irq_to_desc(virq); |
61 | struct uic *uic = get_irq_chip_data(virq); | 61 | struct uic *uic = get_irq_chip_data(virq); |
62 | unsigned int src = uic_irq_to_hw(virq); | 62 | unsigned int src = uic_irq_to_hw(virq); |
63 | unsigned long flags; | 63 | unsigned long flags; |
@@ -101,7 +101,7 @@ static void uic_ack_irq(unsigned int virq) | |||
101 | 101 | ||
102 | static void uic_mask_ack_irq(unsigned int virq) | 102 | static void uic_mask_ack_irq(unsigned int virq) |
103 | { | 103 | { |
104 | struct irq_desc *desc = get_irq_desc(virq); | 104 | struct irq_desc *desc = irq_to_desc(virq); |
105 | struct uic *uic = get_irq_chip_data(virq); | 105 | struct uic *uic = get_irq_chip_data(virq); |
106 | unsigned int src = uic_irq_to_hw(virq); | 106 | unsigned int src = uic_irq_to_hw(virq); |
107 | unsigned long flags; | 107 | unsigned long flags; |
@@ -129,7 +129,7 @@ static int uic_set_irq_type(unsigned int virq, unsigned int flow_type) | |||
129 | { | 129 | { |
130 | struct uic *uic = get_irq_chip_data(virq); | 130 | struct uic *uic = get_irq_chip_data(virq); |
131 | unsigned int src = uic_irq_to_hw(virq); | 131 | unsigned int src = uic_irq_to_hw(virq); |
132 | struct irq_desc *desc = get_irq_desc(virq); | 132 | struct irq_desc *desc = irq_to_desc(virq); |
133 | unsigned long flags; | 133 | unsigned long flags; |
134 | int trigger, polarity; | 134 | int trigger, polarity; |
135 | u32 tr, pr, mask; | 135 | u32 tr, pr, mask; |
@@ -177,7 +177,7 @@ static int uic_set_irq_type(unsigned int virq, unsigned int flow_type) | |||
177 | } | 177 | } |
178 | 178 | ||
179 | static struct irq_chip uic_irq_chip = { | 179 | static struct irq_chip uic_irq_chip = { |
180 | .typename = " UIC ", | 180 | .name = "UIC", |
181 | .unmask = uic_unmask_irq, | 181 | .unmask = uic_unmask_irq, |
182 | .mask = uic_mask_irq, | 182 | .mask = uic_mask_irq, |
183 | .mask_ack = uic_mask_ack_irq, | 183 | .mask_ack = uic_mask_ack_irq, |
@@ -202,7 +202,7 @@ static int uic_host_map(struct irq_host *h, unsigned int virq, | |||
202 | } | 202 | } |
203 | 203 | ||
204 | static int uic_host_xlate(struct irq_host *h, struct device_node *ct, | 204 | static int uic_host_xlate(struct irq_host *h, struct device_node *ct, |
205 | u32 *intspec, unsigned int intsize, | 205 | const u32 *intspec, unsigned int intsize, |
206 | irq_hw_number_t *out_hwirq, unsigned int *out_type) | 206 | irq_hw_number_t *out_hwirq, unsigned int *out_type) |
207 | 207 | ||
208 | { | 208 | { |
@@ -225,12 +225,12 @@ void uic_irq_cascade(unsigned int virq, struct irq_desc *desc) | |||
225 | int src; | 225 | int src; |
226 | int subvirq; | 226 | int subvirq; |
227 | 227 | ||
228 | spin_lock(&desc->lock); | 228 | raw_spin_lock(&desc->lock); |
229 | if (desc->status & IRQ_LEVEL) | 229 | if (desc->status & IRQ_LEVEL) |
230 | desc->chip->mask(virq); | 230 | desc->chip->mask(virq); |
231 | else | 231 | else |
232 | desc->chip->mask_ack(virq); | 232 | desc->chip->mask_ack(virq); |
233 | spin_unlock(&desc->lock); | 233 | raw_spin_unlock(&desc->lock); |
234 | 234 | ||
235 | msr = mfdcr(uic->dcrbase + UIC_MSR); | 235 | msr = mfdcr(uic->dcrbase + UIC_MSR); |
236 | if (!msr) /* spurious interrupt */ | 236 | if (!msr) /* spurious interrupt */ |
@@ -242,12 +242,12 @@ void uic_irq_cascade(unsigned int virq, struct irq_desc *desc) | |||
242 | generic_handle_irq(subvirq); | 242 | generic_handle_irq(subvirq); |
243 | 243 | ||
244 | uic_irq_ret: | 244 | uic_irq_ret: |
245 | spin_lock(&desc->lock); | 245 | raw_spin_lock(&desc->lock); |
246 | if (desc->status & IRQ_LEVEL) | 246 | if (desc->status & IRQ_LEVEL) |
247 | desc->chip->ack(virq); | 247 | desc->chip->ack(virq); |
248 | if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) | 248 | if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) |
249 | desc->chip->unmask(virq); | 249 | desc->chip->unmask(virq); |
250 | spin_unlock(&desc->lock); | 250 | raw_spin_unlock(&desc->lock); |
251 | } | 251 | } |
252 | 252 | ||
253 | static struct uic * __init uic_init_one(struct device_node *node) | 253 | static struct uic * __init uic_init_one(struct device_node *node) |
diff --git a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c index 40edad520770..1e0ccfaf403e 100644 --- a/arch/powerpc/sysdev/xilinx_intc.c +++ b/arch/powerpc/sysdev/xilinx_intc.c | |||
@@ -79,7 +79,7 @@ static void xilinx_intc_mask(unsigned int virq) | |||
79 | 79 | ||
80 | static int xilinx_intc_set_type(unsigned int virq, unsigned int flow_type) | 80 | static int xilinx_intc_set_type(unsigned int virq, unsigned int flow_type) |
81 | { | 81 | { |
82 | struct irq_desc *desc = get_irq_desc(virq); | 82 | struct irq_desc *desc = irq_to_desc(virq); |
83 | 83 | ||
84 | desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); | 84 | desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); |
85 | desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; | 85 | desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; |
@@ -106,7 +106,7 @@ static void xilinx_intc_level_unmask(unsigned int virq) | |||
106 | } | 106 | } |
107 | 107 | ||
108 | static struct irq_chip xilinx_intc_level_irqchip = { | 108 | static struct irq_chip xilinx_intc_level_irqchip = { |
109 | .typename = "Xilinx Level INTC", | 109 | .name = "Xilinx Level INTC", |
110 | .mask = xilinx_intc_mask, | 110 | .mask = xilinx_intc_mask, |
111 | .mask_ack = xilinx_intc_mask, | 111 | .mask_ack = xilinx_intc_mask, |
112 | .unmask = xilinx_intc_level_unmask, | 112 | .unmask = xilinx_intc_level_unmask, |
@@ -133,7 +133,7 @@ static void xilinx_intc_edge_ack(unsigned int virq) | |||
133 | } | 133 | } |
134 | 134 | ||
135 | static struct irq_chip xilinx_intc_edge_irqchip = { | 135 | static struct irq_chip xilinx_intc_edge_irqchip = { |
136 | .typename = "Xilinx Edge INTC", | 136 | .name = "Xilinx Edge INTC", |
137 | .mask = xilinx_intc_mask, | 137 | .mask = xilinx_intc_mask, |
138 | .unmask = xilinx_intc_edge_unmask, | 138 | .unmask = xilinx_intc_edge_unmask, |
139 | .ack = xilinx_intc_edge_ack, | 139 | .ack = xilinx_intc_edge_ack, |
@@ -148,7 +148,7 @@ static struct irq_chip xilinx_intc_edge_irqchip = { | |||
148 | * xilinx_intc_xlate - translate virq# from device tree interrupts property | 148 | * xilinx_intc_xlate - translate virq# from device tree interrupts property |
149 | */ | 149 | */ |
150 | static int xilinx_intc_xlate(struct irq_host *h, struct device_node *ct, | 150 | static int xilinx_intc_xlate(struct irq_host *h, struct device_node *ct, |
151 | u32 *intspec, unsigned int intsize, | 151 | const u32 *intspec, unsigned int intsize, |
152 | irq_hw_number_t *out_hwirq, | 152 | irq_hw_number_t *out_hwirq, |
153 | unsigned int *out_flags) | 153 | unsigned int *out_flags) |
154 | { | 154 | { |