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authorAnton Vorontsov <avorontsov@ru.mvista.com>2007-10-05 13:47:29 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-10-08 09:38:57 -0400
commitcccd21027c17c27ad275093c22475354b4495814 (patch)
tree75bd9835a6cb7677ddcab7c5091d7ca4e370b345 /arch/powerpc/sysdev/qe_lib
parent55f9ed0f6a3af19b5b5cc633eced658723bd3395 (diff)
[POWERPC] QEIC: Implement pluggable handlers, fix MPIC cascading
set_irq_chained_handler overwrites MPIC's handle_irq function (handle_fasteoi_irq) thus MPIC never gets eoi event from the cascaded IRQ. This situation hangs MPIC on MPC8568E. To solve this problem efficiently, QEIC needs pluggable handlers, specific to the underlaying interrupt controller. Patch extends qe_ic_init() function to accept low and high interrupt handlers. To avoid #ifdefs, stack of interrupt handlers specified in the header file and functions are marked 'static inline', thus handlers are compiled-in only if actually used (in the board file). Another option would be to lookup for parent controller and automatically detect handlers (will waste text size because of never used handlers, so this option abolished). qe_ic_init() also changed in regard to support multiplexed high/low lines as found in MPC8568E-MDS, plus qe_ic_cascade_muxed_mpic() handler implemented appropriately. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/sysdev/qe_lib')
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe_ic.c29
1 files changed, 7 insertions, 22 deletions
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index 9a2d1edd050e..e1c0fd6dbc1a 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -321,25 +321,9 @@ unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic)
321 return irq_linear_revmap(qe_ic->irqhost, irq); 321 return irq_linear_revmap(qe_ic->irqhost, irq);
322} 322}
323 323
324void qe_ic_cascade_low(unsigned int irq, struct irq_desc *desc) 324void __init qe_ic_init(struct device_node *node, unsigned int flags,
325{ 325 void (*low_handler)(unsigned int irq, struct irq_desc *desc),
326 struct qe_ic *qe_ic = desc->handler_data; 326 void (*high_handler)(unsigned int irq, struct irq_desc *desc))
327 unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
328
329 if (cascade_irq != NO_IRQ)
330 generic_handle_irq(cascade_irq);
331}
332
333void qe_ic_cascade_high(unsigned int irq, struct irq_desc *desc)
334{
335 struct qe_ic *qe_ic = desc->handler_data;
336 unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
337
338 if (cascade_irq != NO_IRQ)
339 generic_handle_irq(cascade_irq);
340}
341
342void __init qe_ic_init(struct device_node *node, unsigned int flags)
343{ 327{
344 struct qe_ic *qe_ic; 328 struct qe_ic *qe_ic;
345 struct resource res; 329 struct resource res;
@@ -399,11 +383,12 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags)
399 qe_ic_write(qe_ic->regs, QEIC_CICR, temp); 383 qe_ic_write(qe_ic->regs, QEIC_CICR, temp);
400 384
401 set_irq_data(qe_ic->virq_low, qe_ic); 385 set_irq_data(qe_ic->virq_low, qe_ic);
402 set_irq_chained_handler(qe_ic->virq_low, qe_ic_cascade_low); 386 set_irq_chained_handler(qe_ic->virq_low, low_handler);
403 387
404 if (qe_ic->virq_high != NO_IRQ) { 388 if (qe_ic->virq_high != NO_IRQ &&
389 qe_ic->virq_high != qe_ic->virq_low) {
405 set_irq_data(qe_ic->virq_high, qe_ic); 390 set_irq_data(qe_ic->virq_high, qe_ic);
406 set_irq_chained_handler(qe_ic->virq_high, qe_ic_cascade_high); 391 set_irq_chained_handler(qe_ic->virq_high, high_handler);
407 } 392 }
408} 393}
409 394