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authorDavid Woodhouse <David.Woodhouse@intel.com>2010-02-26 14:04:15 -0500
committerDavid Woodhouse <David.Woodhouse@intel.com>2010-02-26 14:06:24 -0500
commita7790532f5b7358c33a6b1834dc2b318de209f31 (patch)
tree0ceb9e24b3f54cb5c8453fb5a218e2a94a0f1cce /arch/powerpc/sysdev/mpic_u3msi.c
parent2764fb4244cc1bc08df3667924ca4a972e90ac70 (diff)
parent60b341b778cc2929df16c0a504c91621b3c6a4ad (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
The SmartMedia FTL code depends on new kfifo bits from 2.6.33
Diffstat (limited to 'arch/powerpc/sysdev/mpic_u3msi.c')
-rw-r--r--arch/powerpc/sysdev/mpic_u3msi.c46
1 files changed, 39 insertions, 7 deletions
diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c
index d3caf23e6312..bcbfe79c704b 100644
--- a/arch/powerpc/sysdev/mpic_u3msi.c
+++ b/arch/powerpc/sysdev/mpic_u3msi.c
@@ -64,12 +64,12 @@ static u64 read_ht_magic_addr(struct pci_dev *pdev, unsigned int pos)
64 return addr; 64 return addr;
65} 65}
66 66
67static u64 find_ht_magic_addr(struct pci_dev *pdev) 67static u64 find_ht_magic_addr(struct pci_dev *pdev, unsigned int hwirq)
68{ 68{
69 struct pci_bus *bus; 69 struct pci_bus *bus;
70 unsigned int pos; 70 unsigned int pos;
71 71
72 for (bus = pdev->bus; bus; bus = bus->parent) { 72 for (bus = pdev->bus; bus && bus->self; bus = bus->parent) {
73 pos = pci_find_ht_capability(bus->self, HT_CAPTYPE_MSI_MAPPING); 73 pos = pci_find_ht_capability(bus->self, HT_CAPTYPE_MSI_MAPPING);
74 if (pos) 74 if (pos)
75 return read_ht_magic_addr(bus->self, pos); 75 return read_ht_magic_addr(bus->self, pos);
@@ -78,13 +78,41 @@ static u64 find_ht_magic_addr(struct pci_dev *pdev)
78 return 0; 78 return 0;
79} 79}
80 80
81static u64 find_u4_magic_addr(struct pci_dev *pdev, unsigned int hwirq)
82{
83 struct pci_controller *hose = pci_bus_to_host(pdev->bus);
84
85 /* U4 PCIe MSIs need to write to the special register in
86 * the bridge that generates interrupts. There should be
87 * theorically a register at 0xf8005000 where you just write
88 * the MSI number and that triggers the right interrupt, but
89 * unfortunately, this is busted in HW, the bridge endian swaps
90 * the value and hits the wrong nibble in the register.
91 *
92 * So instead we use another register set which is used normally
93 * for converting HT interrupts to MPIC interrupts, which decodes
94 * the interrupt number as part of the low address bits
95 *
96 * This will not work if we ever use more than one legacy MSI in
97 * a block but we never do. For one MSI or multiple MSI-X where
98 * each interrupt address can be specified separately, it works
99 * just fine.
100 */
101 if (of_device_is_compatible(hose->dn, "u4-pcie") ||
102 of_device_is_compatible(hose->dn, "U4-pcie"))
103 return 0xf8004000 | (hwirq << 4);
104
105 return 0;
106}
107
81static int u3msi_msi_check_device(struct pci_dev *pdev, int nvec, int type) 108static int u3msi_msi_check_device(struct pci_dev *pdev, int nvec, int type)
82{ 109{
83 if (type == PCI_CAP_ID_MSIX) 110 if (type == PCI_CAP_ID_MSIX)
84 pr_debug("u3msi: MSI-X untested, trying anyway.\n"); 111 pr_debug("u3msi: MSI-X untested, trying anyway.\n");
85 112
86 /* If we can't find a magic address then MSI ain't gonna work */ 113 /* If we can't find a magic address then MSI ain't gonna work */
87 if (find_ht_magic_addr(pdev) == 0) { 114 if (find_ht_magic_addr(pdev, 0) == 0 &&
115 find_u4_magic_addr(pdev, 0) == 0) {
88 pr_debug("u3msi: no magic address found for %s\n", 116 pr_debug("u3msi: no magic address found for %s\n",
89 pci_name(pdev)); 117 pci_name(pdev));
90 return -ENXIO; 118 return -ENXIO;
@@ -118,10 +146,6 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
118 u64 addr; 146 u64 addr;
119 int hwirq; 147 int hwirq;
120 148
121 addr = find_ht_magic_addr(pdev);
122 msg.address_lo = addr & 0xFFFFFFFF;
123 msg.address_hi = addr >> 32;
124
125 list_for_each_entry(entry, &pdev->msi_list, list) { 149 list_for_each_entry(entry, &pdev->msi_list, list) {
126 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, 1); 150 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, 1);
127 if (hwirq < 0) { 151 if (hwirq < 0) {
@@ -129,6 +153,12 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
129 return hwirq; 153 return hwirq;
130 } 154 }
131 155
156 addr = find_ht_magic_addr(pdev, hwirq);
157 if (addr == 0)
158 addr = find_u4_magic_addr(pdev, hwirq);
159 msg.address_lo = addr & 0xFFFFFFFF;
160 msg.address_hi = addr >> 32;
161
132 virq = irq_create_mapping(msi_mpic->irqhost, hwirq); 162 virq = irq_create_mapping(msi_mpic->irqhost, hwirq);
133 if (virq == NO_IRQ) { 163 if (virq == NO_IRQ) {
134 pr_debug("u3msi: failed mapping hwirq 0x%x\n", hwirq); 164 pr_debug("u3msi: failed mapping hwirq 0x%x\n", hwirq);
@@ -143,6 +173,8 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
143 pr_debug("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n", 173 pr_debug("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n",
144 virq, hwirq, (unsigned long)addr); 174 virq, hwirq, (unsigned long)addr);
145 175
176 printk("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n",
177 virq, hwirq, (unsigned long)addr);
146 msg.data = hwirq; 178 msg.data = hwirq;
147 write_msi_msg(virq, &msg); 179 write_msi_msg(virq, &msg);
148 180