diff options
| author | Arnaldo Carvalho de Melo <acme@redhat.com> | 2012-05-18 12:13:33 -0400 |
|---|---|---|
| committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2012-05-18 12:13:33 -0400 |
| commit | 16ee6576e25b83806d26eb771138249fcfb5eddc (patch) | |
| tree | 7c717b80f28b5c59ba673dc00f2ca9bd0fc068d4 /arch/powerpc/sysdev/mpic.c | |
| parent | 16fa7e8200fb9066b77a3f27cbed8e4a9fc71998 (diff) | |
| parent | 9b63776fa3ca96c4ecda76f6fa947b7b0add66ac (diff) | |
Merge remote-tracking branch 'tip/perf/urgent' into perf/core
Merge reason: We are going to queue up a dependent patch:
"perf tools: Move parse event automated tests to separated object"
That depends on:
commit e7c72d8
perf tools: Add 'G' and 'H' modifiers to event parsing
Conflicts:
tools/perf/builtin-stat.c
Conflicted with the recent 'perf_target' patches when checking the
result of perf_evsel open routines to see if a retry is needed to cope
with older kernels where the exclude guest/host perf_event_attr bits
were not used.
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'arch/powerpc/sysdev/mpic.c')
| -rw-r--r-- | arch/powerpc/sysdev/mpic.c | 54 |
1 files changed, 34 insertions, 20 deletions
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 9ac71ebd2c40..395af1347749 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
| @@ -604,18 +604,14 @@ static struct mpic *mpic_find(unsigned int irq) | |||
| 604 | } | 604 | } |
| 605 | 605 | ||
| 606 | /* Determine if the linux irq is an IPI */ | 606 | /* Determine if the linux irq is an IPI */ |
| 607 | static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int irq) | 607 | static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int src) |
| 608 | { | 608 | { |
| 609 | unsigned int src = virq_to_hw(irq); | ||
| 610 | |||
| 611 | return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]); | 609 | return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]); |
| 612 | } | 610 | } |
| 613 | 611 | ||
| 614 | /* Determine if the linux irq is a timer */ | 612 | /* Determine if the linux irq is a timer */ |
| 615 | static unsigned int mpic_is_tm(struct mpic *mpic, unsigned int irq) | 613 | static unsigned int mpic_is_tm(struct mpic *mpic, unsigned int src) |
| 616 | { | 614 | { |
| 617 | unsigned int src = virq_to_hw(irq); | ||
| 618 | |||
| 619 | return (src >= mpic->timer_vecs[0] && src <= mpic->timer_vecs[7]); | 615 | return (src >= mpic->timer_vecs[0] && src <= mpic->timer_vecs[7]); |
| 620 | } | 616 | } |
| 621 | 617 | ||
| @@ -876,21 +872,45 @@ int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type) | |||
| 876 | if (src >= mpic->num_sources) | 872 | if (src >= mpic->num_sources) |
| 877 | return -EINVAL; | 873 | return -EINVAL; |
| 878 | 874 | ||
| 875 | vold = mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)); | ||
| 876 | |||
| 877 | /* We don't support "none" type */ | ||
| 879 | if (flow_type == IRQ_TYPE_NONE) | 878 | if (flow_type == IRQ_TYPE_NONE) |
| 880 | if (mpic->senses && src < mpic->senses_count) | 879 | flow_type = IRQ_TYPE_DEFAULT; |
| 881 | flow_type = mpic->senses[src]; | 880 | |
| 882 | if (flow_type == IRQ_TYPE_NONE) | 881 | /* Default: read HW settings */ |
| 883 | flow_type = IRQ_TYPE_LEVEL_LOW; | 882 | if (flow_type == IRQ_TYPE_DEFAULT) { |
| 883 | switch(vold & (MPIC_INFO(VECPRI_POLARITY_MASK) | | ||
| 884 | MPIC_INFO(VECPRI_SENSE_MASK))) { | ||
| 885 | case MPIC_INFO(VECPRI_SENSE_EDGE) | | ||
| 886 | MPIC_INFO(VECPRI_POLARITY_POSITIVE): | ||
| 887 | flow_type = IRQ_TYPE_EDGE_RISING; | ||
| 888 | break; | ||
| 889 | case MPIC_INFO(VECPRI_SENSE_EDGE) | | ||
| 890 | MPIC_INFO(VECPRI_POLARITY_NEGATIVE): | ||
| 891 | flow_type = IRQ_TYPE_EDGE_FALLING; | ||
| 892 | break; | ||
| 893 | case MPIC_INFO(VECPRI_SENSE_LEVEL) | | ||
| 894 | MPIC_INFO(VECPRI_POLARITY_POSITIVE): | ||
| 895 | flow_type = IRQ_TYPE_LEVEL_HIGH; | ||
| 896 | break; | ||
| 897 | case MPIC_INFO(VECPRI_SENSE_LEVEL) | | ||
| 898 | MPIC_INFO(VECPRI_POLARITY_NEGATIVE): | ||
| 899 | flow_type = IRQ_TYPE_LEVEL_LOW; | ||
| 900 | break; | ||
| 901 | } | ||
| 902 | } | ||
| 884 | 903 | ||
| 904 | /* Apply to irq desc */ | ||
| 885 | irqd_set_trigger_type(d, flow_type); | 905 | irqd_set_trigger_type(d, flow_type); |
| 886 | 906 | ||
| 907 | /* Apply to HW */ | ||
| 887 | if (mpic_is_ht_interrupt(mpic, src)) | 908 | if (mpic_is_ht_interrupt(mpic, src)) |
| 888 | vecpri = MPIC_VECPRI_POLARITY_POSITIVE | | 909 | vecpri = MPIC_VECPRI_POLARITY_POSITIVE | |
| 889 | MPIC_VECPRI_SENSE_EDGE; | 910 | MPIC_VECPRI_SENSE_EDGE; |
| 890 | else | 911 | else |
| 891 | vecpri = mpic_type_to_vecpri(mpic, flow_type); | 912 | vecpri = mpic_type_to_vecpri(mpic, flow_type); |
| 892 | 913 | ||
| 893 | vold = mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)); | ||
| 894 | vnew = vold & ~(MPIC_INFO(VECPRI_POLARITY_MASK) | | 914 | vnew = vold & ~(MPIC_INFO(VECPRI_POLARITY_MASK) | |
| 895 | MPIC_INFO(VECPRI_SENSE_MASK)); | 915 | MPIC_INFO(VECPRI_SENSE_MASK)); |
| 896 | vnew |= vecpri; | 916 | vnew |= vecpri; |
| @@ -1026,7 +1046,7 @@ static int mpic_host_map(struct irq_domain *h, unsigned int virq, | |||
| 1026 | irq_set_chip_and_handler(virq, chip, handle_fasteoi_irq); | 1046 | irq_set_chip_and_handler(virq, chip, handle_fasteoi_irq); |
| 1027 | 1047 | ||
| 1028 | /* Set default irq type */ | 1048 | /* Set default irq type */ |
| 1029 | irq_set_irq_type(virq, IRQ_TYPE_NONE); | 1049 | irq_set_irq_type(virq, IRQ_TYPE_DEFAULT); |
| 1030 | 1050 | ||
| 1031 | /* If the MPIC was reset, then all vectors have already been | 1051 | /* If the MPIC was reset, then all vectors have already been |
| 1032 | * initialized. Otherwise, a per source lazy initialization | 1052 | * initialized. Otherwise, a per source lazy initialization |
| @@ -1417,12 +1437,6 @@ void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num, | |||
| 1417 | mpic->num_sources = isu_first + mpic->isu_size; | 1437 | mpic->num_sources = isu_first + mpic->isu_size; |
| 1418 | } | 1438 | } |
| 1419 | 1439 | ||
| 1420 | void __init mpic_set_default_senses(struct mpic *mpic, u8 *senses, int count) | ||
| 1421 | { | ||
| 1422 | mpic->senses = senses; | ||
| 1423 | mpic->senses_count = count; | ||
| 1424 | } | ||
| 1425 | |||
| 1426 | void __init mpic_init(struct mpic *mpic) | 1440 | void __init mpic_init(struct mpic *mpic) |
| 1427 | { | 1441 | { |
| 1428 | int i, cpu; | 1442 | int i, cpu; |
| @@ -1555,12 +1569,12 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri) | |||
| 1555 | return; | 1569 | return; |
| 1556 | 1570 | ||
| 1557 | raw_spin_lock_irqsave(&mpic_lock, flags); | 1571 | raw_spin_lock_irqsave(&mpic_lock, flags); |
| 1558 | if (mpic_is_ipi(mpic, irq)) { | 1572 | if (mpic_is_ipi(mpic, src)) { |
| 1559 | reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) & | 1573 | reg = mpic_ipi_read(src - mpic->ipi_vecs[0]) & |
| 1560 | ~MPIC_VECPRI_PRIORITY_MASK; | 1574 | ~MPIC_VECPRI_PRIORITY_MASK; |
| 1561 | mpic_ipi_write(src - mpic->ipi_vecs[0], | 1575 | mpic_ipi_write(src - mpic->ipi_vecs[0], |
| 1562 | reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); | 1576 | reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT)); |
| 1563 | } else if (mpic_is_tm(mpic, irq)) { | 1577 | } else if (mpic_is_tm(mpic, src)) { |
| 1564 | reg = mpic_tm_read(src - mpic->timer_vecs[0]) & | 1578 | reg = mpic_tm_read(src - mpic->timer_vecs[0]) & |
| 1565 | ~MPIC_VECPRI_PRIORITY_MASK; | 1579 | ~MPIC_VECPRI_PRIORITY_MASK; |
| 1566 | mpic_tm_write(src - mpic->timer_vecs[0], | 1580 | mpic_tm_write(src - mpic->timer_vecs[0], |
