diff options
author | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
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committer | Glenn Elliott <gelliott@cs.unc.edu> | 2012-03-04 19:47:13 -0500 |
commit | c71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch) | |
tree | ecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /arch/powerpc/sysdev/mpc8xx_pic.c | |
parent | ea53c912f8a86a8567697115b6a0d8152beee5c8 (diff) | |
parent | 6a00f206debf8a5c8899055726ad127dbeeed098 (diff) |
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts:
litmus/sched_cedf.c
Diffstat (limited to 'arch/powerpc/sysdev/mpc8xx_pic.c')
-rw-r--r-- | arch/powerpc/sysdev/mpc8xx_pic.c | 41 |
1 files changed, 17 insertions, 24 deletions
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c index 8c27d261aba8..20924f2246f0 100644 --- a/arch/powerpc/sysdev/mpc8xx_pic.c +++ b/arch/powerpc/sysdev/mpc8xx_pic.c | |||
@@ -25,10 +25,10 @@ static sysconf8xx_t __iomem *siu_reg; | |||
25 | 25 | ||
26 | int cpm_get_irq(struct pt_regs *regs); | 26 | int cpm_get_irq(struct pt_regs *regs); |
27 | 27 | ||
28 | static void mpc8xx_unmask_irq(unsigned int virq) | 28 | static void mpc8xx_unmask_irq(struct irq_data *d) |
29 | { | 29 | { |
30 | int bit, word; | 30 | int bit, word; |
31 | unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq; | 31 | unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); |
32 | 32 | ||
33 | bit = irq_nr & 0x1f; | 33 | bit = irq_nr & 0x1f; |
34 | word = irq_nr >> 5; | 34 | word = irq_nr >> 5; |
@@ -37,10 +37,10 @@ static void mpc8xx_unmask_irq(unsigned int virq) | |||
37 | out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]); | 37 | out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]); |
38 | } | 38 | } |
39 | 39 | ||
40 | static void mpc8xx_mask_irq(unsigned int virq) | 40 | static void mpc8xx_mask_irq(struct irq_data *d) |
41 | { | 41 | { |
42 | int bit, word; | 42 | int bit, word; |
43 | unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq; | 43 | unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); |
44 | 44 | ||
45 | bit = irq_nr & 0x1f; | 45 | bit = irq_nr & 0x1f; |
46 | word = irq_nr >> 5; | 46 | word = irq_nr >> 5; |
@@ -49,19 +49,19 @@ static void mpc8xx_mask_irq(unsigned int virq) | |||
49 | out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]); | 49 | out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]); |
50 | } | 50 | } |
51 | 51 | ||
52 | static void mpc8xx_ack(unsigned int virq) | 52 | static void mpc8xx_ack(struct irq_data *d) |
53 | { | 53 | { |
54 | int bit; | 54 | int bit; |
55 | unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq; | 55 | unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); |
56 | 56 | ||
57 | bit = irq_nr & 0x1f; | 57 | bit = irq_nr & 0x1f; |
58 | out_be32(&siu_reg->sc_sipend, 1 << (31-bit)); | 58 | out_be32(&siu_reg->sc_sipend, 1 << (31-bit)); |
59 | } | 59 | } |
60 | 60 | ||
61 | static void mpc8xx_end_irq(unsigned int virq) | 61 | static void mpc8xx_end_irq(struct irq_data *d) |
62 | { | 62 | { |
63 | int bit, word; | 63 | int bit, word; |
64 | unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq; | 64 | unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d); |
65 | 65 | ||
66 | bit = irq_nr & 0x1f; | 66 | bit = irq_nr & 0x1f; |
67 | word = irq_nr >> 5; | 67 | word = irq_nr >> 5; |
@@ -70,24 +70,17 @@ static void mpc8xx_end_irq(unsigned int virq) | |||
70 | out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]); | 70 | out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]); |
71 | } | 71 | } |
72 | 72 | ||
73 | static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type) | 73 | static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type) |
74 | { | 74 | { |
75 | struct irq_desc *desc = irq_to_desc(virq); | ||
76 | |||
77 | desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); | ||
78 | desc->status |= flow_type & IRQ_TYPE_SENSE_MASK; | ||
79 | if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) | ||
80 | desc->status |= IRQ_LEVEL; | ||
81 | |||
82 | if (flow_type & IRQ_TYPE_EDGE_FALLING) { | 75 | if (flow_type & IRQ_TYPE_EDGE_FALLING) { |
83 | irq_hw_number_t hw = (unsigned int)irq_map[virq].hwirq; | 76 | irq_hw_number_t hw = (unsigned int)irqd_to_hwirq(d); |
84 | unsigned int siel = in_be32(&siu_reg->sc_siel); | 77 | unsigned int siel = in_be32(&siu_reg->sc_siel); |
85 | 78 | ||
86 | /* only external IRQ senses are programmable */ | 79 | /* only external IRQ senses are programmable */ |
87 | if ((hw & 1) == 0) { | 80 | if ((hw & 1) == 0) { |
88 | siel |= (0x80000000 >> hw); | 81 | siel |= (0x80000000 >> hw); |
89 | out_be32(&siu_reg->sc_siel, siel); | 82 | out_be32(&siu_reg->sc_siel, siel); |
90 | desc->handle_irq = handle_edge_irq; | 83 | __irq_set_handler_locked(d->irq, handle_edge_irq); |
91 | } | 84 | } |
92 | } | 85 | } |
93 | return 0; | 86 | return 0; |
@@ -95,11 +88,11 @@ static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type) | |||
95 | 88 | ||
96 | static struct irq_chip mpc8xx_pic = { | 89 | static struct irq_chip mpc8xx_pic = { |
97 | .name = "MPC8XX SIU", | 90 | .name = "MPC8XX SIU", |
98 | .unmask = mpc8xx_unmask_irq, | 91 | .irq_unmask = mpc8xx_unmask_irq, |
99 | .mask = mpc8xx_mask_irq, | 92 | .irq_mask = mpc8xx_mask_irq, |
100 | .ack = mpc8xx_ack, | 93 | .irq_ack = mpc8xx_ack, |
101 | .eoi = mpc8xx_end_irq, | 94 | .irq_eoi = mpc8xx_end_irq, |
102 | .set_type = mpc8xx_set_irq_type, | 95 | .irq_set_type = mpc8xx_set_irq_type, |
103 | }; | 96 | }; |
104 | 97 | ||
105 | unsigned int mpc8xx_get_irq(void) | 98 | unsigned int mpc8xx_get_irq(void) |
@@ -124,7 +117,7 @@ static int mpc8xx_pic_host_map(struct irq_host *h, unsigned int virq, | |||
124 | pr_debug("mpc8xx_pic_host_map(%d, 0x%lx)\n", virq, hw); | 117 | pr_debug("mpc8xx_pic_host_map(%d, 0x%lx)\n", virq, hw); |
125 | 118 | ||
126 | /* Set default irq handle */ | 119 | /* Set default irq handle */ |
127 | set_irq_chip_and_handler(virq, &mpc8xx_pic, handle_level_irq); | 120 | irq_set_chip_and_handler(virq, &mpc8xx_pic, handle_level_irq); |
128 | return 0; | 121 | return 0; |
129 | } | 122 | } |
130 | 123 | ||