aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/sysdev/cpm2_pic.c
diff options
context:
space:
mode:
authorVitaly Bordug <vbordug@ru.mvista.com>2006-09-21 14:37:58 -0400
committerVitaly Bordug <vbordug@ru.mvista.com>2006-09-21 14:37:58 -0400
commitfc8e50e349aa722d9f97ed9ba30e324ede8fa408 (patch)
tree8ed14947a5c448f697240006efab77aac60281b7 /arch/powerpc/sysdev/cpm2_pic.c
parent902f392d011d0a781ea4695c464345faa6664540 (diff)
POWERPC: Get rid of remapping the whole immr
The stuff below cleans up the code attempting to remap the whole cpm2_immr early, as well as places happily assuming that fact. This is more like the 2.4 legacy stuff, and is at least confusing and unclear now. To keep the world comfortable, a new mechanism is introduced: before accessing specific immr register/register set, one needs to map it, using cpm2_map(<reg>), for instance, access to CPM command register will look like volatile cpm_cpm2_t *cp = cpm2_map(im_cpm); keeping the code clear, yet without "already defined somewhere" cpm2_immr. So far, unmapping code is not implemented, but it's not a big deal to add it, if the whole idea makes sense. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
Diffstat (limited to 'arch/powerpc/sysdev/cpm2_pic.c')
-rw-r--r--arch/powerpc/sysdev/cpm2_pic.c34
1 files changed, 17 insertions, 17 deletions
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index c804475c07d3..51752990f7b9 100644
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -78,7 +78,7 @@ static void cpm2_mask_irq(unsigned int irq_nr)
78 bit = irq_to_siubit[irq_nr]; 78 bit = irq_to_siubit[irq_nr];
79 word = irq_to_siureg[irq_nr]; 79 word = irq_to_siureg[irq_nr];
80 80
81 simr = &(cpm2_immr->im_intctl.ic_simrh); 81 simr = &(cpm2_intctl->ic_simrh);
82 ppc_cached_irq_mask[word] &= ~(1 << bit); 82 ppc_cached_irq_mask[word] &= ~(1 << bit);
83 simr[word] = ppc_cached_irq_mask[word]; 83 simr[word] = ppc_cached_irq_mask[word];
84} 84}
@@ -93,7 +93,7 @@ static void cpm2_unmask_irq(unsigned int irq_nr)
93 bit = irq_to_siubit[irq_nr]; 93 bit = irq_to_siubit[irq_nr];
94 word = irq_to_siureg[irq_nr]; 94 word = irq_to_siureg[irq_nr];
95 95
96 simr = &(cpm2_immr->im_intctl.ic_simrh); 96 simr = &(cpm2_intctl->ic_simrh);
97 ppc_cached_irq_mask[word] |= 1 << bit; 97 ppc_cached_irq_mask[word] |= 1 << bit;
98 simr[word] = ppc_cached_irq_mask[word]; 98 simr[word] = ppc_cached_irq_mask[word];
99} 99}
@@ -108,8 +108,8 @@ static void cpm2_mask_and_ack(unsigned int irq_nr)
108 bit = irq_to_siubit[irq_nr]; 108 bit = irq_to_siubit[irq_nr];
109 word = irq_to_siureg[irq_nr]; 109 word = irq_to_siureg[irq_nr];
110 110
111 simr = &(cpm2_immr->im_intctl.ic_simrh); 111 simr = &(cpm2_intctl->ic_simrh);
112 sipnr = &(cpm2_immr->im_intctl.ic_sipnrh); 112 sipnr = &(cpm2_intctl->ic_sipnrh);
113 ppc_cached_irq_mask[word] &= ~(1 << bit); 113 ppc_cached_irq_mask[word] &= ~(1 << bit);
114 simr[word] = ppc_cached_irq_mask[word]; 114 simr[word] = ppc_cached_irq_mask[word];
115 sipnr[word] = 1 << bit; 115 sipnr[word] = 1 << bit;
@@ -127,7 +127,7 @@ static void cpm2_end_irq(unsigned int irq_nr)
127 bit = irq_to_siubit[irq_nr]; 127 bit = irq_to_siubit[irq_nr];
128 word = irq_to_siureg[irq_nr]; 128 word = irq_to_siureg[irq_nr];
129 129
130 simr = &(cpm2_immr->im_intctl.ic_simrh); 130 simr = &(cpm2_intctl->ic_simrh);
131 ppc_cached_irq_mask[word] |= 1 << bit; 131 ppc_cached_irq_mask[word] |= 1 << bit;
132 simr[word] = ppc_cached_irq_mask[word]; 132 simr[word] = ppc_cached_irq_mask[word];
133 /* 133 /*
@@ -152,10 +152,10 @@ int cpm2_get_irq(struct pt_regs *regs)
152 int irq; 152 int irq;
153 unsigned long bits; 153 unsigned long bits;
154 154
155 /* For CPM2, read the SIVEC register and shift the bits down 155 /* For CPM2, read the SIVEC register and shift the bits down
156 * to get the irq number.*/ 156 * to get the irq number. */
157 bits = cpm2_immr->im_intctl.ic_sivec; 157 bits = cpm2_intctl->ic_sivec;
158 irq = bits >> 26; 158 irq = bits >> 26;
159 159
160 if (irq == 0) 160 if (irq == 0)
161 return(-1); 161 return(-1);
@@ -223,26 +223,26 @@ void cpm2_pic_init(struct device_node *node)
223 223
224 /* Mask out everything */ 224 /* Mask out everything */
225 225
226 cpm2_immr->im_intctl.ic_simrh = 0x00000000; 226 cpm2_intctl->ic_simrh = 0x00000000;
227 cpm2_immr->im_intctl.ic_simrl = 0x00000000; 227 cpm2_intctl->ic_simrl = 0x00000000;
228 228
229 wmb(); 229 wmb();
230 230
231 /* Ack everything */ 231 /* Ack everything */
232 cpm2_immr->im_intctl.ic_sipnrh = 0xffffffff; 232 cpm2_intctl->ic_sipnrh = 0xffffffff;
233 cpm2_immr->im_intctl.ic_sipnrl = 0xffffffff; 233 cpm2_intctl->ic_sipnrl = 0xffffffff;
234 wmb(); 234 wmb();
235 235
236 /* Dummy read of the vector */ 236 /* Dummy read of the vector */
237 i = cpm2_immr->im_intctl.ic_sivec; 237 i = cpm2_intctl->ic_sivec;
238 rmb(); 238 rmb();
239 239
240 /* Initialize the default interrupt mapping priorities, 240 /* Initialize the default interrupt mapping priorities,
241 * in case the boot rom changed something on us. 241 * in case the boot rom changed something on us.
242 */ 242 */
243 cpm2_immr->im_intctl.ic_sicr = 0; 243 cpm2_intctl->ic_sicr = 0;
244 cpm2_immr->im_intctl.ic_scprrh = 0x05309770; 244 cpm2_intctl->ic_scprrh = 0x05309770;
245 cpm2_immr->im_intctl.ic_scprrl = 0x05309770; 245 cpm2_intctl->ic_scprrl = 0x05309770;
246 246
247 /* create a legacy host */ 247 /* create a legacy host */
248 if (node) 248 if (node)