aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/platforms
diff options
context:
space:
mode:
authorPaul Mackerras <paulus@samba.org>2007-11-20 02:40:23 -0500
committerPaul Mackerras <paulus@samba.org>2007-11-20 02:40:23 -0500
commit072ef40e08a71aae4ff2835e3c7f601b29daf227 (patch)
tree00ec938af2b940b2ca605a14ce1695890540397c /arch/powerpc/platforms
parent2b46b5673ca67d23302c2afac045def988a3cade (diff)
parentbebfa06c61da6246d4aab38efa06a460eb3db4ed (diff)
Merge branch 'for-2.6.24' of master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc into merge
Diffstat (limited to 'arch/powerpc/platforms')
-rw-r--r--arch/powerpc/platforms/83xx/mpc832x_mds.c7
-rw-r--r--arch/powerpc/platforms/83xx/mpc836x_mds.c31
-rw-r--r--arch/powerpc/platforms/83xx/usb.c8
3 files changed, 36 insertions, 10 deletions
diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c
index 972fa8528a8c..9e3bfcca1cea 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c
@@ -90,10 +90,11 @@ static void __init mpc832x_sys_setup_arch(void)
90 90
91 if ((np = of_find_compatible_node(NULL, "network", "ucc_geth")) 91 if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
92 != NULL){ 92 != NULL){
93 /* Reset the Ethernet PHY */ 93 /* Reset the Ethernet PHYs */
94 bcsr_regs[9] &= ~0x20; 94#define BCSR8_FETH_RST 0x50
95 bcsr_regs[8] &= ~BCSR8_FETH_RST;
95 udelay(1000); 96 udelay(1000);
96 bcsr_regs[9] |= 0x20; 97 bcsr_regs[8] |= BCSR8_FETH_RST;
97 iounmap(bcsr_regs); 98 iounmap(bcsr_regs);
98 of_node_put(np); 99 of_node_put(np);
99 } 100 }
diff --git a/arch/powerpc/platforms/83xx/mpc836x_mds.c b/arch/powerpc/platforms/83xx/mpc836x_mds.c
index 0f3855c95ff5..0a722601a2f0 100644
--- a/arch/powerpc/platforms/83xx/mpc836x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc836x_mds.c
@@ -96,14 +96,39 @@ static void __init mpc836x_mds_setup_arch(void)
96 96
97 if ((np = of_find_compatible_node(NULL, "network", "ucc_geth")) 97 if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
98 != NULL){ 98 != NULL){
99 uint svid;
100
99 /* Reset the Ethernet PHY */ 101 /* Reset the Ethernet PHY */
100 bcsr_regs[9] &= ~0x20; 102#define BCSR9_GETHRST 0x20
103 clrbits8(&bcsr_regs[9], BCSR9_GETHRST);
101 udelay(1000); 104 udelay(1000);
102 bcsr_regs[9] |= 0x20; 105 setbits8(&bcsr_regs[9], BCSR9_GETHRST);
106
107 /* handle mpc8360ea rev.2.1 erratum 2: RGMII Timing */
108 svid = mfspr(SPRN_SVR);
109 if (svid == 0x80480021) {
110 void __iomem *immap;
111
112 immap = ioremap(get_immrbase() + 0x14a8, 8);
113
114 /*
115 * IMMR + 0x14A8[4:5] = 11 (clk delay for UCC 2)
116 * IMMR + 0x14A8[18:19] = 11 (clk delay for UCC 1)
117 */
118 setbits32(immap, 0x0c003000);
119
120 /*
121 * IMMR + 0x14AC[20:27] = 10101010
122 * (data delay for both UCC's)
123 */
124 clrsetbits_be32(immap + 4, 0xff0, 0xaa0);
125
126 iounmap(immap);
127 }
128
103 iounmap(bcsr_regs); 129 iounmap(bcsr_regs);
104 of_node_put(np); 130 of_node_put(np);
105 } 131 }
106
107#endif /* CONFIG_QUICC_ENGINE */ 132#endif /* CONFIG_QUICC_ENGINE */
108} 133}
109 134
diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c
index eafe7605cdac..b45160f8d084 100644
--- a/arch/powerpc/platforms/83xx/usb.c
+++ b/arch/powerpc/platforms/83xx/usb.c
@@ -130,7 +130,7 @@ int mpc831x_usb_cfg(void)
130 out_be32(immap + MPC83XX_SCCR_OFFS, temp); 130 out_be32(immap + MPC83XX_SCCR_OFFS, temp);
131 131
132 /* Configure pin mux for ULPI. There is no pin mux for UTMI */ 132 /* Configure pin mux for ULPI. There is no pin mux for UTMI */
133 if (!strcmp(prop, "ulpi")) { 133 if (prop && !strcmp(prop, "ulpi")) {
134 temp = in_be32(immap + MPC83XX_SICRL_OFFS); 134 temp = in_be32(immap + MPC83XX_SICRL_OFFS);
135 temp &= ~MPC831X_SICRL_USB_MASK; 135 temp &= ~MPC831X_SICRL_USB_MASK;
136 temp |= MPC831X_SICRL_USB_ULPI; 136 temp |= MPC831X_SICRL_USB_ULPI;
@@ -153,13 +153,13 @@ int mpc831x_usb_cfg(void)
153 usb_regs = ioremap(res.start, res.end - res.start + 1); 153 usb_regs = ioremap(res.start, res.end - res.start + 1);
154 154
155 /* Using on-chip PHY */ 155 /* Using on-chip PHY */
156 if (!strcmp(prop, "utmi_wide") || 156 if (prop && (!strcmp(prop, "utmi_wide") ||
157 !strcmp(prop, "utmi")) { 157 !strcmp(prop, "utmi"))) {
158 /* Set UTMI_PHY_EN, REFSEL to 48MHZ */ 158 /* Set UTMI_PHY_EN, REFSEL to 48MHZ */
159 out_be32(usb_regs + FSL_USB2_CONTROL_OFFS, 159 out_be32(usb_regs + FSL_USB2_CONTROL_OFFS,
160 CONTROL_UTMI_PHY_EN | CONTROL_REFSEL_48MHZ); 160 CONTROL_UTMI_PHY_EN | CONTROL_REFSEL_48MHZ);
161 /* Using external UPLI PHY */ 161 /* Using external UPLI PHY */
162 } else if (!strcmp(prop, "ulpi")) { 162 } else if (prop && !strcmp(prop, "ulpi")) {
163 /* Set PHY_CLK_SEL to ULPI */ 163 /* Set PHY_CLK_SEL to ULPI */
164 temp = CONTROL_PHY_CLK_SEL_ULPI; 164 temp = CONTROL_PHY_CLK_SEL_ULPI;
165#ifdef CONFIG_USB_OTG 165#ifdef CONFIG_USB_OTG