powerpc/powernv: Patch MSI EOI handler on P8

The EOI handler of MSI/MSI-X interrupts for P8 (PHB3) need additional
steps to handle the P/Q bits in IVE before EOIing the corresponding
interrupt. The patch changes the EOI handler to cover that. we have
individual IRQ chip in each PHB instance. During the MSI IRQ setup
time, the IRQ chip is copied over from the original one for that IRQ,
and the EOI handler is patched with the one that will handle the P/Q
bits (As Ben suggested).

Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

1 files changed, 1 insertions, 1 deletions

diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index a11b5a60c91e..861e185483fe 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -84,7 +84,7 @@ static int pnv_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
                         return -ENOMEM;
                 }
                 rc = phb->msi_setup(phb, pdev, phb->msi_base + hwirq,
-                                    entry->msi_attrib.is_64, &msg);
+                                    virq, entry->msi_attrib.is_64, &msg);
                 if (rc) {
                         pr_warn("%s: Failed to setup MSI\n", pci_name(pdev));
                         irq_dispose_mapping(virq);