diff options
author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2013-05-05 23:40:40 -0400 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2013-05-05 23:40:40 -0400 |
commit | 3fd47f063b17692e843128e2abda3e697df42198 (patch) | |
tree | d90a5bdd247b0cc5af7cf78cd18cf6e27a884f00 /arch/powerpc/platforms/powermac | |
parent | 342d6666f7276723e418b91c885b0c03f02eeaaf (diff) |
powerpc/pci: Support per-aperture memory offset
The PCI core supports an offset per aperture nowadays but our arch
code still has a single offset per host bridge representing the
difference betwen CPU memory addresses and PCI MMIO addresses.
This is a problem as new machines and hypervisor versions are
coming out where the 64-bit windows will have a different offset
(basically mapped 1:1) from the 32-bit windows.
This fixes it by using separate offsets. In the long run, we probably
want to get rid of that intermediary struct pci_controller and have
those directly stored into the pci_host_bridge as they are parsed
but this will be a more invasive change.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms/powermac')
-rw-r--r-- | arch/powerpc/platforms/powermac/pci.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c index 2b8af75abc23..cf7009b8c7b6 100644 --- a/arch/powerpc/platforms/powermac/pci.c +++ b/arch/powerpc/platforms/powermac/pci.c | |||
@@ -824,6 +824,7 @@ static void __init parse_region_decode(struct pci_controller *hose, | |||
824 | hose->mem_resources[cur].name = hose->dn->full_name; | 824 | hose->mem_resources[cur].name = hose->dn->full_name; |
825 | hose->mem_resources[cur].start = base; | 825 | hose->mem_resources[cur].start = base; |
826 | hose->mem_resources[cur].end = end; | 826 | hose->mem_resources[cur].end = end; |
827 | hose->mem_offset[cur] = 0; | ||
827 | DBG(" %d: 0x%08lx-0x%08lx\n", cur, base, end); | 828 | DBG(" %d: 0x%08lx-0x%08lx\n", cur, base, end); |
828 | } else { | 829 | } else { |
829 | DBG(" : -0x%08lx\n", end); | 830 | DBG(" : -0x%08lx\n", end); |
@@ -866,7 +867,6 @@ static void __init setup_u3_ht(struct pci_controller* hose) | |||
866 | hose->io_resource.start = 0; | 867 | hose->io_resource.start = 0; |
867 | hose->io_resource.end = 0x003fffff; | 868 | hose->io_resource.end = 0x003fffff; |
868 | hose->io_resource.flags = IORESOURCE_IO; | 869 | hose->io_resource.flags = IORESOURCE_IO; |
869 | hose->pci_mem_offset = 0; | ||
870 | hose->first_busno = 0; | 870 | hose->first_busno = 0; |
871 | hose->last_busno = 0xef; | 871 | hose->last_busno = 0xef; |
872 | 872 | ||