diff options
author | Olof Johansson <olof@lixom.net> | 2008-04-04 14:06:33 -0400 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2008-04-07 10:16:28 -0400 |
commit | f724bf77813d73318bf97dab9626156a0a87c7fc (patch) | |
tree | 983ff1bae9da264afdaa6f7f7911b17c858c30ba /arch/powerpc/platforms/pasemi | |
parent | 6e62040c5533a385b90fcb2e33235ad7d351d3e0 (diff) |
[POWERPC] pasemi: Minor iommu cleanup
Clean up the pwrficient iommu code a bit. It was using u32 *-based offsets
for registers, which can be a bit confusing when comparing to the manual.
Generated binaries from the code is unchanged from before.
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/powerpc/platforms/pasemi')
-rw-r--r-- | arch/powerpc/platforms/pasemi/iommu.c | 19 |
1 files changed, 9 insertions, 10 deletions
diff --git a/arch/powerpc/platforms/pasemi/iommu.c b/arch/powerpc/platforms/pasemi/iommu.c index 5803f11c77fc..86967bdd8774 100644 --- a/arch/powerpc/platforms/pasemi/iommu.c +++ b/arch/powerpc/platforms/pasemi/iommu.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2005-2007, PA Semi, Inc | 2 | * Copyright (C) 2005-2008, PA Semi, Inc |
3 | * | 3 | * |
4 | * Maintained by: Olof Johansson <olof@lixom.net> | 4 | * Maintained by: Olof Johansson <olof@lixom.net> |
5 | * | 5 | * |
@@ -27,7 +27,6 @@ | |||
27 | #include <asm/abs_addr.h> | 27 | #include <asm/abs_addr.h> |
28 | #include <asm/firmware.h> | 28 | #include <asm/firmware.h> |
29 | 29 | ||
30 | |||
31 | #define IOBMAP_PAGE_SHIFT 12 | 30 | #define IOBMAP_PAGE_SHIFT 12 |
32 | #define IOBMAP_PAGE_SIZE (1 << IOBMAP_PAGE_SHIFT) | 31 | #define IOBMAP_PAGE_SIZE (1 << IOBMAP_PAGE_SHIFT) |
33 | #define IOBMAP_PAGE_MASK (IOBMAP_PAGE_SIZE - 1) | 32 | #define IOBMAP_PAGE_MASK (IOBMAP_PAGE_SIZE - 1) |
@@ -35,13 +34,13 @@ | |||
35 | #define IOB_BASE 0xe0000000 | 34 | #define IOB_BASE 0xe0000000 |
36 | #define IOB_SIZE 0x3000 | 35 | #define IOB_SIZE 0x3000 |
37 | /* Configuration registers */ | 36 | /* Configuration registers */ |
38 | #define IOBCAP_REG 0x10 | 37 | #define IOBCAP_REG 0x40 |
39 | #define IOBCOM_REG 0x40 | 38 | #define IOBCOM_REG 0x100 |
40 | /* Enable IOB address translation */ | 39 | /* Enable IOB address translation */ |
41 | #define IOBCOM_ATEN 0x00000100 | 40 | #define IOBCOM_ATEN 0x00000100 |
42 | 41 | ||
43 | /* Address decode configuration register */ | 42 | /* Address decode configuration register */ |
44 | #define IOB_AD_REG 0x53 | 43 | #define IOB_AD_REG 0x14c |
45 | /* IOBCOM_AD_REG fields */ | 44 | /* IOBCOM_AD_REG fields */ |
46 | #define IOB_AD_VGPRT 0x00000e00 | 45 | #define IOB_AD_VGPRT 0x00000e00 |
47 | #define IOB_AD_VGAEN 0x00000100 | 46 | #define IOB_AD_VGAEN 0x00000100 |
@@ -56,13 +55,13 @@ | |||
56 | #define IOB_AD_TRNG_2G 0x00000001 | 55 | #define IOB_AD_TRNG_2G 0x00000001 |
57 | #define IOB_AD_TRNG_128G 0x00000003 | 56 | #define IOB_AD_TRNG_128G 0x00000003 |
58 | 57 | ||
59 | #define IOB_TABLEBASE_REG 0x55 | 58 | #define IOB_TABLEBASE_REG 0x154 |
60 | 59 | ||
61 | /* Base of the 64 4-byte L1 registers */ | 60 | /* Base of the 64 4-byte L1 registers */ |
62 | #define IOB_XLT_L1_REGBASE 0xac0 | 61 | #define IOB_XLT_L1_REGBASE 0x2b00 |
63 | 62 | ||
64 | /* Register to invalidate TLB entries */ | 63 | /* Register to invalidate TLB entries */ |
65 | #define IOB_AT_INVAL_TLB_REG 0xb40 | 64 | #define IOB_AT_INVAL_TLB_REG 0x2d00 |
66 | 65 | ||
67 | /* The top two bits of the level 1 entry contains valid and type flags */ | 66 | /* The top two bits of the level 1 entry contains valid and type flags */ |
68 | #define IOBMAP_L1E_V 0x40000000 | 67 | #define IOBMAP_L1E_V 0x40000000 |
@@ -76,7 +75,7 @@ | |||
76 | #define IOBMAP_L2E_V 0x80000000 | 75 | #define IOBMAP_L2E_V 0x80000000 |
77 | #define IOBMAP_L2E_V_CACHED 0xc0000000 | 76 | #define IOBMAP_L2E_V_CACHED 0xc0000000 |
78 | 77 | ||
79 | static u32 __iomem *iob; | 78 | static void __iomem *iob; |
80 | static u32 iob_l1_emptyval; | 79 | static u32 iob_l1_emptyval; |
81 | static u32 iob_l2_emptyval; | 80 | static u32 iob_l2_emptyval; |
82 | static u32 *iob_l2_base; | 81 | static u32 *iob_l2_base; |
@@ -219,7 +218,7 @@ int __init iob_init(struct device_node *dn) | |||
219 | for (i = 0; i < 64; i++) { | 218 | for (i = 0; i < 64; i++) { |
220 | /* Each L1 covers 32MB, i.e. 8K entries = 32K of ram */ | 219 | /* Each L1 covers 32MB, i.e. 8K entries = 32K of ram */ |
221 | regword = IOBMAP_L1E_V | (__pa(iob_l2_base + i*0x2000) >> 12); | 220 | regword = IOBMAP_L1E_V | (__pa(iob_l2_base + i*0x2000) >> 12); |
222 | out_le32(iob+IOB_XLT_L1_REGBASE+i, regword); | 221 | out_le32(iob+IOB_XLT_L1_REGBASE+i*4, regword); |
223 | } | 222 | } |
224 | 223 | ||
225 | /* set 2GB translation window, based at 0 */ | 224 | /* set 2GB translation window, based at 0 */ |