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author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-01-30 21:37:27 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-01-30 21:37:27 -0500 |
commit | 8af03e782cae1e0a0f530ddd22301cdd12cf9dc0 (patch) | |
tree | c4af13a38bd3cc1a811a37f2358491f171052070 /arch/powerpc/platforms/cell/spu_manage.c | |
parent | 6232665040f9a23fafd9d94d4ae8d5a2dc850f65 (diff) | |
parent | 99e139126ab2e84be67969650f92eb37c12ab5cd (diff) |
Merge branch 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (454 commits)
[POWERPC] Cell IOMMU fixed mapping support
[POWERPC] Split out the ioid fetching/checking logic
[POWERPC] Add support to cell_iommu_setup_page_tables() for multiple windows
[POWERPC] Split out the IOMMU logic from cell_dma_dev_setup()
[POWERPC] Split cell_iommu_setup_hardware() into two parts
[POWERPC] Split out the logic that allocates struct iommus
[POWERPC] Allocate the hash table under 1G on cell
[POWERPC] Add set_dma_ops() to match get_dma_ops()
[POWERPC] 83xx: Clean up / convert mpc83xx board DTS files to v1 format.
[POWERPC] 85xx: Only invalidate TLB0 and TLB1
[POWERPC] 83xx: Fix typo in mpc837x compatible entries
[POWERPC] 85xx: convert sbc85* boards to use machine_device_initcall
[POWERPC] 83xx: rework platform Kconfig
[POWERPC] 85xx: rework platform Kconfig
[POWERPC] 86xx: Remove unused IRQ defines
[POWERPC] QE: Explicitly set address-cells and size cells for muram
[POWERPC] Convert StorCenter DTS file to /dts-v1/ format.
[POWERPC] 86xx: Convert all 86xx DTS files to /dts-v1/ format.
[PPC] Remove 85xx from arch/ppc
[PPC] Remove 83xx from arch/ppc
...
Diffstat (limited to 'arch/powerpc/platforms/cell/spu_manage.c')
-rw-r--r-- | arch/powerpc/platforms/cell/spu_manage.c | 28 |
1 files changed, 23 insertions, 5 deletions
diff --git a/arch/powerpc/platforms/cell/spu_manage.c b/arch/powerpc/platforms/cell/spu_manage.c index 1b010707488d..d351bdebf5f1 100644 --- a/arch/powerpc/platforms/cell/spu_manage.c +++ b/arch/powerpc/platforms/cell/spu_manage.c | |||
@@ -35,6 +35,7 @@ | |||
35 | #include <asm/firmware.h> | 35 | #include <asm/firmware.h> |
36 | #include <asm/prom.h> | 36 | #include <asm/prom.h> |
37 | 37 | ||
38 | #include "spufs/spufs.h" | ||
38 | #include "interrupt.h" | 39 | #include "interrupt.h" |
39 | 40 | ||
40 | struct device_node *spu_devnode(struct spu *spu) | 41 | struct device_node *spu_devnode(struct spu *spu) |
@@ -345,7 +346,7 @@ static int __init of_create_spu(struct spu *spu, void *data) | |||
345 | } | 346 | } |
346 | ret = spu_map_interrupts_old(spu, spe); | 347 | ret = spu_map_interrupts_old(spu, spe); |
347 | if (ret) { | 348 | if (ret) { |
348 | printk(KERN_ERR "%s: could not map interrupts", | 349 | printk(KERN_ERR "%s: could not map interrupts\n", |
349 | spu->name); | 350 | spu->name); |
350 | goto out_unmap; | 351 | goto out_unmap; |
351 | } | 352 | } |
@@ -369,6 +370,16 @@ static int of_destroy_spu(struct spu *spu) | |||
369 | return 0; | 370 | return 0; |
370 | } | 371 | } |
371 | 372 | ||
373 | static void enable_spu_by_master_run(struct spu_context *ctx) | ||
374 | { | ||
375 | ctx->ops->master_start(ctx); | ||
376 | } | ||
377 | |||
378 | static void disable_spu_by_master_run(struct spu_context *ctx) | ||
379 | { | ||
380 | ctx->ops->master_stop(ctx); | ||
381 | } | ||
382 | |||
372 | /* Hardcoded affinity idxs for qs20 */ | 383 | /* Hardcoded affinity idxs for qs20 */ |
373 | #define QS20_SPES_PER_BE 8 | 384 | #define QS20_SPES_PER_BE 8 |
374 | static int qs20_reg_idxs[QS20_SPES_PER_BE] = { 0, 2, 4, 6, 7, 5, 3, 1 }; | 385 | static int qs20_reg_idxs[QS20_SPES_PER_BE] = { 0, 2, 4, 6, 7, 5, 3, 1 }; |
@@ -411,10 +422,15 @@ static void init_affinity_qs20_harcoded(void) | |||
411 | 422 | ||
412 | static int of_has_vicinity(void) | 423 | static int of_has_vicinity(void) |
413 | { | 424 | { |
414 | struct spu* spu; | 425 | struct device_node *dn; |
415 | 426 | ||
416 | spu = list_first_entry(&cbe_spu_info[0].spus, struct spu, cbe_list); | 427 | for_each_node_by_type(dn, "spe") { |
417 | return of_find_property(spu_devnode(spu), "vicinity", NULL) != NULL; | 428 | if (of_find_property(dn, "vicinity", NULL)) { |
429 | of_node_put(dn); | ||
430 | return 1; | ||
431 | } | ||
432 | } | ||
433 | return 0; | ||
418 | } | 434 | } |
419 | 435 | ||
420 | static struct spu *devnode_spu(int cbe, struct device_node *dn) | 436 | static struct spu *devnode_spu(int cbe, struct device_node *dn) |
@@ -525,7 +541,7 @@ static int __init init_affinity(void) | |||
525 | if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0")) | 541 | if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0")) |
526 | init_affinity_qs20_harcoded(); | 542 | init_affinity_qs20_harcoded(); |
527 | else | 543 | else |
528 | printk("No affinity configuration found"); | 544 | printk("No affinity configuration found\n"); |
529 | } | 545 | } |
530 | 546 | ||
531 | return 0; | 547 | return 0; |
@@ -535,5 +551,7 @@ const struct spu_management_ops spu_management_of_ops = { | |||
535 | .enumerate_spus = of_enumerate_spus, | 551 | .enumerate_spus = of_enumerate_spus, |
536 | .create_spu = of_create_spu, | 552 | .create_spu = of_create_spu, |
537 | .destroy_spu = of_destroy_spu, | 553 | .destroy_spu = of_destroy_spu, |
554 | .enable_spu = enable_spu_by_master_run, | ||
555 | .disable_spu = disable_spu_by_master_run, | ||
538 | .init_affinity = init_affinity, | 556 | .init_affinity = init_affinity, |
539 | }; | 557 | }; |