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authorKevin Corry <kevcorry@us.ibm.com>2006-11-20 12:45:15 -0500
committerPaul Mackerras <paulus@samba.org>2006-12-04 04:40:12 -0500
commit0443bbd3d8496f9c2bc3e8c9d1833c6638722743 (patch)
tree7166aeb19de3d4cc538c7153843e009a5a33f32b /arch/powerpc/platforms/cell/pmu.c
parente4f6948cfc8b9626022db0f93e7cf2ce5c0998cd (diff)
[POWERPC] cell: Add routines for managing PMU interrupts
The following routines are added to arch/powerpc/platforms/cell/pmu.c: cbe_clear_pm_interrupts() cbe_enable_pm_interrupts() cbe_disable_pm_interrupts() cbe_query_pm_interrupts() cbe_pm_irq() cbe_init_pm_irq() This also adds a routine in arch/powerpc/platforms/cell/interrupt.c and some macros in cbe_regs.h to manipulate the IIC_IR register: iic_set_interrupt_routing() Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/cell/pmu.c')
-rw-r--r--arch/powerpc/platforms/cell/pmu.c70
1 files changed, 70 insertions, 0 deletions
diff --git a/arch/powerpc/platforms/cell/pmu.c b/arch/powerpc/platforms/cell/pmu.c
index ae6fd1c12d4e..f28abf2fc273 100644
--- a/arch/powerpc/platforms/cell/pmu.c
+++ b/arch/powerpc/platforms/cell/pmu.c
@@ -22,9 +22,11 @@
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */ 23 */
24 24
25#include <linux/interrupt.h>
25#include <linux/types.h> 26#include <linux/types.h>
26#include <asm/io.h> 27#include <asm/io.h>
27#include <asm/machdep.h> 28#include <asm/machdep.h>
29#include <asm/pmc.h>
28#include <asm/reg.h> 30#include <asm/reg.h>
29#include <asm/spu.h> 31#include <asm/spu.h>
30 32
@@ -338,3 +340,71 @@ void cbe_read_trace_buffer(u32 cpu, u64 *buf)
338} 340}
339EXPORT_SYMBOL_GPL(cbe_read_trace_buffer); 341EXPORT_SYMBOL_GPL(cbe_read_trace_buffer);
340 342
343/*
344 * Enabling/disabling interrupts for the entire performance monitoring unit.
345 */
346
347u32 cbe_query_pm_interrupts(u32 cpu)
348{
349 return cbe_read_pm(cpu, pm_status);
350}
351EXPORT_SYMBOL_GPL(cbe_query_pm_interrupts);
352
353u32 cbe_clear_pm_interrupts(u32 cpu)
354{
355 /* Reading pm_status clears the interrupt bits. */
356 return cbe_query_pm_interrupts(cpu);
357}
358EXPORT_SYMBOL_GPL(cbe_clear_pm_interrupts);
359
360void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask)
361{
362 /* Set which node and thread will handle the next interrupt. */
363 iic_set_interrupt_routing(cpu, thread, 0);
364
365 /* Enable the interrupt bits in the pm_status register. */
366 if (mask)
367 cbe_write_pm(cpu, pm_status, mask);
368}
369EXPORT_SYMBOL_GPL(cbe_enable_pm_interrupts);
370
371void cbe_disable_pm_interrupts(u32 cpu)
372{
373 cbe_clear_pm_interrupts(cpu);
374 cbe_write_pm(cpu, pm_status, 0);
375}
376EXPORT_SYMBOL_GPL(cbe_disable_pm_interrupts);
377
378static irqreturn_t cbe_pm_irq(int irq, void *dev_id, struct pt_regs *regs)
379{
380 perf_irq(regs);
381 return IRQ_HANDLED;
382}
383
384int __init cbe_init_pm_irq(void)
385{
386 unsigned int irq;
387 int rc, node;
388
389 for_each_node(node) {
390 irq = irq_create_mapping(NULL, IIC_IRQ_IOEX_PMI |
391 (node << IIC_IRQ_NODE_SHIFT));
392 if (irq == NO_IRQ) {
393 printk("ERROR: Unable to allocate irq for node %d\n",
394 node);
395 return -EINVAL;
396 }
397
398 rc = request_irq(irq, cbe_pm_irq,
399 IRQF_DISABLED, "cbe-pmu-0", NULL);
400 if (rc) {
401 printk("ERROR: Request for irq on node %d failed\n",
402 node);
403 return rc;
404 }
405 }
406
407 return 0;
408}
409arch_initcall(cbe_init_pm_irq);
410