[CELL] driver for DDR2 memory on AXON

The Axon bridge chip used on new Cell/B.E. based blade servers
comes with a DDR2 memory controller that can be used to
attach cheap memory modules, as opposed to the high-speed
XDR memory that is used by the CPU itself.

Since the memory controller does not participate in the
cache coherency protocol, we can not use the memory direcly
for Linux applications, but by providing a block device
it can be used for swap space, temporary file storage and
through the use of the direct_access block device operation
for mapping into user addresses, when it is mounted with
an appropriate file system.

Signed-off-by: Maxim Shchetynin <maxim@de.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>

1 files changed, 10 insertions, 0 deletions

diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 33545d352e92..932538a93c2b 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -272,4 +272,14 @@ config CPM2
           you wish to build a kernel for a machine with a CPM2 coprocessor
           on it (826x, 827x, 8560).
 
+config AXON_RAM
+        tristate "Axon DDR2 memory device driver"
+        depends on PPC_IBM_CELL_BLADE
+        default m
+        help
+          It registers one block device per Axon's DDR2 memory bank found
+          on a system. Block devices are called axonram?, their major and
+          minor numbers are available in /proc/devices, /proc/partitions or
+          in /sys/block/axonram?/dev.
+
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