Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc

* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (144 commits)
  powerpc/44x: Support 16K/64K base page sizes on 44x
  powerpc: Force memory size to be a multiple of PAGE_SIZE
  powerpc/32: Wire up the trampoline code for kdump
  powerpc/32: Add the ability for a classic ppc kernel to be loaded at 32M
  powerpc/32: Allow __ioremap on RAM addresses for kdump kernel
  powerpc/32: Setup OF properties for kdump
  powerpc/32/kdump: Implement crash_setup_regs() using ppc_save_regs()
  powerpc: Prepare xmon_save_regs for use with kdump
  powerpc: Remove default kexec/crash_kernel ops assignments
  powerpc: Make default kexec/crash_kernel ops implicit
  powerpc: Setup OF properties for ppc32 kexec
  powerpc/pseries: Fix cpu hotplug
  powerpc: Fix KVM build on ppc440
  powerpc/cell: add QPACE as a separate Cell platform
  powerpc/cell: fix build breakage with CONFIG_SPUFS disabled
  powerpc/mpc5200: fix error paths in PSC UART probe function
  powerpc/mpc5200: add rts/cts handling in PSC UART driver
  powerpc/mpc5200: Make PSC UART driver update serial errors counters
  powerpc/mpc5200: Remove obsolete code from mpc5200 MDIO driver
  powerpc/mpc5200: Add MDMA/UDMA support to MPC5200 ATA driver
  ...

Fix trivial conflict in drivers/char/Makefile as per Paul's directions

1 files changed, 143 insertions, 0 deletions

diff --git a/arch/powerpc/platforms/86xx/gef_gpio.c b/arch/powerpc/platforms/86xx/gef_gpio.c
new file mode 100644
index 000000000000..85b2800f4cb7
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/gef_gpio.c
@@ -0,0 +1,143 @@
+/*
+ * Driver for GE Fanuc's FPGA based GPIO pins
+ *
+ * Author: Martyn Welch <martyn.welch@gefanuc.com>
+ *
+ * 2008 (c) GE Fanuc Intelligent Platforms Embedded Systems, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/* TODO
+ *
+ * Configuration of output modes (totem-pole/open-drain)
+ * Interrupt configuration - interrupts are always generated the FPGA relies on
+ *      the I/O interrupt controllers mask to stop them propergating
+ */
+
+#include <linux/kernel.h>
+#include <linux/compiler.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
+#include <linux/of_gpio.h>
+#include <linux/gpio.h>
+
+#define GEF_GPIO_DIRECT         0x00
+#define GEF_GPIO_IN             0x04
+#define GEF_GPIO_OUT            0x08
+#define GEF_GPIO_TRIG           0x0C
+#define GEF_GPIO_POLAR_A        0x10
+#define GEF_GPIO_POLAR_B        0x14
+#define GEF_GPIO_INT_STAT       0x18
+#define GEF_GPIO_OVERRUN        0x1C
+#define GEF_GPIO_MODE           0x20
+
+#define NUM_GPIO 19
+
+static void _gef_gpio_set(void __iomem *reg, unsigned int offset, int value)
+{
+        unsigned int data;
+
+        data = ioread32be(reg);
+        /* value: 0=low; 1=high */
+        if (value & 0x1)
+                data = data | (0x1 << offset);
+        else
+                data = data & ~(0x1 << offset);
+
+        iowrite32be(data, reg);
+}
+
+
+static int gef_gpio_dir_in(struct gpio_chip *chip, unsigned offset)
+{
+        unsigned int data;
+        struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
+
+        data = ioread32be(mmchip->regs + GEF_GPIO_DIRECT);
+        data = data | (0x1 << offset);
+        iowrite32be(data, mmchip->regs + GEF_GPIO_DIRECT);
+
+        return 0;
+}
+
+static int gef_gpio_dir_out(struct gpio_chip *chip, unsigned offset, int value)
+{
+        unsigned int data;
+        struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
+
+        /* Set direction before switching to input */
+        _gef_gpio_set(mmchip->regs + GEF_GPIO_OUT, offset, value);
+
+        data = ioread32be(mmchip->regs + GEF_GPIO_DIRECT);
+        data = data & ~(0x1 << offset);
+        iowrite32be(data, mmchip->regs + GEF_GPIO_DIRECT);
+
+        return 0;
+}
+
+static int gef_gpio_get(struct gpio_chip *chip, unsigned offset)
+{
+        unsigned int data;
+        int state = 0;
+        struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
+
+        data = ioread32be(mmchip->regs + GEF_GPIO_IN);
+        state = (int)((data >> offset) & 0x1);
+
+        return state;
+}
+
+static void gef_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
+{
+        struct of_mm_gpio_chip *mmchip = to_of_mm_gpio_chip(chip);
+
+        _gef_gpio_set(mmchip->regs + GEF_GPIO_OUT, offset, value);
+}
+
+static int __init gef_gpio_init(void)
+{
+        struct device_node *np;
+
+        for_each_compatible_node(np, NULL, "gef,sbc610-gpio") {
+                int retval;
+                struct of_mm_gpio_chip *gef_gpio_chip;
+
+                pr_debug("%s: Initialising GEF GPIO\n", np->full_name);
+
+                /* Allocate chip structure */
+                gef_gpio_chip = kzalloc(sizeof(*gef_gpio_chip), GFP_KERNEL);
+                if (!gef_gpio_chip) {
+                        pr_err("%s: Unable to allocate structure\n",
+                                np->full_name);
+                        continue;
+                }
+
+                /* Setup pointers to chip functions */
+                gef_gpio_chip->of_gc.gpio_cells = 2;
+                gef_gpio_chip->of_gc.gc.ngpio = NUM_GPIO;
+                gef_gpio_chip->of_gc.gc.direction_input = gef_gpio_dir_in;
+                gef_gpio_chip->of_gc.gc.direction_output = gef_gpio_dir_out;
+                gef_gpio_chip->of_gc.gc.get = gef_gpio_get;
+                gef_gpio_chip->of_gc.gc.set = gef_gpio_set;
+
+                /* This function adds a memory mapped GPIO chip */
+                retval = of_mm_gpiochip_add(np, gef_gpio_chip);
+                if (retval) {
+                        kfree(gef_gpio_chip);
+                        pr_err("%s: Unable to add GPIO\n", np->full_name);
+                }
+        }
+
+        return 0;
+};
+arch_initcall(gef_gpio_init);
+
+MODULE_DESCRIPTION("GE Fanuc I/O FPGA GPIO driver");
+MODULE_AUTHOR("Martyn Welch <martyn.welch@gefanuc.com");
+MODULE_LICENSE("GPL");