Merge branch 'master' of /home/davem/src/GIT/linux-2.6/

Conflicts:
	drivers/firmware/iscsi_ibft.c

5 files changed, 28 insertions, 7 deletions

diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 04ed2156db1c..f0684c8ac960 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -326,11 +326,14 @@ static struct of_device_id mpc85xx_ids[] = {
         { .compatible = "gianfar", },
         { .compatible = "fsl,rapidio-delta", },
         { .compatible = "fsl,mpc8548-guts", },
+        { .compatible = "gpio-leds", },
         {},
 };
 
 static int __init mpc85xx_publish_devices(void)
 {
+        if (machine_is(mpc8568_mds))
+                simple_gpiochip_init("fsl,mpc8568mds-bcsr-gpio");
         if (machine_is(mpc8569_mds))
                 simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio");
 
@@ -362,7 +365,8 @@ static void __init mpc85xx_mds_pic_init(void)
         }
 
         mpic = mpic_alloc(np, r.start,
-                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+                        MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN |
+                        MPIC_BROKEN_FRR_NIRQS,
                         0, 256, " OpenPIC  ");
         BUG_ON(mpic == NULL);
         of_node_put(np);
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index 04160a4cc699..a15f582300d8 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -46,6 +46,7 @@ smp_85xx_kick_cpu(int nr)
         __iomem u32 *bptr_vaddr;
         struct device_node *np;
         int n = 0;
+        int ioremappable;
 
         WARN_ON (nr < 0 || nr >= NR_CPUS);
 
@@ -59,21 +60,37 @@ smp_85xx_kick_cpu(int nr)
                 return;
         }
 
+        /*
+         * A secondary core could be in a spinloop in the bootpage
+         * (0xfffff000), somewhere in highmem, or somewhere in lowmem.
+         * The bootpage and highmem can be accessed via ioremap(), but
+         * we need to directly access the spinloop if its in lowmem.
+         */
+        ioremappable = *cpu_rel_addr > virt_to_phys(high_memory);
+
         /* Map the spin table */
-        bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY);
+        if (ioremappable)
+                bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY);
+        else
+                bptr_vaddr = phys_to_virt(*cpu_rel_addr);
 
         local_irq_save(flags);
 
         out_be32(bptr_vaddr + BOOT_ENTRY_PIR, nr);
         out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start));
 
+        if (!ioremappable)
+                flush_dcache_range((ulong)bptr_vaddr,
+                                (ulong)(bptr_vaddr + SIZE_BOOT_ENTRY));
+
         /* Wait a bit for the CPU to ack. */
         while ((__secondary_hold_acknowledge != nr) && (++n < 1000))
                 mdelay(1);
 
         local_irq_restore(flags);
 
-        iounmap(bptr_vaddr);
+        if (ioremappable)
+                iounmap(bptr_vaddr);
 
         pr_debug("waited %d msecs for CPU #%d.\n", n, nr);
 }
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
index e5da5f62b24a..42e87f08aa01 100644
--- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
+++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
@@ -232,7 +232,7 @@ static int socrates_fpga_pic_set_type(unsigned int virq,
 }
 
 static struct irq_chip socrates_fpga_pic_chip = {
-        .name           = " FPGA-PIC ",
+        .name           = "FPGA-PIC",
         .ack            = socrates_fpga_pic_ack,
         .mask           = socrates_fpga_pic_mask,
         .mask_ack       = socrates_fpga_pic_mask_ack,
diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c
index f559918f3c6f..bc33d1859ae7 100644
--- a/arch/powerpc/platforms/85xx/stx_gp3.c
+++ b/arch/powerpc/platforms/85xx/stx_gp3.c
@@ -134,7 +134,7 @@ static void stx_gp3_show_cpuinfo(struct seq_file *m)
         pvid = mfspr(SPRN_PVR);
         svid = mfspr(SPRN_SVR);
 
-        seq_printf(m, "Vendor\t\t: RPC Electronics STx \n");
+        seq_printf(m, "Vendor\t\t: RPC Electronics STx\n");
         seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
         seq_printf(m, "SVR\t\t: 0x%x\n", svid);
 
diff --git a/arch/powerpc/platforms/85xx/xes_mpc85xx.c b/arch/powerpc/platforms/85xx/xes_mpc85xx.c
index 1b426050a2f9..0125604d096e 100644
--- a/arch/powerpc/platforms/85xx/xes_mpc85xx.c
+++ b/arch/powerpc/platforms/85xx/xes_mpc85xx.c
@@ -80,8 +80,8 @@ static void xes_mpc85xx_configure_l2(void __iomem *l2_base)
         printk(KERN_INFO "xes_mpc85xx: Enabling L2 as cache\n");
 
         ctl = MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2I;
-        if (machine_is_compatible("MPC8540") ||
-            machine_is_compatible("MPC8560"))
+        if (of_machine_is_compatible("MPC8540") ||
+            of_machine_is_compatible("MPC8560"))
                 /*
                  * Assume L2 SRAM is used fully for cache, so set
                  * L2BLKSZ (bits 4:5) to match L2SIZ (bits 2:3).