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authorIlya Yanok <yanok@emcraft.com>2010-10-26 20:02:36 -0400
committerKumar Gala <galak@kernel.crashing.org>2011-01-12 19:00:29 -0500
commitfd066e850351e21d1b385cde35fadf66761bc053 (patch)
treecadeaa7f470a2bfbc880469877de5e836b5a2e10 /arch/powerpc/platforms/83xx
parentb5fb0cc7f1c90e3b00d40b64681efcbf8bcdeb9e (diff)
powerpc/mpc8308: fix USB DR controller initialization
MPC8308 has ULPI pin muxing settings in SICRH register, bits 17-18 which is different from both MPC8313 and MPC8315. Also MPC8308 doesn't have REFSEL, UTMI_PHY_EN and OTG_PORT fields in the USB DR controller CONTROL register. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms/83xx')
-rw-r--r--arch/powerpc/platforms/83xx/mpc83xx.h2
-rw-r--r--arch/powerpc/platforms/83xx/usb.c21
2 files changed, 18 insertions, 5 deletions
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h
index 0fea8811d45b..82a434510d83 100644
--- a/arch/powerpc/platforms/83xx/mpc83xx.h
+++ b/arch/powerpc/platforms/83xx/mpc83xx.h
@@ -35,6 +35,8 @@
35 35
36/* system i/o configuration register high */ 36/* system i/o configuration register high */
37#define MPC83XX_SICRH_OFFS 0x118 37#define MPC83XX_SICRH_OFFS 0x118
38#define MPC8308_SICRH_USB_MASK 0x000c0000
39#define MPC8308_SICRH_USB_ULPI 0x00040000
38#define MPC834X_SICRH_USB_UTMI 0x00020000 40#define MPC834X_SICRH_USB_UTMI 0x00020000
39#define MPC831X_SICRH_USB_MASK 0x000000e0 41#define MPC831X_SICRH_USB_MASK 0x000000e0
40#define MPC831X_SICRH_USB_ULPI 0x000000a0 42#define MPC831X_SICRH_USB_ULPI 0x000000a0
diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c
index 3ba4bb7d41bb..2c64164722d0 100644
--- a/arch/powerpc/platforms/83xx/usb.c
+++ b/arch/powerpc/platforms/83xx/usb.c
@@ -127,7 +127,8 @@ int mpc831x_usb_cfg(void)
127 127
128 /* Configure clock */ 128 /* Configure clock */
129 immr_node = of_get_parent(np); 129 immr_node = of_get_parent(np);
130 if (immr_node && of_device_is_compatible(immr_node, "fsl,mpc8315-immr")) 130 if (immr_node && (of_device_is_compatible(immr_node, "fsl,mpc8315-immr") ||
131 of_device_is_compatible(immr_node, "fsl,mpc8308-immr")))
131 clrsetbits_be32(immap + MPC83XX_SCCR_OFFS, 132 clrsetbits_be32(immap + MPC83XX_SCCR_OFFS,
132 MPC8315_SCCR_USB_MASK, 133 MPC8315_SCCR_USB_MASK,
133 MPC8315_SCCR_USB_DRCM_01); 134 MPC8315_SCCR_USB_DRCM_01);
@@ -138,7 +139,11 @@ int mpc831x_usb_cfg(void)
138 139
139 /* Configure pin mux for ULPI. There is no pin mux for UTMI */ 140 /* Configure pin mux for ULPI. There is no pin mux for UTMI */
140 if (prop && !strcmp(prop, "ulpi")) { 141 if (prop && !strcmp(prop, "ulpi")) {
141 if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr")) { 142 if (of_device_is_compatible(immr_node, "fsl,mpc8308-immr")) {
143 clrsetbits_be32(immap + MPC83XX_SICRH_OFFS,
144 MPC8308_SICRH_USB_MASK,
145 MPC8308_SICRH_USB_ULPI);
146 } else if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr")) {
142 clrsetbits_be32(immap + MPC83XX_SICRL_OFFS, 147 clrsetbits_be32(immap + MPC83XX_SICRL_OFFS,
143 MPC8315_SICRL_USB_MASK, 148 MPC8315_SICRL_USB_MASK,
144 MPC8315_SICRL_USB_ULPI); 149 MPC8315_SICRL_USB_ULPI);
@@ -173,6 +178,9 @@ int mpc831x_usb_cfg(void)
173 !strcmp(prop, "utmi"))) { 178 !strcmp(prop, "utmi"))) {
174 u32 refsel; 179 u32 refsel;
175 180
181 if (of_device_is_compatible(immr_node, "fsl,mpc8308-immr"))
182 goto out;
183
176 if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr")) 184 if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr"))
177 refsel = CONTROL_REFSEL_24MHZ; 185 refsel = CONTROL_REFSEL_24MHZ;
178 else 186 else
@@ -186,9 +194,11 @@ int mpc831x_usb_cfg(void)
186 temp = CONTROL_PHY_CLK_SEL_ULPI; 194 temp = CONTROL_PHY_CLK_SEL_ULPI;
187#ifdef CONFIG_USB_OTG 195#ifdef CONFIG_USB_OTG
188 /* Set OTG_PORT */ 196 /* Set OTG_PORT */
189 dr_mode = of_get_property(np, "dr_mode", NULL); 197 if (!of_device_is_compatible(immr_node, "fsl,mpc8308-immr")) {
190 if (dr_mode && !strcmp(dr_mode, "otg")) 198 dr_mode = of_get_property(np, "dr_mode", NULL);
191 temp |= CONTROL_OTG_PORT; 199 if (dr_mode && !strcmp(dr_mode, "otg"))
200 temp |= CONTROL_OTG_PORT;
201 }
192#endif /* CONFIG_USB_OTG */ 202#endif /* CONFIG_USB_OTG */
193 out_be32(usb_regs + FSL_USB2_CONTROL_OFFS, temp); 203 out_be32(usb_regs + FSL_USB2_CONTROL_OFFS, temp);
194 } else { 204 } else {
@@ -196,6 +206,7 @@ int mpc831x_usb_cfg(void)
196 ret = -EINVAL; 206 ret = -EINVAL;
197 } 207 }
198 208
209out:
199 iounmap(usb_regs); 210 iounmap(usb_regs);
200 of_node_put(np); 211 of_node_put(np);
201 return ret; 212 return ret;