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authorKim Phillips <kim.phillips@freescale.com>2007-11-19 20:04:43 -0500
committerKumar Gala <galak@kernel.crashing.org>2007-11-19 23:03:16 -0500
commitd8ecbb93bece05df84e654c296c3c81b3d347c2d (patch)
tree984630fdc5dc44fd468b0f2ade37fc97d7430f12 /arch/powerpc/platforms/83xx
parent7ac33417ecf8c012df0e957cfa0628a6a4347c7d (diff)
[POWERPC] 83xx: mpc832x mds: Fix board PHY reset code
currently the board-level PHY reset code for the mpc832x MDS messes with reset configuration words source settings which is plain wrong (it looks like this board code was cut-n-pasted from the mpc8360 mds code, which has the PHY reset bits in a different BCSR); this patch points the PHY reset code to the proper mpc832x mds PHY reset bits in the BCSR. Signed-off-by: Peter Van Ackeren <peter.vanackeren@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms/83xx')
-rw-r--r--arch/powerpc/platforms/83xx/mpc832x_mds.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c
index 972fa8528a8c..9e3bfcca1cea 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c
@@ -90,10 +90,11 @@ static void __init mpc832x_sys_setup_arch(void)
90 90
91 if ((np = of_find_compatible_node(NULL, "network", "ucc_geth")) 91 if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
92 != NULL){ 92 != NULL){
93 /* Reset the Ethernet PHY */ 93 /* Reset the Ethernet PHYs */
94 bcsr_regs[9] &= ~0x20; 94#define BCSR8_FETH_RST 0x50
95 bcsr_regs[8] &= ~BCSR8_FETH_RST;
95 udelay(1000); 96 udelay(1000);
96 bcsr_regs[9] |= 0x20; 97 bcsr_regs[8] |= BCSR8_FETH_RST;
97 iounmap(bcsr_regs); 98 iounmap(bcsr_regs);
98 of_node_put(np); 99 of_node_put(np);
99 } 100 }