Merge git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc

* git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (25 commits)
  [POWERPC] Add support for the mpc832x mds board
  [POWERPC] Add initial support for the e300c2 core
  [POWERPC] Add MPC8360EMDS default dts file
  [POWERPC] Add MPC8360EMDS board support
  [POWERPC] Add QUICC Engine (QE) infrastructure
  [POWERPC] Add QE device tree node definition
  [POWERPC] Don't try to just continue if xmon has no input device
  [POWERPC] Fix a printk in pseries_mpic_init_IRQ
  [POWERPC] Get default baud rate in udbg_scc
  [POWERPC] Fix zImage.coff on oldworld PowerMac
  [POWERPC] Fix xmon=off and cleanup xmon initialisation
  [POWERPC] Cleanup include/asm-powerpc/xmon.h
  [POWERPC] Update swim3 printk after blkdev.h change
  [POWERPC] Cell interrupt rework
  POWERPC: mpc82xx merge: board-specific/platform stuff(resend)
  POWERPC: 8272ads merge to powerpc: common stuff
  POWERPC: Added devicetree for mpc8272ads board
  [POWERPC] iSeries has no legacy I/O
  [POWERPC] implement BEGIN/END_FW_FTR_SECTION
  [POWERPC] iSeries does not need pcibios_fixup_resources
  ...

4 files changed, 466 insertions, 0 deletions

diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 5fe7b7faf45f..0975e94ac7c4 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -5,6 +5,13 @@ choice
         prompt "Machine Type"
         default MPC834x_SYS
 
+config MPC832x_MDS
+        bool "Freescale MPC832x MDS"
+        select DEFAULT_UIMAGE
+        select QUICC_ENGINE
+        help
+          This option enables support for the MPC832x MDS evaluation board.
+
 config MPC834x_SYS
         bool "Freescale MPC834x SYS"
         select DEFAULT_UIMAGE
@@ -27,6 +34,12 @@ config MPC834x_ITX
 
 endchoice
 
+config PPC_MPC832x
+        bool
+        select PPC_UDBG_16550
+        select PPC_INDIRECT_PCI
+        default y if MPC832x_MDS
+
 config MPC834x
         bool
         select PPC_UDBG_16550
diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.c b/arch/powerpc/platforms/83xx/mpc832x_mds.c
new file mode 100644
index 000000000000..54dea9d42dc9
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/mpc832x_mds.c
@@ -0,0 +1,215 @@
+/*
+ * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
+ *
+ * Description:
+ * MPC832xE MDS board specific routines.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/reboot.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/major.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/root_dev.h>
+#include <linux/initrd.h>
+
+#include <asm/system.h>
+#include <asm/atomic.h>
+#include <asm/time.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/ipic.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <sysdev/fsl_soc.h>
+#include <asm/qe.h>
+#include <asm/qe_ic.h>
+
+#include "mpc83xx.h"
+#include "mpc832x_mds.h"
+
+#undef DEBUG
+#ifdef DEBUG
+#define DBG(fmt...) udbg_printf(fmt)
+#else
+#define DBG(fmt...)
+#endif
+
+#ifndef CONFIG_PCI
+unsigned long isa_io_base = 0;
+unsigned long isa_mem_base = 0;
+#endif
+
+static u8 *bcsr_regs = NULL;
+
+u8 *get_bcsr(void)
+{
+        return bcsr_regs;
+}
+
+/* ************************************************************************
+ *
+ * Setup the architecture
+ *
+ */
+static void __init mpc832x_sys_setup_arch(void)
+{
+        struct device_node *np;
+
+        if (ppc_md.progress)
+                ppc_md.progress("mpc832x_sys_setup_arch()", 0);
+
+        np = of_find_node_by_type(NULL, "cpu");
+        if (np != 0) {
+                unsigned int *fp =
+                    (int *)get_property(np, "clock-frequency", NULL);
+                if (fp != 0)
+                        loops_per_jiffy = *fp / HZ;
+                else
+                        loops_per_jiffy = 50000000 / HZ;
+                of_node_put(np);
+        }
+
+        /* Map BCSR area */
+        np = of_find_node_by_name(NULL, "bcsr");
+        if (np != 0) {
+                struct resource res;
+
+                of_address_to_resource(np, 0, &res);
+                bcsr_regs = ioremap(res.start, res.end - res.start +1);
+                of_node_put(np);
+        }
+
+#ifdef CONFIG_PCI
+        for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
+                add_bridge(np);
+
+        ppc_md.pci_swizzle = common_swizzle;
+        ppc_md.pci_exclude_device = mpc83xx_exclude_device;
+#endif
+
+#ifdef CONFIG_QUICC_ENGINE
+        qe_reset();
+
+        if ((np = of_find_node_by_name(np, "par_io")) != NULL) {
+                par_io_init(np);
+                of_node_put(np);
+
+                for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
+                        par_io_of_config(np);
+        }
+
+        if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
+                        != NULL){
+                /* Reset the Ethernet PHY */
+                bcsr_regs[9] &= ~0x20;
+                udelay(1000);
+                bcsr_regs[9] |= 0x20;
+                iounmap(bcsr_regs);
+                of_node_put(np);
+        }
+
+#endif                          /* CONFIG_QUICC_ENGINE */
+
+#ifdef CONFIG_BLK_DEV_INITRD
+        if (initrd_start)
+                ROOT_DEV = Root_RAM0;
+        else
+#endif
+#ifdef  CONFIG_ROOT_NFS
+                ROOT_DEV = Root_NFS;
+#else
+                ROOT_DEV = Root_HDA1;
+#endif
+}
+
+void __init mpc832x_sys_init_IRQ(void)
+{
+
+        struct device_node *np;
+
+        np = of_find_node_by_type(NULL, "ipic");
+        if (!np)
+                return;
+
+        ipic_init(np, 0);
+
+        /* Initialize the default interrupt mapping priorities,
+         * in case the boot rom changed something on us.
+         */
+        ipic_set_default_priority();
+        of_node_put(np);
+
+#ifdef CONFIG_QUICC_ENGINE
+        np = of_find_node_by_type(NULL, "qeic");
+        if (!np)
+                return;
+
+        qe_ic_init(np, 0);
+        of_node_put(np);
+#endif                          /* CONFIG_QUICC_ENGINE */
+}
+
+#if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
+extern ulong ds1374_get_rtc_time(void);
+extern int ds1374_set_rtc_time(ulong);
+
+static int __init mpc832x_rtc_hookup(void)
+{
+        struct timespec tv;
+
+        ppc_md.get_rtc_time = ds1374_get_rtc_time;
+        ppc_md.set_rtc_time = ds1374_set_rtc_time;
+
+        tv.tv_nsec = 0;
+        tv.tv_sec = (ppc_md.get_rtc_time) ();
+        do_settimeofday(&tv);
+
+        return 0;
+}
+
+late_initcall(mpc832x_rtc_hookup);
+#endif
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init mpc832x_sys_probe(void)
+{
+        char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
+                                          "model", NULL);
+
+        if (model == NULL)
+                return 0;
+        if (strcmp(model, "MPC8323EMDS"))
+                return 0;
+
+        DBG("%s found\n", model);
+
+        return 1;
+}
+
+define_machine(mpc832x_mds) {
+        .name           = "MPC832x MDS",
+        .probe          = mpc832x_sys_probe,
+        .setup_arch     = mpc832x_sys_setup_arch,
+        .init_IRQ       = mpc832x_sys_init_IRQ,
+        .get_irq        = ipic_get_irq,
+        .restart        = mpc83xx_restart,
+        .time_init      = mpc83xx_time_init,
+        .calibrate_decr = generic_calibrate_decr,
+        .progress       = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/83xx/mpc832x_mds.h b/arch/powerpc/platforms/83xx/mpc832x_mds.h
new file mode 100644
index 000000000000..a49588904f8a
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/mpc832x_mds.h
@@ -0,0 +1,19 @@
+/*
+ * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
+ *
+ * Description:
+ * MPC832x MDS board specific header.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+
+#ifndef __MACH_MPC832x_MDS_H__
+#define __MACH_MPC832x_MDS_H__
+
+extern u8 *get_bcsr(void);
+
+#endif                          /* __MACH_MPC832x_MDS_H__ */
diff --git a/arch/powerpc/platforms/83xx/mpc8360e_pb.c b/arch/powerpc/platforms/83xx/mpc8360e_pb.c
new file mode 100644
index 000000000000..c0191900fc25
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/mpc8360e_pb.c
@@ -0,0 +1,219 @@
+/*
+ * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
+ *
+ * Author: Li Yang <LeoLi@freescale.com>
+ *         Yin Olivia <Hong-hua.Yin@freescale.com>
+ *
+ * Description:
+ * MPC8360E MDS PB board specific routines.
+ *
+ * Changelog:
+ * Jun 21, 2006 Initial version
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/reboot.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/major.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/root_dev.h>
+#include <linux/initrd.h>
+
+#include <asm/system.h>
+#include <asm/atomic.h>
+#include <asm/time.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/ipic.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <sysdev/fsl_soc.h>
+#include <asm/qe.h>
+#include <asm/qe_ic.h>
+
+#include "mpc83xx.h"
+
+#undef DEBUG
+#ifdef DEBUG
+#define DBG(fmt...) udbg_printf(fmt)
+#else
+#define DBG(fmt...)
+#endif
+
+#ifndef CONFIG_PCI
+unsigned long isa_io_base = 0;
+unsigned long isa_mem_base = 0;
+#endif
+
+static u8 *bcsr_regs = NULL;
+
+u8 *get_bcsr(void)
+{
+        return bcsr_regs;
+}
+
+/* ************************************************************************
+ *
+ * Setup the architecture
+ *
+ */
+static void __init mpc8360_sys_setup_arch(void)
+{
+        struct device_node *np;
+
+        if (ppc_md.progress)
+                ppc_md.progress("mpc8360_sys_setup_arch()", 0);
+
+        np = of_find_node_by_type(NULL, "cpu");
+        if (np != 0) {
+                const unsigned int *fp =
+                    get_property(np, "clock-frequency", NULL);
+                if (fp != 0)
+                        loops_per_jiffy = *fp / HZ;
+                else
+                        loops_per_jiffy = 50000000 / HZ;
+                of_node_put(np);
+        }
+
+        /* Map BCSR area */
+        np = of_find_node_by_name(NULL, "bcsr");
+        if (np != 0) {
+                struct resource res;
+
+                of_address_to_resource(np, 0, &res);
+                bcsr_regs = ioremap(res.start, res.end - res.start +1);
+                of_node_put(np);
+        }
+
+#ifdef CONFIG_PCI
+        for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
+                add_bridge(np);
+
+        ppc_md.pci_swizzle = common_swizzle;
+        ppc_md.pci_exclude_device = mpc83xx_exclude_device;
+#endif
+
+#ifdef CONFIG_QUICC_ENGINE
+        qe_reset();
+
+        if ((np = of_find_node_by_name(np, "par_io")) != NULL) {
+                par_io_init(np);
+                of_node_put(np);
+
+                for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
+                        par_io_of_config(np);
+        }
+
+        if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
+                        != NULL){
+                /* Reset the Ethernet PHY */
+                bcsr_regs[9] &= ~0x20;
+                udelay(1000);
+                bcsr_regs[9] |= 0x20;
+                iounmap(bcsr_regs);
+                of_node_put(np);
+        }
+
+#endif                          /* CONFIG_QUICC_ENGINE */
+
+#ifdef CONFIG_BLK_DEV_INITRD
+        if (initrd_start)
+                ROOT_DEV = Root_RAM0;
+        else
+#endif
+#ifdef  CONFIG_ROOT_NFS
+                ROOT_DEV = Root_NFS;
+#else
+                ROOT_DEV = Root_HDA1;
+#endif
+}
+
+void __init mpc8360_sys_init_IRQ(void)
+{
+
+        struct device_node *np;
+
+        np = of_find_node_by_type(NULL, "ipic");
+        if (!np)
+                return;
+
+        ipic_init(np, 0);
+
+        /* Initialize the default interrupt mapping priorities,
+         * in case the boot rom changed something on us.
+         */
+        ipic_set_default_priority();
+        of_node_put(np);
+
+#ifdef CONFIG_QUICC_ENGINE
+        np = of_find_node_by_type(NULL, "qeic");
+        if (!np)
+                return;
+
+        qe_ic_init(np, 0);
+        of_node_put(np);
+#endif                          /* CONFIG_QUICC_ENGINE */
+}
+
+#if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
+extern ulong ds1374_get_rtc_time(void);
+extern int ds1374_set_rtc_time(ulong);
+
+static int __init mpc8360_rtc_hookup(void)
+{
+        struct timespec tv;
+
+        ppc_md.get_rtc_time = ds1374_get_rtc_time;
+        ppc_md.set_rtc_time = ds1374_set_rtc_time;
+
+        tv.tv_nsec = 0;
+        tv.tv_sec = (ppc_md.get_rtc_time) ();
+        do_settimeofday(&tv);
+
+        return 0;
+}
+
+late_initcall(mpc8360_rtc_hookup);
+#endif
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init mpc8360_sys_probe(void)
+{
+        char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
+                                          "model", NULL);
+        if (model == NULL)
+                return 0;
+        if (strcmp(model, "MPC8360EPB"))
+                return 0;
+
+        DBG("MPC8360EMDS-PB found\n");
+
+        return 1;
+}
+
+define_machine(mpc8360_sys) {
+        .name           = "MPC8360E PB",
+        .probe          = mpc8360_sys_probe,
+        .setup_arch     = mpc8360_sys_setup_arch,
+        .init_IRQ       = mpc8360_sys_init_IRQ,
+        .get_irq        = ipic_get_irq,
+        .restart        = mpc83xx_restart,
+        .time_init      = mpc83xx_time_init,
+        .calibrate_decr = generic_calibrate_decr,
+        .progress       = udbg_progress,
+};