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authorKumar Gala <galak@kernel.crashing.org>2009-04-23 09:51:22 -0400
committerKumar Gala <galak@kernel.crashing.org>2009-04-23 09:51:22 -0400
commit323d23aeac4918c7a540b597a26fa7a67645593a (patch)
tree6d8861e65b1753168552f8e4b22a1f82d4ad7a41 /arch/powerpc/mm
parent6329db8bd60fbc0832f30c350b0181b8d865573e (diff)
Revert "powerpc: Add support for early tlbilx opcode"
This reverts commit e9965577406a2148ade97b5e0ce7c448b4ba4ef6. Our HW guys were able to fix this so it never sees the light of day. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/mm')
-rw-r--r--arch/powerpc/mm/tlb_nohash_low.S14
1 files changed, 1 insertions, 13 deletions
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
index 45fed3698349..788b87c36f77 100644
--- a/arch/powerpc/mm/tlb_nohash_low.S
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -138,11 +138,7 @@ BEGIN_MMU_FTR_SECTION
138 andi. r3,r3,MMUCSR0_TLBFI@l 138 andi. r3,r3,MMUCSR0_TLBFI@l
139 bne 1b 139 bne 1b
140MMU_FTR_SECTION_ELSE 140MMU_FTR_SECTION_ELSE
141 BEGIN_MMU_FTR_SECTION_NESTED(96) 141 PPC_TLBILX_ALL(0,0)
142 PPC_TLBILX_ALL(0,r3)
143 MMU_FTR_SECTION_ELSE_NESTED(96)
144 PPC_TLBILX_ALL_EARLY(0,r3)
145 ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_TLBILX_EARLY_OPCODE, 96)
146ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX) 142ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
147 msync 143 msync
148 isync 144 isync
@@ -155,11 +151,7 @@ BEGIN_MMU_FTR_SECTION
155 wrteei 0 151 wrteei 0
156 mfspr r4,SPRN_MAS6 /* save MAS6 */ 152 mfspr r4,SPRN_MAS6 /* save MAS6 */
157 mtspr SPRN_MAS6,r3 153 mtspr SPRN_MAS6,r3
158 BEGIN_MMU_FTR_SECTION_NESTED(96)
159 PPC_TLBILX_PID(0,0) 154 PPC_TLBILX_PID(0,0)
160 MMU_FTR_SECTION_ELSE_NESTED(96)
161 PPC_TLBILX_PID_EARLY(0,0)
162 ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_TLBILX_EARLY_OPCODE, 96)
163 mtspr SPRN_MAS6,r4 /* restore MAS6 */ 155 mtspr SPRN_MAS6,r4 /* restore MAS6 */
164 wrtee r10 156 wrtee r10
165MMU_FTR_SECTION_ELSE 157MMU_FTR_SECTION_ELSE
@@ -193,11 +185,7 @@ BEGIN_MMU_FTR_SECTION
193 mtspr SPRN_MAS1,r4 185 mtspr SPRN_MAS1,r4
194 tlbwe 186 tlbwe
195MMU_FTR_SECTION_ELSE 187MMU_FTR_SECTION_ELSE
196 BEGIN_MMU_FTR_SECTION_NESTED(96)
197 PPC_TLBILX_VA(0,r3) 188 PPC_TLBILX_VA(0,r3)
198 MMU_FTR_SECTION_ELSE_NESTED(96)
199 PPC_TLBILX_VA_EARLY(0,r3)
200 ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_TLBILX_EARLY_OPCODE, 96)
201ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX) 189ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
202 msync 190 msync
203 isync 191 isync