diff options
author | Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> | 2013-06-20 05:00:27 -0400 |
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committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2013-06-21 02:01:58 -0400 |
commit | 1a5272866f87d7fbf04dc8060f8da3e8456490ab (patch) | |
tree | caaff51d526d91200d9463d6d5e6f22c37ee11ce /arch/powerpc/mm | |
parent | 437d496457a30ce9ccccb94b2373c201b2558392 (diff) |
powerpc: Optimize hugepage invalidate
Hugepage invalidate involves invalidating multiple hpte entries.
Optimize the operation using H_BULK_REMOVE on lpar platforms.
On native, reduce the number of tlb flush.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/mm')
-rw-r--r-- | arch/powerpc/mm/hash_native_64.c | 73 | ||||
-rw-r--r-- | arch/powerpc/mm/pgtable_64.c | 12 |
2 files changed, 83 insertions, 2 deletions
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c index 6d152bc993e5..3f0c30ae4791 100644 --- a/arch/powerpc/mm/hash_native_64.c +++ b/arch/powerpc/mm/hash_native_64.c | |||
@@ -407,6 +407,78 @@ static void native_hpte_invalidate(unsigned long slot, unsigned long vpn, | |||
407 | local_irq_restore(flags); | 407 | local_irq_restore(flags); |
408 | } | 408 | } |
409 | 409 | ||
410 | static void native_hugepage_invalidate(struct mm_struct *mm, | ||
411 | unsigned char *hpte_slot_array, | ||
412 | unsigned long addr, int psize) | ||
413 | { | ||
414 | int ssize = 0, i; | ||
415 | int lock_tlbie; | ||
416 | struct hash_pte *hptep; | ||
417 | int actual_psize = MMU_PAGE_16M; | ||
418 | unsigned int max_hpte_count, valid; | ||
419 | unsigned long flags, s_addr = addr; | ||
420 | unsigned long hpte_v, want_v, shift; | ||
421 | unsigned long hidx, vpn = 0, vsid, hash, slot; | ||
422 | |||
423 | shift = mmu_psize_defs[psize].shift; | ||
424 | max_hpte_count = 1U << (PMD_SHIFT - shift); | ||
425 | |||
426 | local_irq_save(flags); | ||
427 | for (i = 0; i < max_hpte_count; i++) { | ||
428 | valid = hpte_valid(hpte_slot_array, i); | ||
429 | if (!valid) | ||
430 | continue; | ||
431 | hidx = hpte_hash_index(hpte_slot_array, i); | ||
432 | |||
433 | /* get the vpn */ | ||
434 | addr = s_addr + (i * (1ul << shift)); | ||
435 | if (!is_kernel_addr(addr)) { | ||
436 | ssize = user_segment_size(addr); | ||
437 | vsid = get_vsid(mm->context.id, addr, ssize); | ||
438 | WARN_ON(vsid == 0); | ||
439 | } else { | ||
440 | vsid = get_kernel_vsid(addr, mmu_kernel_ssize); | ||
441 | ssize = mmu_kernel_ssize; | ||
442 | } | ||
443 | |||
444 | vpn = hpt_vpn(addr, vsid, ssize); | ||
445 | hash = hpt_hash(vpn, shift, ssize); | ||
446 | if (hidx & _PTEIDX_SECONDARY) | ||
447 | hash = ~hash; | ||
448 | |||
449 | slot = (hash & htab_hash_mask) * HPTES_PER_GROUP; | ||
450 | slot += hidx & _PTEIDX_GROUP_IX; | ||
451 | |||
452 | hptep = htab_address + slot; | ||
453 | want_v = hpte_encode_avpn(vpn, psize, ssize); | ||
454 | native_lock_hpte(hptep); | ||
455 | hpte_v = hptep->v; | ||
456 | |||
457 | /* Even if we miss, we need to invalidate the TLB */ | ||
458 | if (!HPTE_V_COMPARE(hpte_v, want_v) || !(hpte_v & HPTE_V_VALID)) | ||
459 | native_unlock_hpte(hptep); | ||
460 | else | ||
461 | /* Invalidate the hpte. NOTE: this also unlocks it */ | ||
462 | hptep->v = 0; | ||
463 | } | ||
464 | /* | ||
465 | * Since this is a hugepage, we just need a single tlbie. | ||
466 | * use the last vpn. | ||
467 | */ | ||
468 | lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE); | ||
469 | if (lock_tlbie) | ||
470 | raw_spin_lock(&native_tlbie_lock); | ||
471 | |||
472 | asm volatile("ptesync":::"memory"); | ||
473 | __tlbie(vpn, psize, actual_psize, ssize); | ||
474 | asm volatile("eieio; tlbsync; ptesync":::"memory"); | ||
475 | |||
476 | if (lock_tlbie) | ||
477 | raw_spin_unlock(&native_tlbie_lock); | ||
478 | |||
479 | local_irq_restore(flags); | ||
480 | } | ||
481 | |||
410 | static inline int __hpte_actual_psize(unsigned int lp, int psize) | 482 | static inline int __hpte_actual_psize(unsigned int lp, int psize) |
411 | { | 483 | { |
412 | int i, shift; | 484 | int i, shift; |
@@ -640,4 +712,5 @@ void __init hpte_init_native(void) | |||
640 | ppc_md.hpte_remove = native_hpte_remove; | 712 | ppc_md.hpte_remove = native_hpte_remove; |
641 | ppc_md.hpte_clear_all = native_hpte_clear; | 713 | ppc_md.hpte_clear_all = native_hpte_clear; |
642 | ppc_md.flush_hash_range = native_flush_hash_range; | 714 | ppc_md.flush_hash_range = native_flush_hash_range; |
715 | ppc_md.hugepage_invalidate = native_hugepage_invalidate; | ||
643 | } | 716 | } |
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c index 074a4a225054..536eec72c0f7 100644 --- a/arch/powerpc/mm/pgtable_64.c +++ b/arch/powerpc/mm/pgtable_64.c | |||
@@ -708,6 +708,7 @@ void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr, | |||
708 | { | 708 | { |
709 | int ssize, i; | 709 | int ssize, i; |
710 | unsigned long s_addr; | 710 | unsigned long s_addr; |
711 | int max_hpte_count; | ||
711 | unsigned int psize, valid; | 712 | unsigned int psize, valid; |
712 | unsigned char *hpte_slot_array; | 713 | unsigned char *hpte_slot_array; |
713 | unsigned long hidx, vpn, vsid, hash, shift, slot; | 714 | unsigned long hidx, vpn, vsid, hash, shift, slot; |
@@ -727,9 +728,16 @@ void hpte_do_hugepage_flush(struct mm_struct *mm, unsigned long addr, | |||
727 | 728 | ||
728 | /* get the base page size */ | 729 | /* get the base page size */ |
729 | psize = get_slice_psize(mm, s_addr); | 730 | psize = get_slice_psize(mm, s_addr); |
730 | shift = mmu_psize_defs[psize].shift; | ||
731 | 731 | ||
732 | for (i = 0; i < (HPAGE_PMD_SIZE >> shift); i++) { | 732 | if (ppc_md.hugepage_invalidate) |
733 | return ppc_md.hugepage_invalidate(mm, hpte_slot_array, | ||
734 | s_addr, psize); | ||
735 | /* | ||
736 | * No bluk hpte removal support, invalidate each entry | ||
737 | */ | ||
738 | shift = mmu_psize_defs[psize].shift; | ||
739 | max_hpte_count = HPAGE_PMD_SIZE >> shift; | ||
740 | for (i = 0; i < max_hpte_count; i++) { | ||
733 | /* | 741 | /* |
734 | * 8 bits per each hpte entries | 742 | * 8 bits per each hpte entries |
735 | * 000| [ secondary group (one bit) | hidx (3 bits) | valid bit] | 743 | * 000| [ secondary group (one bit) | hidx (3 bits) | valid bit] |