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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-07-23 19:15:24 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-08-19 20:12:41 -0400
commitd4e167da4cb60910f6ac305aee03714937f70b71 (patch)
tree44a0faf402dd91024544b3450033b80524b25799 /arch/powerpc/mm/mmu_decl.h
parent44c58ccc8dc25f78a4f641901f17092c93dd0458 (diff)
powerpc/mm: Make low level TLB flush ops on BookE take additional args
We need to pass down whether the page is direct or indirect and we'll need to pass the page size to _tlbil_va and _tlbivax_bcast We also add a new low level _tlbil_pid_noind() which does a TLB flush by PID but avoids flushing indirect entries if possible This implements those new prototypes but defines them with inlines or macros so that no additional arguments are actually passed on current processors. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/mm/mmu_decl.h')
-rw-r--r--arch/powerpc/mm/mmu_decl.h16
1 files changed, 13 insertions, 3 deletions
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index d1f9c62dc177..3871dceee2dd 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -36,21 +36,30 @@ static inline void _tlbil_pid(unsigned int pid)
36{ 36{
37 asm volatile ("sync; tlbia; isync" : : : "memory"); 37 asm volatile ("sync; tlbia; isync" : : : "memory");
38} 38}
39#define _tlbil_pid_noind(pid) _tlbil_pid(pid)
40
39#else /* CONFIG_40x || CONFIG_8xx */ 41#else /* CONFIG_40x || CONFIG_8xx */
40extern void _tlbil_all(void); 42extern void _tlbil_all(void);
41extern void _tlbil_pid(unsigned int pid); 43extern void _tlbil_pid(unsigned int pid);
44#define _tlbil_pid_noind(pid) _tlbil_pid(pid)
42#endif /* !(CONFIG_40x || CONFIG_8xx) */ 45#endif /* !(CONFIG_40x || CONFIG_8xx) */
43 46
44/* 47/*
45 * On 8xx, we directly inline tlbie, on others, it's extern 48 * On 8xx, we directly inline tlbie, on others, it's extern
46 */ 49 */
47#ifdef CONFIG_8xx 50#ifdef CONFIG_8xx
48static inline void _tlbil_va(unsigned long address, unsigned int pid) 51static inline void _tlbil_va(unsigned long address, unsigned int pid,
52 unsigned int tsize, unsigned int ind)
49{ 53{
50 asm volatile ("tlbie %0; sync" : : "r" (address) : "memory"); 54 asm volatile ("tlbie %0; sync" : : "r" (address) : "memory");
51} 55}
52#else /* CONFIG_8xx */ 56#else /* CONFIG_8xx */
53extern void _tlbil_va(unsigned long address, unsigned int pid); 57extern void __tlbil_va(unsigned long address, unsigned int pid);
58static inline void _tlbil_va(unsigned long address, unsigned int pid,
59 unsigned int tsize, unsigned int ind)
60{
61 __tlbil_va(address, pid);
62}
54#endif /* CONIFG_8xx */ 63#endif /* CONIFG_8xx */
55 64
56/* 65/*
@@ -58,7 +67,8 @@ extern void _tlbil_va(unsigned long address, unsigned int pid);
58 * implementation. When that becomes the case, this will be 67 * implementation. When that becomes the case, this will be
59 * an extern. 68 * an extern.
60 */ 69 */
61static inline void _tlbivax_bcast(unsigned long address, unsigned int pid) 70static inline void _tlbivax_bcast(unsigned long address, unsigned int pid,
71 unsigned int tsize, unsigned int ind)
62{ 72{
63 BUG(); 73 BUG();
64} 74}