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authorLinus Torvalds <torvalds@linux-foundation.org>2014-12-18 19:05:28 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2014-12-18 19:05:28 -0500
commit66dcff86ba40eebb5133cccf450878f2bba102ef (patch)
treee7eb49ad9316989a529b00303d2dd2cffa61a7f5 /arch/powerpc/kvm
parent91ed9e8a32d9a76adc59c83f8b40024076cf8a02 (diff)
parent2c4aa55a6af070262cca425745e8e54310e96b8d (diff)
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM update from Paolo Bonzini: "3.19 changes for KVM: - spring cleaning: removed support for IA64, and for hardware- assisted virtualization on the PPC970 - ARM, PPC, s390 all had only small fixes For x86: - small performance improvements (though only on weird guests) - usual round of hardware-compliancy fixes from Nadav - APICv fixes - XSAVES support for hosts and guests. XSAVES hosts were broken because the (non-KVM) XSAVES patches inadvertently changed the KVM userspace ABI whenever XSAVES was enabled; hence, this part is going to stable. Guest support is just a matter of exposing the feature and CPUID leaves support" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (179 commits) KVM: move APIC types to arch/x86/ KVM: PPC: Book3S: Enable in-kernel XICS emulation by default KVM: PPC: Book3S HV: Improve H_CONFER implementation KVM: PPC: Book3S HV: Fix endianness of instruction obtained from HEIR register KVM: PPC: Book3S HV: Remove code for PPC970 processors KVM: PPC: Book3S HV: Tracepoints for KVM HV guest interactions KVM: PPC: Book3S HV: Simplify locking around stolen time calculations arch: powerpc: kvm: book3s_paired_singles.c: Remove unused function arch: powerpc: kvm: book3s_pr.c: Remove unused function arch: powerpc: kvm: book3s.c: Remove some unused functions arch: powerpc: kvm: book3s_32_mmu.c: Remove unused function KVM: PPC: Book3S HV: Check wait conditions before sleeping in kvmppc_vcore_blocked KVM: PPC: Book3S HV: ptes are big endian KVM: PPC: Book3S HV: Fix inaccuracies in ICP emulation for H_IPI KVM: PPC: Book3S HV: Fix KSM memory corruption KVM: PPC: Book3S HV: Fix an issue where guest is paused on receiving HMI KVM: PPC: Book3S HV: Fix computation of tlbie operand KVM: PPC: Book3S HV: Add missing HPTE unlock KVM: PPC: BookE: Improve irq inject tracepoint arm/arm64: KVM: Require in-kernel vgic for the arch timers ...
Diffstat (limited to 'arch/powerpc/kvm')
-rw-r--r--arch/powerpc/kvm/Kconfig1
-rw-r--r--arch/powerpc/kvm/book3s.c8
-rw-r--r--arch/powerpc/kvm/book3s_32_mmu.c5
-rw-r--r--arch/powerpc/kvm/book3s_64_mmu_hv.c224
-rw-r--r--arch/powerpc/kvm/book3s_hv.c438
-rw-r--r--arch/powerpc/kvm/book3s_hv_builtin.c136
-rw-r--r--arch/powerpc/kvm/book3s_hv_interrupts.S39
-rw-r--r--arch/powerpc/kvm/book3s_hv_ras.c5
-rw-r--r--arch/powerpc/kvm/book3s_hv_rm_mmu.c150
-rw-r--r--arch/powerpc/kvm/book3s_hv_rm_xics.c36
-rw-r--r--arch/powerpc/kvm/book3s_hv_rmhandlers.S251
-rw-r--r--arch/powerpc/kvm/book3s_paired_singles.c8
-rw-r--r--arch/powerpc/kvm/book3s_pr.c5
-rw-r--r--arch/powerpc/kvm/book3s_xics.c30
-rw-r--r--arch/powerpc/kvm/book3s_xics.h1
-rw-r--r--arch/powerpc/kvm/e500.c8
-rw-r--r--arch/powerpc/kvm/powerpc.c10
-rw-r--r--arch/powerpc/kvm/trace_book3s.h32
-rw-r--r--arch/powerpc/kvm/trace_booke.h47
-rw-r--r--arch/powerpc/kvm/trace_hv.h477
-rw-r--r--arch/powerpc/kvm/trace_pr.h25
21 files changed, 864 insertions, 1072 deletions
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index 602eb51d20bc..f5769f19ae25 100644
--- a/arch/powerpc/kvm/Kconfig
+++ b/arch/powerpc/kvm/Kconfig
@@ -172,6 +172,7 @@ config KVM_XICS
172 depends on KVM_BOOK3S_64 && !KVM_MPIC 172 depends on KVM_BOOK3S_64 && !KVM_MPIC
173 select HAVE_KVM_IRQCHIP 173 select HAVE_KVM_IRQCHIP
174 select HAVE_KVM_IRQFD 174 select HAVE_KVM_IRQFD
175 default y
175 ---help--- 176 ---help---
176 Include support for the XICS (eXternal Interrupt Controller 177 Include support for the XICS (eXternal Interrupt Controller
177 Specification) interrupt controller architecture used on 178 Specification) interrupt controller architecture used on
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index b32db4b95361..888bf466d8c6 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -64,14 +64,6 @@ struct kvm_stats_debugfs_item debugfs_entries[] = {
64 { NULL } 64 { NULL }
65}; 65};
66 66
67void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu)
68{
69}
70
71void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
72{
73}
74
75void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu) 67void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu)
76{ 68{
77 if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) { 69 if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) {
diff --git a/arch/powerpc/kvm/book3s_32_mmu.c b/arch/powerpc/kvm/book3s_32_mmu.c
index cd0b0730e29e..a2eb6d354a57 100644
--- a/arch/powerpc/kvm/book3s_32_mmu.c
+++ b/arch/powerpc/kvm/book3s_32_mmu.c
@@ -78,11 +78,6 @@ static inline bool sr_kp(u32 sr_raw)
78 return (sr_raw & 0x20000000) ? true: false; 78 return (sr_raw & 0x20000000) ? true: false;
79} 79}
80 80
81static inline bool sr_nx(u32 sr_raw)
82{
83 return (sr_raw & 0x10000000) ? true: false;
84}
85
86static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr, 81static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
87 struct kvmppc_pte *pte, bool data, 82 struct kvmppc_pte *pte, bool data,
88 bool iswrite); 83 bool iswrite);
diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c b/arch/powerpc/kvm/book3s_64_mmu_hv.c
index d40770248b6a..534acb3c6c3d 100644
--- a/arch/powerpc/kvm/book3s_64_mmu_hv.c
+++ b/arch/powerpc/kvm/book3s_64_mmu_hv.c
@@ -37,8 +37,7 @@
37#include <asm/ppc-opcode.h> 37#include <asm/ppc-opcode.h>
38#include <asm/cputable.h> 38#include <asm/cputable.h>
39 39
40/* POWER7 has 10-bit LPIDs, PPC970 has 6-bit LPIDs */ 40#include "trace_hv.h"
41#define MAX_LPID_970 63
42 41
43/* Power architecture requires HPT is at least 256kB */ 42/* Power architecture requires HPT is at least 256kB */
44#define PPC_MIN_HPT_ORDER 18 43#define PPC_MIN_HPT_ORDER 18
@@ -229,14 +228,9 @@ int kvmppc_mmu_hv_init(void)
229 if (!cpu_has_feature(CPU_FTR_HVMODE)) 228 if (!cpu_has_feature(CPU_FTR_HVMODE))
230 return -EINVAL; 229 return -EINVAL;
231 230
232 /* POWER7 has 10-bit LPIDs, PPC970 and e500mc have 6-bit LPIDs */ 231 /* POWER7 has 10-bit LPIDs (12-bit in POWER8) */
233 if (cpu_has_feature(CPU_FTR_ARCH_206)) { 232 host_lpid = mfspr(SPRN_LPID);
234 host_lpid = mfspr(SPRN_LPID); /* POWER7 */ 233 rsvd_lpid = LPID_RSVD;
235 rsvd_lpid = LPID_RSVD;
236 } else {
237 host_lpid = 0; /* PPC970 */
238 rsvd_lpid = MAX_LPID_970;
239 }
240 234
241 kvmppc_init_lpid(rsvd_lpid + 1); 235 kvmppc_init_lpid(rsvd_lpid + 1);
242 236
@@ -259,130 +253,12 @@ static void kvmppc_mmu_book3s_64_hv_reset_msr(struct kvm_vcpu *vcpu)
259 kvmppc_set_msr(vcpu, msr); 253 kvmppc_set_msr(vcpu, msr);
260} 254}
261 255
262/*
263 * This is called to get a reference to a guest page if there isn't
264 * one already in the memslot->arch.slot_phys[] array.
265 */
266static long kvmppc_get_guest_page(struct kvm *kvm, unsigned long gfn,
267 struct kvm_memory_slot *memslot,
268 unsigned long psize)
269{
270 unsigned long start;
271 long np, err;
272 struct page *page, *hpage, *pages[1];
273 unsigned long s, pgsize;
274 unsigned long *physp;
275 unsigned int is_io, got, pgorder;
276 struct vm_area_struct *vma;
277 unsigned long pfn, i, npages;
278
279 physp = memslot->arch.slot_phys;
280 if (!physp)
281 return -EINVAL;
282 if (physp[gfn - memslot->base_gfn])
283 return 0;
284
285 is_io = 0;
286 got = 0;
287 page = NULL;
288 pgsize = psize;
289 err = -EINVAL;
290 start = gfn_to_hva_memslot(memslot, gfn);
291
292 /* Instantiate and get the page we want access to */
293 np = get_user_pages_fast(start, 1, 1, pages);
294 if (np != 1) {
295 /* Look up the vma for the page */
296 down_read(&current->mm->mmap_sem);
297 vma = find_vma(current->mm, start);
298 if (!vma || vma->vm_start > start ||
299 start + psize > vma->vm_end ||
300 !(vma->vm_flags & VM_PFNMAP))
301 goto up_err;
302 is_io = hpte_cache_bits(pgprot_val(vma->vm_page_prot));
303 pfn = vma->vm_pgoff + ((start - vma->vm_start) >> PAGE_SHIFT);
304 /* check alignment of pfn vs. requested page size */
305 if (psize > PAGE_SIZE && (pfn & ((psize >> PAGE_SHIFT) - 1)))
306 goto up_err;
307 up_read(&current->mm->mmap_sem);
308
309 } else {
310 page = pages[0];
311 got = KVMPPC_GOT_PAGE;
312
313 /* See if this is a large page */
314 s = PAGE_SIZE;
315 if (PageHuge(page)) {
316 hpage = compound_head(page);
317 s <<= compound_order(hpage);
318 /* Get the whole large page if slot alignment is ok */
319 if (s > psize && slot_is_aligned(memslot, s) &&
320 !(memslot->userspace_addr & (s - 1))) {
321 start &= ~(s - 1);
322 pgsize = s;
323 get_page(hpage);
324 put_page(page);
325 page = hpage;
326 }
327 }
328 if (s < psize)
329 goto out;
330 pfn = page_to_pfn(page);
331 }
332
333 npages = pgsize >> PAGE_SHIFT;
334 pgorder = __ilog2(npages);
335 physp += (gfn - memslot->base_gfn) & ~(npages - 1);
336 spin_lock(&kvm->arch.slot_phys_lock);
337 for (i = 0; i < npages; ++i) {
338 if (!physp[i]) {
339 physp[i] = ((pfn + i) << PAGE_SHIFT) +
340 got + is_io + pgorder;
341 got = 0;
342 }
343 }
344 spin_unlock(&kvm->arch.slot_phys_lock);
345 err = 0;
346
347 out:
348 if (got)
349 put_page(page);
350 return err;
351
352 up_err:
353 up_read(&current->mm->mmap_sem);
354 return err;
355}
356
357long kvmppc_virtmode_do_h_enter(struct kvm *kvm, unsigned long flags, 256long kvmppc_virtmode_do_h_enter(struct kvm *kvm, unsigned long flags,
358 long pte_index, unsigned long pteh, 257 long pte_index, unsigned long pteh,
359 unsigned long ptel, unsigned long *pte_idx_ret) 258 unsigned long ptel, unsigned long *pte_idx_ret)
360{ 259{
361 unsigned long psize, gpa, gfn;
362 struct kvm_memory_slot *memslot;
363 long ret; 260 long ret;
364 261
365 if (kvm->arch.using_mmu_notifiers)
366 goto do_insert;
367
368 psize = hpte_page_size(pteh, ptel);
369 if (!psize)
370 return H_PARAMETER;
371
372 pteh &= ~(HPTE_V_HVLOCK | HPTE_V_ABSENT | HPTE_V_VALID);
373
374 /* Find the memslot (if any) for this address */
375 gpa = (ptel & HPTE_R_RPN) & ~(psize - 1);
376 gfn = gpa >> PAGE_SHIFT;
377 memslot = gfn_to_memslot(kvm, gfn);
378 if (memslot && !(memslot->flags & KVM_MEMSLOT_INVALID)) {
379 if (!slot_is_aligned(memslot, psize))
380 return H_PARAMETER;
381 if (kvmppc_get_guest_page(kvm, gfn, memslot, psize) < 0)
382 return H_PARAMETER;
383 }
384
385 do_insert:
386 /* Protect linux PTE lookup from page table destruction */ 262 /* Protect linux PTE lookup from page table destruction */
387 rcu_read_lock_sched(); /* this disables preemption too */ 263 rcu_read_lock_sched(); /* this disables preemption too */
388 ret = kvmppc_do_h_enter(kvm, flags, pte_index, pteh, ptel, 264 ret = kvmppc_do_h_enter(kvm, flags, pte_index, pteh, ptel,
@@ -397,19 +273,6 @@ long kvmppc_virtmode_do_h_enter(struct kvm *kvm, unsigned long flags,
397 273
398} 274}
399 275
400/*
401 * We come here on a H_ENTER call from the guest when we are not
402 * using mmu notifiers and we don't have the requested page pinned
403 * already.
404 */
405long kvmppc_virtmode_h_enter(struct kvm_vcpu *vcpu, unsigned long flags,
406 long pte_index, unsigned long pteh,
407 unsigned long ptel)
408{
409 return kvmppc_virtmode_do_h_enter(vcpu->kvm, flags, pte_index,
410 pteh, ptel, &vcpu->arch.gpr[4]);
411}
412
413static struct kvmppc_slb *kvmppc_mmu_book3s_hv_find_slbe(struct kvm_vcpu *vcpu, 276static struct kvmppc_slb *kvmppc_mmu_book3s_hv_find_slbe(struct kvm_vcpu *vcpu,
414 gva_t eaddr) 277 gva_t eaddr)
415{ 278{
@@ -494,7 +357,7 @@ static int kvmppc_mmu_book3s_64_hv_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
494 gpte->may_execute = gpte->may_read && !(gr & (HPTE_R_N | HPTE_R_G)); 357 gpte->may_execute = gpte->may_read && !(gr & (HPTE_R_N | HPTE_R_G));
495 358
496 /* Storage key permission check for POWER7 */ 359 /* Storage key permission check for POWER7 */
497 if (data && virtmode && cpu_has_feature(CPU_FTR_ARCH_206)) { 360 if (data && virtmode) {
498 int amrfield = hpte_get_skey_perm(gr, vcpu->arch.amr); 361 int amrfield = hpte_get_skey_perm(gr, vcpu->arch.amr);
499 if (amrfield & 1) 362 if (amrfield & 1)
500 gpte->may_read = 0; 363 gpte->may_read = 0;
@@ -622,14 +485,13 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
622 gfn = gpa >> PAGE_SHIFT; 485 gfn = gpa >> PAGE_SHIFT;
623 memslot = gfn_to_memslot(kvm, gfn); 486 memslot = gfn_to_memslot(kvm, gfn);
624 487
488 trace_kvm_page_fault_enter(vcpu, hpte, memslot, ea, dsisr);
489
625 /* No memslot means it's an emulated MMIO region */ 490 /* No memslot means it's an emulated MMIO region */
626 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) 491 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
627 return kvmppc_hv_emulate_mmio(run, vcpu, gpa, ea, 492 return kvmppc_hv_emulate_mmio(run, vcpu, gpa, ea,
628 dsisr & DSISR_ISSTORE); 493 dsisr & DSISR_ISSTORE);
629 494
630 if (!kvm->arch.using_mmu_notifiers)
631 return -EFAULT; /* should never get here */
632
633 /* 495 /*
634 * This should never happen, because of the slot_is_aligned() 496 * This should never happen, because of the slot_is_aligned()
635 * check in kvmppc_do_h_enter(). 497 * check in kvmppc_do_h_enter().
@@ -641,6 +503,7 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
641 mmu_seq = kvm->mmu_notifier_seq; 503 mmu_seq = kvm->mmu_notifier_seq;
642 smp_rmb(); 504 smp_rmb();
643 505
506 ret = -EFAULT;
644 is_io = 0; 507 is_io = 0;
645 pfn = 0; 508 pfn = 0;
646 page = NULL; 509 page = NULL;
@@ -664,7 +527,7 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
664 } 527 }
665 up_read(&current->mm->mmap_sem); 528 up_read(&current->mm->mmap_sem);
666 if (!pfn) 529 if (!pfn)
667 return -EFAULT; 530 goto out_put;
668 } else { 531 } else {
669 page = pages[0]; 532 page = pages[0];
670 pfn = page_to_pfn(page); 533 pfn = page_to_pfn(page);
@@ -694,14 +557,14 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
694 } 557 }
695 } 558 }
696 559
697 ret = -EFAULT;
698 if (psize > pte_size) 560 if (psize > pte_size)
699 goto out_put; 561 goto out_put;
700 562
701 /* Check WIMG vs. the actual page we're accessing */ 563 /* Check WIMG vs. the actual page we're accessing */
702 if (!hpte_cache_flags_ok(r, is_io)) { 564 if (!hpte_cache_flags_ok(r, is_io)) {
703 if (is_io) 565 if (is_io)
704 return -EFAULT; 566 goto out_put;
567
705 /* 568 /*
706 * Allow guest to map emulated device memory as 569 * Allow guest to map emulated device memory as
707 * uncacheable, but actually make it cacheable. 570 * uncacheable, but actually make it cacheable.
@@ -765,6 +628,8 @@ int kvmppc_book3s_hv_page_fault(struct kvm_run *run, struct kvm_vcpu *vcpu,
765 SetPageDirty(page); 628 SetPageDirty(page);
766 629
767 out_put: 630 out_put:
631 trace_kvm_page_fault_exit(vcpu, hpte, ret);
632
768 if (page) { 633 if (page) {
769 /* 634 /*
770 * We drop pages[0] here, not page because page might 635 * We drop pages[0] here, not page because page might
@@ -895,8 +760,7 @@ static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
895 psize = hpte_page_size(be64_to_cpu(hptep[0]), ptel); 760 psize = hpte_page_size(be64_to_cpu(hptep[0]), ptel);
896 if ((be64_to_cpu(hptep[0]) & HPTE_V_VALID) && 761 if ((be64_to_cpu(hptep[0]) & HPTE_V_VALID) &&
897 hpte_rpn(ptel, psize) == gfn) { 762 hpte_rpn(ptel, psize) == gfn) {
898 if (kvm->arch.using_mmu_notifiers) 763 hptep[0] |= cpu_to_be64(HPTE_V_ABSENT);
899 hptep[0] |= cpu_to_be64(HPTE_V_ABSENT);
900 kvmppc_invalidate_hpte(kvm, hptep, i); 764 kvmppc_invalidate_hpte(kvm, hptep, i);
901 /* Harvest R and C */ 765 /* Harvest R and C */
902 rcbits = be64_to_cpu(hptep[1]) & (HPTE_R_R | HPTE_R_C); 766 rcbits = be64_to_cpu(hptep[1]) & (HPTE_R_R | HPTE_R_C);
@@ -914,15 +778,13 @@ static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
914 778
915int kvm_unmap_hva_hv(struct kvm *kvm, unsigned long hva) 779int kvm_unmap_hva_hv(struct kvm *kvm, unsigned long hva)
916{ 780{
917 if (kvm->arch.using_mmu_notifiers) 781 kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
918 kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
919 return 0; 782 return 0;
920} 783}
921 784
922int kvm_unmap_hva_range_hv(struct kvm *kvm, unsigned long start, unsigned long end) 785int kvm_unmap_hva_range_hv(struct kvm *kvm, unsigned long start, unsigned long end)
923{ 786{
924 if (kvm->arch.using_mmu_notifiers) 787 kvm_handle_hva_range(kvm, start, end, kvm_unmap_rmapp);
925 kvm_handle_hva_range(kvm, start, end, kvm_unmap_rmapp);
926 return 0; 788 return 0;
927} 789}
928 790
@@ -1004,8 +866,6 @@ static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
1004 866
1005int kvm_age_hva_hv(struct kvm *kvm, unsigned long start, unsigned long end) 867int kvm_age_hva_hv(struct kvm *kvm, unsigned long start, unsigned long end)
1006{ 868{
1007 if (!kvm->arch.using_mmu_notifiers)
1008 return 0;
1009 return kvm_handle_hva_range(kvm, start, end, kvm_age_rmapp); 869 return kvm_handle_hva_range(kvm, start, end, kvm_age_rmapp);
1010} 870}
1011 871
@@ -1042,15 +902,11 @@ static int kvm_test_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
1042 902
1043int kvm_test_age_hva_hv(struct kvm *kvm, unsigned long hva) 903int kvm_test_age_hva_hv(struct kvm *kvm, unsigned long hva)
1044{ 904{
1045 if (!kvm->arch.using_mmu_notifiers)
1046 return 0;
1047 return kvm_handle_hva(kvm, hva, kvm_test_age_rmapp); 905 return kvm_handle_hva(kvm, hva, kvm_test_age_rmapp);
1048} 906}
1049 907
1050void kvm_set_spte_hva_hv(struct kvm *kvm, unsigned long hva, pte_t pte) 908void kvm_set_spte_hva_hv(struct kvm *kvm, unsigned long hva, pte_t pte)
1051{ 909{
1052 if (!kvm->arch.using_mmu_notifiers)
1053 return;
1054 kvm_handle_hva(kvm, hva, kvm_unmap_rmapp); 910 kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
1055} 911}
1056 912
@@ -1117,8 +973,11 @@ static int kvm_test_clear_dirty_npages(struct kvm *kvm, unsigned long *rmapp)
1117 } 973 }
1118 974
1119 /* Now check and modify the HPTE */ 975 /* Now check and modify the HPTE */
1120 if (!(hptep[0] & cpu_to_be64(HPTE_V_VALID))) 976 if (!(hptep[0] & cpu_to_be64(HPTE_V_VALID))) {
977 /* unlock and continue */
978 hptep[0] &= ~cpu_to_be64(HPTE_V_HVLOCK);
1121 continue; 979 continue;
980 }
1122 981
1123 /* need to make it temporarily absent so C is stable */ 982 /* need to make it temporarily absent so C is stable */
1124 hptep[0] |= cpu_to_be64(HPTE_V_ABSENT); 983 hptep[0] |= cpu_to_be64(HPTE_V_ABSENT);
@@ -1206,35 +1065,17 @@ void *kvmppc_pin_guest_page(struct kvm *kvm, unsigned long gpa,
1206 struct page *page, *pages[1]; 1065 struct page *page, *pages[1];
1207 int npages; 1066 int npages;
1208 unsigned long hva, offset; 1067 unsigned long hva, offset;
1209 unsigned long pa;
1210 unsigned long *physp;
1211 int srcu_idx; 1068 int srcu_idx;
1212 1069
1213 srcu_idx = srcu_read_lock(&kvm->srcu); 1070 srcu_idx = srcu_read_lock(&kvm->srcu);
1214 memslot = gfn_to_memslot(kvm, gfn); 1071 memslot = gfn_to_memslot(kvm, gfn);
1215 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) 1072 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
1216 goto err; 1073 goto err;
1217 if (!kvm->arch.using_mmu_notifiers) { 1074 hva = gfn_to_hva_memslot(memslot, gfn);
1218 physp = memslot->arch.slot_phys; 1075 npages = get_user_pages_fast(hva, 1, 1, pages);
1219 if (!physp) 1076 if (npages < 1)
1220 goto err; 1077 goto err;
1221 physp += gfn - memslot->base_gfn; 1078 page = pages[0];
1222 pa = *physp;
1223 if (!pa) {
1224 if (kvmppc_get_guest_page(kvm, gfn, memslot,
1225 PAGE_SIZE) < 0)
1226 goto err;
1227 pa = *physp;
1228 }
1229 page = pfn_to_page(pa >> PAGE_SHIFT);
1230 get_page(page);
1231 } else {
1232 hva = gfn_to_hva_memslot(memslot, gfn);
1233 npages = get_user_pages_fast(hva, 1, 1, pages);
1234 if (npages < 1)
1235 goto err;
1236 page = pages[0];
1237 }
1238 srcu_read_unlock(&kvm->srcu, srcu_idx); 1079 srcu_read_unlock(&kvm->srcu, srcu_idx);
1239 1080
1240 offset = gpa & (PAGE_SIZE - 1); 1081 offset = gpa & (PAGE_SIZE - 1);
@@ -1258,7 +1099,7 @@ void kvmppc_unpin_guest_page(struct kvm *kvm, void *va, unsigned long gpa,
1258 1099
1259 put_page(page); 1100 put_page(page);
1260 1101
1261 if (!dirty || !kvm->arch.using_mmu_notifiers) 1102 if (!dirty)
1262 return; 1103 return;
1263 1104
1264 /* We need to mark this page dirty in the rmap chain */ 1105 /* We need to mark this page dirty in the rmap chain */
@@ -1539,9 +1380,15 @@ static ssize_t kvm_htab_write(struct file *file, const char __user *buf,
1539 hptp = (__be64 *)(kvm->arch.hpt_virt + (i * HPTE_SIZE)); 1380 hptp = (__be64 *)(kvm->arch.hpt_virt + (i * HPTE_SIZE));
1540 lbuf = (unsigned long __user *)buf; 1381 lbuf = (unsigned long __user *)buf;
1541 for (j = 0; j < hdr.n_valid; ++j) { 1382 for (j = 0; j < hdr.n_valid; ++j) {
1383 __be64 hpte_v;
1384 __be64 hpte_r;
1385
1542 err = -EFAULT; 1386 err = -EFAULT;
1543 if (__get_user(v, lbuf) || __get_user(r, lbuf + 1)) 1387 if (__get_user(hpte_v, lbuf) ||
1388 __get_user(hpte_r, lbuf + 1))
1544 goto out; 1389 goto out;
1390 v = be64_to_cpu(hpte_v);
1391 r = be64_to_cpu(hpte_r);
1545 err = -EINVAL; 1392 err = -EINVAL;
1546 if (!(v & HPTE_V_VALID)) 1393 if (!(v & HPTE_V_VALID))
1547 goto out; 1394 goto out;
@@ -1652,10 +1499,7 @@ void kvmppc_mmu_book3s_hv_init(struct kvm_vcpu *vcpu)
1652{ 1499{
1653 struct kvmppc_mmu *mmu = &vcpu->arch.mmu; 1500 struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
1654 1501
1655 if (cpu_has_feature(CPU_FTR_ARCH_206)) 1502 vcpu->arch.slb_nr = 32; /* POWER7/POWER8 */
1656 vcpu->arch.slb_nr = 32; /* POWER7 */
1657 else
1658 vcpu->arch.slb_nr = 64;
1659 1503
1660 mmu->xlate = kvmppc_mmu_book3s_64_hv_xlate; 1504 mmu->xlate = kvmppc_mmu_book3s_64_hv_xlate;
1661 mmu->reset_msr = kvmppc_mmu_book3s_64_hv_reset_msr; 1505 mmu->reset_msr = kvmppc_mmu_book3s_64_hv_reset_msr;
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index e63587d30b70..de4018a1bc4b 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -58,6 +58,9 @@
58 58
59#include "book3s.h" 59#include "book3s.h"
60 60
61#define CREATE_TRACE_POINTS
62#include "trace_hv.h"
63
61/* #define EXIT_DEBUG */ 64/* #define EXIT_DEBUG */
62/* #define EXIT_DEBUG_SIMPLE */ 65/* #define EXIT_DEBUG_SIMPLE */
63/* #define EXIT_DEBUG_INT */ 66/* #define EXIT_DEBUG_INT */
@@ -135,11 +138,10 @@ static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu)
135 * stolen. 138 * stolen.
136 * 139 *
137 * Updates to busy_stolen are protected by arch.tbacct_lock; 140 * Updates to busy_stolen are protected by arch.tbacct_lock;
138 * updates to vc->stolen_tb are protected by the arch.tbacct_lock 141 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock
139 * of the vcpu that has taken responsibility for running the vcore 142 * lock. The stolen times are measured in units of timebase ticks.
140 * (i.e. vc->runner). The stolen times are measured in units of 143 * (Note that the != TB_NIL checks below are purely defensive;
141 * timebase ticks. (Note that the != TB_NIL checks below are 144 * they should never fail.)
142 * purely defensive; they should never fail.)
143 */ 145 */
144 146
145static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu) 147static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu)
@@ -147,12 +149,21 @@ static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu)
147 struct kvmppc_vcore *vc = vcpu->arch.vcore; 149 struct kvmppc_vcore *vc = vcpu->arch.vcore;
148 unsigned long flags; 150 unsigned long flags;
149 151
150 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 152 /*
151 if (vc->runner == vcpu && vc->vcore_state != VCORE_INACTIVE && 153 * We can test vc->runner without taking the vcore lock,
152 vc->preempt_tb != TB_NIL) { 154 * because only this task ever sets vc->runner to this
153 vc->stolen_tb += mftb() - vc->preempt_tb; 155 * vcpu, and once it is set to this vcpu, only this task
154 vc->preempt_tb = TB_NIL; 156 * ever sets it to NULL.
157 */
158 if (vc->runner == vcpu && vc->vcore_state != VCORE_INACTIVE) {
159 spin_lock_irqsave(&vc->stoltb_lock, flags);
160 if (vc->preempt_tb != TB_NIL) {
161 vc->stolen_tb += mftb() - vc->preempt_tb;
162 vc->preempt_tb = TB_NIL;
163 }
164 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
155 } 165 }
166 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
156 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST && 167 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST &&
157 vcpu->arch.busy_preempt != TB_NIL) { 168 vcpu->arch.busy_preempt != TB_NIL) {
158 vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt; 169 vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt;
@@ -166,9 +177,12 @@ static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu)
166 struct kvmppc_vcore *vc = vcpu->arch.vcore; 177 struct kvmppc_vcore *vc = vcpu->arch.vcore;
167 unsigned long flags; 178 unsigned long flags;
168 179
169 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 180 if (vc->runner == vcpu && vc->vcore_state != VCORE_INACTIVE) {
170 if (vc->runner == vcpu && vc->vcore_state != VCORE_INACTIVE) 181 spin_lock_irqsave(&vc->stoltb_lock, flags);
171 vc->preempt_tb = mftb(); 182 vc->preempt_tb = mftb();
183 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
184 }
185 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
172 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST) 186 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST)
173 vcpu->arch.busy_preempt = mftb(); 187 vcpu->arch.busy_preempt = mftb();
174 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 188 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
@@ -191,9 +205,6 @@ int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat)
191 struct kvmppc_vcore *vc = vcpu->arch.vcore; 205 struct kvmppc_vcore *vc = vcpu->arch.vcore;
192 206
193 if (arch_compat) { 207 if (arch_compat) {
194 if (!cpu_has_feature(CPU_FTR_ARCH_206))
195 return -EINVAL; /* 970 has no compat mode support */
196
197 switch (arch_compat) { 208 switch (arch_compat) {
198 case PVR_ARCH_205: 209 case PVR_ARCH_205:
199 /* 210 /*
@@ -505,25 +516,14 @@ static void kvmppc_update_vpas(struct kvm_vcpu *vcpu)
505static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now) 516static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now)
506{ 517{
507 u64 p; 518 u64 p;
519 unsigned long flags;
508 520
509 /* 521 spin_lock_irqsave(&vc->stoltb_lock, flags);
510 * If we are the task running the vcore, then since we hold 522 p = vc->stolen_tb;
511 * the vcore lock, we can't be preempted, so stolen_tb/preempt_tb
512 * can't be updated, so we don't need the tbacct_lock.
513 * If the vcore is inactive, it can't become active (since we
514 * hold the vcore lock), so the vcpu load/put functions won't
515 * update stolen_tb/preempt_tb, and we don't need tbacct_lock.
516 */
517 if (vc->vcore_state != VCORE_INACTIVE && 523 if (vc->vcore_state != VCORE_INACTIVE &&
518 vc->runner->arch.run_task != current) { 524 vc->preempt_tb != TB_NIL)
519 spin_lock_irq(&vc->runner->arch.tbacct_lock); 525 p += now - vc->preempt_tb;
520 p = vc->stolen_tb; 526 spin_unlock_irqrestore(&vc->stoltb_lock, flags);
521 if (vc->preempt_tb != TB_NIL)
522 p += now - vc->preempt_tb;
523 spin_unlock_irq(&vc->runner->arch.tbacct_lock);
524 } else {
525 p = vc->stolen_tb;
526 }
527 return p; 527 return p;
528} 528}
529 529
@@ -607,10 +607,45 @@ static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags,
607 } 607 }
608} 608}
609 609
610static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target)
611{
612 struct kvmppc_vcore *vcore = target->arch.vcore;
613
614 /*
615 * We expect to have been called by the real mode handler
616 * (kvmppc_rm_h_confer()) which would have directly returned
617 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may
618 * have useful work to do and should not confer) so we don't
619 * recheck that here.
620 */
621
622 spin_lock(&vcore->lock);
623 if (target->arch.state == KVMPPC_VCPU_RUNNABLE &&
624 vcore->vcore_state != VCORE_INACTIVE)
625 target = vcore->runner;
626 spin_unlock(&vcore->lock);
627
628 return kvm_vcpu_yield_to(target);
629}
630
631static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu)
632{
633 int yield_count = 0;
634 struct lppaca *lppaca;
635
636 spin_lock(&vcpu->arch.vpa_update_lock);
637 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr;
638 if (lppaca)
639 yield_count = lppaca->yield_count;
640 spin_unlock(&vcpu->arch.vpa_update_lock);
641 return yield_count;
642}
643
610int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu) 644int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
611{ 645{
612 unsigned long req = kvmppc_get_gpr(vcpu, 3); 646 unsigned long req = kvmppc_get_gpr(vcpu, 3);
613 unsigned long target, ret = H_SUCCESS; 647 unsigned long target, ret = H_SUCCESS;
648 int yield_count;
614 struct kvm_vcpu *tvcpu; 649 struct kvm_vcpu *tvcpu;
615 int idx, rc; 650 int idx, rc;
616 651
@@ -619,14 +654,6 @@ int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
619 return RESUME_HOST; 654 return RESUME_HOST;
620 655
621 switch (req) { 656 switch (req) {
622 case H_ENTER:
623 idx = srcu_read_lock(&vcpu->kvm->srcu);
624 ret = kvmppc_virtmode_h_enter(vcpu, kvmppc_get_gpr(vcpu, 4),
625 kvmppc_get_gpr(vcpu, 5),
626 kvmppc_get_gpr(vcpu, 6),
627 kvmppc_get_gpr(vcpu, 7));
628 srcu_read_unlock(&vcpu->kvm->srcu, idx);
629 break;
630 case H_CEDE: 657 case H_CEDE:
631 break; 658 break;
632 case H_PROD: 659 case H_PROD:
@@ -654,7 +681,10 @@ int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
654 ret = H_PARAMETER; 681 ret = H_PARAMETER;
655 break; 682 break;
656 } 683 }
657 kvm_vcpu_yield_to(tvcpu); 684 yield_count = kvmppc_get_gpr(vcpu, 5);
685 if (kvmppc_get_yield_count(tvcpu) != yield_count)
686 break;
687 kvm_arch_vcpu_yield_to(tvcpu);
658 break; 688 break;
659 case H_REGISTER_VPA: 689 case H_REGISTER_VPA:
660 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4), 690 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4),
@@ -769,6 +799,8 @@ static int kvmppc_handle_exit_hv(struct kvm_run *run, struct kvm_vcpu *vcpu,
769 vcpu->stat.ext_intr_exits++; 799 vcpu->stat.ext_intr_exits++;
770 r = RESUME_GUEST; 800 r = RESUME_GUEST;
771 break; 801 break;
802 /* HMI is hypervisor interrupt and host has handled it. Resume guest.*/
803 case BOOK3S_INTERRUPT_HMI:
772 case BOOK3S_INTERRUPT_PERFMON: 804 case BOOK3S_INTERRUPT_PERFMON:
773 r = RESUME_GUEST; 805 r = RESUME_GUEST;
774 break; 806 break;
@@ -837,6 +869,10 @@ static int kvmppc_handle_exit_hv(struct kvm_run *run, struct kvm_vcpu *vcpu,
837 * Accordingly return to Guest or Host. 869 * Accordingly return to Guest or Host.
838 */ 870 */
839 case BOOK3S_INTERRUPT_H_EMUL_ASSIST: 871 case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
872 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED)
873 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ?
874 swab32(vcpu->arch.emul_inst) :
875 vcpu->arch.emul_inst;
840 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) { 876 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) {
841 r = kvmppc_emulate_debug_inst(run, vcpu); 877 r = kvmppc_emulate_debug_inst(run, vcpu);
842 } else { 878 } else {
@@ -1357,6 +1393,7 @@ static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int core)
1357 1393
1358 INIT_LIST_HEAD(&vcore->runnable_threads); 1394 INIT_LIST_HEAD(&vcore->runnable_threads);
1359 spin_lock_init(&vcore->lock); 1395 spin_lock_init(&vcore->lock);
1396 spin_lock_init(&vcore->stoltb_lock);
1360 init_waitqueue_head(&vcore->wq); 1397 init_waitqueue_head(&vcore->wq);
1361 vcore->preempt_tb = TB_NIL; 1398 vcore->preempt_tb = TB_NIL;
1362 vcore->lpcr = kvm->arch.lpcr; 1399 vcore->lpcr = kvm->arch.lpcr;
@@ -1694,9 +1731,11 @@ static void kvmppc_run_core(struct kvmppc_vcore *vc)
1694 vc->n_woken = 0; 1731 vc->n_woken = 0;
1695 vc->nap_count = 0; 1732 vc->nap_count = 0;
1696 vc->entry_exit_count = 0; 1733 vc->entry_exit_count = 0;
1734 vc->preempt_tb = TB_NIL;
1697 vc->vcore_state = VCORE_STARTING; 1735 vc->vcore_state = VCORE_STARTING;
1698 vc->in_guest = 0; 1736 vc->in_guest = 0;
1699 vc->napping_threads = 0; 1737 vc->napping_threads = 0;
1738 vc->conferring_threads = 0;
1700 1739
1701 /* 1740 /*
1702 * Updating any of the vpas requires calling kvmppc_pin_guest_page, 1741 * Updating any of the vpas requires calling kvmppc_pin_guest_page,
@@ -1726,6 +1765,7 @@ static void kvmppc_run_core(struct kvmppc_vcore *vc)
1726 list_for_each_entry(vcpu, &vc->runnable_threads, arch.run_list) { 1765 list_for_each_entry(vcpu, &vc->runnable_threads, arch.run_list) {
1727 kvmppc_start_thread(vcpu); 1766 kvmppc_start_thread(vcpu);
1728 kvmppc_create_dtl_entry(vcpu, vc); 1767 kvmppc_create_dtl_entry(vcpu, vc);
1768 trace_kvm_guest_enter(vcpu);
1729 } 1769 }
1730 1770
1731 /* Set this explicitly in case thread 0 doesn't have a vcpu */ 1771 /* Set this explicitly in case thread 0 doesn't have a vcpu */
@@ -1734,6 +1774,9 @@ static void kvmppc_run_core(struct kvmppc_vcore *vc)
1734 1774
1735 vc->vcore_state = VCORE_RUNNING; 1775 vc->vcore_state = VCORE_RUNNING;
1736 preempt_disable(); 1776 preempt_disable();
1777
1778 trace_kvmppc_run_core(vc, 0);
1779
1737 spin_unlock(&vc->lock); 1780 spin_unlock(&vc->lock);
1738 1781
1739 kvm_guest_enter(); 1782 kvm_guest_enter();
@@ -1779,6 +1822,8 @@ static void kvmppc_run_core(struct kvmppc_vcore *vc)
1779 kvmppc_core_pending_dec(vcpu)) 1822 kvmppc_core_pending_dec(vcpu))
1780 kvmppc_core_dequeue_dec(vcpu); 1823 kvmppc_core_dequeue_dec(vcpu);
1781 1824
1825 trace_kvm_guest_exit(vcpu);
1826
1782 ret = RESUME_GUEST; 1827 ret = RESUME_GUEST;
1783 if (vcpu->arch.trap) 1828 if (vcpu->arch.trap)
1784 ret = kvmppc_handle_exit_hv(vcpu->arch.kvm_run, vcpu, 1829 ret = kvmppc_handle_exit_hv(vcpu->arch.kvm_run, vcpu,
@@ -1804,6 +1849,8 @@ static void kvmppc_run_core(struct kvmppc_vcore *vc)
1804 wake_up(&vcpu->arch.cpu_run); 1849 wake_up(&vcpu->arch.cpu_run);
1805 } 1850 }
1806 } 1851 }
1852
1853 trace_kvmppc_run_core(vc, 1);
1807} 1854}
1808 1855
1809/* 1856/*
@@ -1826,15 +1873,37 @@ static void kvmppc_wait_for_exec(struct kvm_vcpu *vcpu, int wait_state)
1826 */ 1873 */
1827static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc) 1874static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc)
1828{ 1875{
1876 struct kvm_vcpu *vcpu;
1877 int do_sleep = 1;
1878
1829 DEFINE_WAIT(wait); 1879 DEFINE_WAIT(wait);
1830 1880
1831 prepare_to_wait(&vc->wq, &wait, TASK_INTERRUPTIBLE); 1881 prepare_to_wait(&vc->wq, &wait, TASK_INTERRUPTIBLE);
1882
1883 /*
1884 * Check one last time for pending exceptions and ceded state after
1885 * we put ourselves on the wait queue
1886 */
1887 list_for_each_entry(vcpu, &vc->runnable_threads, arch.run_list) {
1888 if (vcpu->arch.pending_exceptions || !vcpu->arch.ceded) {
1889 do_sleep = 0;
1890 break;
1891 }
1892 }
1893
1894 if (!do_sleep) {
1895 finish_wait(&vc->wq, &wait);
1896 return;
1897 }
1898
1832 vc->vcore_state = VCORE_SLEEPING; 1899 vc->vcore_state = VCORE_SLEEPING;
1900 trace_kvmppc_vcore_blocked(vc, 0);
1833 spin_unlock(&vc->lock); 1901 spin_unlock(&vc->lock);
1834 schedule(); 1902 schedule();
1835 finish_wait(&vc->wq, &wait); 1903 finish_wait(&vc->wq, &wait);
1836 spin_lock(&vc->lock); 1904 spin_lock(&vc->lock);
1837 vc->vcore_state = VCORE_INACTIVE; 1905 vc->vcore_state = VCORE_INACTIVE;
1906 trace_kvmppc_vcore_blocked(vc, 1);
1838} 1907}
1839 1908
1840static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 1909static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
@@ -1843,6 +1912,8 @@ static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1843 struct kvmppc_vcore *vc; 1912 struct kvmppc_vcore *vc;
1844 struct kvm_vcpu *v, *vn; 1913 struct kvm_vcpu *v, *vn;
1845 1914
1915 trace_kvmppc_run_vcpu_enter(vcpu);
1916
1846 kvm_run->exit_reason = 0; 1917 kvm_run->exit_reason = 0;
1847 vcpu->arch.ret = RESUME_GUEST; 1918 vcpu->arch.ret = RESUME_GUEST;
1848 vcpu->arch.trap = 0; 1919 vcpu->arch.trap = 0;
@@ -1872,6 +1943,7 @@ static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1872 VCORE_EXIT_COUNT(vc) == 0) { 1943 VCORE_EXIT_COUNT(vc) == 0) {
1873 kvmppc_create_dtl_entry(vcpu, vc); 1944 kvmppc_create_dtl_entry(vcpu, vc);
1874 kvmppc_start_thread(vcpu); 1945 kvmppc_start_thread(vcpu);
1946 trace_kvm_guest_enter(vcpu);
1875 } else if (vc->vcore_state == VCORE_SLEEPING) { 1947 } else if (vc->vcore_state == VCORE_SLEEPING) {
1876 wake_up(&vc->wq); 1948 wake_up(&vc->wq);
1877 } 1949 }
@@ -1936,6 +2008,7 @@ static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1936 wake_up(&v->arch.cpu_run); 2008 wake_up(&v->arch.cpu_run);
1937 } 2009 }
1938 2010
2011 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run);
1939 spin_unlock(&vc->lock); 2012 spin_unlock(&vc->lock);
1940 return vcpu->arch.ret; 2013 return vcpu->arch.ret;
1941} 2014}
@@ -1962,7 +2035,7 @@ static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu)
1962 /* Order vcpus_running vs. rma_setup_done, see kvmppc_alloc_reset_hpt */ 2035 /* Order vcpus_running vs. rma_setup_done, see kvmppc_alloc_reset_hpt */
1963 smp_mb(); 2036 smp_mb();
1964 2037
1965 /* On the first time here, set up HTAB and VRMA or RMA */ 2038 /* On the first time here, set up HTAB and VRMA */
1966 if (!vcpu->kvm->arch.rma_setup_done) { 2039 if (!vcpu->kvm->arch.rma_setup_done) {
1967 r = kvmppc_hv_setup_htab_rma(vcpu); 2040 r = kvmppc_hv_setup_htab_rma(vcpu);
1968 if (r) 2041 if (r)
@@ -1981,7 +2054,9 @@ static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu)
1981 2054
1982 if (run->exit_reason == KVM_EXIT_PAPR_HCALL && 2055 if (run->exit_reason == KVM_EXIT_PAPR_HCALL &&
1983 !(vcpu->arch.shregs.msr & MSR_PR)) { 2056 !(vcpu->arch.shregs.msr & MSR_PR)) {
2057 trace_kvm_hcall_enter(vcpu);
1984 r = kvmppc_pseries_do_hcall(vcpu); 2058 r = kvmppc_pseries_do_hcall(vcpu);
2059 trace_kvm_hcall_exit(vcpu, r);
1985 kvmppc_core_prepare_to_enter(vcpu); 2060 kvmppc_core_prepare_to_enter(vcpu);
1986 } else if (r == RESUME_PAGE_FAULT) { 2061 } else if (r == RESUME_PAGE_FAULT) {
1987 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 2062 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
@@ -1997,98 +2072,6 @@ static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu)
1997 return r; 2072 return r;
1998} 2073}
1999 2074
2000
2001/* Work out RMLS (real mode limit selector) field value for a given RMA size.
2002 Assumes POWER7 or PPC970. */
2003static inline int lpcr_rmls(unsigned long rma_size)
2004{
2005 switch (rma_size) {
2006 case 32ul << 20: /* 32 MB */
2007 if (cpu_has_feature(CPU_FTR_ARCH_206))
2008 return 8; /* only supported on POWER7 */
2009 return -1;
2010 case 64ul << 20: /* 64 MB */
2011 return 3;
2012 case 128ul << 20: /* 128 MB */
2013 return 7;
2014 case 256ul << 20: /* 256 MB */
2015 return 4;
2016 case 1ul << 30: /* 1 GB */
2017 return 2;
2018 case 16ul << 30: /* 16 GB */
2019 return 1;
2020 case 256ul << 30: /* 256 GB */
2021 return 0;
2022 default:
2023 return -1;
2024 }
2025}
2026
2027static int kvm_rma_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
2028{
2029 struct page *page;
2030 struct kvm_rma_info *ri = vma->vm_file->private_data;
2031
2032 if (vmf->pgoff >= kvm_rma_pages)
2033 return VM_FAULT_SIGBUS;
2034
2035 page = pfn_to_page(ri->base_pfn + vmf->pgoff);
2036 get_page(page);
2037 vmf->page = page;
2038 return 0;
2039}
2040
2041static const struct vm_operations_struct kvm_rma_vm_ops = {
2042 .fault = kvm_rma_fault,
2043};
2044
2045static int kvm_rma_mmap(struct file *file, struct vm_area_struct *vma)
2046{
2047 vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP;
2048 vma->vm_ops = &kvm_rma_vm_ops;
2049 return 0;
2050}
2051
2052static int kvm_rma_release(struct inode *inode, struct file *filp)
2053{
2054 struct kvm_rma_info *ri = filp->private_data;
2055
2056 kvm_release_rma(ri);
2057 return 0;
2058}
2059
2060static const struct file_operations kvm_rma_fops = {
2061 .mmap = kvm_rma_mmap,
2062 .release = kvm_rma_release,
2063};
2064
2065static long kvm_vm_ioctl_allocate_rma(struct kvm *kvm,
2066 struct kvm_allocate_rma *ret)
2067{
2068 long fd;
2069 struct kvm_rma_info *ri;
2070 /*
2071 * Only do this on PPC970 in HV mode
2072 */
2073 if (!cpu_has_feature(CPU_FTR_HVMODE) ||
2074 !cpu_has_feature(CPU_FTR_ARCH_201))
2075 return -EINVAL;
2076
2077 if (!kvm_rma_pages)
2078 return -EINVAL;
2079
2080 ri = kvm_alloc_rma();
2081 if (!ri)
2082 return -ENOMEM;
2083
2084 fd = anon_inode_getfd("kvm-rma", &kvm_rma_fops, ri, O_RDWR | O_CLOEXEC);
2085 if (fd < 0)
2086 kvm_release_rma(ri);
2087
2088 ret->rma_size = kvm_rma_pages << PAGE_SHIFT;
2089 return fd;
2090}
2091
2092static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps, 2075static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps,
2093 int linux_psize) 2076 int linux_psize)
2094{ 2077{
@@ -2167,26 +2150,6 @@ out:
2167 return r; 2150 return r;
2168} 2151}
2169 2152
2170static void unpin_slot(struct kvm_memory_slot *memslot)
2171{
2172 unsigned long *physp;
2173 unsigned long j, npages, pfn;
2174 struct page *page;
2175
2176 physp = memslot->arch.slot_phys;
2177 npages = memslot->npages;
2178 if (!physp)
2179 return;
2180 for (j = 0; j < npages; j++) {
2181 if (!(physp[j] & KVMPPC_GOT_PAGE))
2182 continue;
2183 pfn = physp[j] >> PAGE_SHIFT;
2184 page = pfn_to_page(pfn);
2185 SetPageDirty(page);
2186 put_page(page);
2187 }
2188}
2189
2190static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *free, 2153static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *free,
2191 struct kvm_memory_slot *dont) 2154 struct kvm_memory_slot *dont)
2192{ 2155{
@@ -2194,11 +2157,6 @@ static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *free,
2194 vfree(free->arch.rmap); 2157 vfree(free->arch.rmap);
2195 free->arch.rmap = NULL; 2158 free->arch.rmap = NULL;
2196 } 2159 }
2197 if (!dont || free->arch.slot_phys != dont->arch.slot_phys) {
2198 unpin_slot(free);
2199 vfree(free->arch.slot_phys);
2200 free->arch.slot_phys = NULL;
2201 }
2202} 2160}
2203 2161
2204static int kvmppc_core_create_memslot_hv(struct kvm_memory_slot *slot, 2162static int kvmppc_core_create_memslot_hv(struct kvm_memory_slot *slot,
@@ -2207,7 +2165,6 @@ static int kvmppc_core_create_memslot_hv(struct kvm_memory_slot *slot,
2207 slot->arch.rmap = vzalloc(npages * sizeof(*slot->arch.rmap)); 2165 slot->arch.rmap = vzalloc(npages * sizeof(*slot->arch.rmap));
2208 if (!slot->arch.rmap) 2166 if (!slot->arch.rmap)
2209 return -ENOMEM; 2167 return -ENOMEM;
2210 slot->arch.slot_phys = NULL;
2211 2168
2212 return 0; 2169 return 0;
2213} 2170}
@@ -2216,17 +2173,6 @@ static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm,
2216 struct kvm_memory_slot *memslot, 2173 struct kvm_memory_slot *memslot,
2217 struct kvm_userspace_memory_region *mem) 2174 struct kvm_userspace_memory_region *mem)
2218{ 2175{
2219 unsigned long *phys;
2220
2221 /* Allocate a slot_phys array if needed */
2222 phys = memslot->arch.slot_phys;
2223 if (!kvm->arch.using_mmu_notifiers && !phys && memslot->npages) {
2224 phys = vzalloc(memslot->npages * sizeof(unsigned long));
2225 if (!phys)
2226 return -ENOMEM;
2227 memslot->arch.slot_phys = phys;
2228 }
2229
2230 return 0; 2176 return 0;
2231} 2177}
2232 2178
@@ -2284,17 +2230,11 @@ static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu)
2284{ 2230{
2285 int err = 0; 2231 int err = 0;
2286 struct kvm *kvm = vcpu->kvm; 2232 struct kvm *kvm = vcpu->kvm;
2287 struct kvm_rma_info *ri = NULL;
2288 unsigned long hva; 2233 unsigned long hva;
2289 struct kvm_memory_slot *memslot; 2234 struct kvm_memory_slot *memslot;
2290 struct vm_area_struct *vma; 2235 struct vm_area_struct *vma;
2291 unsigned long lpcr = 0, senc; 2236 unsigned long lpcr = 0, senc;
2292 unsigned long lpcr_mask = 0;
2293 unsigned long psize, porder; 2237 unsigned long psize, porder;
2294 unsigned long rma_size;
2295 unsigned long rmls;
2296 unsigned long *physp;
2297 unsigned long i, npages;
2298 int srcu_idx; 2238 int srcu_idx;
2299 2239
2300 mutex_lock(&kvm->lock); 2240 mutex_lock(&kvm->lock);
@@ -2329,88 +2269,25 @@ static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu)
2329 psize = vma_kernel_pagesize(vma); 2269 psize = vma_kernel_pagesize(vma);
2330 porder = __ilog2(psize); 2270 porder = __ilog2(psize);
2331 2271
2332 /* Is this one of our preallocated RMAs? */
2333 if (vma->vm_file && vma->vm_file->f_op == &kvm_rma_fops &&
2334 hva == vma->vm_start)
2335 ri = vma->vm_file->private_data;
2336
2337 up_read(&current->mm->mmap_sem); 2272 up_read(&current->mm->mmap_sem);
2338 2273
2339 if (!ri) { 2274 /* We can handle 4k, 64k or 16M pages in the VRMA */
2340 /* On POWER7, use VRMA; on PPC970, give up */ 2275 err = -EINVAL;
2341 err = -EPERM; 2276 if (!(psize == 0x1000 || psize == 0x10000 ||
2342 if (cpu_has_feature(CPU_FTR_ARCH_201)) { 2277 psize == 0x1000000))
2343 pr_err("KVM: CPU requires an RMO\n"); 2278 goto out_srcu;
2344 goto out_srcu;
2345 }
2346 2279
2347 /* We can handle 4k, 64k or 16M pages in the VRMA */ 2280 /* Update VRMASD field in the LPCR */
2348 err = -EINVAL; 2281 senc = slb_pgsize_encoding(psize);
2349 if (!(psize == 0x1000 || psize == 0x10000 || 2282 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T |
2350 psize == 0x1000000)) 2283 (VRMA_VSID << SLB_VSID_SHIFT_1T);
2351 goto out_srcu; 2284 /* the -4 is to account for senc values starting at 0x10 */
2285 lpcr = senc << (LPCR_VRMASD_SH - 4);
2352 2286
2353 /* Update VRMASD field in the LPCR */ 2287 /* Create HPTEs in the hash page table for the VRMA */
2354 senc = slb_pgsize_encoding(psize); 2288 kvmppc_map_vrma(vcpu, memslot, porder);
2355 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T |
2356 (VRMA_VSID << SLB_VSID_SHIFT_1T);
2357 lpcr_mask = LPCR_VRMASD;
2358 /* the -4 is to account for senc values starting at 0x10 */
2359 lpcr = senc << (LPCR_VRMASD_SH - 4);
2360 2289
2361 /* Create HPTEs in the hash page table for the VRMA */ 2290 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD);
2362 kvmppc_map_vrma(vcpu, memslot, porder);
2363
2364 } else {
2365 /* Set up to use an RMO region */
2366 rma_size = kvm_rma_pages;
2367 if (rma_size > memslot->npages)
2368 rma_size = memslot->npages;
2369 rma_size <<= PAGE_SHIFT;
2370 rmls = lpcr_rmls(rma_size);
2371 err = -EINVAL;
2372 if ((long)rmls < 0) {
2373 pr_err("KVM: Can't use RMA of 0x%lx bytes\n", rma_size);
2374 goto out_srcu;
2375 }
2376 atomic_inc(&ri->use_count);
2377 kvm->arch.rma = ri;
2378
2379 /* Update LPCR and RMOR */
2380 if (cpu_has_feature(CPU_FTR_ARCH_201)) {
2381 /* PPC970; insert RMLS value (split field) in HID4 */
2382 lpcr_mask = (1ul << HID4_RMLS0_SH) |
2383 (3ul << HID4_RMLS2_SH) | HID4_RMOR;
2384 lpcr = ((rmls >> 2) << HID4_RMLS0_SH) |
2385 ((rmls & 3) << HID4_RMLS2_SH);
2386 /* RMOR is also in HID4 */
2387 lpcr |= ((ri->base_pfn >> (26 - PAGE_SHIFT)) & 0xffff)
2388 << HID4_RMOR_SH;
2389 } else {
2390 /* POWER7 */
2391 lpcr_mask = LPCR_VPM0 | LPCR_VRMA_L | LPCR_RMLS;
2392 lpcr = rmls << LPCR_RMLS_SH;
2393 kvm->arch.rmor = ri->base_pfn << PAGE_SHIFT;
2394 }
2395 pr_info("KVM: Using RMO at %lx size %lx (LPCR = %lx)\n",
2396 ri->base_pfn << PAGE_SHIFT, rma_size, lpcr);
2397
2398 /* Initialize phys addrs of pages in RMO */
2399 npages = kvm_rma_pages;
2400 porder = __ilog2(npages);
2401 physp = memslot->arch.slot_phys;
2402 if (physp) {
2403 if (npages > memslot->npages)
2404 npages = memslot->npages;
2405 spin_lock(&kvm->arch.slot_phys_lock);
2406 for (i = 0; i < npages; ++i)
2407 physp[i] = ((ri->base_pfn + i) << PAGE_SHIFT) +
2408 porder;
2409 spin_unlock(&kvm->arch.slot_phys_lock);
2410 }
2411 }
2412
2413 kvmppc_update_lpcr(kvm, lpcr, lpcr_mask);
2414 2291
2415 /* Order updates to kvm->arch.lpcr etc. vs. rma_setup_done */ 2292 /* Order updates to kvm->arch.lpcr etc. vs. rma_setup_done */
2416 smp_wmb(); 2293 smp_wmb();
@@ -2449,35 +2326,21 @@ static int kvmppc_core_init_vm_hv(struct kvm *kvm)
2449 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls, 2326 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls,
2450 sizeof(kvm->arch.enabled_hcalls)); 2327 sizeof(kvm->arch.enabled_hcalls));
2451 2328
2452 kvm->arch.rma = NULL;
2453
2454 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1); 2329 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1);
2455 2330
2456 if (cpu_has_feature(CPU_FTR_ARCH_201)) { 2331 /* Init LPCR for virtual RMA mode */
2457 /* PPC970; HID4 is effectively the LPCR */ 2332 kvm->arch.host_lpid = mfspr(SPRN_LPID);
2458 kvm->arch.host_lpid = 0; 2333 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR);
2459 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_HID4); 2334 lpcr &= LPCR_PECE | LPCR_LPES;
2460 lpcr &= ~((3 << HID4_LPID1_SH) | (0xful << HID4_LPID5_SH)); 2335 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE |
2461 lpcr |= ((lpid >> 4) << HID4_LPID1_SH) | 2336 LPCR_VPM0 | LPCR_VPM1;
2462 ((lpid & 0xf) << HID4_LPID5_SH); 2337 kvm->arch.vrma_slb_v = SLB_VSID_B_1T |
2463 } else { 2338 (VRMA_VSID << SLB_VSID_SHIFT_1T);
2464 /* POWER7; init LPCR for virtual RMA mode */ 2339 /* On POWER8 turn on online bit to enable PURR/SPURR */
2465 kvm->arch.host_lpid = mfspr(SPRN_LPID); 2340 if (cpu_has_feature(CPU_FTR_ARCH_207S))
2466 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR); 2341 lpcr |= LPCR_ONL;
2467 lpcr &= LPCR_PECE | LPCR_LPES;
2468 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE |
2469 LPCR_VPM0 | LPCR_VPM1;
2470 kvm->arch.vrma_slb_v = SLB_VSID_B_1T |
2471 (VRMA_VSID << SLB_VSID_SHIFT_1T);
2472 /* On POWER8 turn on online bit to enable PURR/SPURR */
2473 if (cpu_has_feature(CPU_FTR_ARCH_207S))
2474 lpcr |= LPCR_ONL;
2475 }
2476 kvm->arch.lpcr = lpcr; 2342 kvm->arch.lpcr = lpcr;
2477 2343
2478 kvm->arch.using_mmu_notifiers = !!cpu_has_feature(CPU_FTR_ARCH_206);
2479 spin_lock_init(&kvm->arch.slot_phys_lock);
2480
2481 /* 2344 /*
2482 * Track that we now have a HV mode VM active. This blocks secondary 2345 * Track that we now have a HV mode VM active. This blocks secondary
2483 * CPU threads from coming online. 2346 * CPU threads from coming online.
@@ -2507,10 +2370,6 @@ static void kvmppc_core_destroy_vm_hv(struct kvm *kvm)
2507 kvm_hv_vm_deactivated(); 2370 kvm_hv_vm_deactivated();
2508 2371
2509 kvmppc_free_vcores(kvm); 2372 kvmppc_free_vcores(kvm);
2510 if (kvm->arch.rma) {
2511 kvm_release_rma(kvm->arch.rma);
2512 kvm->arch.rma = NULL;
2513 }
2514 2373
2515 kvmppc_free_hpt(kvm); 2374 kvmppc_free_hpt(kvm);
2516} 2375}
@@ -2536,7 +2395,8 @@ static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn,
2536 2395
2537static int kvmppc_core_check_processor_compat_hv(void) 2396static int kvmppc_core_check_processor_compat_hv(void)
2538{ 2397{
2539 if (!cpu_has_feature(CPU_FTR_HVMODE)) 2398 if (!cpu_has_feature(CPU_FTR_HVMODE) ||
2399 !cpu_has_feature(CPU_FTR_ARCH_206))
2540 return -EIO; 2400 return -EIO;
2541 return 0; 2401 return 0;
2542} 2402}
@@ -2550,16 +2410,6 @@ static long kvm_arch_vm_ioctl_hv(struct file *filp,
2550 2410
2551 switch (ioctl) { 2411 switch (ioctl) {
2552 2412
2553 case KVM_ALLOCATE_RMA: {
2554 struct kvm_allocate_rma rma;
2555 struct kvm *kvm = filp->private_data;
2556
2557 r = kvm_vm_ioctl_allocate_rma(kvm, &rma);
2558 if (r >= 0 && copy_to_user(argp, &rma, sizeof(rma)))
2559 r = -EFAULT;
2560 break;
2561 }
2562
2563 case KVM_PPC_ALLOCATE_HTAB: { 2413 case KVM_PPC_ALLOCATE_HTAB: {
2564 u32 htab_order; 2414 u32 htab_order;
2565 2415
diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c b/arch/powerpc/kvm/book3s_hv_builtin.c
index 3f1bb5a36c27..1f083ff8a61a 100644
--- a/arch/powerpc/kvm/book3s_hv_builtin.c
+++ b/arch/powerpc/kvm/book3s_hv_builtin.c
@@ -16,6 +16,7 @@
16#include <linux/memblock.h> 16#include <linux/memblock.h>
17#include <linux/sizes.h> 17#include <linux/sizes.h>
18#include <linux/cma.h> 18#include <linux/cma.h>
19#include <linux/bitops.h>
19 20
20#include <asm/cputable.h> 21#include <asm/cputable.h>
21#include <asm/kvm_ppc.h> 22#include <asm/kvm_ppc.h>
@@ -32,95 +33,9 @@
32 * By default we reserve 5% of memory for hash pagetable allocation. 33 * By default we reserve 5% of memory for hash pagetable allocation.
33 */ 34 */
34static unsigned long kvm_cma_resv_ratio = 5; 35static unsigned long kvm_cma_resv_ratio = 5;
35/*
36 * We allocate RMAs (real mode areas) for KVM guests from the KVM CMA area.
37 * Each RMA has to be physically contiguous and of a size that the
38 * hardware supports. PPC970 and POWER7 support 64MB, 128MB and 256MB,
39 * and other larger sizes. Since we are unlikely to be allocate that
40 * much physically contiguous memory after the system is up and running,
41 * we preallocate a set of RMAs in early boot using CMA.
42 * should be power of 2.
43 */
44unsigned long kvm_rma_pages = (1 << 27) >> PAGE_SHIFT; /* 128MB */
45EXPORT_SYMBOL_GPL(kvm_rma_pages);
46 36
47static struct cma *kvm_cma; 37static struct cma *kvm_cma;
48 38
49/* Work out RMLS (real mode limit selector) field value for a given RMA size.
50 Assumes POWER7 or PPC970. */
51static inline int lpcr_rmls(unsigned long rma_size)
52{
53 switch (rma_size) {
54 case 32ul << 20: /* 32 MB */
55 if (cpu_has_feature(CPU_FTR_ARCH_206))
56 return 8; /* only supported on POWER7 */
57 return -1;
58 case 64ul << 20: /* 64 MB */
59 return 3;
60 case 128ul << 20: /* 128 MB */
61 return 7;
62 case 256ul << 20: /* 256 MB */
63 return 4;
64 case 1ul << 30: /* 1 GB */
65 return 2;
66 case 16ul << 30: /* 16 GB */
67 return 1;
68 case 256ul << 30: /* 256 GB */
69 return 0;
70 default:
71 return -1;
72 }
73}
74
75static int __init early_parse_rma_size(char *p)
76{
77 unsigned long kvm_rma_size;
78
79 pr_debug("%s(%s)\n", __func__, p);
80 if (!p)
81 return -EINVAL;
82 kvm_rma_size = memparse(p, &p);
83 /*
84 * Check that the requested size is one supported in hardware
85 */
86 if (lpcr_rmls(kvm_rma_size) < 0) {
87 pr_err("RMA size of 0x%lx not supported\n", kvm_rma_size);
88 return -EINVAL;
89 }
90 kvm_rma_pages = kvm_rma_size >> PAGE_SHIFT;
91 return 0;
92}
93early_param("kvm_rma_size", early_parse_rma_size);
94
95struct kvm_rma_info *kvm_alloc_rma()
96{
97 struct page *page;
98 struct kvm_rma_info *ri;
99
100 ri = kmalloc(sizeof(struct kvm_rma_info), GFP_KERNEL);
101 if (!ri)
102 return NULL;
103 page = cma_alloc(kvm_cma, kvm_rma_pages, order_base_2(kvm_rma_pages));
104 if (!page)
105 goto err_out;
106 atomic_set(&ri->use_count, 1);
107 ri->base_pfn = page_to_pfn(page);
108 return ri;
109err_out:
110 kfree(ri);
111 return NULL;
112}
113EXPORT_SYMBOL_GPL(kvm_alloc_rma);
114
115void kvm_release_rma(struct kvm_rma_info *ri)
116{
117 if (atomic_dec_and_test(&ri->use_count)) {
118 cma_release(kvm_cma, pfn_to_page(ri->base_pfn), kvm_rma_pages);
119 kfree(ri);
120 }
121}
122EXPORT_SYMBOL_GPL(kvm_release_rma);
123
124static int __init early_parse_kvm_cma_resv(char *p) 39static int __init early_parse_kvm_cma_resv(char *p)
125{ 40{
126 pr_debug("%s(%s)\n", __func__, p); 41 pr_debug("%s(%s)\n", __func__, p);
@@ -132,14 +47,9 @@ early_param("kvm_cma_resv_ratio", early_parse_kvm_cma_resv);
132 47
133struct page *kvm_alloc_hpt(unsigned long nr_pages) 48struct page *kvm_alloc_hpt(unsigned long nr_pages)
134{ 49{
135 unsigned long align_pages = HPT_ALIGN_PAGES;
136
137 VM_BUG_ON(order_base_2(nr_pages) < KVM_CMA_CHUNK_ORDER - PAGE_SHIFT); 50 VM_BUG_ON(order_base_2(nr_pages) < KVM_CMA_CHUNK_ORDER - PAGE_SHIFT);
138 51
139 /* Old CPUs require HPT aligned on a multiple of its size */ 52 return cma_alloc(kvm_cma, nr_pages, order_base_2(HPT_ALIGN_PAGES));
140 if (!cpu_has_feature(CPU_FTR_ARCH_206))
141 align_pages = nr_pages;
142 return cma_alloc(kvm_cma, nr_pages, order_base_2(align_pages));
143} 53}
144EXPORT_SYMBOL_GPL(kvm_alloc_hpt); 54EXPORT_SYMBOL_GPL(kvm_alloc_hpt);
145 55
@@ -180,22 +90,44 @@ void __init kvm_cma_reserve(void)
180 if (selected_size) { 90 if (selected_size) {
181 pr_debug("%s: reserving %ld MiB for global area\n", __func__, 91 pr_debug("%s: reserving %ld MiB for global area\n", __func__,
182 (unsigned long)selected_size / SZ_1M); 92 (unsigned long)selected_size / SZ_1M);
183 /* 93 align_size = HPT_ALIGN_PAGES << PAGE_SHIFT;
184 * Old CPUs require HPT aligned on a multiple of its size. So for them
185 * make the alignment as max size we could request.
186 */
187 if (!cpu_has_feature(CPU_FTR_ARCH_206))
188 align_size = __rounddown_pow_of_two(selected_size);
189 else
190 align_size = HPT_ALIGN_PAGES << PAGE_SHIFT;
191
192 align_size = max(kvm_rma_pages << PAGE_SHIFT, align_size);
193 cma_declare_contiguous(0, selected_size, 0, align_size, 94 cma_declare_contiguous(0, selected_size, 0, align_size,
194 KVM_CMA_CHUNK_ORDER - PAGE_SHIFT, false, &kvm_cma); 95 KVM_CMA_CHUNK_ORDER - PAGE_SHIFT, false, &kvm_cma);
195 } 96 }
196} 97}
197 98
198/* 99/*
100 * Real-mode H_CONFER implementation.
101 * We check if we are the only vcpu out of this virtual core
102 * still running in the guest and not ceded. If so, we pop up
103 * to the virtual-mode implementation; if not, just return to
104 * the guest.
105 */
106long int kvmppc_rm_h_confer(struct kvm_vcpu *vcpu, int target,
107 unsigned int yield_count)
108{
109 struct kvmppc_vcore *vc = vcpu->arch.vcore;
110 int threads_running;
111 int threads_ceded;
112 int threads_conferring;
113 u64 stop = get_tb() + 10 * tb_ticks_per_usec;
114 int rv = H_SUCCESS; /* => don't yield */
115
116 set_bit(vcpu->arch.ptid, &vc->conferring_threads);
117 while ((get_tb() < stop) && (VCORE_EXIT_COUNT(vc) == 0)) {
118 threads_running = VCORE_ENTRY_COUNT(vc);
119 threads_ceded = hweight32(vc->napping_threads);
120 threads_conferring = hweight32(vc->conferring_threads);
121 if (threads_ceded + threads_conferring >= threads_running) {
122 rv = H_TOO_HARD; /* => do yield */
123 break;
124 }
125 }
126 clear_bit(vcpu->arch.ptid, &vc->conferring_threads);
127 return rv;
128}
129
130/*
199 * When running HV mode KVM we need to block certain operations while KVM VMs 131 * When running HV mode KVM we need to block certain operations while KVM VMs
200 * exist in the system. We use a counter of VMs to track this. 132 * exist in the system. We use a counter of VMs to track this.
201 * 133 *
diff --git a/arch/powerpc/kvm/book3s_hv_interrupts.S b/arch/powerpc/kvm/book3s_hv_interrupts.S
index 731be7478b27..36540a99d178 100644
--- a/arch/powerpc/kvm/book3s_hv_interrupts.S
+++ b/arch/powerpc/kvm/book3s_hv_interrupts.S
@@ -52,10 +52,8 @@ _GLOBAL(__kvmppc_vcore_entry)
52 std r3, _CCR(r1) 52 std r3, _CCR(r1)
53 53
54 /* Save host DSCR */ 54 /* Save host DSCR */
55BEGIN_FTR_SECTION
56 mfspr r3, SPRN_DSCR 55 mfspr r3, SPRN_DSCR
57 std r3, HSTATE_DSCR(r13) 56 std r3, HSTATE_DSCR(r13)
58END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
59 57
60BEGIN_FTR_SECTION 58BEGIN_FTR_SECTION
61 /* Save host DABR */ 59 /* Save host DABR */
@@ -84,11 +82,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
84 mfspr r7, SPRN_MMCR0 /* save MMCR0 */ 82 mfspr r7, SPRN_MMCR0 /* save MMCR0 */
85 mtspr SPRN_MMCR0, r3 /* freeze all counters, disable interrupts */ 83 mtspr SPRN_MMCR0, r3 /* freeze all counters, disable interrupts */
86 mfspr r6, SPRN_MMCRA 84 mfspr r6, SPRN_MMCRA
87BEGIN_FTR_SECTION 85 /* Clear MMCRA in order to disable SDAR updates */
88 /* On P7, clear MMCRA in order to disable SDAR updates */
89 li r5, 0 86 li r5, 0
90 mtspr SPRN_MMCRA, r5 87 mtspr SPRN_MMCRA, r5
91END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
92 isync 88 isync
93 ld r3, PACALPPACAPTR(r13) /* is the host using the PMU? */ 89 ld r3, PACALPPACAPTR(r13) /* is the host using the PMU? */
94 lbz r5, LPPACA_PMCINUSE(r3) 90 lbz r5, LPPACA_PMCINUSE(r3)
@@ -113,20 +109,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
113 mfspr r7, SPRN_PMC4 109 mfspr r7, SPRN_PMC4
114 mfspr r8, SPRN_PMC5 110 mfspr r8, SPRN_PMC5
115 mfspr r9, SPRN_PMC6 111 mfspr r9, SPRN_PMC6
116BEGIN_FTR_SECTION
117 mfspr r10, SPRN_PMC7
118 mfspr r11, SPRN_PMC8
119END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
120 stw r3, HSTATE_PMC(r13) 112 stw r3, HSTATE_PMC(r13)
121 stw r5, HSTATE_PMC + 4(r13) 113 stw r5, HSTATE_PMC + 4(r13)
122 stw r6, HSTATE_PMC + 8(r13) 114 stw r6, HSTATE_PMC + 8(r13)
123 stw r7, HSTATE_PMC + 12(r13) 115 stw r7, HSTATE_PMC + 12(r13)
124 stw r8, HSTATE_PMC + 16(r13) 116 stw r8, HSTATE_PMC + 16(r13)
125 stw r9, HSTATE_PMC + 20(r13) 117 stw r9, HSTATE_PMC + 20(r13)
126BEGIN_FTR_SECTION
127 stw r10, HSTATE_PMC + 24(r13)
128 stw r11, HSTATE_PMC + 28(r13)
129END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
13031: 11831:
131 119
132 /* 120 /*
@@ -140,31 +128,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
140 add r8,r8,r7 128 add r8,r8,r7
141 std r8,HSTATE_DECEXP(r13) 129 std r8,HSTATE_DECEXP(r13)
142 130
143#ifdef CONFIG_SMP
144 /*
145 * On PPC970, if the guest vcpu has an external interrupt pending,
146 * send ourselves an IPI so as to interrupt the guest once it
147 * enables interrupts. (It must have interrupts disabled,
148 * otherwise we would already have delivered the interrupt.)
149 *
150 * XXX If this is a UP build, smp_send_reschedule is not available,
151 * so the interrupt will be delayed until the next time the vcpu
152 * enters the guest with interrupts enabled.
153 */
154BEGIN_FTR_SECTION
155 ld r4, HSTATE_KVM_VCPU(r13)
156 ld r0, VCPU_PENDING_EXC(r4)
157 li r7, (1 << BOOK3S_IRQPRIO_EXTERNAL)
158 oris r7, r7, (1 << BOOK3S_IRQPRIO_EXTERNAL_LEVEL)@h
159 and. r0, r0, r7
160 beq 32f
161 lhz r3, PACAPACAINDEX(r13)
162 bl smp_send_reschedule
163 nop
16432:
165END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
166#endif /* CONFIG_SMP */
167
168 /* Jump to partition switch code */ 131 /* Jump to partition switch code */
169 bl kvmppc_hv_entry_trampoline 132 bl kvmppc_hv_entry_trampoline
170 nop 133 nop
diff --git a/arch/powerpc/kvm/book3s_hv_ras.c b/arch/powerpc/kvm/book3s_hv_ras.c
index d562c8e2bc30..60081bd75847 100644
--- a/arch/powerpc/kvm/book3s_hv_ras.c
+++ b/arch/powerpc/kvm/book3s_hv_ras.c
@@ -138,8 +138,5 @@ out:
138 138
139long kvmppc_realmode_machine_check(struct kvm_vcpu *vcpu) 139long kvmppc_realmode_machine_check(struct kvm_vcpu *vcpu)
140{ 140{
141 if (cpu_has_feature(CPU_FTR_ARCH_206)) 141 return kvmppc_realmode_mc_power7(vcpu);
142 return kvmppc_realmode_mc_power7(vcpu);
143
144 return 0;
145} 142}
diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
index 084ad54c73cd..510bdfbc4073 100644
--- a/arch/powerpc/kvm/book3s_hv_rm_mmu.c
+++ b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
@@ -45,16 +45,12 @@ static int global_invalidates(struct kvm *kvm, unsigned long flags)
45 * as indicated by local_paca->kvm_hstate.kvm_vcpu being set, 45 * as indicated by local_paca->kvm_hstate.kvm_vcpu being set,
46 * we can use tlbiel as long as we mark all other physical 46 * we can use tlbiel as long as we mark all other physical
47 * cores as potentially having stale TLB entries for this lpid. 47 * cores as potentially having stale TLB entries for this lpid.
48 * If we're not using MMU notifiers, we never take pages away
49 * from the guest, so we can use tlbiel if requested.
50 * Otherwise, don't use tlbiel. 48 * Otherwise, don't use tlbiel.
51 */ 49 */
52 if (kvm->arch.online_vcores == 1 && local_paca->kvm_hstate.kvm_vcpu) 50 if (kvm->arch.online_vcores == 1 && local_paca->kvm_hstate.kvm_vcpu)
53 global = 0; 51 global = 0;
54 else if (kvm->arch.using_mmu_notifiers)
55 global = 1;
56 else 52 else
57 global = !(flags & H_LOCAL); 53 global = 1;
58 54
59 if (!global) { 55 if (!global) {
60 /* any other core might now have stale TLB entries... */ 56 /* any other core might now have stale TLB entries... */
@@ -170,7 +166,7 @@ long kvmppc_do_h_enter(struct kvm *kvm, unsigned long flags,
170 struct revmap_entry *rev; 166 struct revmap_entry *rev;
171 unsigned long g_ptel; 167 unsigned long g_ptel;
172 struct kvm_memory_slot *memslot; 168 struct kvm_memory_slot *memslot;
173 unsigned long *physp, pte_size; 169 unsigned long pte_size;
174 unsigned long is_io; 170 unsigned long is_io;
175 unsigned long *rmap; 171 unsigned long *rmap;
176 pte_t pte; 172 pte_t pte;
@@ -198,9 +194,6 @@ long kvmppc_do_h_enter(struct kvm *kvm, unsigned long flags,
198 is_io = ~0ul; 194 is_io = ~0ul;
199 rmap = NULL; 195 rmap = NULL;
200 if (!(memslot && !(memslot->flags & KVM_MEMSLOT_INVALID))) { 196 if (!(memslot && !(memslot->flags & KVM_MEMSLOT_INVALID))) {
201 /* PPC970 can't do emulated MMIO */
202 if (!cpu_has_feature(CPU_FTR_ARCH_206))
203 return H_PARAMETER;
204 /* Emulated MMIO - mark this with key=31 */ 197 /* Emulated MMIO - mark this with key=31 */
205 pteh |= HPTE_V_ABSENT; 198 pteh |= HPTE_V_ABSENT;
206 ptel |= HPTE_R_KEY_HI | HPTE_R_KEY_LO; 199 ptel |= HPTE_R_KEY_HI | HPTE_R_KEY_LO;
@@ -213,37 +206,20 @@ long kvmppc_do_h_enter(struct kvm *kvm, unsigned long flags,
213 slot_fn = gfn - memslot->base_gfn; 206 slot_fn = gfn - memslot->base_gfn;
214 rmap = &memslot->arch.rmap[slot_fn]; 207 rmap = &memslot->arch.rmap[slot_fn];
215 208
216 if (!kvm->arch.using_mmu_notifiers) { 209 /* Translate to host virtual address */
217 physp = memslot->arch.slot_phys; 210 hva = __gfn_to_hva_memslot(memslot, gfn);
218 if (!physp) 211
219 return H_PARAMETER; 212 /* Look up the Linux PTE for the backing page */
220 physp += slot_fn; 213 pte_size = psize;
221 if (realmode) 214 pte = lookup_linux_pte_and_update(pgdir, hva, writing, &pte_size);
222 physp = real_vmalloc_addr(physp); 215 if (pte_present(pte) && !pte_numa(pte)) {
223 pa = *physp; 216 if (writing && !pte_write(pte))
224 if (!pa) 217 /* make the actual HPTE be read-only */
225 return H_TOO_HARD; 218 ptel = hpte_make_readonly(ptel);
226 is_io = pa & (HPTE_R_I | HPTE_R_W); 219 is_io = hpte_cache_bits(pte_val(pte));
227 pte_size = PAGE_SIZE << (pa & KVMPPC_PAGE_ORDER_MASK); 220 pa = pte_pfn(pte) << PAGE_SHIFT;
228 pa &= PAGE_MASK; 221 pa |= hva & (pte_size - 1);
229 pa |= gpa & ~PAGE_MASK; 222 pa |= gpa & ~PAGE_MASK;
230 } else {
231 /* Translate to host virtual address */
232 hva = __gfn_to_hva_memslot(memslot, gfn);
233
234 /* Look up the Linux PTE for the backing page */
235 pte_size = psize;
236 pte = lookup_linux_pte_and_update(pgdir, hva, writing,
237 &pte_size);
238 if (pte_present(pte) && !pte_numa(pte)) {
239 if (writing && !pte_write(pte))
240 /* make the actual HPTE be read-only */
241 ptel = hpte_make_readonly(ptel);
242 is_io = hpte_cache_bits(pte_val(pte));
243 pa = pte_pfn(pte) << PAGE_SHIFT;
244 pa |= hva & (pte_size - 1);
245 pa |= gpa & ~PAGE_MASK;
246 }
247 } 223 }
248 224
249 if (pte_size < psize) 225 if (pte_size < psize)
@@ -337,8 +313,7 @@ long kvmppc_do_h_enter(struct kvm *kvm, unsigned long flags,
337 rmap = real_vmalloc_addr(rmap); 313 rmap = real_vmalloc_addr(rmap);
338 lock_rmap(rmap); 314 lock_rmap(rmap);
339 /* Check for pending invalidations under the rmap chain lock */ 315 /* Check for pending invalidations under the rmap chain lock */
340 if (kvm->arch.using_mmu_notifiers && 316 if (mmu_notifier_retry(kvm, mmu_seq)) {
341 mmu_notifier_retry(kvm, mmu_seq)) {
342 /* inval in progress, write a non-present HPTE */ 317 /* inval in progress, write a non-present HPTE */
343 pteh |= HPTE_V_ABSENT; 318 pteh |= HPTE_V_ABSENT;
344 pteh &= ~HPTE_V_VALID; 319 pteh &= ~HPTE_V_VALID;
@@ -395,61 +370,11 @@ static inline int try_lock_tlbie(unsigned int *lock)
395 return old == 0; 370 return old == 0;
396} 371}
397 372
398/*
399 * tlbie/tlbiel is a bit different on the PPC970 compared to later
400 * processors such as POWER7; the large page bit is in the instruction
401 * not RB, and the top 16 bits and the bottom 12 bits of the VA
402 * in RB must be 0.
403 */
404static void do_tlbies_970(struct kvm *kvm, unsigned long *rbvalues,
405 long npages, int global, bool need_sync)
406{
407 long i;
408
409 if (global) {
410 while (!try_lock_tlbie(&kvm->arch.tlbie_lock))
411 cpu_relax();
412 if (need_sync)
413 asm volatile("ptesync" : : : "memory");
414 for (i = 0; i < npages; ++i) {
415 unsigned long rb = rbvalues[i];
416
417 if (rb & 1) /* large page */
418 asm volatile("tlbie %0,1" : :
419 "r" (rb & 0x0000fffffffff000ul));
420 else
421 asm volatile("tlbie %0,0" : :
422 "r" (rb & 0x0000fffffffff000ul));
423 }
424 asm volatile("eieio; tlbsync; ptesync" : : : "memory");
425 kvm->arch.tlbie_lock = 0;
426 } else {
427 if (need_sync)
428 asm volatile("ptesync" : : : "memory");
429 for (i = 0; i < npages; ++i) {
430 unsigned long rb = rbvalues[i];
431
432 if (rb & 1) /* large page */
433 asm volatile("tlbiel %0,1" : :
434 "r" (rb & 0x0000fffffffff000ul));
435 else
436 asm volatile("tlbiel %0,0" : :
437 "r" (rb & 0x0000fffffffff000ul));
438 }
439 asm volatile("ptesync" : : : "memory");
440 }
441}
442
443static void do_tlbies(struct kvm *kvm, unsigned long *rbvalues, 373static void do_tlbies(struct kvm *kvm, unsigned long *rbvalues,
444 long npages, int global, bool need_sync) 374 long npages, int global, bool need_sync)
445{ 375{
446 long i; 376 long i;
447 377
448 if (cpu_has_feature(CPU_FTR_ARCH_201)) {
449 /* PPC970 tlbie instruction is a bit different */
450 do_tlbies_970(kvm, rbvalues, npages, global, need_sync);
451 return;
452 }
453 if (global) { 378 if (global) {
454 while (!try_lock_tlbie(&kvm->arch.tlbie_lock)) 379 while (!try_lock_tlbie(&kvm->arch.tlbie_lock))
455 cpu_relax(); 380 cpu_relax();
@@ -667,40 +592,29 @@ long kvmppc_h_protect(struct kvm_vcpu *vcpu, unsigned long flags,
667 rev->guest_rpte = r; 592 rev->guest_rpte = r;
668 note_hpte_modification(kvm, rev); 593 note_hpte_modification(kvm, rev);
669 } 594 }
670 r = (be64_to_cpu(hpte[1]) & ~mask) | bits;
671 595
672 /* Update HPTE */ 596 /* Update HPTE */
673 if (v & HPTE_V_VALID) { 597 if (v & HPTE_V_VALID) {
674 rb = compute_tlbie_rb(v, r, pte_index);
675 hpte[0] = cpu_to_be64(v & ~HPTE_V_VALID);
676 do_tlbies(kvm, &rb, 1, global_invalidates(kvm, flags), true);
677 /* 598 /*
678 * If the host has this page as readonly but the guest 599 * If the page is valid, don't let it transition from
679 * wants to make it read/write, reduce the permissions. 600 * readonly to writable. If it should be writable, we'll
680 * Checking the host permissions involves finding the 601 * take a trap and let the page fault code sort it out.
681 * memslot and then the Linux PTE for the page.
682 */ 602 */
683 if (hpte_is_writable(r) && kvm->arch.using_mmu_notifiers) { 603 pte = be64_to_cpu(hpte[1]);
684 unsigned long psize, gfn, hva; 604 r = (pte & ~mask) | bits;
685 struct kvm_memory_slot *memslot; 605 if (hpte_is_writable(r) && !hpte_is_writable(pte))
686 pgd_t *pgdir = vcpu->arch.pgdir; 606 r = hpte_make_readonly(r);
687 pte_t pte; 607 /* If the PTE is changing, invalidate it first */
688 608 if (r != pte) {
689 psize = hpte_page_size(v, r); 609 rb = compute_tlbie_rb(v, r, pte_index);
690 gfn = ((r & HPTE_R_RPN) & ~(psize - 1)) >> PAGE_SHIFT; 610 hpte[0] = cpu_to_be64((v & ~HPTE_V_VALID) |
691 memslot = __gfn_to_memslot(kvm_memslots_raw(kvm), gfn); 611 HPTE_V_ABSENT);
692 if (memslot) { 612 do_tlbies(kvm, &rb, 1, global_invalidates(kvm, flags),
693 hva = __gfn_to_hva_memslot(memslot, gfn); 613 true);
694 pte = lookup_linux_pte_and_update(pgdir, hva, 614 hpte[1] = cpu_to_be64(r);
695 1, &psize);
696 if (pte_present(pte) && !pte_write(pte))
697 r = hpte_make_readonly(r);
698 }
699 } 615 }
700 } 616 }
701 hpte[1] = cpu_to_be64(r); 617 unlock_hpte(hpte, v & ~HPTE_V_HVLOCK);
702 eieio();
703 hpte[0] = cpu_to_be64(v & ~HPTE_V_HVLOCK);
704 asm volatile("ptesync" : : : "memory"); 618 asm volatile("ptesync" : : : "memory");
705 return H_SUCCESS; 619 return H_SUCCESS;
706} 620}
diff --git a/arch/powerpc/kvm/book3s_hv_rm_xics.c b/arch/powerpc/kvm/book3s_hv_rm_xics.c
index 3ee38e6e884f..7b066f6b02ad 100644
--- a/arch/powerpc/kvm/book3s_hv_rm_xics.c
+++ b/arch/powerpc/kvm/book3s_hv_rm_xics.c
@@ -183,8 +183,10 @@ static void icp_rm_down_cppr(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
183 * state update in HW (ie bus transactions) so we can handle them 183 * state update in HW (ie bus transactions) so we can handle them
184 * separately here as well. 184 * separately here as well.
185 */ 185 */
186 if (resend) 186 if (resend) {
187 icp->rm_action |= XICS_RM_CHECK_RESEND; 187 icp->rm_action |= XICS_RM_CHECK_RESEND;
188 icp->rm_resend_icp = icp;
189 }
188} 190}
189 191
190 192
@@ -254,10 +256,25 @@ int kvmppc_rm_h_ipi(struct kvm_vcpu *vcpu, unsigned long server,
254 * nothing needs to be done as there can be no XISR to 256 * nothing needs to be done as there can be no XISR to
255 * reject. 257 * reject.
256 * 258 *
259 * ICP state: Check_IPI
260 *
257 * If the CPPR is less favored, then we might be replacing 261 * If the CPPR is less favored, then we might be replacing
258 * an interrupt, and thus need to possibly reject it as in 262 * an interrupt, and thus need to possibly reject it.
259 * 263 *
260 * ICP state: Check_IPI 264 * ICP State: IPI
265 *
266 * Besides rejecting any pending interrupts, we also
267 * update XISR and pending_pri to mark IPI as pending.
268 *
269 * PAPR does not describe this state, but if the MFRR is being
270 * made less favored than its earlier value, there might be
271 * a previously-rejected interrupt needing to be resent.
272 * Ideally, we would want to resend only if
273 * prio(pending_interrupt) < mfrr &&
274 * prio(pending_interrupt) < cppr
275 * where pending interrupt is the one that was rejected. But
276 * we don't have that state, so we simply trigger a resend
277 * whenever the MFRR is made less favored.
261 */ 278 */
262 do { 279 do {
263 old_state = new_state = ACCESS_ONCE(icp->state); 280 old_state = new_state = ACCESS_ONCE(icp->state);
@@ -270,13 +287,14 @@ int kvmppc_rm_h_ipi(struct kvm_vcpu *vcpu, unsigned long server,
270 resend = false; 287 resend = false;
271 if (mfrr < new_state.cppr) { 288 if (mfrr < new_state.cppr) {
272 /* Reject a pending interrupt if not an IPI */ 289 /* Reject a pending interrupt if not an IPI */
273 if (mfrr <= new_state.pending_pri) 290 if (mfrr <= new_state.pending_pri) {
274 reject = new_state.xisr; 291 reject = new_state.xisr;
275 new_state.pending_pri = mfrr; 292 new_state.pending_pri = mfrr;
276 new_state.xisr = XICS_IPI; 293 new_state.xisr = XICS_IPI;
294 }
277 } 295 }
278 296
279 if (mfrr > old_state.mfrr && mfrr > new_state.cppr) { 297 if (mfrr > old_state.mfrr) {
280 resend = new_state.need_resend; 298 resend = new_state.need_resend;
281 new_state.need_resend = 0; 299 new_state.need_resend = 0;
282 } 300 }
@@ -289,8 +307,10 @@ int kvmppc_rm_h_ipi(struct kvm_vcpu *vcpu, unsigned long server,
289 } 307 }
290 308
291 /* Pass resends to virtual mode */ 309 /* Pass resends to virtual mode */
292 if (resend) 310 if (resend) {
293 this_icp->rm_action |= XICS_RM_CHECK_RESEND; 311 this_icp->rm_action |= XICS_RM_CHECK_RESEND;
312 this_icp->rm_resend_icp = icp;
313 }
294 314
295 return check_too_hard(xics, this_icp); 315 return check_too_hard(xics, this_icp);
296} 316}
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 65c105b17a25..10554df13852 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -94,20 +94,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_PMAO_BUG)
94 lwz r6, HSTATE_PMC + 12(r13) 94 lwz r6, HSTATE_PMC + 12(r13)
95 lwz r8, HSTATE_PMC + 16(r13) 95 lwz r8, HSTATE_PMC + 16(r13)
96 lwz r9, HSTATE_PMC + 20(r13) 96 lwz r9, HSTATE_PMC + 20(r13)
97BEGIN_FTR_SECTION
98 lwz r10, HSTATE_PMC + 24(r13)
99 lwz r11, HSTATE_PMC + 28(r13)
100END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
101 mtspr SPRN_PMC1, r3 97 mtspr SPRN_PMC1, r3
102 mtspr SPRN_PMC2, r4 98 mtspr SPRN_PMC2, r4
103 mtspr SPRN_PMC3, r5 99 mtspr SPRN_PMC3, r5
104 mtspr SPRN_PMC4, r6 100 mtspr SPRN_PMC4, r6
105 mtspr SPRN_PMC5, r8 101 mtspr SPRN_PMC5, r8
106 mtspr SPRN_PMC6, r9 102 mtspr SPRN_PMC6, r9
107BEGIN_FTR_SECTION
108 mtspr SPRN_PMC7, r10
109 mtspr SPRN_PMC8, r11
110END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
111 ld r3, HSTATE_MMCR(r13) 103 ld r3, HSTATE_MMCR(r13)
112 ld r4, HSTATE_MMCR + 8(r13) 104 ld r4, HSTATE_MMCR + 8(r13)
113 ld r5, HSTATE_MMCR + 16(r13) 105 ld r5, HSTATE_MMCR + 16(r13)
@@ -153,11 +145,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
153 145
154 cmpwi cr1, r12, BOOK3S_INTERRUPT_MACHINE_CHECK 146 cmpwi cr1, r12, BOOK3S_INTERRUPT_MACHINE_CHECK
155 cmpwi r12, BOOK3S_INTERRUPT_EXTERNAL 147 cmpwi r12, BOOK3S_INTERRUPT_EXTERNAL
156BEGIN_FTR_SECTION
157 beq 11f 148 beq 11f
158 cmpwi cr2, r12, BOOK3S_INTERRUPT_HMI 149 cmpwi cr2, r12, BOOK3S_INTERRUPT_HMI
159 beq cr2, 14f /* HMI check */ 150 beq cr2, 14f /* HMI check */
160END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
161 151
162 /* RFI into the highmem handler, or branch to interrupt handler */ 152 /* RFI into the highmem handler, or branch to interrupt handler */
163 mfmsr r6 153 mfmsr r6
@@ -166,7 +156,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
166 mtmsrd r6, 1 /* Clear RI in MSR */ 156 mtmsrd r6, 1 /* Clear RI in MSR */
167 mtsrr0 r8 157 mtsrr0 r8
168 mtsrr1 r7 158 mtsrr1 r7
169 beqa 0x500 /* external interrupt (PPC970) */
170 beq cr1, 13f /* machine check */ 159 beq cr1, 13f /* machine check */
171 RFI 160 RFI
172 161
@@ -393,11 +382,8 @@ kvmppc_hv_entry:
393 slbia 382 slbia
394 ptesync 383 ptesync
395 384
396BEGIN_FTR_SECTION
397 b 30f
398END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
399 /* 385 /*
400 * POWER7 host -> guest partition switch code. 386 * POWER7/POWER8 host -> guest partition switch code.
401 * We don't have to lock against concurrent tlbies, 387 * We don't have to lock against concurrent tlbies,
402 * but we do have to coordinate across hardware threads. 388 * but we do have to coordinate across hardware threads.
403 */ 389 */
@@ -505,97 +491,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
505 cmpwi r3,512 /* 1 microsecond */ 491 cmpwi r3,512 /* 1 microsecond */
506 li r12,BOOK3S_INTERRUPT_HV_DECREMENTER 492 li r12,BOOK3S_INTERRUPT_HV_DECREMENTER
507 blt hdec_soon 493 blt hdec_soon
508 b 31f
509
510 /*
511 * PPC970 host -> guest partition switch code.
512 * We have to lock against concurrent tlbies,
513 * using native_tlbie_lock to lock against host tlbies
514 * and kvm->arch.tlbie_lock to lock against guest tlbies.
515 * We also have to invalidate the TLB since its
516 * entries aren't tagged with the LPID.
517 */
51830: ld r5,HSTATE_KVM_VCORE(r13)
519 ld r9,VCORE_KVM(r5) /* pointer to struct kvm */
520
521 /* first take native_tlbie_lock */
522 .section ".toc","aw"
523toc_tlbie_lock:
524 .tc native_tlbie_lock[TC],native_tlbie_lock
525 .previous
526 ld r3,toc_tlbie_lock@toc(r2)
527#ifdef __BIG_ENDIAN__
528 lwz r8,PACA_LOCK_TOKEN(r13)
529#else
530 lwz r8,PACAPACAINDEX(r13)
531#endif
53224: lwarx r0,0,r3
533 cmpwi r0,0
534 bne 24b
535 stwcx. r8,0,r3
536 bne 24b
537 isync
538
539 ld r5,HSTATE_KVM_VCORE(r13)
540 ld r7,VCORE_LPCR(r5) /* use vcore->lpcr to store HID4 */
541 li r0,0x18f
542 rotldi r0,r0,HID4_LPID5_SH /* all lpid bits in HID4 = 1 */
543 or r0,r7,r0
544 ptesync
545 sync
546 mtspr SPRN_HID4,r0 /* switch to reserved LPID */
547 isync
548 li r0,0
549 stw r0,0(r3) /* drop native_tlbie_lock */
550
551 /* invalidate the whole TLB */
552 li r0,256
553 mtctr r0
554 li r6,0
55525: tlbiel r6
556 addi r6,r6,0x1000
557 bdnz 25b
558 ptesync
559 494
560 /* Take the guest's tlbie_lock */
561 addi r3,r9,KVM_TLBIE_LOCK
56224: lwarx r0,0,r3
563 cmpwi r0,0
564 bne 24b
565 stwcx. r8,0,r3
566 bne 24b
567 isync
568 ld r6,KVM_SDR1(r9)
569 mtspr SPRN_SDR1,r6 /* switch to partition page table */
570
571 /* Set up HID4 with the guest's LPID etc. */
572 sync
573 mtspr SPRN_HID4,r7
574 isync
575
576 /* drop the guest's tlbie_lock */
577 li r0,0
578 stw r0,0(r3)
579
580 /* Check if HDEC expires soon */
581 mfspr r3,SPRN_HDEC
582 cmpwi r3,10
583 li r12,BOOK3S_INTERRUPT_HV_DECREMENTER
584 blt hdec_soon
585
586 /* Enable HDEC interrupts */
587 mfspr r0,SPRN_HID0
588 li r3,1
589 rldimi r0,r3, HID0_HDICE_SH, 64-HID0_HDICE_SH-1
590 sync
591 mtspr SPRN_HID0,r0
592 mfspr r0,SPRN_HID0
593 mfspr r0,SPRN_HID0
594 mfspr r0,SPRN_HID0
595 mfspr r0,SPRN_HID0
596 mfspr r0,SPRN_HID0
597 mfspr r0,SPRN_HID0
59831:
599 /* Do we have a guest vcpu to run? */ 495 /* Do we have a guest vcpu to run? */
600 cmpdi r4, 0 496 cmpdi r4, 0
601 beq kvmppc_primary_no_guest 497 beq kvmppc_primary_no_guest
@@ -625,7 +521,6 @@ kvmppc_got_guest:
625 stb r6, VCPU_VPA_DIRTY(r4) 521 stb r6, VCPU_VPA_DIRTY(r4)
62625: 52225:
627 523
628BEGIN_FTR_SECTION
629 /* Save purr/spurr */ 524 /* Save purr/spurr */
630 mfspr r5,SPRN_PURR 525 mfspr r5,SPRN_PURR
631 mfspr r6,SPRN_SPURR 526 mfspr r6,SPRN_SPURR
@@ -635,7 +530,6 @@ BEGIN_FTR_SECTION
635 ld r8,VCPU_SPURR(r4) 530 ld r8,VCPU_SPURR(r4)
636 mtspr SPRN_PURR,r7 531 mtspr SPRN_PURR,r7
637 mtspr SPRN_SPURR,r8 532 mtspr SPRN_SPURR,r8
638END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
639 533
640BEGIN_FTR_SECTION 534BEGIN_FTR_SECTION
641 /* Set partition DABR */ 535 /* Set partition DABR */
@@ -644,9 +538,7 @@ BEGIN_FTR_SECTION
644 ld r6,VCPU_DABR(r4) 538 ld r6,VCPU_DABR(r4)
645 mtspr SPRN_DABRX,r5 539 mtspr SPRN_DABRX,r5
646 mtspr SPRN_DABR,r6 540 mtspr SPRN_DABR,r6
647 BEGIN_FTR_SECTION_NESTED(89)
648 isync 541 isync
649 END_FTR_SECTION_NESTED(CPU_FTR_ARCH_206, CPU_FTR_ARCH_206, 89)
650END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) 542END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
651 543
652#ifdef CONFIG_PPC_TRANSACTIONAL_MEM 544#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
@@ -777,20 +669,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_PMAO_BUG)
777 lwz r7, VCPU_PMC + 12(r4) 669 lwz r7, VCPU_PMC + 12(r4)
778 lwz r8, VCPU_PMC + 16(r4) 670 lwz r8, VCPU_PMC + 16(r4)
779 lwz r9, VCPU_PMC + 20(r4) 671 lwz r9, VCPU_PMC + 20(r4)
780BEGIN_FTR_SECTION
781 lwz r10, VCPU_PMC + 24(r4)
782 lwz r11, VCPU_PMC + 28(r4)
783END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
784 mtspr SPRN_PMC1, r3 672 mtspr SPRN_PMC1, r3
785 mtspr SPRN_PMC2, r5 673 mtspr SPRN_PMC2, r5
786 mtspr SPRN_PMC3, r6 674 mtspr SPRN_PMC3, r6
787 mtspr SPRN_PMC4, r7 675 mtspr SPRN_PMC4, r7
788 mtspr SPRN_PMC5, r8 676 mtspr SPRN_PMC5, r8
789 mtspr SPRN_PMC6, r9 677 mtspr SPRN_PMC6, r9
790BEGIN_FTR_SECTION
791 mtspr SPRN_PMC7, r10
792 mtspr SPRN_PMC8, r11
793END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
794 ld r3, VCPU_MMCR(r4) 678 ld r3, VCPU_MMCR(r4)
795 ld r5, VCPU_MMCR + 8(r4) 679 ld r5, VCPU_MMCR + 8(r4)
796 ld r6, VCPU_MMCR + 16(r4) 680 ld r6, VCPU_MMCR + 16(r4)
@@ -837,14 +721,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
837 ld r30, VCPU_GPR(R30)(r4) 721 ld r30, VCPU_GPR(R30)(r4)
838 ld r31, VCPU_GPR(R31)(r4) 722 ld r31, VCPU_GPR(R31)(r4)
839 723
840BEGIN_FTR_SECTION
841 /* Switch DSCR to guest value */ 724 /* Switch DSCR to guest value */
842 ld r5, VCPU_DSCR(r4) 725 ld r5, VCPU_DSCR(r4)
843 mtspr SPRN_DSCR, r5 726 mtspr SPRN_DSCR, r5
844END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
845 727
846BEGIN_FTR_SECTION 728BEGIN_FTR_SECTION
847 /* Skip next section on POWER7 or PPC970 */ 729 /* Skip next section on POWER7 */
848 b 8f 730 b 8f
849END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S) 731END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
850 /* Turn on TM so we can access TFHAR/TFIAR/TEXASR */ 732 /* Turn on TM so we can access TFHAR/TFIAR/TEXASR */
@@ -920,7 +802,6 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
920 mtspr SPRN_DAR, r5 802 mtspr SPRN_DAR, r5
921 mtspr SPRN_DSISR, r6 803 mtspr SPRN_DSISR, r6
922 804
923BEGIN_FTR_SECTION
924 /* Restore AMR and UAMOR, set AMOR to all 1s */ 805 /* Restore AMR and UAMOR, set AMOR to all 1s */
925 ld r5,VCPU_AMR(r4) 806 ld r5,VCPU_AMR(r4)
926 ld r6,VCPU_UAMOR(r4) 807 ld r6,VCPU_UAMOR(r4)
@@ -928,7 +809,6 @@ BEGIN_FTR_SECTION
928 mtspr SPRN_AMR,r5 809 mtspr SPRN_AMR,r5
929 mtspr SPRN_UAMOR,r6 810 mtspr SPRN_UAMOR,r6
930 mtspr SPRN_AMOR,r7 811 mtspr SPRN_AMOR,r7
931END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
932 812
933 /* Restore state of CTRL run bit; assume 1 on entry */ 813 /* Restore state of CTRL run bit; assume 1 on entry */
934 lwz r5,VCPU_CTRL(r4) 814 lwz r5,VCPU_CTRL(r4)
@@ -963,13 +843,11 @@ deliver_guest_interrupt:
963 rldicl r0, r0, 64 - BOOK3S_IRQPRIO_EXTERNAL_LEVEL, 63 843 rldicl r0, r0, 64 - BOOK3S_IRQPRIO_EXTERNAL_LEVEL, 63
964 cmpdi cr1, r0, 0 844 cmpdi cr1, r0, 0
965 andi. r8, r11, MSR_EE 845 andi. r8, r11, MSR_EE
966BEGIN_FTR_SECTION
967 mfspr r8, SPRN_LPCR 846 mfspr r8, SPRN_LPCR
968 /* Insert EXTERNAL_LEVEL bit into LPCR at the MER bit position */ 847 /* Insert EXTERNAL_LEVEL bit into LPCR at the MER bit position */
969 rldimi r8, r0, LPCR_MER_SH, 63 - LPCR_MER_SH 848 rldimi r8, r0, LPCR_MER_SH, 63 - LPCR_MER_SH
970 mtspr SPRN_LPCR, r8 849 mtspr SPRN_LPCR, r8
971 isync 850 isync
972END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
973 beq 5f 851 beq 5f
974 li r0, BOOK3S_INTERRUPT_EXTERNAL 852 li r0, BOOK3S_INTERRUPT_EXTERNAL
975 bne cr1, 12f 853 bne cr1, 12f
@@ -1124,15 +1002,13 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
1124 1002
1125 stw r12,VCPU_TRAP(r9) 1003 stw r12,VCPU_TRAP(r9)
1126 1004
1127 /* Save HEIR (HV emulation assist reg) in last_inst 1005 /* Save HEIR (HV emulation assist reg) in emul_inst
1128 if this is an HEI (HV emulation interrupt, e40) */ 1006 if this is an HEI (HV emulation interrupt, e40) */
1129 li r3,KVM_INST_FETCH_FAILED 1007 li r3,KVM_INST_FETCH_FAILED
1130BEGIN_FTR_SECTION
1131 cmpwi r12,BOOK3S_INTERRUPT_H_EMUL_ASSIST 1008 cmpwi r12,BOOK3S_INTERRUPT_H_EMUL_ASSIST
1132 bne 11f 1009 bne 11f
1133 mfspr r3,SPRN_HEIR 1010 mfspr r3,SPRN_HEIR
1134END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206) 101111: stw r3,VCPU_HEIR(r9)
113511: stw r3,VCPU_LAST_INST(r9)
1136 1012
1137 /* these are volatile across C function calls */ 1013 /* these are volatile across C function calls */
1138 mfctr r3 1014 mfctr r3
@@ -1140,13 +1016,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
1140 std r3, VCPU_CTR(r9) 1016 std r3, VCPU_CTR(r9)
1141 stw r4, VCPU_XER(r9) 1017 stw r4, VCPU_XER(r9)
1142 1018
1143BEGIN_FTR_SECTION
1144 /* If this is a page table miss then see if it's theirs or ours */ 1019 /* If this is a page table miss then see if it's theirs or ours */
1145 cmpwi r12, BOOK3S_INTERRUPT_H_DATA_STORAGE 1020 cmpwi r12, BOOK3S_INTERRUPT_H_DATA_STORAGE
1146 beq kvmppc_hdsi 1021 beq kvmppc_hdsi
1147 cmpwi r12, BOOK3S_INTERRUPT_H_INST_STORAGE 1022 cmpwi r12, BOOK3S_INTERRUPT_H_INST_STORAGE
1148 beq kvmppc_hisi 1023 beq kvmppc_hisi
1149END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
1150 1024
1151 /* See if this is a leftover HDEC interrupt */ 1025 /* See if this is a leftover HDEC interrupt */
1152 cmpwi r12,BOOK3S_INTERRUPT_HV_DECREMENTER 1026 cmpwi r12,BOOK3S_INTERRUPT_HV_DECREMENTER
@@ -1159,11 +1033,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
1159 cmpwi r12,BOOK3S_INTERRUPT_SYSCALL 1033 cmpwi r12,BOOK3S_INTERRUPT_SYSCALL
1160 beq hcall_try_real_mode 1034 beq hcall_try_real_mode
1161 1035
1162 /* Only handle external interrupts here on arch 206 and later */
1163BEGIN_FTR_SECTION
1164 b ext_interrupt_to_host
1165END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
1166
1167 /* External interrupt ? */ 1036 /* External interrupt ? */
1168 cmpwi r12, BOOK3S_INTERRUPT_EXTERNAL 1037 cmpwi r12, BOOK3S_INTERRUPT_EXTERNAL
1169 bne+ ext_interrupt_to_host 1038 bne+ ext_interrupt_to_host
@@ -1193,11 +1062,9 @@ guest_exit_cont: /* r9 = vcpu, r12 = trap, r13 = paca */
1193 mfdsisr r7 1062 mfdsisr r7
1194 std r6, VCPU_DAR(r9) 1063 std r6, VCPU_DAR(r9)
1195 stw r7, VCPU_DSISR(r9) 1064 stw r7, VCPU_DSISR(r9)
1196BEGIN_FTR_SECTION
1197 /* don't overwrite fault_dar/fault_dsisr if HDSI */ 1065 /* don't overwrite fault_dar/fault_dsisr if HDSI */
1198 cmpwi r12,BOOK3S_INTERRUPT_H_DATA_STORAGE 1066 cmpwi r12,BOOK3S_INTERRUPT_H_DATA_STORAGE
1199 beq 6f 1067 beq 6f
1200END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
1201 std r6, VCPU_FAULT_DAR(r9) 1068 std r6, VCPU_FAULT_DAR(r9)
1202 stw r7, VCPU_FAULT_DSISR(r9) 1069 stw r7, VCPU_FAULT_DSISR(r9)
1203 1070
@@ -1236,7 +1103,6 @@ mc_cont:
1236 /* 1103 /*
1237 * Save the guest PURR/SPURR 1104 * Save the guest PURR/SPURR
1238 */ 1105 */
1239BEGIN_FTR_SECTION
1240 mfspr r5,SPRN_PURR 1106 mfspr r5,SPRN_PURR
1241 mfspr r6,SPRN_SPURR 1107 mfspr r6,SPRN_SPURR
1242 ld r7,VCPU_PURR(r9) 1108 ld r7,VCPU_PURR(r9)
@@ -1256,7 +1122,6 @@ BEGIN_FTR_SECTION
1256 add r4,r4,r6 1122 add r4,r4,r6
1257 mtspr SPRN_PURR,r3 1123 mtspr SPRN_PURR,r3
1258 mtspr SPRN_SPURR,r4 1124 mtspr SPRN_SPURR,r4
1259END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_201)
1260 1125
1261 /* Save DEC */ 1126 /* Save DEC */
1262 mfspr r5,SPRN_DEC 1127 mfspr r5,SPRN_DEC
@@ -1306,22 +1171,18 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
13068: 11718:
1307 1172
1308 /* Save and reset AMR and UAMOR before turning on the MMU */ 1173 /* Save and reset AMR and UAMOR before turning on the MMU */
1309BEGIN_FTR_SECTION
1310 mfspr r5,SPRN_AMR 1174 mfspr r5,SPRN_AMR
1311 mfspr r6,SPRN_UAMOR 1175 mfspr r6,SPRN_UAMOR
1312 std r5,VCPU_AMR(r9) 1176 std r5,VCPU_AMR(r9)
1313 std r6,VCPU_UAMOR(r9) 1177 std r6,VCPU_UAMOR(r9)
1314 li r6,0 1178 li r6,0
1315 mtspr SPRN_AMR,r6 1179 mtspr SPRN_AMR,r6
1316END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
1317 1180
1318 /* Switch DSCR back to host value */ 1181 /* Switch DSCR back to host value */
1319BEGIN_FTR_SECTION
1320 mfspr r8, SPRN_DSCR 1182 mfspr r8, SPRN_DSCR
1321 ld r7, HSTATE_DSCR(r13) 1183 ld r7, HSTATE_DSCR(r13)
1322 std r8, VCPU_DSCR(r9) 1184 std r8, VCPU_DSCR(r9)
1323 mtspr SPRN_DSCR, r7 1185 mtspr SPRN_DSCR, r7
1324END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
1325 1186
1326 /* Save non-volatile GPRs */ 1187 /* Save non-volatile GPRs */
1327 std r14, VCPU_GPR(R14)(r9) 1188 std r14, VCPU_GPR(R14)(r9)
@@ -1503,11 +1364,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
1503 mfspr r4, SPRN_MMCR0 /* save MMCR0 */ 1364 mfspr r4, SPRN_MMCR0 /* save MMCR0 */
1504 mtspr SPRN_MMCR0, r3 /* freeze all counters, disable ints */ 1365 mtspr SPRN_MMCR0, r3 /* freeze all counters, disable ints */
1505 mfspr r6, SPRN_MMCRA 1366 mfspr r6, SPRN_MMCRA
1506BEGIN_FTR_SECTION 1367 /* Clear MMCRA in order to disable SDAR updates */
1507 /* On P7, clear MMCRA in order to disable SDAR updates */
1508 li r7, 0 1368 li r7, 0
1509 mtspr SPRN_MMCRA, r7 1369 mtspr SPRN_MMCRA, r7
1510END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
1511 isync 1370 isync
1512 beq 21f /* if no VPA, save PMU stuff anyway */ 1371 beq 21f /* if no VPA, save PMU stuff anyway */
1513 lbz r7, LPPACA_PMCINUSE(r8) 1372 lbz r7, LPPACA_PMCINUSE(r8)
@@ -1532,10 +1391,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
1532 mfspr r6, SPRN_PMC4 1391 mfspr r6, SPRN_PMC4
1533 mfspr r7, SPRN_PMC5 1392 mfspr r7, SPRN_PMC5
1534 mfspr r8, SPRN_PMC6 1393 mfspr r8, SPRN_PMC6
1535BEGIN_FTR_SECTION
1536 mfspr r10, SPRN_PMC7
1537 mfspr r11, SPRN_PMC8
1538END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
1539 stw r3, VCPU_PMC(r9) 1394 stw r3, VCPU_PMC(r9)
1540 stw r4, VCPU_PMC + 4(r9) 1395 stw r4, VCPU_PMC + 4(r9)
1541 stw r5, VCPU_PMC + 8(r9) 1396 stw r5, VCPU_PMC + 8(r9)
@@ -1543,10 +1398,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
1543 stw r7, VCPU_PMC + 16(r9) 1398 stw r7, VCPU_PMC + 16(r9)
1544 stw r8, VCPU_PMC + 20(r9) 1399 stw r8, VCPU_PMC + 20(r9)
1545BEGIN_FTR_SECTION 1400BEGIN_FTR_SECTION
1546 stw r10, VCPU_PMC + 24(r9)
1547 stw r11, VCPU_PMC + 28(r9)
1548END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
1549BEGIN_FTR_SECTION
1550 mfspr r5, SPRN_SIER 1401 mfspr r5, SPRN_SIER
1551 mfspr r6, SPRN_SPMC1 1402 mfspr r6, SPRN_SPMC1
1552 mfspr r7, SPRN_SPMC2 1403 mfspr r7, SPRN_SPMC2
@@ -1566,11 +1417,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
1566 ptesync 1417 ptesync
1567 1418
1568hdec_soon: /* r12 = trap, r13 = paca */ 1419hdec_soon: /* r12 = trap, r13 = paca */
1569BEGIN_FTR_SECTION
1570 b 32f
1571END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
1572 /* 1420 /*
1573 * POWER7 guest -> host partition switch code. 1421 * POWER7/POWER8 guest -> host partition switch code.
1574 * We don't have to lock against tlbies but we do 1422 * We don't have to lock against tlbies but we do
1575 * have to coordinate the hardware threads. 1423 * have to coordinate the hardware threads.
1576 */ 1424 */
@@ -1698,87 +1546,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
169816: ld r8,KVM_HOST_LPCR(r4) 154616: ld r8,KVM_HOST_LPCR(r4)
1699 mtspr SPRN_LPCR,r8 1547 mtspr SPRN_LPCR,r8
1700 isync 1548 isync
1701 b 33f
1702
1703 /*
1704 * PPC970 guest -> host partition switch code.
1705 * We have to lock against concurrent tlbies, and
1706 * we have to flush the whole TLB.
1707 */
170832: ld r5,HSTATE_KVM_VCORE(r13)
1709 ld r4,VCORE_KVM(r5) /* pointer to struct kvm */
1710
1711 /* Take the guest's tlbie_lock */
1712#ifdef __BIG_ENDIAN__
1713 lwz r8,PACA_LOCK_TOKEN(r13)
1714#else
1715 lwz r8,PACAPACAINDEX(r13)
1716#endif
1717 addi r3,r4,KVM_TLBIE_LOCK
171824: lwarx r0,0,r3
1719 cmpwi r0,0
1720 bne 24b
1721 stwcx. r8,0,r3
1722 bne 24b
1723 isync
1724
1725 ld r7,KVM_HOST_LPCR(r4) /* use kvm->arch.host_lpcr for HID4 */
1726 li r0,0x18f
1727 rotldi r0,r0,HID4_LPID5_SH /* all lpid bits in HID4 = 1 */
1728 or r0,r7,r0
1729 ptesync
1730 sync
1731 mtspr SPRN_HID4,r0 /* switch to reserved LPID */
1732 isync
1733 li r0,0
1734 stw r0,0(r3) /* drop guest tlbie_lock */
1735
1736 /* invalidate the whole TLB */
1737 li r0,256
1738 mtctr r0
1739 li r6,0
174025: tlbiel r6
1741 addi r6,r6,0x1000
1742 bdnz 25b
1743 ptesync
1744
1745 /* take native_tlbie_lock */
1746 ld r3,toc_tlbie_lock@toc(2)
174724: lwarx r0,0,r3
1748 cmpwi r0,0
1749 bne 24b
1750 stwcx. r8,0,r3
1751 bne 24b
1752 isync
1753
1754 ld r6,KVM_HOST_SDR1(r4)
1755 mtspr SPRN_SDR1,r6 /* switch to host page table */
1756
1757 /* Set up host HID4 value */
1758 sync
1759 mtspr SPRN_HID4,r7
1760 isync
1761 li r0,0
1762 stw r0,0(r3) /* drop native_tlbie_lock */
1763
1764 lis r8,0x7fff /* MAX_INT@h */
1765 mtspr SPRN_HDEC,r8
1766
1767 /* Disable HDEC interrupts */
1768 mfspr r0,SPRN_HID0
1769 li r3,0
1770 rldimi r0,r3, HID0_HDICE_SH, 64-HID0_HDICE_SH-1
1771 sync
1772 mtspr SPRN_HID0,r0
1773 mfspr r0,SPRN_HID0
1774 mfspr r0,SPRN_HID0
1775 mfspr r0,SPRN_HID0
1776 mfspr r0,SPRN_HID0
1777 mfspr r0,SPRN_HID0
1778 mfspr r0,SPRN_HID0
1779 1549
1780 /* load host SLB entries */ 1550 /* load host SLB entries */
178133: ld r8,PACA_SLBSHADOWPTR(r13) 1551 ld r8,PACA_SLBSHADOWPTR(r13)
1782 1552
1783 .rept SLB_NUM_BOLTED 1553 .rept SLB_NUM_BOLTED
1784 li r3, SLBSHADOW_SAVEAREA 1554 li r3, SLBSHADOW_SAVEAREA
@@ -2047,7 +1817,7 @@ hcall_real_table:
2047 .long 0 /* 0xd8 */ 1817 .long 0 /* 0xd8 */
2048 .long 0 /* 0xdc */ 1818 .long 0 /* 0xdc */
2049 .long DOTSYM(kvmppc_h_cede) - hcall_real_table 1819 .long DOTSYM(kvmppc_h_cede) - hcall_real_table
2050 .long 0 /* 0xe4 */ 1820 .long DOTSYM(kvmppc_rm_h_confer) - hcall_real_table
2051 .long 0 /* 0xe8 */ 1821 .long 0 /* 0xe8 */
2052 .long 0 /* 0xec */ 1822 .long 0 /* 0xec */
2053 .long 0 /* 0xf0 */ 1823 .long 0 /* 0xf0 */
@@ -2126,9 +1896,6 @@ _GLOBAL(kvmppc_h_cede)
2126 stw r0,VCPU_TRAP(r3) 1896 stw r0,VCPU_TRAP(r3)
2127 li r0,H_SUCCESS 1897 li r0,H_SUCCESS
2128 std r0,VCPU_GPR(R3)(r3) 1898 std r0,VCPU_GPR(R3)(r3)
2129BEGIN_FTR_SECTION
2130 b kvm_cede_exit /* just send it up to host on 970 */
2131END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
2132 1899
2133 /* 1900 /*
2134 * Set our bit in the bitmask of napping threads unless all the 1901 * Set our bit in the bitmask of napping threads unless all the
@@ -2455,7 +2222,6 @@ BEGIN_FTR_SECTION
2455END_FTR_SECTION_IFSET(CPU_FTR_VSX) 2222END_FTR_SECTION_IFSET(CPU_FTR_VSX)
2456#endif 2223#endif
2457 mtmsrd r8 2224 mtmsrd r8
2458 isync
2459 addi r3,r3,VCPU_FPRS 2225 addi r3,r3,VCPU_FPRS
2460 bl store_fp_state 2226 bl store_fp_state
2461#ifdef CONFIG_ALTIVEC 2227#ifdef CONFIG_ALTIVEC
@@ -2491,7 +2257,6 @@ BEGIN_FTR_SECTION
2491END_FTR_SECTION_IFSET(CPU_FTR_VSX) 2257END_FTR_SECTION_IFSET(CPU_FTR_VSX)
2492#endif 2258#endif
2493 mtmsrd r8 2259 mtmsrd r8
2494 isync
2495 addi r3,r4,VCPU_FPRS 2260 addi r3,r4,VCPU_FPRS
2496 bl load_fp_state 2261 bl load_fp_state
2497#ifdef CONFIG_ALTIVEC 2262#ifdef CONFIG_ALTIVEC
diff --git a/arch/powerpc/kvm/book3s_paired_singles.c b/arch/powerpc/kvm/book3s_paired_singles.c
index bfb8035314e3..bd6ab1672ae6 100644
--- a/arch/powerpc/kvm/book3s_paired_singles.c
+++ b/arch/powerpc/kvm/book3s_paired_singles.c
@@ -352,14 +352,6 @@ static inline u32 inst_get_field(u32 inst, int msb, int lsb)
352 return kvmppc_get_field(inst, msb + 32, lsb + 32); 352 return kvmppc_get_field(inst, msb + 32, lsb + 32);
353} 353}
354 354
355/*
356 * Replaces inst bits with ordering according to spec.
357 */
358static inline u32 inst_set_field(u32 inst, int msb, int lsb, int value)
359{
360 return kvmppc_set_field(inst, msb + 32, lsb + 32, value);
361}
362
363bool kvmppc_inst_is_paired_single(struct kvm_vcpu *vcpu, u32 inst) 355bool kvmppc_inst_is_paired_single(struct kvm_vcpu *vcpu, u32 inst)
364{ 356{
365 if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)) 357 if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE))
diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
index cf2eb16846d1..f57383941d03 100644
--- a/arch/powerpc/kvm/book3s_pr.c
+++ b/arch/powerpc/kvm/book3s_pr.c
@@ -644,11 +644,6 @@ int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
644 return r; 644 return r;
645} 645}
646 646
647static inline int get_fpr_index(int i)
648{
649 return i * TS_FPRWIDTH;
650}
651
652/* Give up external provider (FPU, Altivec, VSX) */ 647/* Give up external provider (FPU, Altivec, VSX) */
653void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr) 648void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr)
654{ 649{
diff --git a/arch/powerpc/kvm/book3s_xics.c b/arch/powerpc/kvm/book3s_xics.c
index eaeb78047fb8..807351f76f84 100644
--- a/arch/powerpc/kvm/book3s_xics.c
+++ b/arch/powerpc/kvm/book3s_xics.c
@@ -613,10 +613,25 @@ static noinline int kvmppc_h_ipi(struct kvm_vcpu *vcpu, unsigned long server,
613 * there might be a previously-rejected interrupt needing 613 * there might be a previously-rejected interrupt needing
614 * to be resent. 614 * to be resent.
615 * 615 *
616 * ICP state: Check_IPI
617 *
616 * If the CPPR is less favored, then we might be replacing 618 * If the CPPR is less favored, then we might be replacing
617 * an interrupt, and thus need to possibly reject it as in 619 * an interrupt, and thus need to possibly reject it.
618 * 620 *
619 * ICP state: Check_IPI 621 * ICP State: IPI
622 *
623 * Besides rejecting any pending interrupts, we also
624 * update XISR and pending_pri to mark IPI as pending.
625 *
626 * PAPR does not describe this state, but if the MFRR is being
627 * made less favored than its earlier value, there might be
628 * a previously-rejected interrupt needing to be resent.
629 * Ideally, we would want to resend only if
630 * prio(pending_interrupt) < mfrr &&
631 * prio(pending_interrupt) < cppr
632 * where pending interrupt is the one that was rejected. But
633 * we don't have that state, so we simply trigger a resend
634 * whenever the MFRR is made less favored.
620 */ 635 */
621 do { 636 do {
622 old_state = new_state = ACCESS_ONCE(icp->state); 637 old_state = new_state = ACCESS_ONCE(icp->state);
@@ -629,13 +644,14 @@ static noinline int kvmppc_h_ipi(struct kvm_vcpu *vcpu, unsigned long server,
629 resend = false; 644 resend = false;
630 if (mfrr < new_state.cppr) { 645 if (mfrr < new_state.cppr) {
631 /* Reject a pending interrupt if not an IPI */ 646 /* Reject a pending interrupt if not an IPI */
632 if (mfrr <= new_state.pending_pri) 647 if (mfrr <= new_state.pending_pri) {
633 reject = new_state.xisr; 648 reject = new_state.xisr;
634 new_state.pending_pri = mfrr; 649 new_state.pending_pri = mfrr;
635 new_state.xisr = XICS_IPI; 650 new_state.xisr = XICS_IPI;
651 }
636 } 652 }
637 653
638 if (mfrr > old_state.mfrr && mfrr > new_state.cppr) { 654 if (mfrr > old_state.mfrr) {
639 resend = new_state.need_resend; 655 resend = new_state.need_resend;
640 new_state.need_resend = 0; 656 new_state.need_resend = 0;
641 } 657 }
@@ -789,7 +805,7 @@ static noinline int kvmppc_xics_rm_complete(struct kvm_vcpu *vcpu, u32 hcall)
789 if (icp->rm_action & XICS_RM_KICK_VCPU) 805 if (icp->rm_action & XICS_RM_KICK_VCPU)
790 kvmppc_fast_vcpu_kick(icp->rm_kick_target); 806 kvmppc_fast_vcpu_kick(icp->rm_kick_target);
791 if (icp->rm_action & XICS_RM_CHECK_RESEND) 807 if (icp->rm_action & XICS_RM_CHECK_RESEND)
792 icp_check_resend(xics, icp); 808 icp_check_resend(xics, icp->rm_resend_icp);
793 if (icp->rm_action & XICS_RM_REJECT) 809 if (icp->rm_action & XICS_RM_REJECT)
794 icp_deliver_irq(xics, icp, icp->rm_reject); 810 icp_deliver_irq(xics, icp, icp->rm_reject);
795 if (icp->rm_action & XICS_RM_NOTIFY_EOI) 811 if (icp->rm_action & XICS_RM_NOTIFY_EOI)
diff --git a/arch/powerpc/kvm/book3s_xics.h b/arch/powerpc/kvm/book3s_xics.h
index e8aaa7a3f209..73f0f2723c07 100644
--- a/arch/powerpc/kvm/book3s_xics.h
+++ b/arch/powerpc/kvm/book3s_xics.h
@@ -74,6 +74,7 @@ struct kvmppc_icp {
74#define XICS_RM_NOTIFY_EOI 0x8 74#define XICS_RM_NOTIFY_EOI 0x8
75 u32 rm_action; 75 u32 rm_action;
76 struct kvm_vcpu *rm_kick_target; 76 struct kvm_vcpu *rm_kick_target;
77 struct kvmppc_icp *rm_resend_icp;
77 u32 rm_reject; 78 u32 rm_reject;
78 u32 rm_eoied_irq; 79 u32 rm_eoied_irq;
79 80
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
index e1cb5881bd56..b29ce752c7d6 100644
--- a/arch/powerpc/kvm/e500.c
+++ b/arch/powerpc/kvm/e500.c
@@ -299,14 +299,6 @@ void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr)
299 kvmppc_e500_recalc_shadow_pid(to_e500(vcpu)); 299 kvmppc_e500_recalc_shadow_pid(to_e500(vcpu));
300} 300}
301 301
302void kvmppc_core_load_host_debugstate(struct kvm_vcpu *vcpu)
303{
304}
305
306void kvmppc_core_load_guest_debugstate(struct kvm_vcpu *vcpu)
307{
308}
309
310static void kvmppc_core_vcpu_load_e500(struct kvm_vcpu *vcpu, int cpu) 302static void kvmppc_core_vcpu_load_e500(struct kvm_vcpu *vcpu, int cpu)
311{ 303{
312 kvmppc_booke_vcpu_load(vcpu, cpu); 304 kvmppc_booke_vcpu_load(vcpu, cpu);
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index c1f8f53cd312..c45eaab752b0 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -527,18 +527,12 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
527 r = 0; 527 r = 0;
528 break; 528 break;
529 case KVM_CAP_PPC_RMA: 529 case KVM_CAP_PPC_RMA:
530 r = hv_enabled; 530 r = 0;
531 /* PPC970 requires an RMA */
532 if (r && cpu_has_feature(CPU_FTR_ARCH_201))
533 r = 2;
534 break; 531 break;
535#endif 532#endif
536 case KVM_CAP_SYNC_MMU: 533 case KVM_CAP_SYNC_MMU:
537#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 534#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
538 if (hv_enabled) 535 r = hv_enabled;
539 r = cpu_has_feature(CPU_FTR_ARCH_206) ? 1 : 0;
540 else
541 r = 0;
542#elif defined(KVM_ARCH_WANT_MMU_NOTIFIER) 536#elif defined(KVM_ARCH_WANT_MMU_NOTIFIER)
543 r = 1; 537 r = 1;
544#else 538#else
diff --git a/arch/powerpc/kvm/trace_book3s.h b/arch/powerpc/kvm/trace_book3s.h
new file mode 100644
index 000000000000..f647ce0f428b
--- /dev/null
+++ b/arch/powerpc/kvm/trace_book3s.h
@@ -0,0 +1,32 @@
1#if !defined(_TRACE_KVM_BOOK3S_H)
2#define _TRACE_KVM_BOOK3S_H
3
4/*
5 * Common defines used by the trace macros in trace_pr.h and trace_hv.h
6 */
7
8#define kvm_trace_symbol_exit \
9 {0x100, "SYSTEM_RESET"}, \
10 {0x200, "MACHINE_CHECK"}, \
11 {0x300, "DATA_STORAGE"}, \
12 {0x380, "DATA_SEGMENT"}, \
13 {0x400, "INST_STORAGE"}, \
14 {0x480, "INST_SEGMENT"}, \
15 {0x500, "EXTERNAL"}, \
16 {0x501, "EXTERNAL_LEVEL"}, \
17 {0x502, "EXTERNAL_HV"}, \
18 {0x600, "ALIGNMENT"}, \
19 {0x700, "PROGRAM"}, \
20 {0x800, "FP_UNAVAIL"}, \
21 {0x900, "DECREMENTER"}, \
22 {0x980, "HV_DECREMENTER"}, \
23 {0xc00, "SYSCALL"}, \
24 {0xd00, "TRACE"}, \
25 {0xe00, "H_DATA_STORAGE"}, \
26 {0xe20, "H_INST_STORAGE"}, \
27 {0xe40, "H_EMUL_ASSIST"}, \
28 {0xf00, "PERFMON"}, \
29 {0xf20, "ALTIVEC"}, \
30 {0xf40, "VSX"}
31
32#endif
diff --git a/arch/powerpc/kvm/trace_booke.h b/arch/powerpc/kvm/trace_booke.h
index f7537cf26ce7..7ec534d1db9f 100644
--- a/arch/powerpc/kvm/trace_booke.h
+++ b/arch/powerpc/kvm/trace_booke.h
@@ -151,6 +151,47 @@ TRACE_EVENT(kvm_booke206_ref_release,
151 __entry->pfn, __entry->flags) 151 __entry->pfn, __entry->flags)
152); 152);
153 153
154#ifdef CONFIG_SPE_POSSIBLE
155#define kvm_trace_symbol_irqprio_spe \
156 {BOOKE_IRQPRIO_SPE_UNAVAIL, "SPE_UNAVAIL"}, \
157 {BOOKE_IRQPRIO_SPE_FP_DATA, "SPE_FP_DATA"}, \
158 {BOOKE_IRQPRIO_SPE_FP_ROUND, "SPE_FP_ROUND"},
159#else
160#define kvm_trace_symbol_irqprio_spe
161#endif
162
163#ifdef CONFIG_PPC_E500MC
164#define kvm_trace_symbol_irqprio_e500mc \
165 {BOOKE_IRQPRIO_ALTIVEC_UNAVAIL, "ALTIVEC_UNAVAIL"}, \
166 {BOOKE_IRQPRIO_ALTIVEC_ASSIST, "ALTIVEC_ASSIST"},
167#else
168#define kvm_trace_symbol_irqprio_e500mc
169#endif
170
171#define kvm_trace_symbol_irqprio \
172 kvm_trace_symbol_irqprio_spe \
173 kvm_trace_symbol_irqprio_e500mc \
174 {BOOKE_IRQPRIO_DATA_STORAGE, "DATA_STORAGE"}, \
175 {BOOKE_IRQPRIO_INST_STORAGE, "INST_STORAGE"}, \
176 {BOOKE_IRQPRIO_ALIGNMENT, "ALIGNMENT"}, \
177 {BOOKE_IRQPRIO_PROGRAM, "PROGRAM"}, \
178 {BOOKE_IRQPRIO_FP_UNAVAIL, "FP_UNAVAIL"}, \
179 {BOOKE_IRQPRIO_SYSCALL, "SYSCALL"}, \
180 {BOOKE_IRQPRIO_AP_UNAVAIL, "AP_UNAVAIL"}, \
181 {BOOKE_IRQPRIO_DTLB_MISS, "DTLB_MISS"}, \
182 {BOOKE_IRQPRIO_ITLB_MISS, "ITLB_MISS"}, \
183 {BOOKE_IRQPRIO_MACHINE_CHECK, "MACHINE_CHECK"}, \
184 {BOOKE_IRQPRIO_DEBUG, "DEBUG"}, \
185 {BOOKE_IRQPRIO_CRITICAL, "CRITICAL"}, \
186 {BOOKE_IRQPRIO_WATCHDOG, "WATCHDOG"}, \
187 {BOOKE_IRQPRIO_EXTERNAL, "EXTERNAL"}, \
188 {BOOKE_IRQPRIO_FIT, "FIT"}, \
189 {BOOKE_IRQPRIO_DECREMENTER, "DECREMENTER"}, \
190 {BOOKE_IRQPRIO_PERFORMANCE_MONITOR, "PERFORMANCE_MONITOR"}, \
191 {BOOKE_IRQPRIO_EXTERNAL_LEVEL, "EXTERNAL_LEVEL"}, \
192 {BOOKE_IRQPRIO_DBELL, "DBELL"}, \
193 {BOOKE_IRQPRIO_DBELL_CRIT, "DBELL_CRIT"} \
194
154TRACE_EVENT(kvm_booke_queue_irqprio, 195TRACE_EVENT(kvm_booke_queue_irqprio,
155 TP_PROTO(struct kvm_vcpu *vcpu, unsigned int priority), 196 TP_PROTO(struct kvm_vcpu *vcpu, unsigned int priority),
156 TP_ARGS(vcpu, priority), 197 TP_ARGS(vcpu, priority),
@@ -167,8 +208,10 @@ TRACE_EVENT(kvm_booke_queue_irqprio,
167 __entry->pending = vcpu->arch.pending_exceptions; 208 __entry->pending = vcpu->arch.pending_exceptions;
168 ), 209 ),
169 210
170 TP_printk("vcpu=%x prio=%x pending=%lx", 211 TP_printk("vcpu=%x prio=%s pending=%lx",
171 __entry->cpu_nr, __entry->priority, __entry->pending) 212 __entry->cpu_nr,
213 __print_symbolic(__entry->priority, kvm_trace_symbol_irqprio),
214 __entry->pending)
172); 215);
173 216
174#endif 217#endif
diff --git a/arch/powerpc/kvm/trace_hv.h b/arch/powerpc/kvm/trace_hv.h
new file mode 100644
index 000000000000..33d9daff5783
--- /dev/null
+++ b/arch/powerpc/kvm/trace_hv.h
@@ -0,0 +1,477 @@
1#if !defined(_TRACE_KVM_HV_H) || defined(TRACE_HEADER_MULTI_READ)
2#define _TRACE_KVM_HV_H
3
4#include <linux/tracepoint.h>
5#include "trace_book3s.h"
6#include <asm/hvcall.h>
7#include <asm/kvm_asm.h>
8
9#undef TRACE_SYSTEM
10#define TRACE_SYSTEM kvm_hv
11#define TRACE_INCLUDE_PATH .
12#define TRACE_INCLUDE_FILE trace_hv
13
14#define kvm_trace_symbol_hcall \
15 {H_REMOVE, "H_REMOVE"}, \
16 {H_ENTER, "H_ENTER"}, \
17 {H_READ, "H_READ"}, \
18 {H_CLEAR_MOD, "H_CLEAR_MOD"}, \
19 {H_CLEAR_REF, "H_CLEAR_REF"}, \
20 {H_PROTECT, "H_PROTECT"}, \
21 {H_GET_TCE, "H_GET_TCE"}, \
22 {H_PUT_TCE, "H_PUT_TCE"}, \
23 {H_SET_SPRG0, "H_SET_SPRG0"}, \
24 {H_SET_DABR, "H_SET_DABR"}, \
25 {H_PAGE_INIT, "H_PAGE_INIT"}, \
26 {H_SET_ASR, "H_SET_ASR"}, \
27 {H_ASR_ON, "H_ASR_ON"}, \
28 {H_ASR_OFF, "H_ASR_OFF"}, \
29 {H_LOGICAL_CI_LOAD, "H_LOGICAL_CI_LOAD"}, \
30 {H_LOGICAL_CI_STORE, "H_LOGICAL_CI_STORE"}, \
31 {H_LOGICAL_CACHE_LOAD, "H_LOGICAL_CACHE_LOAD"}, \
32 {H_LOGICAL_CACHE_STORE, "H_LOGICAL_CACHE_STORE"}, \
33 {H_LOGICAL_ICBI, "H_LOGICAL_ICBI"}, \
34 {H_LOGICAL_DCBF, "H_LOGICAL_DCBF"}, \
35 {H_GET_TERM_CHAR, "H_GET_TERM_CHAR"}, \
36 {H_PUT_TERM_CHAR, "H_PUT_TERM_CHAR"}, \
37 {H_REAL_TO_LOGICAL, "H_REAL_TO_LOGICAL"}, \
38 {H_HYPERVISOR_DATA, "H_HYPERVISOR_DATA"}, \
39 {H_EOI, "H_EOI"}, \
40 {H_CPPR, "H_CPPR"}, \
41 {H_IPI, "H_IPI"}, \
42 {H_IPOLL, "H_IPOLL"}, \
43 {H_XIRR, "H_XIRR"}, \
44 {H_PERFMON, "H_PERFMON"}, \
45 {H_MIGRATE_DMA, "H_MIGRATE_DMA"}, \
46 {H_REGISTER_VPA, "H_REGISTER_VPA"}, \
47 {H_CEDE, "H_CEDE"}, \
48 {H_CONFER, "H_CONFER"}, \
49 {H_PROD, "H_PROD"}, \
50 {H_GET_PPP, "H_GET_PPP"}, \
51 {H_SET_PPP, "H_SET_PPP"}, \
52 {H_PURR, "H_PURR"}, \
53 {H_PIC, "H_PIC"}, \
54 {H_REG_CRQ, "H_REG_CRQ"}, \
55 {H_FREE_CRQ, "H_FREE_CRQ"}, \
56 {H_VIO_SIGNAL, "H_VIO_SIGNAL"}, \
57 {H_SEND_CRQ, "H_SEND_CRQ"}, \
58 {H_COPY_RDMA, "H_COPY_RDMA"}, \
59 {H_REGISTER_LOGICAL_LAN, "H_REGISTER_LOGICAL_LAN"}, \
60 {H_FREE_LOGICAL_LAN, "H_FREE_LOGICAL_LAN"}, \
61 {H_ADD_LOGICAL_LAN_BUFFER, "H_ADD_LOGICAL_LAN_BUFFER"}, \
62 {H_SEND_LOGICAL_LAN, "H_SEND_LOGICAL_LAN"}, \
63 {H_BULK_REMOVE, "H_BULK_REMOVE"}, \
64 {H_MULTICAST_CTRL, "H_MULTICAST_CTRL"}, \
65 {H_SET_XDABR, "H_SET_XDABR"}, \
66 {H_STUFF_TCE, "H_STUFF_TCE"}, \
67 {H_PUT_TCE_INDIRECT, "H_PUT_TCE_INDIRECT"}, \
68 {H_CHANGE_LOGICAL_LAN_MAC, "H_CHANGE_LOGICAL_LAN_MAC"}, \
69 {H_VTERM_PARTNER_INFO, "H_VTERM_PARTNER_INFO"}, \
70 {H_REGISTER_VTERM, "H_REGISTER_VTERM"}, \
71 {H_FREE_VTERM, "H_FREE_VTERM"}, \
72 {H_RESET_EVENTS, "H_RESET_EVENTS"}, \
73 {H_ALLOC_RESOURCE, "H_ALLOC_RESOURCE"}, \
74 {H_FREE_RESOURCE, "H_FREE_RESOURCE"}, \
75 {H_MODIFY_QP, "H_MODIFY_QP"}, \
76 {H_QUERY_QP, "H_QUERY_QP"}, \
77 {H_REREGISTER_PMR, "H_REREGISTER_PMR"}, \
78 {H_REGISTER_SMR, "H_REGISTER_SMR"}, \
79 {H_QUERY_MR, "H_QUERY_MR"}, \
80 {H_QUERY_MW, "H_QUERY_MW"}, \
81 {H_QUERY_HCA, "H_QUERY_HCA"}, \
82 {H_QUERY_PORT, "H_QUERY_PORT"}, \
83 {H_MODIFY_PORT, "H_MODIFY_PORT"}, \
84 {H_DEFINE_AQP1, "H_DEFINE_AQP1"}, \
85 {H_GET_TRACE_BUFFER, "H_GET_TRACE_BUFFER"}, \
86 {H_DEFINE_AQP0, "H_DEFINE_AQP0"}, \
87 {H_RESIZE_MR, "H_RESIZE_MR"}, \
88 {H_ATTACH_MCQP, "H_ATTACH_MCQP"}, \
89 {H_DETACH_MCQP, "H_DETACH_MCQP"}, \
90 {H_CREATE_RPT, "H_CREATE_RPT"}, \
91 {H_REMOVE_RPT, "H_REMOVE_RPT"}, \
92 {H_REGISTER_RPAGES, "H_REGISTER_RPAGES"}, \
93 {H_DISABLE_AND_GETC, "H_DISABLE_AND_GETC"}, \
94 {H_ERROR_DATA, "H_ERROR_DATA"}, \
95 {H_GET_HCA_INFO, "H_GET_HCA_INFO"}, \
96 {H_GET_PERF_COUNT, "H_GET_PERF_COUNT"}, \
97 {H_MANAGE_TRACE, "H_MANAGE_TRACE"}, \
98 {H_FREE_LOGICAL_LAN_BUFFER, "H_FREE_LOGICAL_LAN_BUFFER"}, \
99 {H_QUERY_INT_STATE, "H_QUERY_INT_STATE"}, \
100 {H_POLL_PENDING, "H_POLL_PENDING"}, \
101 {H_ILLAN_ATTRIBUTES, "H_ILLAN_ATTRIBUTES"}, \
102 {H_MODIFY_HEA_QP, "H_MODIFY_HEA_QP"}, \
103 {H_QUERY_HEA_QP, "H_QUERY_HEA_QP"}, \
104 {H_QUERY_HEA, "H_QUERY_HEA"}, \
105 {H_QUERY_HEA_PORT, "H_QUERY_HEA_PORT"}, \
106 {H_MODIFY_HEA_PORT, "H_MODIFY_HEA_PORT"}, \
107 {H_REG_BCMC, "H_REG_BCMC"}, \
108 {H_DEREG_BCMC, "H_DEREG_BCMC"}, \
109 {H_REGISTER_HEA_RPAGES, "H_REGISTER_HEA_RPAGES"}, \
110 {H_DISABLE_AND_GET_HEA, "H_DISABLE_AND_GET_HEA"}, \
111 {H_GET_HEA_INFO, "H_GET_HEA_INFO"}, \
112 {H_ALLOC_HEA_RESOURCE, "H_ALLOC_HEA_RESOURCE"}, \
113 {H_ADD_CONN, "H_ADD_CONN"}, \
114 {H_DEL_CONN, "H_DEL_CONN"}, \
115 {H_JOIN, "H_JOIN"}, \
116 {H_VASI_STATE, "H_VASI_STATE"}, \
117 {H_ENABLE_CRQ, "H_ENABLE_CRQ"}, \
118 {H_GET_EM_PARMS, "H_GET_EM_PARMS"}, \
119 {H_SET_MPP, "H_SET_MPP"}, \
120 {H_GET_MPP, "H_GET_MPP"}, \
121 {H_HOME_NODE_ASSOCIATIVITY, "H_HOME_NODE_ASSOCIATIVITY"}, \
122 {H_BEST_ENERGY, "H_BEST_ENERGY"}, \
123 {H_XIRR_X, "H_XIRR_X"}, \
124 {H_RANDOM, "H_RANDOM"}, \
125 {H_COP, "H_COP"}, \
126 {H_GET_MPP_X, "H_GET_MPP_X"}, \
127 {H_SET_MODE, "H_SET_MODE"}, \
128 {H_RTAS, "H_RTAS"}
129
130#define kvm_trace_symbol_kvmret \
131 {RESUME_GUEST, "RESUME_GUEST"}, \
132 {RESUME_GUEST_NV, "RESUME_GUEST_NV"}, \
133 {RESUME_HOST, "RESUME_HOST"}, \
134 {RESUME_HOST_NV, "RESUME_HOST_NV"}
135
136#define kvm_trace_symbol_hcall_rc \
137 {H_SUCCESS, "H_SUCCESS"}, \
138 {H_BUSY, "H_BUSY"}, \
139 {H_CLOSED, "H_CLOSED"}, \
140 {H_NOT_AVAILABLE, "H_NOT_AVAILABLE"}, \
141 {H_CONSTRAINED, "H_CONSTRAINED"}, \
142 {H_PARTIAL, "H_PARTIAL"}, \
143 {H_IN_PROGRESS, "H_IN_PROGRESS"}, \
144 {H_PAGE_REGISTERED, "H_PAGE_REGISTERED"}, \
145 {H_PARTIAL_STORE, "H_PARTIAL_STORE"}, \
146 {H_PENDING, "H_PENDING"}, \
147 {H_CONTINUE, "H_CONTINUE"}, \
148 {H_LONG_BUSY_START_RANGE, "H_LONG_BUSY_START_RANGE"}, \
149 {H_LONG_BUSY_ORDER_1_MSEC, "H_LONG_BUSY_ORDER_1_MSEC"}, \
150 {H_LONG_BUSY_ORDER_10_MSEC, "H_LONG_BUSY_ORDER_10_MSEC"}, \
151 {H_LONG_BUSY_ORDER_100_MSEC, "H_LONG_BUSY_ORDER_100_MSEC"}, \
152 {H_LONG_BUSY_ORDER_1_SEC, "H_LONG_BUSY_ORDER_1_SEC"}, \
153 {H_LONG_BUSY_ORDER_10_SEC, "H_LONG_BUSY_ORDER_10_SEC"}, \
154 {H_LONG_BUSY_ORDER_100_SEC, "H_LONG_BUSY_ORDER_100_SEC"}, \
155 {H_LONG_BUSY_END_RANGE, "H_LONG_BUSY_END_RANGE"}, \
156 {H_TOO_HARD, "H_TOO_HARD"}, \
157 {H_HARDWARE, "H_HARDWARE"}, \
158 {H_FUNCTION, "H_FUNCTION"}, \
159 {H_PRIVILEGE, "H_PRIVILEGE"}, \
160 {H_PARAMETER, "H_PARAMETER"}, \
161 {H_BAD_MODE, "H_BAD_MODE"}, \
162 {H_PTEG_FULL, "H_PTEG_FULL"}, \
163 {H_NOT_FOUND, "H_NOT_FOUND"}, \
164 {H_RESERVED_DABR, "H_RESERVED_DABR"}, \
165 {H_NO_MEM, "H_NO_MEM"}, \
166 {H_AUTHORITY, "H_AUTHORITY"}, \
167 {H_PERMISSION, "H_PERMISSION"}, \
168 {H_DROPPED, "H_DROPPED"}, \
169 {H_SOURCE_PARM, "H_SOURCE_PARM"}, \
170 {H_DEST_PARM, "H_DEST_PARM"}, \
171 {H_REMOTE_PARM, "H_REMOTE_PARM"}, \
172 {H_RESOURCE, "H_RESOURCE"}, \
173 {H_ADAPTER_PARM, "H_ADAPTER_PARM"}, \
174 {H_RH_PARM, "H_RH_PARM"}, \
175 {H_RCQ_PARM, "H_RCQ_PARM"}, \
176 {H_SCQ_PARM, "H_SCQ_PARM"}, \
177 {H_EQ_PARM, "H_EQ_PARM"}, \
178 {H_RT_PARM, "H_RT_PARM"}, \
179 {H_ST_PARM, "H_ST_PARM"}, \
180 {H_SIGT_PARM, "H_SIGT_PARM"}, \
181 {H_TOKEN_PARM, "H_TOKEN_PARM"}, \
182 {H_MLENGTH_PARM, "H_MLENGTH_PARM"}, \
183 {H_MEM_PARM, "H_MEM_PARM"}, \
184 {H_MEM_ACCESS_PARM, "H_MEM_ACCESS_PARM"}, \
185 {H_ATTR_PARM, "H_ATTR_PARM"}, \
186 {H_PORT_PARM, "H_PORT_PARM"}, \
187 {H_MCG_PARM, "H_MCG_PARM"}, \
188 {H_VL_PARM, "H_VL_PARM"}, \
189 {H_TSIZE_PARM, "H_TSIZE_PARM"}, \
190 {H_TRACE_PARM, "H_TRACE_PARM"}, \
191 {H_MASK_PARM, "H_MASK_PARM"}, \
192 {H_MCG_FULL, "H_MCG_FULL"}, \
193 {H_ALIAS_EXIST, "H_ALIAS_EXIST"}, \
194 {H_P_COUNTER, "H_P_COUNTER"}, \
195 {H_TABLE_FULL, "H_TABLE_FULL"}, \
196 {H_ALT_TABLE, "H_ALT_TABLE"}, \
197 {H_MR_CONDITION, "H_MR_CONDITION"}, \
198 {H_NOT_ENOUGH_RESOURCES, "H_NOT_ENOUGH_RESOURCES"}, \
199 {H_R_STATE, "H_R_STATE"}, \
200 {H_RESCINDED, "H_RESCINDED"}, \
201 {H_P2, "H_P2"}, \
202 {H_P3, "H_P3"}, \
203 {H_P4, "H_P4"}, \
204 {H_P5, "H_P5"}, \
205 {H_P6, "H_P6"}, \
206 {H_P7, "H_P7"}, \
207 {H_P8, "H_P8"}, \
208 {H_P9, "H_P9"}, \
209 {H_TOO_BIG, "H_TOO_BIG"}, \
210 {H_OVERLAP, "H_OVERLAP"}, \
211 {H_INTERRUPT, "H_INTERRUPT"}, \
212 {H_BAD_DATA, "H_BAD_DATA"}, \
213 {H_NOT_ACTIVE, "H_NOT_ACTIVE"}, \
214 {H_SG_LIST, "H_SG_LIST"}, \
215 {H_OP_MODE, "H_OP_MODE"}, \
216 {H_COP_HW, "H_COP_HW"}, \
217 {H_UNSUPPORTED_FLAG_START, "H_UNSUPPORTED_FLAG_START"}, \
218 {H_UNSUPPORTED_FLAG_END, "H_UNSUPPORTED_FLAG_END"}, \
219 {H_MULTI_THREADS_ACTIVE, "H_MULTI_THREADS_ACTIVE"}, \
220 {H_OUTSTANDING_COP_OPS, "H_OUTSTANDING_COP_OPS"}
221
222TRACE_EVENT(kvm_guest_enter,
223 TP_PROTO(struct kvm_vcpu *vcpu),
224 TP_ARGS(vcpu),
225
226 TP_STRUCT__entry(
227 __field(int, vcpu_id)
228 __field(unsigned long, pc)
229 __field(unsigned long, pending_exceptions)
230 __field(u8, ceded)
231 ),
232
233 TP_fast_assign(
234 __entry->vcpu_id = vcpu->vcpu_id;
235 __entry->pc = kvmppc_get_pc(vcpu);
236 __entry->ceded = vcpu->arch.ceded;
237 __entry->pending_exceptions = vcpu->arch.pending_exceptions;
238 ),
239
240 TP_printk("VCPU %d: pc=0x%lx pexcp=0x%lx ceded=%d",
241 __entry->vcpu_id,
242 __entry->pc,
243 __entry->pending_exceptions, __entry->ceded)
244);
245
246TRACE_EVENT(kvm_guest_exit,
247 TP_PROTO(struct kvm_vcpu *vcpu),
248 TP_ARGS(vcpu),
249
250 TP_STRUCT__entry(
251 __field(int, vcpu_id)
252 __field(int, trap)
253 __field(unsigned long, pc)
254 __field(unsigned long, msr)
255 __field(u8, ceded)
256 ),
257
258 TP_fast_assign(
259 __entry->vcpu_id = vcpu->vcpu_id;
260 __entry->trap = vcpu->arch.trap;
261 __entry->ceded = vcpu->arch.ceded;
262 __entry->pc = kvmppc_get_pc(vcpu);
263 __entry->msr = vcpu->arch.shregs.msr;
264 ),
265
266 TP_printk("VCPU %d: trap=%s pc=0x%lx msr=0x%lx, ceded=%d",
267 __entry->vcpu_id,
268 __print_symbolic(__entry->trap, kvm_trace_symbol_exit),
269 __entry->pc, __entry->msr, __entry->ceded
270 )
271);
272
273TRACE_EVENT(kvm_page_fault_enter,
274 TP_PROTO(struct kvm_vcpu *vcpu, unsigned long *hptep,
275 struct kvm_memory_slot *memslot, unsigned long ea,
276 unsigned long dsisr),
277
278 TP_ARGS(vcpu, hptep, memslot, ea, dsisr),
279
280 TP_STRUCT__entry(
281 __field(int, vcpu_id)
282 __field(unsigned long, hpte_v)
283 __field(unsigned long, hpte_r)
284 __field(unsigned long, gpte_r)
285 __field(unsigned long, ea)
286 __field(u64, base_gfn)
287 __field(u32, slot_flags)
288 __field(u32, dsisr)
289 ),
290
291 TP_fast_assign(
292 __entry->vcpu_id = vcpu->vcpu_id;
293 __entry->hpte_v = hptep[0];
294 __entry->hpte_r = hptep[1];
295 __entry->gpte_r = hptep[2];
296 __entry->ea = ea;
297 __entry->dsisr = dsisr;
298 __entry->base_gfn = memslot ? memslot->base_gfn : -1UL;
299 __entry->slot_flags = memslot ? memslot->flags : 0;
300 ),
301
302 TP_printk("VCPU %d: hpte=0x%lx:0x%lx guest=0x%lx ea=0x%lx,%x slot=0x%llx,0x%x",
303 __entry->vcpu_id,
304 __entry->hpte_v, __entry->hpte_r, __entry->gpte_r,
305 __entry->ea, __entry->dsisr,
306 __entry->base_gfn, __entry->slot_flags)
307);
308
309TRACE_EVENT(kvm_page_fault_exit,
310 TP_PROTO(struct kvm_vcpu *vcpu, unsigned long *hptep, long ret),
311
312 TP_ARGS(vcpu, hptep, ret),
313
314 TP_STRUCT__entry(
315 __field(int, vcpu_id)
316 __field(unsigned long, hpte_v)
317 __field(unsigned long, hpte_r)
318 __field(long, ret)
319 ),
320
321 TP_fast_assign(
322 __entry->vcpu_id = vcpu->vcpu_id;
323 __entry->hpte_v = hptep[0];
324 __entry->hpte_r = hptep[1];
325 __entry->ret = ret;
326 ),
327
328 TP_printk("VCPU %d: hpte=0x%lx:0x%lx ret=0x%lx",
329 __entry->vcpu_id,
330 __entry->hpte_v, __entry->hpte_r, __entry->ret)
331);
332
333TRACE_EVENT(kvm_hcall_enter,
334 TP_PROTO(struct kvm_vcpu *vcpu),
335
336 TP_ARGS(vcpu),
337
338 TP_STRUCT__entry(
339 __field(int, vcpu_id)
340 __field(unsigned long, req)
341 __field(unsigned long, gpr4)
342 __field(unsigned long, gpr5)
343 __field(unsigned long, gpr6)
344 __field(unsigned long, gpr7)
345 ),
346
347 TP_fast_assign(
348 __entry->vcpu_id = vcpu->vcpu_id;
349 __entry->req = kvmppc_get_gpr(vcpu, 3);
350 __entry->gpr4 = kvmppc_get_gpr(vcpu, 4);
351 __entry->gpr5 = kvmppc_get_gpr(vcpu, 5);
352 __entry->gpr6 = kvmppc_get_gpr(vcpu, 6);
353 __entry->gpr7 = kvmppc_get_gpr(vcpu, 7);
354 ),
355
356 TP_printk("VCPU %d: hcall=%s GPR4-7=0x%lx,0x%lx,0x%lx,0x%lx",
357 __entry->vcpu_id,
358 __print_symbolic(__entry->req, kvm_trace_symbol_hcall),
359 __entry->gpr4, __entry->gpr5, __entry->gpr6, __entry->gpr7)
360);
361
362TRACE_EVENT(kvm_hcall_exit,
363 TP_PROTO(struct kvm_vcpu *vcpu, int ret),
364
365 TP_ARGS(vcpu, ret),
366
367 TP_STRUCT__entry(
368 __field(int, vcpu_id)
369 __field(unsigned long, ret)
370 __field(unsigned long, hcall_rc)
371 ),
372
373 TP_fast_assign(
374 __entry->vcpu_id = vcpu->vcpu_id;
375 __entry->ret = ret;
376 __entry->hcall_rc = kvmppc_get_gpr(vcpu, 3);
377 ),
378
379 TP_printk("VCPU %d: ret=%s hcall_rc=%s",
380 __entry->vcpu_id,
381 __print_symbolic(__entry->ret, kvm_trace_symbol_kvmret),
382 __print_symbolic(__entry->ret & RESUME_FLAG_HOST ?
383 H_TOO_HARD : __entry->hcall_rc,
384 kvm_trace_symbol_hcall_rc))
385);
386
387TRACE_EVENT(kvmppc_run_core,
388 TP_PROTO(struct kvmppc_vcore *vc, int where),
389
390 TP_ARGS(vc, where),
391
392 TP_STRUCT__entry(
393 __field(int, n_runnable)
394 __field(int, runner_vcpu)
395 __field(int, where)
396 __field(pid_t, tgid)
397 ),
398
399 TP_fast_assign(
400 __entry->runner_vcpu = vc->runner->vcpu_id;
401 __entry->n_runnable = vc->n_runnable;
402 __entry->where = where;
403 __entry->tgid = current->tgid;
404 ),
405
406 TP_printk("%s runner_vcpu==%d runnable=%d tgid=%d",
407 __entry->where ? "Exit" : "Enter",
408 __entry->runner_vcpu, __entry->n_runnable, __entry->tgid)
409);
410
411TRACE_EVENT(kvmppc_vcore_blocked,
412 TP_PROTO(struct kvmppc_vcore *vc, int where),
413
414 TP_ARGS(vc, where),
415
416 TP_STRUCT__entry(
417 __field(int, n_runnable)
418 __field(int, runner_vcpu)
419 __field(int, where)
420 __field(pid_t, tgid)
421 ),
422
423 TP_fast_assign(
424 __entry->runner_vcpu = vc->runner->vcpu_id;
425 __entry->n_runnable = vc->n_runnable;
426 __entry->where = where;
427 __entry->tgid = current->tgid;
428 ),
429
430 TP_printk("%s runner_vcpu=%d runnable=%d tgid=%d",
431 __entry->where ? "Exit" : "Enter",
432 __entry->runner_vcpu, __entry->n_runnable, __entry->tgid)
433);
434
435TRACE_EVENT(kvmppc_run_vcpu_enter,
436 TP_PROTO(struct kvm_vcpu *vcpu),
437
438 TP_ARGS(vcpu),
439
440 TP_STRUCT__entry(
441 __field(int, vcpu_id)
442 __field(pid_t, tgid)
443 ),
444
445 TP_fast_assign(
446 __entry->vcpu_id = vcpu->vcpu_id;
447 __entry->tgid = current->tgid;
448 ),
449
450 TP_printk("VCPU %d: tgid=%d", __entry->vcpu_id, __entry->tgid)
451);
452
453TRACE_EVENT(kvmppc_run_vcpu_exit,
454 TP_PROTO(struct kvm_vcpu *vcpu, struct kvm_run *run),
455
456 TP_ARGS(vcpu, run),
457
458 TP_STRUCT__entry(
459 __field(int, vcpu_id)
460 __field(int, exit)
461 __field(int, ret)
462 ),
463
464 TP_fast_assign(
465 __entry->vcpu_id = vcpu->vcpu_id;
466 __entry->exit = run->exit_reason;
467 __entry->ret = vcpu->arch.ret;
468 ),
469
470 TP_printk("VCPU %d: exit=%d, ret=%d",
471 __entry->vcpu_id, __entry->exit, __entry->ret)
472);
473
474#endif /* _TRACE_KVM_HV_H */
475
476/* This part must be outside protection */
477#include <trace/define_trace.h>
diff --git a/arch/powerpc/kvm/trace_pr.h b/arch/powerpc/kvm/trace_pr.h
index e1357cd8dc1f..810507cb688a 100644
--- a/arch/powerpc/kvm/trace_pr.h
+++ b/arch/powerpc/kvm/trace_pr.h
@@ -3,36 +3,13 @@
3#define _TRACE_KVM_PR_H 3#define _TRACE_KVM_PR_H
4 4
5#include <linux/tracepoint.h> 5#include <linux/tracepoint.h>
6#include "trace_book3s.h"
6 7
7#undef TRACE_SYSTEM 8#undef TRACE_SYSTEM
8#define TRACE_SYSTEM kvm_pr 9#define TRACE_SYSTEM kvm_pr
9#define TRACE_INCLUDE_PATH . 10#define TRACE_INCLUDE_PATH .
10#define TRACE_INCLUDE_FILE trace_pr 11#define TRACE_INCLUDE_FILE trace_pr
11 12
12#define kvm_trace_symbol_exit \
13 {0x100, "SYSTEM_RESET"}, \
14 {0x200, "MACHINE_CHECK"}, \
15 {0x300, "DATA_STORAGE"}, \
16 {0x380, "DATA_SEGMENT"}, \
17 {0x400, "INST_STORAGE"}, \
18 {0x480, "INST_SEGMENT"}, \
19 {0x500, "EXTERNAL"}, \
20 {0x501, "EXTERNAL_LEVEL"}, \
21 {0x502, "EXTERNAL_HV"}, \
22 {0x600, "ALIGNMENT"}, \
23 {0x700, "PROGRAM"}, \
24 {0x800, "FP_UNAVAIL"}, \
25 {0x900, "DECREMENTER"}, \
26 {0x980, "HV_DECREMENTER"}, \
27 {0xc00, "SYSCALL"}, \
28 {0xd00, "TRACE"}, \
29 {0xe00, "H_DATA_STORAGE"}, \
30 {0xe20, "H_INST_STORAGE"}, \
31 {0xe40, "H_EMUL_ASSIST"}, \
32 {0xf00, "PERFMON"}, \
33 {0xf20, "ALTIVEC"}, \
34 {0xf40, "VSX"}
35
36TRACE_EVENT(kvm_book3s_reenter, 13TRACE_EVENT(kvm_book3s_reenter,
37 TP_PROTO(int r, struct kvm_vcpu *vcpu), 14 TP_PROTO(int r, struct kvm_vcpu *vcpu),
38 TP_ARGS(r, vcpu), 15 TP_ARGS(r, vcpu),
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-22 20:38:10 -0500