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authorScott Wood <scottwood@freescale.com>2011-11-08 19:23:30 -0500
committerAvi Kivity <avi@redhat.com>2012-03-05 07:52:26 -0500
commitb59049720dd95021dfe0d9f4e1fa9458a67cfe29 (patch)
tree3b54577e12ba4a84bec409518c6c8f399ebba6e0 /arch/powerpc/kvm/booke_emulate.c
parent940b45ec18cf00046b8b28299d97066a2c43d559 (diff)
KVM: PPC: Paravirtualize SPRG4-7, ESR, PIR, MASn
This allows additional registers to be accessed by the guest in PR-mode KVM without trapping. SPRG4-7 are readable from userspace. On booke, KVM will sync these registers when it enters the guest, so that accesses from guest userspace will work. The guest kernel, OTOH, must consistently use either the real registers or the shared area between exits. This also applies to the already-paravirted SPRG3. On non-booke, it's not clear to what extent SPRG4-7 are supported (they're not architected for book3s, but exist on at least some classic chips). They are copied in the get/set regs ioctls, but I do not see any non-booke emulation. I also do not see any syncing with real registers (in PR-mode) including the user-readable SPRG3. This patch should not make that situation any worse. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'arch/powerpc/kvm/booke_emulate.c')
-rw-r--r--arch/powerpc/kvm/booke_emulate.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/powerpc/kvm/booke_emulate.c b/arch/powerpc/kvm/booke_emulate.c
index 1260f5f24c0c..bae9288ac1e1 100644
--- a/arch/powerpc/kvm/booke_emulate.c
+++ b/arch/powerpc/kvm/booke_emulate.c
@@ -107,7 +107,7 @@ int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
107 case SPRN_DEAR: 107 case SPRN_DEAR:
108 vcpu->arch.shared->dar = spr_val; break; 108 vcpu->arch.shared->dar = spr_val; break;
109 case SPRN_ESR: 109 case SPRN_ESR:
110 vcpu->arch.esr = spr_val; break; 110 vcpu->arch.shared->esr = spr_val; break;
111 case SPRN_DBCR0: 111 case SPRN_DBCR0:
112 vcpu->arch.dbcr0 = spr_val; break; 112 vcpu->arch.dbcr0 = spr_val; break;
113 case SPRN_DBCR1: 113 case SPRN_DBCR1:
@@ -125,13 +125,13 @@ int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
125 * loaded into the real SPRGs when resuming the 125 * loaded into the real SPRGs when resuming the
126 * guest. */ 126 * guest. */
127 case SPRN_SPRG4: 127 case SPRN_SPRG4:
128 vcpu->arch.sprg4 = spr_val; break; 128 vcpu->arch.shared->sprg4 = spr_val; break;
129 case SPRN_SPRG5: 129 case SPRN_SPRG5:
130 vcpu->arch.sprg5 = spr_val; break; 130 vcpu->arch.shared->sprg5 = spr_val; break;
131 case SPRN_SPRG6: 131 case SPRN_SPRG6:
132 vcpu->arch.sprg6 = spr_val; break; 132 vcpu->arch.shared->sprg6 = spr_val; break;
133 case SPRN_SPRG7: 133 case SPRN_SPRG7:
134 vcpu->arch.sprg7 = spr_val; break; 134 vcpu->arch.shared->sprg7 = spr_val; break;
135 135
136 case SPRN_IVPR: 136 case SPRN_IVPR:
137 vcpu->arch.ivpr = spr_val; 137 vcpu->arch.ivpr = spr_val;
@@ -202,7 +202,7 @@ int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
202 case SPRN_DEAR: 202 case SPRN_DEAR:
203 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->dar); break; 203 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->dar); break;
204 case SPRN_ESR: 204 case SPRN_ESR:
205 kvmppc_set_gpr(vcpu, rt, vcpu->arch.esr); break; 205 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->esr); break;
206 case SPRN_DBCR0: 206 case SPRN_DBCR0:
207 kvmppc_set_gpr(vcpu, rt, vcpu->arch.dbcr0); break; 207 kvmppc_set_gpr(vcpu, rt, vcpu->arch.dbcr0); break;
208 case SPRN_DBCR1: 208 case SPRN_DBCR1: