KVM: PPC: Book3S: Get/set guest FP regs using the GET/SET_ONE_REG interface

This enables userspace to get and set all the guest floating-point
state using the KVM_[GS]ET_ONE_REG ioctls.  The floating-point state
includes all of the traditional floating-point registers and the
FPSCR (floating point status/control register), all the VMX/Altivec
vector registers and the VSCR (vector status/control register), and
on POWER7, the vector-scalar registers (note that each FP register
is the high-order half of the corresponding VSR).

Most of these are implemented in common Book 3S code, except for VSX
on POWER7.  Because HV and PR differ in how they store the FP and VSX
registers on POWER7, the code for these cases is not common.  On POWER7,
the FP registers are the upper halves of the VSX registers vsr0 - vsr31.
PR KVM stores vsr0 - vsr31 in two halves, with the upper halves in the
arch.fpr[] array and the lower halves in the arch.vsr[] array, whereas
HV KVM on POWER7 stores the whole VSX register in arch.vsr[].

Signed-off-by: Paul Mackerras <paulus@samba.org>
[agraf: fix whitespace, vsx compilation]
Signed-off-by: Alexander Graf <agraf@suse.de>

1 files changed, 48 insertions, 0 deletions

diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index a5af28fc3a8f..a4b645285240 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -490,6 +490,7 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
         int r;
         union kvmppc_one_reg val;
         int size;
+        long int i;
 
         size = one_reg_size(reg->id);
         if (size > sizeof(val))
@@ -506,6 +507,29 @@ int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
                 case KVM_REG_PPC_DSISR:
                         val = get_reg_val(reg->id, vcpu->arch.shared->dsisr);
                         break;
+                case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
+                        i = reg->id - KVM_REG_PPC_FPR0;
+                        val = get_reg_val(reg->id, vcpu->arch.fpr[i]);
+                        break;
+                case KVM_REG_PPC_FPSCR:
+                        val = get_reg_val(reg->id, vcpu->arch.fpscr);
+                        break;
+#ifdef CONFIG_ALTIVEC
+                case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
+                        if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
+                                r = -ENXIO;
+                                break;
+                        }
+                        val.vval = vcpu->arch.vr[reg->id - KVM_REG_PPC_VR0];
+                        break;
+                case KVM_REG_PPC_VSCR:
+                        if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
+                                r = -ENXIO;
+                                break;
+                        }
+                        val = get_reg_val(reg->id, vcpu->arch.vscr.u[3]);
+                        break;
+#endif /* CONFIG_ALTIVEC */
                 default:
                         r = -EINVAL;
                         break;
@@ -525,6 +549,7 @@ int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
         int r;
         union kvmppc_one_reg val;
         int size;
+        long int i;
 
         size = one_reg_size(reg->id);
         if (size > sizeof(val))
@@ -544,6 +569,29 @@ int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg)
                 case KVM_REG_PPC_DSISR:
                         vcpu->arch.shared->dsisr = set_reg_val(reg->id, val);
                         break;
+                case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31:
+                        i = reg->id - KVM_REG_PPC_FPR0;
+                        vcpu->arch.fpr[i] = set_reg_val(reg->id, val);
+                        break;
+                case KVM_REG_PPC_FPSCR:
+                        vcpu->arch.fpscr = set_reg_val(reg->id, val);
+                        break;
+#ifdef CONFIG_ALTIVEC
+                case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31:
+                        if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
+                                r = -ENXIO;
+                                break;
+                        }
+                        vcpu->arch.vr[reg->id - KVM_REG_PPC_VR0] = val.vval;
+                        break;
+                case KVM_REG_PPC_VSCR:
+                        if (!cpu_has_feature(CPU_FTR_ALTIVEC)) {
+                                r = -ENXIO;
+                                break;
+                        }
+                        vcpu->arch.vscr.u[3] = set_reg_val(reg->id, val);
+                        break;
+#endif /* CONFIG_ALTIVEC */
                 default:
                         r = -EINVAL;
                         break;