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authorKumar Gala <galak@kernel.crashing.org>2007-06-27 12:07:51 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-06-29 02:58:43 -0400
commit58083dade53cd434e134cd26ae5e89061f6de1ff (patch)
tree4a70ca228ccab50c3036a37c7d1cd4e1a2825d76 /arch/powerpc/kernel/pci_32.c
parent0b1d40c4d4dd8f276d8d9730204b3a0a17ab0d61 (diff)
[POWERPC] Move common PCI code out of pci_32/pci_64
Moved the low hanging fruit that was either identical or close to it between ppc32 & ppc64 for PCI into pci-common.c Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/pci_32.c')
-rw-r--r--arch/powerpc/kernel/pci_32.c294
1 files changed, 0 insertions, 294 deletions
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index c81ffa282977..3dd931ecce91 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -1028,34 +1028,12 @@ pci_create_OF_bus_map(void)
1028 } 1028 }
1029} 1029}
1030 1030
1031static ssize_t pci_show_devspec(struct device *dev, struct device_attribute *attr, char *buf)
1032{
1033 struct pci_dev *pdev;
1034 struct device_node *np;
1035
1036 pdev = to_pci_dev (dev);
1037 np = pci_device_to_OF_node(pdev);
1038 if (np == NULL || np->full_name == NULL)
1039 return 0;
1040 return sprintf(buf, "%s", np->full_name);
1041}
1042static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
1043
1044#else /* CONFIG_PPC_OF */ 1031#else /* CONFIG_PPC_OF */
1045void pcibios_make_OF_bus_map(void) 1032void pcibios_make_OF_bus_map(void)
1046{ 1033{
1047} 1034}
1048#endif /* CONFIG_PPC_OF */ 1035#endif /* CONFIG_PPC_OF */
1049 1036
1050/* Add sysfs properties */
1051void pcibios_add_platform_entries(struct pci_dev *pdev)
1052{
1053#ifdef CONFIG_PPC_OF
1054 device_create_file(&pdev->dev, &dev_attr_devspec);
1055#endif /* CONFIG_PPC_OF */
1056}
1057
1058
1059#ifdef CONFIG_PPC_PMAC 1037#ifdef CONFIG_PPC_PMAC
1060/* 1038/*
1061 * This set of routines checks for PCI<->PCI bridges that have closed 1039 * This set of routines checks for PCI<->PCI bridges that have closed
@@ -1390,11 +1368,6 @@ void __init pcibios_fixup_bus(struct pci_bus *bus)
1390 } 1368 }
1391} 1369}
1392 1370
1393char __init *pcibios_setup(char *str)
1394{
1395 return str;
1396}
1397
1398/* the next one is stolen from the alpha port... */ 1371/* the next one is stolen from the alpha port... */
1399void __init 1372void __init
1400pcibios_update_irq(struct pci_dev *dev, int irq) 1373pcibios_update_irq(struct pci_dev *dev, int irq)
@@ -1403,64 +1376,6 @@ pcibios_update_irq(struct pci_dev *dev, int irq)
1403 /* XXX FIXME - update OF device tree node interrupt property */ 1376 /* XXX FIXME - update OF device tree node interrupt property */
1404} 1377}
1405 1378
1406#ifdef CONFIG_PPC_MERGE
1407/* XXX This is a copy of the ppc64 version. This is temporary until we start
1408 * merging the 2 PCI layers
1409 */
1410/*
1411 * Reads the interrupt pin to determine if interrupt is use by card.
1412 * If the interrupt is used, then gets the interrupt line from the
1413 * openfirmware and sets it in the pci_dev and pci_config line.
1414 */
1415int pci_read_irq_line(struct pci_dev *pci_dev)
1416{
1417 struct of_irq oirq;
1418 unsigned int virq;
1419
1420 DBG("Try to map irq for %s...\n", pci_name(pci_dev));
1421
1422 /* Try to get a mapping from the device-tree */
1423 if (of_irq_map_pci(pci_dev, &oirq)) {
1424 u8 line, pin;
1425
1426 /* If that fails, lets fallback to what is in the config
1427 * space and map that through the default controller. We
1428 * also set the type to level low since that's what PCI
1429 * interrupts are. If your platform does differently, then
1430 * either provide a proper interrupt tree or don't use this
1431 * function.
1432 */
1433 if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &pin))
1434 return -1;
1435 if (pin == 0)
1436 return -1;
1437 if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &line) ||
1438 line == 0xff) {
1439 return -1;
1440 }
1441 DBG(" -> no map ! Using irq line %d from PCI config\n", line);
1442
1443 virq = irq_create_mapping(NULL, line);
1444 if (virq != NO_IRQ)
1445 set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
1446 } else {
1447 DBG(" -> got one, spec %d cells (0x%08x...) on %s\n",
1448 oirq.size, oirq.specifier[0], oirq.controller->full_name);
1449
1450 virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
1451 oirq.size);
1452 }
1453 if(virq == NO_IRQ) {
1454 DBG(" -> failed to map !\n");
1455 return -1;
1456 }
1457 pci_dev->irq = virq;
1458
1459 return 0;
1460}
1461EXPORT_SYMBOL(pci_read_irq_line);
1462#endif /* CONFIG_PPC_MERGE */
1463
1464int pcibios_enable_device(struct pci_dev *dev, int mask) 1379int pcibios_enable_device(struct pci_dev *dev, int mask)
1465{ 1380{
1466 u16 cmd, old_cmd; 1381 u16 cmd, old_cmd;
@@ -1503,176 +1418,6 @@ pci_bus_to_hose(int bus)
1503 return NULL; 1418 return NULL;
1504} 1419}
1505 1420
1506static struct resource *__pci_mmap_make_offset(struct pci_dev *dev,
1507 resource_size_t *offset,
1508 enum pci_mmap_state mmap_state)
1509{
1510 struct pci_controller *hose = pci_bus_to_host(dev->bus);
1511 unsigned long io_offset = 0;
1512 int i, res_bit;
1513
1514 if (hose == 0)
1515 return NULL; /* should never happen */
1516
1517 /* If memory, add on the PCI bridge address offset */
1518 if (mmap_state == pci_mmap_mem) {
1519#if 0 /* See comment in pci_resource_to_user() for why this is disabled */
1520 *offset += hose->pci_mem_offset;
1521#endif
1522 res_bit = IORESOURCE_MEM;
1523 } else {
1524 io_offset = hose->io_base_virt - (void __iomem *)_IO_BASE;
1525 *offset += io_offset;
1526 res_bit = IORESOURCE_IO;
1527 }
1528
1529 /*
1530 * Check that the offset requested corresponds to one of the
1531 * resources of the device.
1532 */
1533 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
1534 struct resource *rp = &dev->resource[i];
1535 int flags = rp->flags;
1536
1537 /* treat ROM as memory (should be already) */
1538 if (i == PCI_ROM_RESOURCE)
1539 flags |= IORESOURCE_MEM;
1540
1541 /* Active and same type? */
1542 if ((flags & res_bit) == 0)
1543 continue;
1544
1545 /* In the range of this resource? */
1546 if (*offset < (rp->start & PAGE_MASK) || *offset > rp->end)
1547 continue;
1548
1549 /* found it! construct the final physical address */
1550 if (mmap_state == pci_mmap_io)
1551 *offset += hose->io_base_phys - io_offset;
1552 return rp;
1553 }
1554
1555 return NULL;
1556}
1557
1558/*
1559 * Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
1560 * device mapping.
1561 */
1562static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
1563 pgprot_t protection,
1564 enum pci_mmap_state mmap_state,
1565 int write_combine)
1566{
1567 unsigned long prot = pgprot_val(protection);
1568
1569 /* Write combine is always 0 on non-memory space mappings. On
1570 * memory space, if the user didn't pass 1, we check for a
1571 * "prefetchable" resource. This is a bit hackish, but we use
1572 * this to workaround the inability of /sysfs to provide a write
1573 * combine bit
1574 */
1575 if (mmap_state != pci_mmap_mem)
1576 write_combine = 0;
1577 else if (write_combine == 0) {
1578 if (rp->flags & IORESOURCE_PREFETCH)
1579 write_combine = 1;
1580 }
1581
1582 /* XXX would be nice to have a way to ask for write-through */
1583 prot |= _PAGE_NO_CACHE;
1584 if (write_combine)
1585 prot &= ~_PAGE_GUARDED;
1586 else
1587 prot |= _PAGE_GUARDED;
1588
1589 return __pgprot(prot);
1590}
1591
1592/*
1593 * This one is used by /dev/mem and fbdev who have no clue about the
1594 * PCI device, it tries to find the PCI device first and calls the
1595 * above routine
1596 */
1597pgprot_t pci_phys_mem_access_prot(struct file *file,
1598 unsigned long pfn,
1599 unsigned long size,
1600 pgprot_t protection)
1601{
1602 struct pci_dev *pdev = NULL;
1603 struct resource *found = NULL;
1604 unsigned long prot = pgprot_val(protection);
1605 unsigned long offset = pfn << PAGE_SHIFT;
1606 int i;
1607
1608 if (page_is_ram(pfn))
1609 return __pgprot(prot);
1610
1611 prot |= _PAGE_NO_CACHE | _PAGE_GUARDED;
1612
1613 for_each_pci_dev(pdev) {
1614 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
1615 struct resource *rp = &pdev->resource[i];
1616 int flags = rp->flags;
1617
1618 /* Active and same type? */
1619 if ((flags & IORESOURCE_MEM) == 0)
1620 continue;
1621 /* In the range of this resource? */
1622 if (offset < (rp->start & PAGE_MASK) ||
1623 offset > rp->end)
1624 continue;
1625 found = rp;
1626 break;
1627 }
1628 if (found)
1629 break;
1630 }
1631 if (found) {
1632 if (found->flags & IORESOURCE_PREFETCH)
1633 prot &= ~_PAGE_GUARDED;
1634 pci_dev_put(pdev);
1635 }
1636
1637 DBG("non-PCI map for %lx, prot: %lx\n", offset, prot);
1638
1639 return __pgprot(prot);
1640}
1641
1642
1643/*
1644 * Perform the actual remap of the pages for a PCI device mapping, as
1645 * appropriate for this architecture. The region in the process to map
1646 * is described by vm_start and vm_end members of VMA, the base physical
1647 * address is found in vm_pgoff.
1648 * The pci device structure is provided so that architectures may make mapping
1649 * decisions on a per-device or per-bus basis.
1650 *
1651 * Returns a negative error code on failure, zero on success.
1652 */
1653int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
1654 enum pci_mmap_state mmap_state,
1655 int write_combine)
1656{
1657 resource_size_t offset = vma->vm_pgoff << PAGE_SHIFT;
1658 struct resource *rp;
1659 int ret;
1660
1661 rp = __pci_mmap_make_offset(dev, &offset, mmap_state);
1662 if (rp == NULL)
1663 return -EINVAL;
1664
1665 vma->vm_pgoff = offset >> PAGE_SHIFT;
1666 vma->vm_page_prot = __pci_mmap_set_pgprot(dev, rp,
1667 vma->vm_page_prot,
1668 mmap_state, write_combine);
1669
1670 ret = remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
1671 vma->vm_end - vma->vm_start, vma->vm_page_prot);
1672
1673 return ret;
1674}
1675
1676/* Provide information on locations of various I/O regions in physical 1421/* Provide information on locations of various I/O regions in physical
1677 * memory. Do this on a per-card basis so that we choose the right 1422 * memory. Do this on a per-card basis so that we choose the right
1678 * root bridge. 1423 * root bridge.
@@ -1715,45 +1460,6 @@ long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
1715 return result; 1460 return result;
1716} 1461}
1717 1462
1718void pci_resource_to_user(const struct pci_dev *dev, int bar,
1719 const struct resource *rsrc,
1720 resource_size_t *start, resource_size_t *end)
1721{
1722 struct pci_controller *hose = pci_bus_to_host(dev->bus);
1723 resource_size_t offset = 0;
1724
1725 if (hose == NULL)
1726 return;
1727
1728 if (rsrc->flags & IORESOURCE_IO)
1729 offset = (unsigned long)hose->io_base_virt - _IO_BASE;
1730
1731 /* We pass a fully fixed up address to userland for MMIO instead of
1732 * a BAR value because X is lame and expects to be able to use that
1733 * to pass to /dev/mem !
1734 *
1735 * That means that we'll have potentially 64 bits values where some
1736 * userland apps only expect 32 (like X itself since it thinks only
1737 * Sparc has 64 bits MMIO) but if we don't do that, we break it on
1738 * 32 bits CHRPs :-(
1739 *
1740 * Hopefully, the sysfs insterface is immune to that gunk. Once X
1741 * has been fixed (and the fix spread enough), we can re-enable the
1742 * 2 lines below and pass down a BAR value to userland. In that case
1743 * we'll also have to re-enable the matching code in
1744 * __pci_mmap_make_offset().
1745 *
1746 * BenH.
1747 */
1748#if 0
1749 else if (rsrc->flags & IORESOURCE_MEM)
1750 offset = hose->pci_mem_offset;
1751#endif
1752
1753 *start = rsrc->start - offset;
1754 *end = rsrc->end - offset;
1755}
1756
1757unsigned long pci_address_to_pio(phys_addr_t address) 1463unsigned long pci_address_to_pio(phys_addr_t address)
1758{ 1464{
1759 struct pci_controller* hose = hose_head; 1465 struct pci_controller* hose = hose_head;