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authorGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
committerGlenn Elliott <gelliott@cs.unc.edu>2012-03-04 19:47:13 -0500
commitc71c03bda1e86c9d5198c5d83f712e695c4f2a1e (patch)
treeecb166cb3e2b7e2adb3b5e292245fefd23381ac8 /arch/powerpc/kernel/l2cr_6xx.S
parentea53c912f8a86a8567697115b6a0d8152beee5c8 (diff)
parent6a00f206debf8a5c8899055726ad127dbeeed098 (diff)
Merge branch 'mpi-master' into wip-k-fmlpwip-k-fmlp
Conflicts: litmus/sched_cedf.c
Diffstat (limited to 'arch/powerpc/kernel/l2cr_6xx.S')
-rw-r--r--arch/powerpc/kernel/l2cr_6xx.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/kernel/l2cr_6xx.S b/arch/powerpc/kernel/l2cr_6xx.S
index 2a2f3c3f6d80..97ec8557f974 100644
--- a/arch/powerpc/kernel/l2cr_6xx.S
+++ b/arch/powerpc/kernel/l2cr_6xx.S
@@ -151,7 +151,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
151 /**** Might be a good idea to set L2DO here - to prevent instructions 151 /**** Might be a good idea to set L2DO here - to prevent instructions
152 from getting into the cache. But since we invalidate 152 from getting into the cache. But since we invalidate
153 the next time we enable the cache it doesn't really matter. 153 the next time we enable the cache it doesn't really matter.
154 Don't do this unless you accomodate all processor variations. 154 Don't do this unless you accommodate all processor variations.
155 The bit moved on the 7450..... 155 The bit moved on the 7450.....
156 ****/ 156 ****/
157 157