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authorKumar Gala <galak@kernel.crashing.org>2008-04-30 06:23:21 -0400
committerKumar Gala <galak@kernel.crashing.org>2008-06-02 15:56:35 -0400
commitfca622c5b21a259950a2964ceca7b6c2a23c849f (patch)
tree63e8faa227230542a7f9cc17050e42ffebd9f64f /arch/powerpc/kernel/head_40x.S
parent369e757b65d4a5e49bae7cfaf671e784f891cfbe (diff)
[POWERPC] 40x/Book-E: Save/restore volatile exception registers
On machines with more than one exception level any system register that might be modified by the "normal" exception level needs to be saved and restored on taking a higher level exception. We already are saving and restoring ESR and DEAR. For critical level add SRR0/1. For debug level add CSRR0/1 and SRR0/1. For machine check level add DSRR0/1, CSRR0/1, and SRR0/1. On FSL Book-E parts we always save/restore the MAS registers for critical, debug, and machine check level exceptions. On 44x we always save/restore the MMUCR. Additionally, we save and restore the ksp_limit since we have to adjust it for each exception level. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/kernel/head_40x.S')
-rw-r--r--arch/powerpc/kernel/head_40x.S6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S
index f2cf60d38f78..56d8e5d90c5b 100644
--- a/arch/powerpc/kernel/head_40x.S
+++ b/arch/powerpc/kernel/head_40x.S
@@ -93,6 +93,12 @@ _ENTRY(crit_r10)
93 .space 4 93 .space 4
94_ENTRY(crit_r11) 94_ENTRY(crit_r11)
95 .space 4 95 .space 4
96_ENTRY(crit_srr0)
97 .space 4
98_ENTRY(crit_srr1)
99 .space 4
100_ENTRY(saved_ksp_limit)
101 .space 4
96 102
97/* 103/*
98 * Exception vector entry code. This code runs with address translation 104 * Exception vector entry code. This code runs with address translation