powerpc: Use names rather than numbers for SPRGs (v2)

The kernel uses SPRG registers for various purposes, typically in
low level assembly code as scratch registers or to hold per-cpu
global infos such as the PACA or the current thread_info pointer.

We want to be able to easily shuffle the usage of those registers
as some implementations have specific constraints realted to some
of them, for example, some have userspace readable aliases, etc..
and the current choice isn't always the best.

This patch should not change any code generation, and replaces the
usage of SPRN_SPRGn everywhere in the kernel with a named replacement
and adds documentation next to the definition of the names as to
what those are used for on each processor family.

The only parts that still use the original numbers are bits of KVM
or suspend/resume code that just blindly needs to save/restore all
the SPRGs.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

1 files changed, 20 insertions, 20 deletions

diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index fc2132942754..829c3fe7c5a2 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -244,8 +244,8 @@ __secondary_hold_acknowledge:
  * task's thread_struct.
  */
 #define EXCEPTION_PROLOG        \
-        mtspr   SPRN_SPRG0,r10; \
-        mtspr   SPRN_SPRG1,r11; \
+        mtspr   SPRN_SPRG_SCRATCH0,r10; \
+        mtspr   SPRN_SPRG_SCRATCH1,r11; \
         mfcr    r10;            \
         EXCEPTION_PROLOG_1;     \
         EXCEPTION_PROLOG_2
@@ -255,7 +255,7 @@ __secondary_hold_acknowledge:
         andi.   r11,r11,MSR_PR; \
         tophys(r11,r1);                 /* use tophys(r1) if kernel */ \
         beq     1f;             \
-        mfspr   r11,SPRN_SPRG3; \
+        mfspr   r11,SPRN_SPRG_THREAD;   \
         lwz     r11,THREAD_INFO-THREAD(r11);    \
         addi    r11,r11,THREAD_SIZE;    \
         tophys(r11,r11);        \
@@ -267,9 +267,9 @@ __secondary_hold_acknowledge:
         stw     r10,_CCR(r11);          /* save registers */ \
         stw     r12,GPR12(r11); \
         stw     r9,GPR9(r11);   \
-        mfspr   r10,SPRN_SPRG0; \
+        mfspr   r10,SPRN_SPRG_SCRATCH0; \
         stw     r10,GPR10(r11); \
-        mfspr   r12,SPRN_SPRG1; \
+        mfspr   r12,SPRN_SPRG_SCRATCH1; \
         stw     r12,GPR11(r11); \
         mflr    r10;            \
         stw     r10,_LINK(r11); \
@@ -355,11 +355,11 @@ i##n:								\
  *      -- paulus.
  */
         . = 0x200
-        mtspr   SPRN_SPRG0,r10
-        mtspr   SPRN_SPRG1,r11
+        mtspr   SPRN_SPRG_SCRATCH0,r10
+        mtspr   SPRN_SPRG_SCRATCH1,r11
         mfcr    r10
 #ifdef CONFIG_PPC_CHRP
-        mfspr   r11,SPRN_SPRG2
+        mfspr   r11,SPRN_SPRG_RTAS
         cmpwi   0,r11,0
         bne     7f
 #endif /* CONFIG_PPC_CHRP */
@@ -367,7 +367,7 @@ i##n:								\
 7:      EXCEPTION_PROLOG_2
         addi    r3,r1,STACK_FRAME_OVERHEAD
 #ifdef CONFIG_PPC_CHRP
-        mfspr   r4,SPRN_SPRG2
+        mfspr   r4,SPRN_SPRG_RTAS
         cmpwi   cr1,r4,0
         bne     cr1,1f
 #endif
@@ -485,7 +485,7 @@ InstructionTLBMiss:
         mfspr   r3,SPRN_IMISS
         lis     r1,PAGE_OFFSET@h                /* check if kernel address */
         cmplw   0,r1,r3
-        mfspr   r2,SPRN_SPRG3
+        mfspr   r2,SPRN_SPRG_THREAD
         li      r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
         lwz     r2,PGDIR(r2)
         bge-    112f
@@ -559,7 +559,7 @@ DataLoadTLBMiss:
         mfspr   r3,SPRN_DMISS
         lis     r1,PAGE_OFFSET@h                /* check if kernel address */
         cmplw   0,r1,r3
-        mfspr   r2,SPRN_SPRG3
+        mfspr   r2,SPRN_SPRG_THREAD
         li      r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */
         lwz     r2,PGDIR(r2)
         bge-    112f
@@ -598,12 +598,12 @@ END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
         mtcrf   0x80,r2
 BEGIN_MMU_FTR_SECTION
         li      r0,1
-        mfspr   r1,SPRN_SPRG4
+        mfspr   r1,SPRN_SPRG_603_LRU
         rlwinm  r2,r3,20,27,31          /* Get Address bits 15:19 */
         slw     r0,r0,r2
         xor     r1,r0,r1
         srw     r0,r1,r2
-        mtspr   SPRN_SPRG4,r1
+        mtspr   SPRN_SPRG_603_LRU,r1
         mfspr   r2,SPRN_SRR1
         rlwimi  r2,r0,31-14,14,14
         mtspr   SPRN_SRR1,r2
@@ -643,7 +643,7 @@ DataStoreTLBMiss:
         mfspr   r3,SPRN_DMISS
         lis     r1,PAGE_OFFSET@h                /* check if kernel address */
         cmplw   0,r1,r3
-        mfspr   r2,SPRN_SPRG3
+        mfspr   r2,SPRN_SPRG_THREAD
         li      r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */
         lwz     r2,PGDIR(r2)
         bge-    112f
@@ -678,12 +678,12 @@ END_FTR_SECTION_IFCLR(CPU_FTR_NEED_COHERENT)
         mtcrf   0x80,r2
 BEGIN_MMU_FTR_SECTION
         li      r0,1
-        mfspr   r1,SPRN_SPRG4
+        mfspr   r1,SPRN_SPRG_603_LRU
         rlwinm  r2,r3,20,27,31          /* Get Address bits 15:19 */
         slw     r0,r0,r2
         xor     r1,r0,r1
         srw     r0,r1,r2
-        mtspr   SPRN_SPRG4,r1
+        mtspr   SPRN_SPRG_603_LRU,r1
         mfspr   r2,SPRN_SRR1
         rlwimi  r2,r0,31-14,14,14
         mtspr   SPRN_SRR1,r2
@@ -864,9 +864,9 @@ __secondary_start:
         tophys(r4,r2)
         addi    r4,r4,THREAD    /* phys address of our thread_struct */
         CLR_TOP32(r4)
-        mtspr   SPRN_SPRG3,r4
+        mtspr   SPRN_SPRG_THREAD,r4
         li      r3,0
-        mtspr   SPRN_SPRG2,r3   /* 0 => not in RTAS */
+        mtspr   SPRN_SPRG_RTAS,r3       /* 0 => not in RTAS */
 
         /* enable MMU and jump to start_secondary */
         li      r4,MSR_KERNEL
@@ -947,9 +947,9 @@ start_here:
         tophys(r4,r2)
         addi    r4,r4,THREAD    /* init task's THREAD */
         CLR_TOP32(r4)
-        mtspr   SPRN_SPRG3,r4
+        mtspr   SPRN_SPRG_THREAD,r4
         li      r3,0
-        mtspr   SPRN_SPRG2,r3   /* 0 => not in RTAS */
+        mtspr   SPRN_SPRG_RTAS,r3       /* 0 => not in RTAS */
 
         /* stack */
         lis     r1,init_thread_union@ha