diff options
author | Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com> | 2014-04-01 03:13:26 -0400 |
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committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2014-04-07 08:35:27 -0400 |
commit | b3d627a5f2bf1a9a486f65af6f7c2ce0e09b3d12 (patch) | |
tree | 3b04d01b8e7ed6b48c28fed17479eec7225e3a75 /arch/powerpc/include | |
parent | 0ca97886fece9e1acd71ade4ca3a250945c8fc8b (diff) |
cpufreq: powernv: cpufreq driver for powernv platform
Backend driver to dynamically set voltage and frequency on
IBM POWER non-virtualized platforms. Power management SPRs
are used to set the required PState.
This driver works in conjunction with cpufreq governors
like 'ondemand' to provide a demand based frequency and
voltage setting on IBM POWER non-virtualized platforms.
PState table is obtained from OPAL v3 firmware through device
tree.
powernv_cpufreq back-end driver would parse the relevant device-tree
nodes and initialise the cpufreq subsystem on powernv platform.
The code was originally written by svaidy@linux.vnet.ibm.com. Over
time it was modified to accomodate bug-fixes as well as updates to the
the cpu-freq core. Relevant portions of the change logs corresponding
to those modifications are noted below:
* The policy->cpus needs to be populated in a hotplug-invariant
manner instead of using cpu_sibling_mask() which varies with
cpu-hotplug. This is because the cpufreq core code copies this
content into policy->related_cpus mask which should not vary on
cpu-hotplug. [Authored by srivatsa.bhat@linux.vnet.ibm.com]
* Create a helper routine that can return the cpu-frequency for the
corresponding pstate_id. Also, cache the values of the pstate_max,
pstate_min and pstate_nominal and nr_pstates in a static structure
so that they can be reused in the future to perform any
validations. [Authored by ego@linux.vnet.ibm.com]
* Create a driver attribute named cpuinfo_nominal_freq which creates
a sysfs read-only file named cpuinfo_nominal_freq. Export the
frequency corresponding to the nominal_pstate through this
interface.
Nominal frequency is the highest non-turbo frequency for the
platform. This is generally used for setting governor policies
from user space for optimal energy efficiency. [Authored by
ego@linux.vnet.ibm.com]
* Implement a powernv_cpufreq_get(unsigned int cpu) method which will
return the current operating frequency. Export this via the sysfs
interface cpuinfo_cur_freq by setting powernv_cpufreq_driver.get to
powernv_cpufreq_get(). [Authored by ego@linux.vnet.ibm.com]
[Change log updated by ego@linux.vnet.ibm.com]
Reviewed-by: Preeti U Murthy <preeti@linux.vnet.ibm.com>
Signed-off-by: Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>
Signed-off-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
Signed-off-by: Anton Blanchard <anton@samba.org>
Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r-- | arch/powerpc/include/asm/reg.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 1a36b8ede417..2189f8f2ca88 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h | |||
@@ -271,6 +271,10 @@ | |||
271 | #define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */ | 271 | #define SPRN_HSRR1 0x13B /* Hypervisor Save/Restore 1 */ |
272 | #define SPRN_IC 0x350 /* Virtual Instruction Count */ | 272 | #define SPRN_IC 0x350 /* Virtual Instruction Count */ |
273 | #define SPRN_VTB 0x351 /* Virtual Time Base */ | 273 | #define SPRN_VTB 0x351 /* Virtual Time Base */ |
274 | #define SPRN_PMICR 0x354 /* Power Management Idle Control Reg */ | ||
275 | #define SPRN_PMSR 0x355 /* Power Management Status Reg */ | ||
276 | #define SPRN_PMCR 0x374 /* Power Management Control Register */ | ||
277 | |||
274 | /* HFSCR and FSCR bit numbers are the same */ | 278 | /* HFSCR and FSCR bit numbers are the same */ |
275 | #define FSCR_TAR_LG 8 /* Enable Target Address Register */ | 279 | #define FSCR_TAR_LG 8 /* Enable Target Address Register */ |
276 | #define FSCR_EBB_LG 7 /* Enable Event Based Branching */ | 280 | #define FSCR_EBB_LG 7 /* Enable Event Based Branching */ |