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authorMichael Neuling <mikey@neuling.org>2013-02-13 11:21:35 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-02-15 00:58:52 -0500
commit98ae22e15b430bfed5def01ac1a88ec9396284c8 (patch)
treedc4119b4c88a094039206851c7f12f42b4ce75df /arch/powerpc/include
parentafc07701ced6463786d09a3b9baf894c1397e991 (diff)
powerpc: Add helper functions for transactional memory context switching
Here we add the helper functions to be used when context switching. These allow us to fully reclaim and recheckpoint a transaction. We introduce a new paca field called tm_scratch to help us store away register values when doing the low level tm reclaim register save. Signed-off-by: Matt Evans <matt@ozlabs.org> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include')
-rw-r--r--arch/powerpc/include/asm/reg.h2
-rw-r--r--arch/powerpc/include/asm/tm.h20
2 files changed, 21 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index 7844c285f6e1..eee2a60994bf 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -797,7 +797,7 @@
797 * HV mode in which case it is HSPRG0 797 * HV mode in which case it is HSPRG0
798 * 798 *
799 * 64-bit server: 799 * 64-bit server:
800 * - SPRG0 unused (reserved for HV on Power4) 800 * - SPRG0 scratch for TM recheckpoint/reclaim (reserved for HV on Power4)
801 * - SPRG2 scratch for exception vectors 801 * - SPRG2 scratch for exception vectors
802 * - SPRG3 CPU and NUMA node for VDSO getcpu (user visible) 802 * - SPRG3 CPU and NUMA node for VDSO getcpu (user visible)
803 * - HSPRG0 stores PACA in HV mode 803 * - HSPRG0 stores PACA in HV mode
diff --git a/arch/powerpc/include/asm/tm.h b/arch/powerpc/include/asm/tm.h
new file mode 100644
index 000000000000..4b4449abf3f8
--- /dev/null
+++ b/arch/powerpc/include/asm/tm.h
@@ -0,0 +1,20 @@
1/*
2 * Transactional memory support routines to reclaim and recheckpoint
3 * transactional process state.
4 *
5 * Copyright 2012 Matt Evans & Michael Neuling, IBM Corporation.
6 */
7
8#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
9extern void do_load_up_transact_fpu(struct thread_struct *thread);
10extern void do_load_up_transact_altivec(struct thread_struct *thread);
11#endif
12
13extern void tm_enable(void);
14extern void tm_reclaim(struct thread_struct *thread,
15 unsigned long orig_msr, uint8_t cause);
16extern void tm_recheckpoint(struct thread_struct *thread,
17 unsigned long orig_msr);
18extern void tm_abort(uint8_t cause);
19extern void tm_save_sprs(struct thread_struct *thread);
20extern void tm_restore_sprs(struct thread_struct *thread);