diff options
author | Andrea Bastoni <bastoni@cs.unc.edu> | 2010-05-30 19:16:45 -0400 |
---|---|---|
committer | Andrea Bastoni <bastoni@cs.unc.edu> | 2010-05-30 19:16:45 -0400 |
commit | ada47b5fe13d89735805b566185f4885f5a3f750 (patch) | |
tree | 644b88f8a71896307d71438e9b3af49126ffb22b /arch/powerpc/include | |
parent | 43e98717ad40a4ae64545b5ba047c7b86aa44f4f (diff) | |
parent | 3280f21d43ee541f97f8cda5792150d2dbec20d5 (diff) |
Merge branch 'wip-2.6.34' into old-private-masterarchived-private-master
Diffstat (limited to 'arch/powerpc/include')
92 files changed, 1795 insertions, 844 deletions
diff --git a/arch/powerpc/include/asm/asm-compat.h b/arch/powerpc/include/asm/asm-compat.h index 8f0fe7971949..a9b91ed3d4b9 100644 --- a/arch/powerpc/include/asm/asm-compat.h +++ b/arch/powerpc/include/asm/asm-compat.h | |||
@@ -2,6 +2,7 @@ | |||
2 | #define _ASM_POWERPC_ASM_COMPAT_H | 2 | #define _ASM_POWERPC_ASM_COMPAT_H |
3 | 3 | ||
4 | #include <asm/types.h> | 4 | #include <asm/types.h> |
5 | #include <asm/ppc-opcode.h> | ||
5 | 6 | ||
6 | #ifdef __ASSEMBLY__ | 7 | #ifdef __ASSEMBLY__ |
7 | # define stringify_in_c(...) __VA_ARGS__ | 8 | # define stringify_in_c(...) __VA_ARGS__ |
@@ -24,9 +25,10 @@ | |||
24 | #define PPC_LONG stringify_in_c(.llong) | 25 | #define PPC_LONG stringify_in_c(.llong) |
25 | #define PPC_LONG_ALIGN stringify_in_c(.balign 8) | 26 | #define PPC_LONG_ALIGN stringify_in_c(.balign 8) |
26 | #define PPC_TLNEI stringify_in_c(tdnei) | 27 | #define PPC_TLNEI stringify_in_c(tdnei) |
27 | #define PPC_LLARX stringify_in_c(ldarx) | 28 | #define PPC_LLARX(t, a, b, eh) PPC_LDARX(t, a, b, eh) |
28 | #define PPC_STLCX stringify_in_c(stdcx.) | 29 | #define PPC_STLCX stringify_in_c(stdcx.) |
29 | #define PPC_CNTLZL stringify_in_c(cntlzd) | 30 | #define PPC_CNTLZL stringify_in_c(cntlzd) |
31 | #define PPC_LR_STKOFF 16 | ||
30 | 32 | ||
31 | /* Move to CR, single-entry optimized version. Only available | 33 | /* Move to CR, single-entry optimized version. Only available |
32 | * on POWER4 and later. | 34 | * on POWER4 and later. |
@@ -46,10 +48,11 @@ | |||
46 | #define PPC_LONG stringify_in_c(.long) | 48 | #define PPC_LONG stringify_in_c(.long) |
47 | #define PPC_LONG_ALIGN stringify_in_c(.balign 4) | 49 | #define PPC_LONG_ALIGN stringify_in_c(.balign 4) |
48 | #define PPC_TLNEI stringify_in_c(twnei) | 50 | #define PPC_TLNEI stringify_in_c(twnei) |
49 | #define PPC_LLARX stringify_in_c(lwarx) | 51 | #define PPC_LLARX(t, a, b, eh) PPC_LWARX(t, a, b, eh) |
50 | #define PPC_STLCX stringify_in_c(stwcx.) | 52 | #define PPC_STLCX stringify_in_c(stwcx.) |
51 | #define PPC_CNTLZL stringify_in_c(cntlzw) | 53 | #define PPC_CNTLZL stringify_in_c(cntlzw) |
52 | #define PPC_MTOCRF stringify_in_c(mtcrf) | 54 | #define PPC_MTOCRF stringify_in_c(mtcrf) |
55 | #define PPC_LR_STKOFF 4 | ||
53 | 56 | ||
54 | #endif | 57 | #endif |
55 | 58 | ||
diff --git a/arch/powerpc/include/asm/asm-offsets.h b/arch/powerpc/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/powerpc/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/powerpc/include/asm/async_tx.h b/arch/powerpc/include/asm/async_tx.h new file mode 100644 index 000000000000..8b2dc55d01ab --- /dev/null +++ b/arch/powerpc/include/asm/async_tx.h | |||
@@ -0,0 +1,47 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008-2009 DENX Software Engineering. | ||
3 | * | ||
4 | * Author: Yuri Tikhonov <yur@emcraft.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the Free | ||
8 | * Software Foundation; either version 2 of the License, or (at your option) | ||
9 | * any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
14 | * more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License along with | ||
17 | * this program; if not, write to the Free Software Foundation, Inc., 59 | ||
18 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
19 | * | ||
20 | * The full GNU General Public License is included in this distribution in the | ||
21 | * file called COPYING. | ||
22 | */ | ||
23 | #ifndef _ASM_POWERPC_ASYNC_TX_H_ | ||
24 | #define _ASM_POWERPC_ASYNC_TX_H_ | ||
25 | |||
26 | #if defined(CONFIG_440SPe) || defined(CONFIG_440SP) | ||
27 | extern struct dma_chan * | ||
28 | ppc440spe_async_tx_find_best_channel(enum dma_transaction_type cap, | ||
29 | struct page **dst_lst, int dst_cnt, struct page **src_lst, | ||
30 | int src_cnt, size_t src_sz); | ||
31 | |||
32 | #define async_tx_find_channel(dep, cap, dst_lst, dst_cnt, src_lst, \ | ||
33 | src_cnt, src_sz) \ | ||
34 | ppc440spe_async_tx_find_best_channel(cap, dst_lst, dst_cnt, src_lst, \ | ||
35 | src_cnt, src_sz) | ||
36 | #else | ||
37 | |||
38 | #define async_tx_find_channel(dep, type, dst, dst_count, src, src_count, len) \ | ||
39 | __async_tx_find_channel(dep, type) | ||
40 | |||
41 | struct dma_chan * | ||
42 | __async_tx_find_channel(struct async_submit_ctl *submit, | ||
43 | enum dma_transaction_type tx_type); | ||
44 | |||
45 | #endif | ||
46 | |||
47 | #endif | ||
diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h index 4012483b1899..b8f152ece025 100644 --- a/arch/powerpc/include/asm/atomic.h +++ b/arch/powerpc/include/asm/atomic.h | |||
@@ -49,13 +49,13 @@ static __inline__ int atomic_add_return(int a, atomic_t *v) | |||
49 | int t; | 49 | int t; |
50 | 50 | ||
51 | __asm__ __volatile__( | 51 | __asm__ __volatile__( |
52 | LWSYNC_ON_SMP | 52 | PPC_RELEASE_BARRIER |
53 | "1: lwarx %0,0,%2 # atomic_add_return\n\ | 53 | "1: lwarx %0,0,%2 # atomic_add_return\n\ |
54 | add %0,%1,%0\n" | 54 | add %0,%1,%0\n" |
55 | PPC405_ERR77(0,%2) | 55 | PPC405_ERR77(0,%2) |
56 | " stwcx. %0,0,%2 \n\ | 56 | " stwcx. %0,0,%2 \n\ |
57 | bne- 1b" | 57 | bne- 1b" |
58 | ISYNC_ON_SMP | 58 | PPC_ACQUIRE_BARRIER |
59 | : "=&r" (t) | 59 | : "=&r" (t) |
60 | : "r" (a), "r" (&v->counter) | 60 | : "r" (a), "r" (&v->counter) |
61 | : "cc", "memory"); | 61 | : "cc", "memory"); |
@@ -85,13 +85,13 @@ static __inline__ int atomic_sub_return(int a, atomic_t *v) | |||
85 | int t; | 85 | int t; |
86 | 86 | ||
87 | __asm__ __volatile__( | 87 | __asm__ __volatile__( |
88 | LWSYNC_ON_SMP | 88 | PPC_RELEASE_BARRIER |
89 | "1: lwarx %0,0,%2 # atomic_sub_return\n\ | 89 | "1: lwarx %0,0,%2 # atomic_sub_return\n\ |
90 | subf %0,%1,%0\n" | 90 | subf %0,%1,%0\n" |
91 | PPC405_ERR77(0,%2) | 91 | PPC405_ERR77(0,%2) |
92 | " stwcx. %0,0,%2 \n\ | 92 | " stwcx. %0,0,%2 \n\ |
93 | bne- 1b" | 93 | bne- 1b" |
94 | ISYNC_ON_SMP | 94 | PPC_ACQUIRE_BARRIER |
95 | : "=&r" (t) | 95 | : "=&r" (t) |
96 | : "r" (a), "r" (&v->counter) | 96 | : "r" (a), "r" (&v->counter) |
97 | : "cc", "memory"); | 97 | : "cc", "memory"); |
@@ -119,13 +119,13 @@ static __inline__ int atomic_inc_return(atomic_t *v) | |||
119 | int t; | 119 | int t; |
120 | 120 | ||
121 | __asm__ __volatile__( | 121 | __asm__ __volatile__( |
122 | LWSYNC_ON_SMP | 122 | PPC_RELEASE_BARRIER |
123 | "1: lwarx %0,0,%1 # atomic_inc_return\n\ | 123 | "1: lwarx %0,0,%1 # atomic_inc_return\n\ |
124 | addic %0,%0,1\n" | 124 | addic %0,%0,1\n" |
125 | PPC405_ERR77(0,%1) | 125 | PPC405_ERR77(0,%1) |
126 | " stwcx. %0,0,%1 \n\ | 126 | " stwcx. %0,0,%1 \n\ |
127 | bne- 1b" | 127 | bne- 1b" |
128 | ISYNC_ON_SMP | 128 | PPC_ACQUIRE_BARRIER |
129 | : "=&r" (t) | 129 | : "=&r" (t) |
130 | : "r" (&v->counter) | 130 | : "r" (&v->counter) |
131 | : "cc", "xer", "memory"); | 131 | : "cc", "xer", "memory"); |
@@ -163,13 +163,13 @@ static __inline__ int atomic_dec_return(atomic_t *v) | |||
163 | int t; | 163 | int t; |
164 | 164 | ||
165 | __asm__ __volatile__( | 165 | __asm__ __volatile__( |
166 | LWSYNC_ON_SMP | 166 | PPC_RELEASE_BARRIER |
167 | "1: lwarx %0,0,%1 # atomic_dec_return\n\ | 167 | "1: lwarx %0,0,%1 # atomic_dec_return\n\ |
168 | addic %0,%0,-1\n" | 168 | addic %0,%0,-1\n" |
169 | PPC405_ERR77(0,%1) | 169 | PPC405_ERR77(0,%1) |
170 | " stwcx. %0,0,%1\n\ | 170 | " stwcx. %0,0,%1\n\ |
171 | bne- 1b" | 171 | bne- 1b" |
172 | ISYNC_ON_SMP | 172 | PPC_ACQUIRE_BARRIER |
173 | : "=&r" (t) | 173 | : "=&r" (t) |
174 | : "r" (&v->counter) | 174 | : "r" (&v->counter) |
175 | : "cc", "xer", "memory"); | 175 | : "cc", "xer", "memory"); |
@@ -194,7 +194,7 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) | |||
194 | int t; | 194 | int t; |
195 | 195 | ||
196 | __asm__ __volatile__ ( | 196 | __asm__ __volatile__ ( |
197 | LWSYNC_ON_SMP | 197 | PPC_RELEASE_BARRIER |
198 | "1: lwarx %0,0,%1 # atomic_add_unless\n\ | 198 | "1: lwarx %0,0,%1 # atomic_add_unless\n\ |
199 | cmpw 0,%0,%3 \n\ | 199 | cmpw 0,%0,%3 \n\ |
200 | beq- 2f \n\ | 200 | beq- 2f \n\ |
@@ -202,7 +202,7 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) | |||
202 | PPC405_ERR77(0,%2) | 202 | PPC405_ERR77(0,%2) |
203 | " stwcx. %0,0,%1 \n\ | 203 | " stwcx. %0,0,%1 \n\ |
204 | bne- 1b \n" | 204 | bne- 1b \n" |
205 | ISYNC_ON_SMP | 205 | PPC_ACQUIRE_BARRIER |
206 | " subf %0,%2,%0 \n\ | 206 | " subf %0,%2,%0 \n\ |
207 | 2:" | 207 | 2:" |
208 | : "=&r" (t) | 208 | : "=&r" (t) |
@@ -227,7 +227,7 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v) | |||
227 | int t; | 227 | int t; |
228 | 228 | ||
229 | __asm__ __volatile__( | 229 | __asm__ __volatile__( |
230 | LWSYNC_ON_SMP | 230 | PPC_RELEASE_BARRIER |
231 | "1: lwarx %0,0,%1 # atomic_dec_if_positive\n\ | 231 | "1: lwarx %0,0,%1 # atomic_dec_if_positive\n\ |
232 | cmpwi %0,1\n\ | 232 | cmpwi %0,1\n\ |
233 | addi %0,%0,-1\n\ | 233 | addi %0,%0,-1\n\ |
@@ -235,7 +235,7 @@ static __inline__ int atomic_dec_if_positive(atomic_t *v) | |||
235 | PPC405_ERR77(0,%1) | 235 | PPC405_ERR77(0,%1) |
236 | " stwcx. %0,0,%1\n\ | 236 | " stwcx. %0,0,%1\n\ |
237 | bne- 1b" | 237 | bne- 1b" |
238 | ISYNC_ON_SMP | 238 | PPC_ACQUIRE_BARRIER |
239 | "\n\ | 239 | "\n\ |
240 | 2:" : "=&b" (t) | 240 | 2:" : "=&b" (t) |
241 | : "r" (&v->counter) | 241 | : "r" (&v->counter) |
@@ -286,12 +286,12 @@ static __inline__ long atomic64_add_return(long a, atomic64_t *v) | |||
286 | long t; | 286 | long t; |
287 | 287 | ||
288 | __asm__ __volatile__( | 288 | __asm__ __volatile__( |
289 | LWSYNC_ON_SMP | 289 | PPC_RELEASE_BARRIER |
290 | "1: ldarx %0,0,%2 # atomic64_add_return\n\ | 290 | "1: ldarx %0,0,%2 # atomic64_add_return\n\ |
291 | add %0,%1,%0\n\ | 291 | add %0,%1,%0\n\ |
292 | stdcx. %0,0,%2 \n\ | 292 | stdcx. %0,0,%2 \n\ |
293 | bne- 1b" | 293 | bne- 1b" |
294 | ISYNC_ON_SMP | 294 | PPC_ACQUIRE_BARRIER |
295 | : "=&r" (t) | 295 | : "=&r" (t) |
296 | : "r" (a), "r" (&v->counter) | 296 | : "r" (a), "r" (&v->counter) |
297 | : "cc", "memory"); | 297 | : "cc", "memory"); |
@@ -320,12 +320,12 @@ static __inline__ long atomic64_sub_return(long a, atomic64_t *v) | |||
320 | long t; | 320 | long t; |
321 | 321 | ||
322 | __asm__ __volatile__( | 322 | __asm__ __volatile__( |
323 | LWSYNC_ON_SMP | 323 | PPC_RELEASE_BARRIER |
324 | "1: ldarx %0,0,%2 # atomic64_sub_return\n\ | 324 | "1: ldarx %0,0,%2 # atomic64_sub_return\n\ |
325 | subf %0,%1,%0\n\ | 325 | subf %0,%1,%0\n\ |
326 | stdcx. %0,0,%2 \n\ | 326 | stdcx. %0,0,%2 \n\ |
327 | bne- 1b" | 327 | bne- 1b" |
328 | ISYNC_ON_SMP | 328 | PPC_ACQUIRE_BARRIER |
329 | : "=&r" (t) | 329 | : "=&r" (t) |
330 | : "r" (a), "r" (&v->counter) | 330 | : "r" (a), "r" (&v->counter) |
331 | : "cc", "memory"); | 331 | : "cc", "memory"); |
@@ -352,12 +352,12 @@ static __inline__ long atomic64_inc_return(atomic64_t *v) | |||
352 | long t; | 352 | long t; |
353 | 353 | ||
354 | __asm__ __volatile__( | 354 | __asm__ __volatile__( |
355 | LWSYNC_ON_SMP | 355 | PPC_RELEASE_BARRIER |
356 | "1: ldarx %0,0,%1 # atomic64_inc_return\n\ | 356 | "1: ldarx %0,0,%1 # atomic64_inc_return\n\ |
357 | addic %0,%0,1\n\ | 357 | addic %0,%0,1\n\ |
358 | stdcx. %0,0,%1 \n\ | 358 | stdcx. %0,0,%1 \n\ |
359 | bne- 1b" | 359 | bne- 1b" |
360 | ISYNC_ON_SMP | 360 | PPC_ACQUIRE_BARRIER |
361 | : "=&r" (t) | 361 | : "=&r" (t) |
362 | : "r" (&v->counter) | 362 | : "r" (&v->counter) |
363 | : "cc", "xer", "memory"); | 363 | : "cc", "xer", "memory"); |
@@ -394,12 +394,12 @@ static __inline__ long atomic64_dec_return(atomic64_t *v) | |||
394 | long t; | 394 | long t; |
395 | 395 | ||
396 | __asm__ __volatile__( | 396 | __asm__ __volatile__( |
397 | LWSYNC_ON_SMP | 397 | PPC_RELEASE_BARRIER |
398 | "1: ldarx %0,0,%1 # atomic64_dec_return\n\ | 398 | "1: ldarx %0,0,%1 # atomic64_dec_return\n\ |
399 | addic %0,%0,-1\n\ | 399 | addic %0,%0,-1\n\ |
400 | stdcx. %0,0,%1\n\ | 400 | stdcx. %0,0,%1\n\ |
401 | bne- 1b" | 401 | bne- 1b" |
402 | ISYNC_ON_SMP | 402 | PPC_ACQUIRE_BARRIER |
403 | : "=&r" (t) | 403 | : "=&r" (t) |
404 | : "r" (&v->counter) | 404 | : "r" (&v->counter) |
405 | : "cc", "xer", "memory"); | 405 | : "cc", "xer", "memory"); |
@@ -419,13 +419,13 @@ static __inline__ long atomic64_dec_if_positive(atomic64_t *v) | |||
419 | long t; | 419 | long t; |
420 | 420 | ||
421 | __asm__ __volatile__( | 421 | __asm__ __volatile__( |
422 | LWSYNC_ON_SMP | 422 | PPC_RELEASE_BARRIER |
423 | "1: ldarx %0,0,%1 # atomic64_dec_if_positive\n\ | 423 | "1: ldarx %0,0,%1 # atomic64_dec_if_positive\n\ |
424 | addic. %0,%0,-1\n\ | 424 | addic. %0,%0,-1\n\ |
425 | blt- 2f\n\ | 425 | blt- 2f\n\ |
426 | stdcx. %0,0,%1\n\ | 426 | stdcx. %0,0,%1\n\ |
427 | bne- 1b" | 427 | bne- 1b" |
428 | ISYNC_ON_SMP | 428 | PPC_ACQUIRE_BARRIER |
429 | "\n\ | 429 | "\n\ |
430 | 2:" : "=&r" (t) | 430 | 2:" : "=&r" (t) |
431 | : "r" (&v->counter) | 431 | : "r" (&v->counter) |
@@ -451,14 +451,14 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) | |||
451 | long t; | 451 | long t; |
452 | 452 | ||
453 | __asm__ __volatile__ ( | 453 | __asm__ __volatile__ ( |
454 | LWSYNC_ON_SMP | 454 | PPC_RELEASE_BARRIER |
455 | "1: ldarx %0,0,%1 # atomic_add_unless\n\ | 455 | "1: ldarx %0,0,%1 # atomic_add_unless\n\ |
456 | cmpd 0,%0,%3 \n\ | 456 | cmpd 0,%0,%3 \n\ |
457 | beq- 2f \n\ | 457 | beq- 2f \n\ |
458 | add %0,%2,%0 \n" | 458 | add %0,%2,%0 \n" |
459 | " stdcx. %0,0,%1 \n\ | 459 | " stdcx. %0,0,%1 \n\ |
460 | bne- 1b \n" | 460 | bne- 1b \n" |
461 | ISYNC_ON_SMP | 461 | PPC_ACQUIRE_BARRIER |
462 | " subf %0,%2,%0 \n\ | 462 | " subf %0,%2,%0 \n\ |
463 | 2:" | 463 | 2:" |
464 | : "=&r" (t) | 464 | : "=&r" (t) |
diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h index 56f2f2ea5631..30964ae2d096 100644 --- a/arch/powerpc/include/asm/bitops.h +++ b/arch/powerpc/include/asm/bitops.h | |||
@@ -65,7 +65,7 @@ static __inline__ void fn(unsigned long mask, \ | |||
65 | unsigned long *p = (unsigned long *)_p; \ | 65 | unsigned long *p = (unsigned long *)_p; \ |
66 | __asm__ __volatile__ ( \ | 66 | __asm__ __volatile__ ( \ |
67 | prefix \ | 67 | prefix \ |
68 | "1:" PPC_LLARX "%0,0,%3\n" \ | 68 | "1:" PPC_LLARX(%0,0,%3,0) "\n" \ |
69 | stringify_in_c(op) "%0,%0,%2\n" \ | 69 | stringify_in_c(op) "%0,%0,%2\n" \ |
70 | PPC405_ERR77(0,%3) \ | 70 | PPC405_ERR77(0,%3) \ |
71 | PPC_STLCX "%0,0,%3\n" \ | 71 | PPC_STLCX "%0,0,%3\n" \ |
@@ -78,7 +78,7 @@ static __inline__ void fn(unsigned long mask, \ | |||
78 | 78 | ||
79 | DEFINE_BITOP(set_bits, or, "", "") | 79 | DEFINE_BITOP(set_bits, or, "", "") |
80 | DEFINE_BITOP(clear_bits, andc, "", "") | 80 | DEFINE_BITOP(clear_bits, andc, "", "") |
81 | DEFINE_BITOP(clear_bits_unlock, andc, LWSYNC_ON_SMP, "") | 81 | DEFINE_BITOP(clear_bits_unlock, andc, PPC_RELEASE_BARRIER, "") |
82 | DEFINE_BITOP(change_bits, xor, "", "") | 82 | DEFINE_BITOP(change_bits, xor, "", "") |
83 | 83 | ||
84 | static __inline__ void set_bit(int nr, volatile unsigned long *addr) | 84 | static __inline__ void set_bit(int nr, volatile unsigned long *addr) |
@@ -103,31 +103,35 @@ static __inline__ void change_bit(int nr, volatile unsigned long *addr) | |||
103 | 103 | ||
104 | /* Like DEFINE_BITOP(), with changes to the arguments to 'op' and the output | 104 | /* Like DEFINE_BITOP(), with changes to the arguments to 'op' and the output |
105 | * operands. */ | 105 | * operands. */ |
106 | #define DEFINE_TESTOP(fn, op, prefix, postfix) \ | 106 | #define DEFINE_TESTOP(fn, op, prefix, postfix, eh) \ |
107 | static __inline__ unsigned long fn( \ | 107 | static __inline__ unsigned long fn( \ |
108 | unsigned long mask, \ | 108 | unsigned long mask, \ |
109 | volatile unsigned long *_p) \ | 109 | volatile unsigned long *_p) \ |
110 | { \ | 110 | { \ |
111 | unsigned long old, t; \ | 111 | unsigned long old, t; \ |
112 | unsigned long *p = (unsigned long *)_p; \ | 112 | unsigned long *p = (unsigned long *)_p; \ |
113 | __asm__ __volatile__ ( \ | 113 | __asm__ __volatile__ ( \ |
114 | prefix \ | 114 | prefix \ |
115 | "1:" PPC_LLARX "%0,0,%3\n" \ | 115 | "1:" PPC_LLARX(%0,0,%3,eh) "\n" \ |
116 | stringify_in_c(op) "%1,%0,%2\n" \ | 116 | stringify_in_c(op) "%1,%0,%2\n" \ |
117 | PPC405_ERR77(0,%3) \ | 117 | PPC405_ERR77(0,%3) \ |
118 | PPC_STLCX "%1,0,%3\n" \ | 118 | PPC_STLCX "%1,0,%3\n" \ |
119 | "bne- 1b\n" \ | 119 | "bne- 1b\n" \ |
120 | postfix \ | 120 | postfix \ |
121 | : "=&r" (old), "=&r" (t) \ | 121 | : "=&r" (old), "=&r" (t) \ |
122 | : "r" (mask), "r" (p) \ | 122 | : "r" (mask), "r" (p) \ |
123 | : "cc", "memory"); \ | 123 | : "cc", "memory"); \ |
124 | return (old & mask); \ | 124 | return (old & mask); \ |
125 | } | 125 | } |
126 | 126 | ||
127 | DEFINE_TESTOP(test_and_set_bits, or, LWSYNC_ON_SMP, ISYNC_ON_SMP) | 127 | DEFINE_TESTOP(test_and_set_bits, or, PPC_RELEASE_BARRIER, |
128 | DEFINE_TESTOP(test_and_set_bits_lock, or, "", ISYNC_ON_SMP) | 128 | PPC_ACQUIRE_BARRIER, 0) |
129 | DEFINE_TESTOP(test_and_clear_bits, andc, LWSYNC_ON_SMP, ISYNC_ON_SMP) | 129 | DEFINE_TESTOP(test_and_set_bits_lock, or, "", |
130 | DEFINE_TESTOP(test_and_change_bits, xor, LWSYNC_ON_SMP, ISYNC_ON_SMP) | 130 | PPC_ACQUIRE_BARRIER, 1) |
131 | DEFINE_TESTOP(test_and_clear_bits, andc, PPC_RELEASE_BARRIER, | ||
132 | PPC_ACQUIRE_BARRIER, 0) | ||
133 | DEFINE_TESTOP(test_and_change_bits, xor, PPC_RELEASE_BARRIER, | ||
134 | PPC_ACQUIRE_BARRIER, 0) | ||
131 | 135 | ||
132 | static __inline__ int test_and_set_bit(unsigned long nr, | 136 | static __inline__ int test_and_set_bit(unsigned long nr, |
133 | volatile unsigned long *addr) | 137 | volatile unsigned long *addr) |
@@ -158,7 +162,7 @@ static __inline__ int test_and_change_bit(unsigned long nr, | |||
158 | 162 | ||
159 | static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr) | 163 | static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr) |
160 | { | 164 | { |
161 | __asm__ __volatile__(LWSYNC_ON_SMP "" ::: "memory"); | 165 | __asm__ __volatile__(PPC_RELEASE_BARRIER "" ::: "memory"); |
162 | __clear_bit(nr, addr); | 166 | __clear_bit(nr, addr); |
163 | } | 167 | } |
164 | 168 | ||
diff --git a/arch/powerpc/include/asm/bug.h b/arch/powerpc/include/asm/bug.h index 64e1fdca233e..2c15212e1700 100644 --- a/arch/powerpc/include/asm/bug.h +++ b/arch/powerpc/include/asm/bug.h | |||
@@ -68,7 +68,7 @@ | |||
68 | _EMIT_BUG_ENTRY \ | 68 | _EMIT_BUG_ENTRY \ |
69 | : : "i" (__FILE__), "i" (__LINE__), \ | 69 | : : "i" (__FILE__), "i" (__LINE__), \ |
70 | "i" (0), "i" (sizeof(struct bug_entry))); \ | 70 | "i" (0), "i" (sizeof(struct bug_entry))); \ |
71 | for(;;) ; \ | 71 | unreachable(); \ |
72 | } while (0) | 72 | } while (0) |
73 | 73 | ||
74 | #define BUG_ON(x) do { \ | 74 | #define BUG_ON(x) do { \ |
diff --git a/arch/powerpc/include/asm/cacheflush.h b/arch/powerpc/include/asm/cacheflush.h index ba667a383b8c..ab9e402518e8 100644 --- a/arch/powerpc/include/asm/cacheflush.h +++ b/arch/powerpc/include/asm/cacheflush.h | |||
@@ -25,6 +25,7 @@ | |||
25 | #define flush_cache_vmap(start, end) do { } while (0) | 25 | #define flush_cache_vmap(start, end) do { } while (0) |
26 | #define flush_cache_vunmap(start, end) do { } while (0) | 26 | #define flush_cache_vunmap(start, end) do { } while (0) |
27 | 27 | ||
28 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1 | ||
28 | extern void flush_dcache_page(struct page *page); | 29 | extern void flush_dcache_page(struct page *page); |
29 | #define flush_dcache_mmap_lock(mapping) do { } while (0) | 30 | #define flush_dcache_mmap_lock(mapping) do { } while (0) |
30 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) | 31 | #define flush_dcache_mmap_unlock(mapping) do { } while (0) |
diff --git a/arch/powerpc/include/asm/compat.h b/arch/powerpc/include/asm/compat.h index 4774c2f92232..396d21a80058 100644 --- a/arch/powerpc/include/asm/compat.h +++ b/arch/powerpc/include/asm/compat.h | |||
@@ -7,7 +7,8 @@ | |||
7 | #include <linux/types.h> | 7 | #include <linux/types.h> |
8 | #include <linux/sched.h> | 8 | #include <linux/sched.h> |
9 | 9 | ||
10 | #define COMPAT_USER_HZ 100 | 10 | #define COMPAT_USER_HZ 100 |
11 | #define COMPAT_UTS_MACHINE "ppc\0\0" | ||
11 | 12 | ||
12 | typedef u32 compat_size_t; | 13 | typedef u32 compat_size_t; |
13 | typedef s32 compat_ssize_t; | 14 | typedef s32 compat_ssize_t; |
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h index 24d79e3abd8e..0835eb977ba9 100644 --- a/arch/powerpc/include/asm/cpm.h +++ b/arch/powerpc/include/asm/cpm.h | |||
@@ -3,8 +3,47 @@ | |||
3 | 3 | ||
4 | #include <linux/compiler.h> | 4 | #include <linux/compiler.h> |
5 | #include <linux/types.h> | 5 | #include <linux/types.h> |
6 | #include <linux/errno.h> | ||
6 | #include <linux/of.h> | 7 | #include <linux/of.h> |
7 | 8 | ||
9 | /* | ||
10 | * USB Controller pram common to QE and CPM. | ||
11 | */ | ||
12 | struct usb_ctlr { | ||
13 | u8 usb_usmod; | ||
14 | u8 usb_usadr; | ||
15 | u8 usb_uscom; | ||
16 | u8 res1[1]; | ||
17 | __be16 usb_usep[4]; | ||
18 | u8 res2[4]; | ||
19 | __be16 usb_usber; | ||
20 | u8 res3[2]; | ||
21 | __be16 usb_usbmr; | ||
22 | u8 res4[1]; | ||
23 | u8 usb_usbs; | ||
24 | /* Fields down below are QE-only */ | ||
25 | __be16 usb_ussft; | ||
26 | u8 res5[2]; | ||
27 | __be16 usb_usfrn; | ||
28 | u8 res6[0x22]; | ||
29 | } __attribute__ ((packed)); | ||
30 | |||
31 | /* | ||
32 | * Function code bits, usually generic to devices. | ||
33 | */ | ||
34 | #ifdef CONFIG_CPM1 | ||
35 | #define CPMFCR_GBL ((u_char)0x00) /* Flag doesn't exist in CPM1 */ | ||
36 | #define CPMFCR_TC2 ((u_char)0x00) /* Flag doesn't exist in CPM1 */ | ||
37 | #define CPMFCR_DTB ((u_char)0x00) /* Flag doesn't exist in CPM1 */ | ||
38 | #define CPMFCR_BDB ((u_char)0x00) /* Flag doesn't exist in CPM1 */ | ||
39 | #else | ||
40 | #define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */ | ||
41 | #define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */ | ||
42 | #define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */ | ||
43 | #define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */ | ||
44 | #endif | ||
45 | #define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */ | ||
46 | |||
8 | /* Opcodes common to CPM1 and CPM2 | 47 | /* Opcodes common to CPM1 and CPM2 |
9 | */ | 48 | */ |
10 | #define CPM_CR_INIT_TRX ((ushort)0x0000) | 49 | #define CPM_CR_INIT_TRX ((ushort)0x0000) |
@@ -93,13 +132,56 @@ typedef struct cpm_buf_desc { | |||
93 | #define BD_I2C_START (0x0400) | 132 | #define BD_I2C_START (0x0400) |
94 | 133 | ||
95 | int cpm_muram_init(void); | 134 | int cpm_muram_init(void); |
135 | |||
136 | #if defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE) | ||
96 | unsigned long cpm_muram_alloc(unsigned long size, unsigned long align); | 137 | unsigned long cpm_muram_alloc(unsigned long size, unsigned long align); |
97 | int cpm_muram_free(unsigned long offset); | 138 | int cpm_muram_free(unsigned long offset); |
98 | unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size); | 139 | unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size); |
99 | void __iomem *cpm_muram_addr(unsigned long offset); | 140 | void __iomem *cpm_muram_addr(unsigned long offset); |
100 | unsigned long cpm_muram_offset(void __iomem *addr); | 141 | unsigned long cpm_muram_offset(void __iomem *addr); |
101 | dma_addr_t cpm_muram_dma(void __iomem *addr); | 142 | dma_addr_t cpm_muram_dma(void __iomem *addr); |
143 | #else | ||
144 | static inline unsigned long cpm_muram_alloc(unsigned long size, | ||
145 | unsigned long align) | ||
146 | { | ||
147 | return -ENOSYS; | ||
148 | } | ||
149 | |||
150 | static inline int cpm_muram_free(unsigned long offset) | ||
151 | { | ||
152 | return -ENOSYS; | ||
153 | } | ||
154 | |||
155 | static inline unsigned long cpm_muram_alloc_fixed(unsigned long offset, | ||
156 | unsigned long size) | ||
157 | { | ||
158 | return -ENOSYS; | ||
159 | } | ||
160 | |||
161 | static inline void __iomem *cpm_muram_addr(unsigned long offset) | ||
162 | { | ||
163 | return NULL; | ||
164 | } | ||
165 | |||
166 | static inline unsigned long cpm_muram_offset(void __iomem *addr) | ||
167 | { | ||
168 | return -ENOSYS; | ||
169 | } | ||
170 | |||
171 | static inline dma_addr_t cpm_muram_dma(void __iomem *addr) | ||
172 | { | ||
173 | return 0; | ||
174 | } | ||
175 | #endif /* defined(CONFIG_CPM) || defined(CONFIG_QUICC_ENGINE) */ | ||
176 | |||
177 | #ifdef CONFIG_CPM | ||
102 | int cpm_command(u32 command, u8 opcode); | 178 | int cpm_command(u32 command, u8 opcode); |
179 | #else | ||
180 | static inline int cpm_command(u32 command, u8 opcode) | ||
181 | { | ||
182 | return -ENOSYS; | ||
183 | } | ||
184 | #endif /* CONFIG_CPM */ | ||
103 | 185 | ||
104 | int cpm2_gpiochip_add32(struct device_node *np); | 186 | int cpm2_gpiochip_add32(struct device_node *np); |
105 | 187 | ||
diff --git a/arch/powerpc/include/asm/cpm1.h b/arch/powerpc/include/asm/cpm1.h index 7685ffde8821..81b01192f440 100644 --- a/arch/powerpc/include/asm/cpm1.h +++ b/arch/powerpc/include/asm/cpm1.h | |||
@@ -478,51 +478,6 @@ typedef struct iic { | |||
478 | char res2[2]; /* Reserved */ | 478 | char res2[2]; /* Reserved */ |
479 | } iic_t; | 479 | } iic_t; |
480 | 480 | ||
481 | /* SPI parameter RAM. | ||
482 | */ | ||
483 | typedef struct spi { | ||
484 | ushort spi_rbase; /* Rx Buffer descriptor base address */ | ||
485 | ushort spi_tbase; /* Tx Buffer descriptor base address */ | ||
486 | u_char spi_rfcr; /* Rx function code */ | ||
487 | u_char spi_tfcr; /* Tx function code */ | ||
488 | ushort spi_mrblr; /* Max receive buffer length */ | ||
489 | uint spi_rstate; /* Internal */ | ||
490 | uint spi_rdp; /* Internal */ | ||
491 | ushort spi_rbptr; /* Internal */ | ||
492 | ushort spi_rbc; /* Internal */ | ||
493 | uint spi_rxtmp; /* Internal */ | ||
494 | uint spi_tstate; /* Internal */ | ||
495 | uint spi_tdp; /* Internal */ | ||
496 | ushort spi_tbptr; /* Internal */ | ||
497 | ushort spi_tbc; /* Internal */ | ||
498 | uint spi_txtmp; /* Internal */ | ||
499 | uint spi_res; | ||
500 | ushort spi_rpbase; /* Relocation pointer */ | ||
501 | ushort spi_res2; | ||
502 | } spi_t; | ||
503 | |||
504 | /* SPI Mode register. | ||
505 | */ | ||
506 | #define SPMODE_LOOP ((ushort)0x4000) /* Loopback */ | ||
507 | #define SPMODE_CI ((ushort)0x2000) /* Clock Invert */ | ||
508 | #define SPMODE_CP ((ushort)0x1000) /* Clock Phase */ | ||
509 | #define SPMODE_DIV16 ((ushort)0x0800) /* BRG/16 mode */ | ||
510 | #define SPMODE_REV ((ushort)0x0400) /* Reversed Data */ | ||
511 | #define SPMODE_MSTR ((ushort)0x0200) /* SPI Master */ | ||
512 | #define SPMODE_EN ((ushort)0x0100) /* Enable */ | ||
513 | #define SPMODE_LENMSK ((ushort)0x00f0) /* character length */ | ||
514 | #define SPMODE_LEN4 ((ushort)0x0030) /* 4 bits per char */ | ||
515 | #define SPMODE_LEN8 ((ushort)0x0070) /* 8 bits per char */ | ||
516 | #define SPMODE_LEN16 ((ushort)0x00f0) /* 16 bits per char */ | ||
517 | #define SPMODE_PMMSK ((ushort)0x000f) /* prescale modulus */ | ||
518 | |||
519 | /* SPIE fields */ | ||
520 | #define SPIE_MME 0x20 | ||
521 | #define SPIE_TXE 0x10 | ||
522 | #define SPIE_BSY 0x04 | ||
523 | #define SPIE_TXB 0x02 | ||
524 | #define SPIE_RXB 0x01 | ||
525 | |||
526 | /* | 481 | /* |
527 | * RISC Controller Configuration Register definitons | 482 | * RISC Controller Configuration Register definitons |
528 | */ | 483 | */ |
diff --git a/arch/powerpc/include/asm/cpm2.h b/arch/powerpc/include/asm/cpm2.h index 990ff191da8b..f42e9baf3a4e 100644 --- a/arch/powerpc/include/asm/cpm2.h +++ b/arch/powerpc/include/asm/cpm2.h | |||
@@ -124,14 +124,6 @@ static inline void cpm2_fastbrg(uint brg, uint rate, int div16) | |||
124 | __cpm2_setbrg(brg, rate, CPM2_BRG_INT_CLK, div16, CPM_BRG_EXTC_INT); | 124 | __cpm2_setbrg(brg, rate, CPM2_BRG_INT_CLK, div16, CPM_BRG_EXTC_INT); |
125 | } | 125 | } |
126 | 126 | ||
127 | /* Function code bits, usually generic to devices. | ||
128 | */ | ||
129 | #define CPMFCR_GBL ((u_char)0x20) /* Set memory snooping */ | ||
130 | #define CPMFCR_EB ((u_char)0x10) /* Set big endian byte order */ | ||
131 | #define CPMFCR_TC2 ((u_char)0x04) /* Transfer code 2 value */ | ||
132 | #define CPMFCR_DTB ((u_char)0x02) /* Use local bus for data when set */ | ||
133 | #define CPMFCR_BDB ((u_char)0x01) /* Use local bus for BD when set */ | ||
134 | |||
135 | /* Parameter RAM offsets from the base. | 127 | /* Parameter RAM offsets from the base. |
136 | */ | 128 | */ |
137 | #define PROFF_SCC1 ((uint)0x8000) | 129 | #define PROFF_SCC1 ((uint)0x8000) |
@@ -654,45 +646,6 @@ typedef struct iic { | |||
654 | uint iic_txtmp; /* Internal */ | 646 | uint iic_txtmp; /* Internal */ |
655 | } iic_t; | 647 | } iic_t; |
656 | 648 | ||
657 | /* SPI parameter RAM. | ||
658 | */ | ||
659 | typedef struct spi { | ||
660 | ushort spi_rbase; /* Rx Buffer descriptor base address */ | ||
661 | ushort spi_tbase; /* Tx Buffer descriptor base address */ | ||
662 | u_char spi_rfcr; /* Rx function code */ | ||
663 | u_char spi_tfcr; /* Tx function code */ | ||
664 | ushort spi_mrblr; /* Max receive buffer length */ | ||
665 | uint spi_rstate; /* Internal */ | ||
666 | uint spi_rdp; /* Internal */ | ||
667 | ushort spi_rbptr; /* Internal */ | ||
668 | ushort spi_rbc; /* Internal */ | ||
669 | uint spi_rxtmp; /* Internal */ | ||
670 | uint spi_tstate; /* Internal */ | ||
671 | uint spi_tdp; /* Internal */ | ||
672 | ushort spi_tbptr; /* Internal */ | ||
673 | ushort spi_tbc; /* Internal */ | ||
674 | uint spi_txtmp; /* Internal */ | ||
675 | uint spi_res; /* Tx temp. */ | ||
676 | uint spi_res1[4]; /* SDMA temp. */ | ||
677 | } spi_t; | ||
678 | |||
679 | /* SPI Mode register. | ||
680 | */ | ||
681 | #define SPMODE_LOOP ((ushort)0x4000) /* Loopback */ | ||
682 | #define SPMODE_CI ((ushort)0x2000) /* Clock Invert */ | ||
683 | #define SPMODE_CP ((ushort)0x1000) /* Clock Phase */ | ||
684 | #define SPMODE_DIV16 ((ushort)0x0800) /* BRG/16 mode */ | ||
685 | #define SPMODE_REV ((ushort)0x0400) /* Reversed Data */ | ||
686 | #define SPMODE_MSTR ((ushort)0x0200) /* SPI Master */ | ||
687 | #define SPMODE_EN ((ushort)0x0100) /* Enable */ | ||
688 | #define SPMODE_LENMSK ((ushort)0x00f0) /* character length */ | ||
689 | #define SPMODE_PMMSK ((ushort)0x000f) /* prescale modulus */ | ||
690 | |||
691 | #define SPMODE_LEN(x) ((((x)-1)&0xF)<<4) | ||
692 | #define SPMODE_PM(x) ((x) &0xF) | ||
693 | |||
694 | #define SPI_EB ((u_char)0x10) /* big endian byte order */ | ||
695 | |||
696 | /* IDMA parameter RAM | 649 | /* IDMA parameter RAM |
697 | */ | 650 | */ |
698 | typedef struct idma { | 651 | typedef struct idma { |
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h index 80f315e8a421..abb833b0e58f 100644 --- a/arch/powerpc/include/asm/cputable.h +++ b/arch/powerpc/include/asm/cputable.h | |||
@@ -381,9 +381,9 @@ extern const char *powerpc_base_platform; | |||
381 | #define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) | 381 | #define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) |
382 | 382 | ||
383 | /* 64-bit CPUs */ | 383 | /* 64-bit CPUs */ |
384 | #define CPU_FTRS_POWER3 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ | 384 | #define CPU_FTRS_POWER3 (CPU_FTR_USE_TB | \ |
385 | CPU_FTR_IABR | CPU_FTR_PPC_LE) | 385 | CPU_FTR_IABR | CPU_FTR_PPC_LE) |
386 | #define CPU_FTRS_RS64 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ | 386 | #define CPU_FTRS_RS64 (CPU_FTR_USE_TB | \ |
387 | CPU_FTR_IABR | \ | 387 | CPU_FTR_IABR | \ |
388 | CPU_FTR_MMCRA | CPU_FTR_CTRL) | 388 | CPU_FTR_MMCRA | CPU_FTR_CTRL) |
389 | #define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ | 389 | #define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \ |
diff --git a/arch/powerpc/include/asm/cputime.h b/arch/powerpc/include/asm/cputime.h index fa19f3fe05ff..8bdc6a9e5773 100644 --- a/arch/powerpc/include/asm/cputime.h +++ b/arch/powerpc/include/asm/cputime.h | |||
@@ -73,10 +73,9 @@ static inline unsigned long cputime_to_jiffies(const cputime_t ct) | |||
73 | static inline cputime_t cputime_to_scaled(const cputime_t ct) | 73 | static inline cputime_t cputime_to_scaled(const cputime_t ct) |
74 | { | 74 | { |
75 | if (cpu_has_feature(CPU_FTR_SPURR) && | 75 | if (cpu_has_feature(CPU_FTR_SPURR) && |
76 | per_cpu(cputime_last_delta, smp_processor_id())) | 76 | __get_cpu_var(cputime_last_delta)) |
77 | return ct * | 77 | return ct * __get_cpu_var(cputime_scaled_last_delta) / |
78 | per_cpu(cputime_scaled_last_delta, smp_processor_id())/ | 78 | __get_cpu_var(cputime_last_delta); |
79 | per_cpu(cputime_last_delta, smp_processor_id()); | ||
80 | return ct; | 79 | return ct; |
81 | } | 80 | } |
82 | 81 | ||
diff --git a/arch/powerpc/include/asm/dcr-regs.h b/arch/powerpc/include/asm/dcr-regs.h index 828e3aa1f2fc..380274de429f 100644 --- a/arch/powerpc/include/asm/dcr-regs.h +++ b/arch/powerpc/include/asm/dcr-regs.h | |||
@@ -157,4 +157,27 @@ | |||
157 | #define L2C_SNP_SSR_32G 0x0000f000 | 157 | #define L2C_SNP_SSR_32G 0x0000f000 |
158 | #define L2C_SNP_ESR 0x00000800 | 158 | #define L2C_SNP_ESR 0x00000800 |
159 | 159 | ||
160 | /* | ||
161 | * DCR register offsets for 440SP/440SPe I2O/DMA controller. | ||
162 | * The base address is configured in the device tree. | ||
163 | */ | ||
164 | #define DCRN_I2O0_IBAL 0x006 | ||
165 | #define DCRN_I2O0_IBAH 0x007 | ||
166 | #define I2O_REG_ENABLE 0x00000001 /* Enable I2O/DMA access */ | ||
167 | |||
168 | /* 440SP/440SPe Software Reset DCR */ | ||
169 | #define DCRN_SDR0_SRST 0x0200 | ||
170 | #define DCRN_SDR0_SRST_I2ODMA (0x80000000 >> 15) /* Reset I2O/DMA */ | ||
171 | |||
172 | /* 440SP/440SPe Memory Queue DCR offsets */ | ||
173 | #define DCRN_MQ0_XORBA 0x04 | ||
174 | #define DCRN_MQ0_CF2H 0x06 | ||
175 | #define DCRN_MQ0_CFBHL 0x0f | ||
176 | #define DCRN_MQ0_BAUH 0x10 | ||
177 | |||
178 | /* HB/LL Paths Configuration Register */ | ||
179 | #define MQ0_CFBHL_TPLM 28 | ||
180 | #define MQ0_CFBHL_HBCL 23 | ||
181 | #define MQ0_CFBHL_POLY 15 | ||
182 | |||
160 | #endif /* __DCR_REGS_H__ */ | 183 | #endif /* __DCR_REGS_H__ */ |
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h index e281daebddca..c85ef230135b 100644 --- a/arch/powerpc/include/asm/dma-mapping.h +++ b/arch/powerpc/include/asm/dma-mapping.h | |||
@@ -127,9 +127,6 @@ static inline int dma_supported(struct device *dev, u64 mask) | |||
127 | return dma_ops->dma_supported(dev, mask); | 127 | return dma_ops->dma_supported(dev, mask); |
128 | } | 128 | } |
129 | 129 | ||
130 | /* We have our own implementation of pci_set_dma_mask() */ | ||
131 | #define HAVE_ARCH_PCI_SET_DMA_MASK | ||
132 | |||
133 | static inline int dma_set_mask(struct device *dev, u64 dma_mask) | 130 | static inline int dma_set_mask(struct device *dev, u64 dma_mask) |
134 | { | 131 | { |
135 | struct dma_map_ops *dma_ops = get_dma_ops(dev); | 132 | struct dma_map_ops *dma_ops = get_dma_ops(dev); |
@@ -197,7 +194,7 @@ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size) | |||
197 | if (!dev->dma_mask) | 194 | if (!dev->dma_mask) |
198 | return 0; | 195 | return 0; |
199 | 196 | ||
200 | return addr + size <= *dev->dma_mask; | 197 | return addr + size - 1 <= *dev->dma_mask; |
201 | } | 198 | } |
202 | 199 | ||
203 | static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) | 200 | static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr) |
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h index 014a624f4c8e..c376eda15313 100644 --- a/arch/powerpc/include/asm/elf.h +++ b/arch/powerpc/include/asm/elf.h | |||
@@ -170,7 +170,6 @@ typedef elf_fpreg_t elf_vsrreghalf_t32[ELF_NVSRHALFREG]; | |||
170 | #define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) | 170 | #define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) |
171 | #define compat_elf_check_arch(x) ((x)->e_machine == EM_PPC) | 171 | #define compat_elf_check_arch(x) ((x)->e_machine == EM_PPC) |
172 | 172 | ||
173 | #define USE_ELF_CORE_DUMP | ||
174 | #define CORE_DUMP_USE_REGSET | 173 | #define CORE_DUMP_USE_REGSET |
175 | #define ELF_EXEC_PAGESIZE PAGE_SIZE | 174 | #define ELF_EXEC_PAGESIZE PAGE_SIZE |
176 | 175 | ||
@@ -236,14 +235,10 @@ typedef elf_vrregset_t elf_fpxregset_t; | |||
236 | #ifdef __powerpc64__ | 235 | #ifdef __powerpc64__ |
237 | # define SET_PERSONALITY(ex) \ | 236 | # define SET_PERSONALITY(ex) \ |
238 | do { \ | 237 | do { \ |
239 | unsigned long new_flags = 0; \ | ||
240 | if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ | 238 | if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ |
241 | new_flags = _TIF_32BIT; \ | 239 | set_thread_flag(TIF_32BIT); \ |
242 | if ((current_thread_info()->flags & _TIF_32BIT) \ | ||
243 | != new_flags) \ | ||
244 | set_thread_flag(TIF_ABI_PENDING); \ | ||
245 | else \ | 240 | else \ |
246 | clear_thread_flag(TIF_ABI_PENDING); \ | 241 | clear_thread_flag(TIF_32BIT); \ |
247 | if (personality(current->personality) != PER_LINUX32) \ | 242 | if (personality(current->personality) != PER_LINUX32) \ |
248 | set_personality(PER_LINUX | \ | 243 | set_personality(PER_LINUX | \ |
249 | (current->personality & (~PER_MASK))); \ | 244 | (current->personality & (~PER_MASK))); \ |
diff --git a/arch/powerpc/include/asm/emulated_ops.h b/arch/powerpc/include/asm/emulated_ops.h index 9154e8526732..f0fb4fc1f6e6 100644 --- a/arch/powerpc/include/asm/emulated_ops.h +++ b/arch/powerpc/include/asm/emulated_ops.h | |||
@@ -19,6 +19,7 @@ | |||
19 | #define _ASM_POWERPC_EMULATED_OPS_H | 19 | #define _ASM_POWERPC_EMULATED_OPS_H |
20 | 20 | ||
21 | #include <asm/atomic.h> | 21 | #include <asm/atomic.h> |
22 | #include <linux/perf_event.h> | ||
22 | 23 | ||
23 | 24 | ||
24 | #ifdef CONFIG_PPC_EMULATED_STATS | 25 | #ifdef CONFIG_PPC_EMULATED_STATS |
@@ -57,7 +58,7 @@ extern u32 ppc_warn_emulated; | |||
57 | 58 | ||
58 | extern void ppc_warn_emulated_print(const char *type); | 59 | extern void ppc_warn_emulated_print(const char *type); |
59 | 60 | ||
60 | #define PPC_WARN_EMULATED(type) \ | 61 | #define __PPC_WARN_EMULATED(type) \ |
61 | do { \ | 62 | do { \ |
62 | atomic_inc(&ppc_emulated.type.val); \ | 63 | atomic_inc(&ppc_emulated.type.val); \ |
63 | if (ppc_warn_emulated) \ | 64 | if (ppc_warn_emulated) \ |
@@ -66,8 +67,22 @@ extern void ppc_warn_emulated_print(const char *type); | |||
66 | 67 | ||
67 | #else /* !CONFIG_PPC_EMULATED_STATS */ | 68 | #else /* !CONFIG_PPC_EMULATED_STATS */ |
68 | 69 | ||
69 | #define PPC_WARN_EMULATED(type) do { } while (0) | 70 | #define __PPC_WARN_EMULATED(type) do { } while (0) |
70 | 71 | ||
71 | #endif /* !CONFIG_PPC_EMULATED_STATS */ | 72 | #endif /* !CONFIG_PPC_EMULATED_STATS */ |
72 | 73 | ||
74 | #define PPC_WARN_EMULATED(type, regs) \ | ||
75 | do { \ | ||
76 | perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, \ | ||
77 | 1, 0, regs, 0); \ | ||
78 | __PPC_WARN_EMULATED(type); \ | ||
79 | } while (0) | ||
80 | |||
81 | #define PPC_WARN_ALIGNMENT(type, regs) \ | ||
82 | do { \ | ||
83 | perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, \ | ||
84 | 1, 0, regs, regs->dar); \ | ||
85 | __PPC_WARN_EMULATED(type); \ | ||
86 | } while (0) | ||
87 | |||
73 | #endif /* _ASM_POWERPC_EMULATED_OPS_H */ | 88 | #endif /* _ASM_POWERPC_EMULATED_OPS_H */ |
diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h index a98653b26231..57c400071995 100644 --- a/arch/powerpc/include/asm/exception-64s.h +++ b/arch/powerpc/include/asm/exception-64s.h | |||
@@ -147,6 +147,7 @@ | |||
147 | .globl label##_pSeries; \ | 147 | .globl label##_pSeries; \ |
148 | label##_pSeries: \ | 148 | label##_pSeries: \ |
149 | HMT_MEDIUM; \ | 149 | HMT_MEDIUM; \ |
150 | DO_KVM n; \ | ||
150 | mtspr SPRN_SPRG_SCRATCH0,r13; /* save r13 */ \ | 151 | mtspr SPRN_SPRG_SCRATCH0,r13; /* save r13 */ \ |
151 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common) | 152 | EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common) |
152 | 153 | ||
@@ -170,6 +171,7 @@ label##_pSeries: \ | |||
170 | .globl label##_pSeries; \ | 171 | .globl label##_pSeries; \ |
171 | label##_pSeries: \ | 172 | label##_pSeries: \ |
172 | HMT_MEDIUM; \ | 173 | HMT_MEDIUM; \ |
174 | DO_KVM n; \ | ||
173 | mtspr SPRN_SPRG_SCRATCH0,r13; /* save r13 */ \ | 175 | mtspr SPRN_SPRG_SCRATCH0,r13; /* save r13 */ \ |
174 | mfspr r13,SPRN_SPRG_PACA; /* get paca address into r13 */ \ | 176 | mfspr r13,SPRN_SPRG_PACA; /* get paca address into r13 */ \ |
175 | std r9,PACA_EXGEN+EX_R9(r13); /* save r9, r10 */ \ | 177 | std r9,PACA_EXGEN+EX_R9(r13); /* save r9, r10 */ \ |
diff --git a/arch/powerpc/include/asm/feature-fixups.h b/arch/powerpc/include/asm/feature-fixups.h index cbd4dfa4bce2..96a7d067fbb2 100644 --- a/arch/powerpc/include/asm/feature-fixups.h +++ b/arch/powerpc/include/asm/feature-fixups.h | |||
@@ -165,7 +165,7 @@ label##2: \ | |||
165 | .pushsection sect,"a"; \ | 165 | .pushsection sect,"a"; \ |
166 | .align 2; \ | 166 | .align 2; \ |
167 | label##3: \ | 167 | label##3: \ |
168 | .long label##1b-label##3b; \ | 168 | FTR_ENTRY_OFFSET label##1b-label##3b; \ |
169 | .popsection; | 169 | .popsection; |
170 | 170 | ||
171 | #endif /* __ASM_POWERPC_FEATURE_FIXUPS_H */ | 171 | #endif /* __ASM_POWERPC_FEATURE_FIXUPS_H */ |
diff --git a/arch/powerpc/include/asm/fixmap.h b/arch/powerpc/include/asm/fixmap.h index f1f4e23a84e9..5c2c0233175e 100644 --- a/arch/powerpc/include/asm/fixmap.h +++ b/arch/powerpc/include/asm/fixmap.h | |||
@@ -44,6 +44,9 @@ | |||
44 | */ | 44 | */ |
45 | enum fixed_addresses { | 45 | enum fixed_addresses { |
46 | FIX_HOLE, | 46 | FIX_HOLE, |
47 | /* reserve the top 128K for early debugging purposes */ | ||
48 | FIX_EARLY_DEBUG_TOP = FIX_HOLE, | ||
49 | FIX_EARLY_DEBUG_BASE = FIX_EARLY_DEBUG_TOP+((128*1024)/PAGE_SIZE)-1, | ||
47 | #ifdef CONFIG_HIGHMEM | 50 | #ifdef CONFIG_HIGHMEM |
48 | FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ | 51 | FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ |
49 | FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, | 52 | FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, |
diff --git a/arch/powerpc/include/asm/futex.h b/arch/powerpc/include/asm/futex.h index 9696cc36d2dc..7c589ef81fb0 100644 --- a/arch/powerpc/include/asm/futex.h +++ b/arch/powerpc/include/asm/futex.h | |||
@@ -11,7 +11,7 @@ | |||
11 | 11 | ||
12 | #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ | 12 | #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ |
13 | __asm__ __volatile ( \ | 13 | __asm__ __volatile ( \ |
14 | LWSYNC_ON_SMP \ | 14 | PPC_RELEASE_BARRIER \ |
15 | "1: lwarx %0,0,%2\n" \ | 15 | "1: lwarx %0,0,%2\n" \ |
16 | insn \ | 16 | insn \ |
17 | PPC405_ERR77(0, %2) \ | 17 | PPC405_ERR77(0, %2) \ |
@@ -90,14 +90,14 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) | |||
90 | return -EFAULT; | 90 | return -EFAULT; |
91 | 91 | ||
92 | __asm__ __volatile__ ( | 92 | __asm__ __volatile__ ( |
93 | LWSYNC_ON_SMP | 93 | PPC_RELEASE_BARRIER |
94 | "1: lwarx %0,0,%2 # futex_atomic_cmpxchg_inatomic\n\ | 94 | "1: lwarx %0,0,%2 # futex_atomic_cmpxchg_inatomic\n\ |
95 | cmpw 0,%0,%3\n\ | 95 | cmpw 0,%0,%3\n\ |
96 | bne- 3f\n" | 96 | bne- 3f\n" |
97 | PPC405_ERR77(0,%2) | 97 | PPC405_ERR77(0,%2) |
98 | "2: stwcx. %4,0,%2\n\ | 98 | "2: stwcx. %4,0,%2\n\ |
99 | bne- 1b\n" | 99 | bne- 1b\n" |
100 | ISYNC_ON_SMP | 100 | PPC_ACQUIRE_BARRIER |
101 | "3: .section .fixup,\"ax\"\n\ | 101 | "3: .section .fixup,\"ax\"\n\ |
102 | 4: li %0,%5\n\ | 102 | 4: li %0,%5\n\ |
103 | b 3b\n\ | 103 | b 3b\n\ |
diff --git a/arch/powerpc/include/asm/gpio.h b/arch/powerpc/include/asm/gpio.h index ea04632399d8..38762edb5e58 100644 --- a/arch/powerpc/include/asm/gpio.h +++ b/arch/powerpc/include/asm/gpio.h | |||
@@ -38,12 +38,9 @@ static inline int gpio_cansleep(unsigned int gpio) | |||
38 | return __gpio_cansleep(gpio); | 38 | return __gpio_cansleep(gpio); |
39 | } | 39 | } |
40 | 40 | ||
41 | /* | ||
42 | * Not implemented, yet. | ||
43 | */ | ||
44 | static inline int gpio_to_irq(unsigned int gpio) | 41 | static inline int gpio_to_irq(unsigned int gpio) |
45 | { | 42 | { |
46 | return -ENOSYS; | 43 | return __gpio_to_irq(gpio); |
47 | } | 44 | } |
48 | 45 | ||
49 | static inline int irq_to_gpio(unsigned int irq) | 46 | static inline int irq_to_gpio(unsigned int irq) |
diff --git a/arch/powerpc/include/asm/hardirq.h b/arch/powerpc/include/asm/hardirq.h index fb3c05a0cbbf..3147a2970125 100644 --- a/arch/powerpc/include/asm/hardirq.h +++ b/arch/powerpc/include/asm/hardirq.h | |||
@@ -1 +1,29 @@ | |||
1 | #include <asm-generic/hardirq.h> | 1 | #ifndef _ASM_POWERPC_HARDIRQ_H |
2 | #define _ASM_POWERPC_HARDIRQ_H | ||
3 | |||
4 | #include <linux/threads.h> | ||
5 | #include <linux/irq.h> | ||
6 | |||
7 | typedef struct { | ||
8 | unsigned int __softirq_pending; | ||
9 | unsigned int timer_irqs; | ||
10 | unsigned int pmu_irqs; | ||
11 | unsigned int mce_exceptions; | ||
12 | unsigned int spurious_irqs; | ||
13 | } ____cacheline_aligned irq_cpustat_t; | ||
14 | |||
15 | DECLARE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat); | ||
16 | |||
17 | #define __ARCH_IRQ_STAT | ||
18 | |||
19 | #define local_softirq_pending() __get_cpu_var(irq_stat).__softirq_pending | ||
20 | |||
21 | static inline void ack_bad_irq(unsigned int irq) | ||
22 | { | ||
23 | printk(KERN_CRIT "unexpected IRQ trap at vector %02x\n", irq); | ||
24 | } | ||
25 | |||
26 | extern u64 arch_irq_stat_cpu(unsigned int cpu); | ||
27 | #define arch_irq_stat_cpu arch_irq_stat_cpu | ||
28 | |||
29 | #endif /* _ASM_POWERPC_HARDIRQ_H */ | ||
diff --git a/arch/powerpc/include/asm/hugetlb.h b/arch/powerpc/include/asm/hugetlb.h index b1dafb6a9743..5856a66ab404 100644 --- a/arch/powerpc/include/asm/hugetlb.h +++ b/arch/powerpc/include/asm/hugetlb.h | |||
@@ -3,6 +3,10 @@ | |||
3 | 3 | ||
4 | #include <asm/page.h> | 4 | #include <asm/page.h> |
5 | 5 | ||
6 | pte_t *huge_pte_offset_and_shift(struct mm_struct *mm, | ||
7 | unsigned long addr, unsigned *shift); | ||
8 | |||
9 | void flush_dcache_icache_hugepage(struct page *page); | ||
6 | 10 | ||
7 | int is_hugepage_only_range(struct mm_struct *mm, unsigned long addr, | 11 | int is_hugepage_only_range(struct mm_struct *mm, unsigned long addr, |
8 | unsigned long len); | 12 | unsigned long len); |
@@ -11,12 +15,6 @@ void hugetlb_free_pgd_range(struct mmu_gather *tlb, unsigned long addr, | |||
11 | unsigned long end, unsigned long floor, | 15 | unsigned long end, unsigned long floor, |
12 | unsigned long ceiling); | 16 | unsigned long ceiling); |
13 | 17 | ||
14 | void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, | ||
15 | pte_t *ptep, pte_t pte); | ||
16 | |||
17 | pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, | ||
18 | pte_t *ptep); | ||
19 | |||
20 | /* | 18 | /* |
21 | * The version of vma_mmu_pagesize() in arch/powerpc/mm/hugetlbpage.c needs | 19 | * The version of vma_mmu_pagesize() in arch/powerpc/mm/hugetlbpage.c needs |
22 | * to override the version in mm/hugetlb.c | 20 | * to override the version in mm/hugetlb.c |
@@ -42,9 +40,26 @@ static inline void hugetlb_prefault_arch_hook(struct mm_struct *mm) | |||
42 | { | 40 | { |
43 | } | 41 | } |
44 | 42 | ||
43 | |||
44 | static inline void set_huge_pte_at(struct mm_struct *mm, unsigned long addr, | ||
45 | pte_t *ptep, pte_t pte) | ||
46 | { | ||
47 | set_pte_at(mm, addr, ptep, pte); | ||
48 | } | ||
49 | |||
50 | static inline pte_t huge_ptep_get_and_clear(struct mm_struct *mm, | ||
51 | unsigned long addr, pte_t *ptep) | ||
52 | { | ||
53 | unsigned long old = pte_update(mm, addr, ptep, ~0UL, 1); | ||
54 | return __pte(old); | ||
55 | } | ||
56 | |||
45 | static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, | 57 | static inline void huge_ptep_clear_flush(struct vm_area_struct *vma, |
46 | unsigned long addr, pte_t *ptep) | 58 | unsigned long addr, pte_t *ptep) |
47 | { | 59 | { |
60 | pte_t pte; | ||
61 | pte = huge_ptep_get_and_clear(vma->vm_mm, addr, ptep); | ||
62 | flush_tlb_page(vma, addr); | ||
48 | } | 63 | } |
49 | 64 | ||
50 | static inline int huge_pte_none(pte_t pte) | 65 | static inline int huge_pte_none(pte_t pte) |
diff --git a/arch/powerpc/include/asm/hvcall.h b/arch/powerpc/include/asm/hvcall.h index 6251a4b10be7..f0275818b95c 100644 --- a/arch/powerpc/include/asm/hvcall.h +++ b/arch/powerpc/include/asm/hvcall.h | |||
@@ -212,6 +212,19 @@ | |||
212 | #define H_QUERY_INT_STATE 0x1E4 | 212 | #define H_QUERY_INT_STATE 0x1E4 |
213 | #define H_POLL_PENDING 0x1D8 | 213 | #define H_POLL_PENDING 0x1D8 |
214 | #define H_ILLAN_ATTRIBUTES 0x244 | 214 | #define H_ILLAN_ATTRIBUTES 0x244 |
215 | #define H_MODIFY_HEA_QP 0x250 | ||
216 | #define H_QUERY_HEA_QP 0x254 | ||
217 | #define H_QUERY_HEA 0x258 | ||
218 | #define H_QUERY_HEA_PORT 0x25C | ||
219 | #define H_MODIFY_HEA_PORT 0x260 | ||
220 | #define H_REG_BCMC 0x264 | ||
221 | #define H_DEREG_BCMC 0x268 | ||
222 | #define H_REGISTER_HEA_RPAGES 0x26C | ||
223 | #define H_DISABLE_AND_GET_HEA 0x270 | ||
224 | #define H_GET_HEA_INFO 0x274 | ||
225 | #define H_ALLOC_HEA_RESOURCE 0x278 | ||
226 | #define H_ADD_CONN 0x284 | ||
227 | #define H_DEL_CONN 0x288 | ||
215 | #define H_JOIN 0x298 | 228 | #define H_JOIN 0x298 |
216 | #define H_VASI_STATE 0x2A4 | 229 | #define H_VASI_STATE 0x2A4 |
217 | #define H_ENABLE_CRQ 0x2B0 | 230 | #define H_ENABLE_CRQ 0x2B0 |
@@ -274,6 +287,8 @@ struct hcall_stats { | |||
274 | unsigned long num_calls; /* number of calls (on this CPU) */ | 287 | unsigned long num_calls; /* number of calls (on this CPU) */ |
275 | unsigned long tb_total; /* total wall time (mftb) of calls. */ | 288 | unsigned long tb_total; /* total wall time (mftb) of calls. */ |
276 | unsigned long purr_total; /* total cpu time (PURR) of calls. */ | 289 | unsigned long purr_total; /* total cpu time (PURR) of calls. */ |
290 | unsigned long tb_start; | ||
291 | unsigned long purr_start; | ||
277 | }; | 292 | }; |
278 | #define HCALL_STAT_ARRAY_SIZE ((MAX_HCALL_OPCODE >> 2) + 1) | 293 | #define HCALL_STAT_ARRAY_SIZE ((MAX_HCALL_OPCODE >> 2) + 1) |
279 | 294 | ||
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h index abbc2aaaced5..bd100fcf40d0 100644 --- a/arch/powerpc/include/asm/hw_irq.h +++ b/arch/powerpc/include/asm/hw_irq.h | |||
@@ -64,11 +64,6 @@ extern void iseries_handle_interrupts(void); | |||
64 | get_paca()->hard_enabled = 0; \ | 64 | get_paca()->hard_enabled = 0; \ |
65 | } while(0) | 65 | } while(0) |
66 | 66 | ||
67 | static inline int irqs_disabled_flags(unsigned long flags) | ||
68 | { | ||
69 | return flags == 0; | ||
70 | } | ||
71 | |||
72 | #else | 67 | #else |
73 | 68 | ||
74 | #if defined(CONFIG_BOOKE) | 69 | #if defined(CONFIG_BOOKE) |
@@ -135,43 +130,5 @@ static inline int irqs_disabled_flags(unsigned long flags) | |||
135 | */ | 130 | */ |
136 | struct irq_chip; | 131 | struct irq_chip; |
137 | 132 | ||
138 | #ifdef CONFIG_PERF_EVENTS | ||
139 | |||
140 | #ifdef CONFIG_PPC64 | ||
141 | static inline unsigned long test_perf_event_pending(void) | ||
142 | { | ||
143 | unsigned long x; | ||
144 | |||
145 | asm volatile("lbz %0,%1(13)" | ||
146 | : "=r" (x) | ||
147 | : "i" (offsetof(struct paca_struct, perf_event_pending))); | ||
148 | return x; | ||
149 | } | ||
150 | |||
151 | static inline void set_perf_event_pending(void) | ||
152 | { | ||
153 | asm volatile("stb %0,%1(13)" : : | ||
154 | "r" (1), | ||
155 | "i" (offsetof(struct paca_struct, perf_event_pending))); | ||
156 | } | ||
157 | |||
158 | static inline void clear_perf_event_pending(void) | ||
159 | { | ||
160 | asm volatile("stb %0,%1(13)" : : | ||
161 | "r" (0), | ||
162 | "i" (offsetof(struct paca_struct, perf_event_pending))); | ||
163 | } | ||
164 | #endif /* CONFIG_PPC64 */ | ||
165 | |||
166 | #else /* CONFIG_PERF_EVENTS */ | ||
167 | |||
168 | static inline unsigned long test_perf_event_pending(void) | ||
169 | { | ||
170 | return 0; | ||
171 | } | ||
172 | |||
173 | static inline void clear_perf_event_pending(void) {} | ||
174 | #endif /* CONFIG_PERF_EVENTS */ | ||
175 | |||
176 | #endif /* __KERNEL__ */ | 133 | #endif /* __KERNEL__ */ |
177 | #endif /* _ASM_POWERPC_HW_IRQ_H */ | 134 | #endif /* _ASM_POWERPC_HW_IRQ_H */ |
diff --git a/arch/powerpc/include/asm/immap_cpm2.h b/arch/powerpc/include/asm/immap_cpm2.h index d4f069bf0e57..7c64fda5357b 100644 --- a/arch/powerpc/include/asm/immap_cpm2.h +++ b/arch/powerpc/include/asm/immap_cpm2.h | |||
@@ -549,7 +549,7 @@ typedef struct comm_proc { | |||
549 | 549 | ||
550 | /* USB Controller. | 550 | /* USB Controller. |
551 | */ | 551 | */ |
552 | typedef struct usb_ctlr { | 552 | typedef struct cpm_usb_ctlr { |
553 | u8 usb_usmod; | 553 | u8 usb_usmod; |
554 | u8 usb_usadr; | 554 | u8 usb_usadr; |
555 | u8 usb_uscom; | 555 | u8 usb_uscom; |
diff --git a/arch/powerpc/include/asm/immap_qe.h b/arch/powerpc/include/asm/immap_qe.h index c346d0bcd230..4e10f508570a 100644 --- a/arch/powerpc/include/asm/immap_qe.h +++ b/arch/powerpc/include/asm/immap_qe.h | |||
@@ -210,7 +210,7 @@ struct sir { | |||
210 | } __attribute__ ((packed)); | 210 | } __attribute__ ((packed)); |
211 | 211 | ||
212 | /* USB Controller */ | 212 | /* USB Controller */ |
213 | struct usb_ctlr { | 213 | struct qe_usb_ctlr { |
214 | u8 usb_usmod; | 214 | u8 usb_usmod; |
215 | u8 usb_usadr; | 215 | u8 usb_usadr; |
216 | u8 usb_uscom; | 216 | u8 usb_uscom; |
@@ -229,7 +229,7 @@ struct usb_ctlr { | |||
229 | } __attribute__ ((packed)); | 229 | } __attribute__ ((packed)); |
230 | 230 | ||
231 | /* MCC */ | 231 | /* MCC */ |
232 | struct mcc { | 232 | struct qe_mcc { |
233 | __be32 mcce; /* MCC event register */ | 233 | __be32 mcce; /* MCC event register */ |
234 | __be32 mccm; /* MCC mask register */ | 234 | __be32 mccm; /* MCC mask register */ |
235 | __be32 mccf; /* MCC configuration register */ | 235 | __be32 mccf; /* MCC configuration register */ |
@@ -431,9 +431,9 @@ struct qe_immap { | |||
431 | struct qe_mux qmx; /* QE Multiplexer */ | 431 | struct qe_mux qmx; /* QE Multiplexer */ |
432 | struct qe_timers qet; /* QE Timers */ | 432 | struct qe_timers qet; /* QE Timers */ |
433 | struct spi spi[0x2]; /* spi */ | 433 | struct spi spi[0x2]; /* spi */ |
434 | struct mcc mcc; /* mcc */ | 434 | struct qe_mcc mcc; /* mcc */ |
435 | struct qe_brg brg; /* brg */ | 435 | struct qe_brg brg; /* brg */ |
436 | struct usb_ctlr usb; /* USB */ | 436 | struct qe_usb_ctlr usb; /* USB */ |
437 | struct si1 si1; /* SI */ | 437 | struct si1 si1; /* SI */ |
438 | u8 res11[0x800]; | 438 | u8 res11[0x800]; |
439 | struct sir sir; /* SI Routing Tables */ | 439 | struct sir sir; /* SI Routing Tables */ |
diff --git a/arch/powerpc/include/asm/irq.h b/arch/powerpc/include/asm/irq.h index bbcd1aaf3dfd..e054baef1845 100644 --- a/arch/powerpc/include/asm/irq.h +++ b/arch/powerpc/include/asm/irq.h | |||
@@ -17,8 +17,6 @@ | |||
17 | #include <asm/atomic.h> | 17 | #include <asm/atomic.h> |
18 | 18 | ||
19 | 19 | ||
20 | #define get_irq_desc(irq) (&irq_desc[(irq)]) | ||
21 | |||
22 | /* Define a way to iterate across irqs. */ | 20 | /* Define a way to iterate across irqs. */ |
23 | #define for_each_irq(i) \ | 21 | #define for_each_irq(i) \ |
24 | for ((i) = 0; (i) < NR_IRQS; ++(i)) | 22 | for ((i) = 0; (i) < NR_IRQS; ++(i)) |
@@ -34,12 +32,15 @@ extern atomic_t ppc_n_lost_interrupts; | |||
34 | */ | 32 | */ |
35 | #define NO_IRQ_IGNORE ((unsigned int)-1) | 33 | #define NO_IRQ_IGNORE ((unsigned int)-1) |
36 | 34 | ||
37 | /* Total number of virq in the platform (make it a CONFIG_* option ? */ | 35 | /* Total number of virq in the platform */ |
38 | #define NR_IRQS 512 | 36 | #define NR_IRQS CONFIG_NR_IRQS |
39 | 37 | ||
40 | /* Number of irqs reserved for the legacy controller */ | 38 | /* Number of irqs reserved for the legacy controller */ |
41 | #define NUM_ISA_INTERRUPTS 16 | 39 | #define NUM_ISA_INTERRUPTS 16 |
42 | 40 | ||
41 | /* Same thing, used by the generic IRQ code */ | ||
42 | #define NR_IRQS_LEGACY NUM_ISA_INTERRUPTS | ||
43 | |||
43 | /* This type is the placeholder for a hardware interrupt number. It has to | 44 | /* This type is the placeholder for a hardware interrupt number. It has to |
44 | * be big enough to enclose whatever representation is used by a given | 45 | * be big enough to enclose whatever representation is used by a given |
45 | * platform. | 46 | * platform. |
@@ -99,7 +100,7 @@ struct irq_host_ops { | |||
99 | * interrupt controller has for that line) | 100 | * interrupt controller has for that line) |
100 | */ | 101 | */ |
101 | int (*xlate)(struct irq_host *h, struct device_node *ctrler, | 102 | int (*xlate)(struct irq_host *h, struct device_node *ctrler, |
102 | u32 *intspec, unsigned int intsize, | 103 | const u32 *intspec, unsigned int intsize, |
103 | irq_hw_number_t *out_hwirq, unsigned int *out_type); | 104 | irq_hw_number_t *out_hwirq, unsigned int *out_type); |
104 | }; | 105 | }; |
105 | 106 | ||
@@ -313,7 +314,7 @@ extern void irq_free_virt(unsigned int virq, unsigned int count); | |||
313 | * of the of_irq_map_*() functions. | 314 | * of the of_irq_map_*() functions. |
314 | */ | 315 | */ |
315 | extern unsigned int irq_create_of_mapping(struct device_node *controller, | 316 | extern unsigned int irq_create_of_mapping(struct device_node *controller, |
316 | u32 *intspec, unsigned int intsize); | 317 | const u32 *intspec, unsigned int intsize); |
317 | 318 | ||
318 | /** | 319 | /** |
319 | * irq_of_parse_and_map - Parse and Map an interrupt into linux virq space | 320 | * irq_of_parse_and_map - Parse and Map an interrupt into linux virq space |
diff --git a/arch/powerpc/include/asm/kvm.h b/arch/powerpc/include/asm/kvm.h index bb2de6aa5ce0..81f3b0b5601e 100644 --- a/arch/powerpc/include/asm/kvm.h +++ b/arch/powerpc/include/asm/kvm.h | |||
@@ -46,6 +46,24 @@ struct kvm_regs { | |||
46 | }; | 46 | }; |
47 | 47 | ||
48 | struct kvm_sregs { | 48 | struct kvm_sregs { |
49 | __u32 pvr; | ||
50 | union { | ||
51 | struct { | ||
52 | __u64 sdr1; | ||
53 | struct { | ||
54 | struct { | ||
55 | __u64 slbe; | ||
56 | __u64 slbv; | ||
57 | } slb[64]; | ||
58 | } ppc64; | ||
59 | struct { | ||
60 | __u32 sr[16]; | ||
61 | __u64 ibat[8]; | ||
62 | __u64 dbat[8]; | ||
63 | } ppc32; | ||
64 | } s; | ||
65 | __u8 pad[1020]; | ||
66 | } u; | ||
49 | }; | 67 | }; |
50 | 68 | ||
51 | struct kvm_fpu { | 69 | struct kvm_fpu { |
diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h index 56bfae59837f..aadf2dd6f84e 100644 --- a/arch/powerpc/include/asm/kvm_asm.h +++ b/arch/powerpc/include/asm/kvm_asm.h | |||
@@ -49,6 +49,46 @@ | |||
49 | #define BOOKE_INTERRUPT_SPE_FP_ROUND 34 | 49 | #define BOOKE_INTERRUPT_SPE_FP_ROUND 34 |
50 | #define BOOKE_INTERRUPT_PERFORMANCE_MONITOR 35 | 50 | #define BOOKE_INTERRUPT_PERFORMANCE_MONITOR 35 |
51 | 51 | ||
52 | /* book3s */ | ||
53 | |||
54 | #define BOOK3S_INTERRUPT_SYSTEM_RESET 0x100 | ||
55 | #define BOOK3S_INTERRUPT_MACHINE_CHECK 0x200 | ||
56 | #define BOOK3S_INTERRUPT_DATA_STORAGE 0x300 | ||
57 | #define BOOK3S_INTERRUPT_DATA_SEGMENT 0x380 | ||
58 | #define BOOK3S_INTERRUPT_INST_STORAGE 0x400 | ||
59 | #define BOOK3S_INTERRUPT_INST_SEGMENT 0x480 | ||
60 | #define BOOK3S_INTERRUPT_EXTERNAL 0x500 | ||
61 | #define BOOK3S_INTERRUPT_ALIGNMENT 0x600 | ||
62 | #define BOOK3S_INTERRUPT_PROGRAM 0x700 | ||
63 | #define BOOK3S_INTERRUPT_FP_UNAVAIL 0x800 | ||
64 | #define BOOK3S_INTERRUPT_DECREMENTER 0x900 | ||
65 | #define BOOK3S_INTERRUPT_SYSCALL 0xc00 | ||
66 | #define BOOK3S_INTERRUPT_TRACE 0xd00 | ||
67 | #define BOOK3S_INTERRUPT_PERFMON 0xf00 | ||
68 | #define BOOK3S_INTERRUPT_ALTIVEC 0xf20 | ||
69 | #define BOOK3S_INTERRUPT_VSX 0xf40 | ||
70 | |||
71 | #define BOOK3S_IRQPRIO_SYSTEM_RESET 0 | ||
72 | #define BOOK3S_IRQPRIO_DATA_SEGMENT 1 | ||
73 | #define BOOK3S_IRQPRIO_INST_SEGMENT 2 | ||
74 | #define BOOK3S_IRQPRIO_DATA_STORAGE 3 | ||
75 | #define BOOK3S_IRQPRIO_INST_STORAGE 4 | ||
76 | #define BOOK3S_IRQPRIO_ALIGNMENT 5 | ||
77 | #define BOOK3S_IRQPRIO_PROGRAM 6 | ||
78 | #define BOOK3S_IRQPRIO_FP_UNAVAIL 7 | ||
79 | #define BOOK3S_IRQPRIO_ALTIVEC 8 | ||
80 | #define BOOK3S_IRQPRIO_VSX 9 | ||
81 | #define BOOK3S_IRQPRIO_SYSCALL 10 | ||
82 | #define BOOK3S_IRQPRIO_MACHINE_CHECK 11 | ||
83 | #define BOOK3S_IRQPRIO_DEBUG 12 | ||
84 | #define BOOK3S_IRQPRIO_EXTERNAL 13 | ||
85 | #define BOOK3S_IRQPRIO_DECREMENTER 14 | ||
86 | #define BOOK3S_IRQPRIO_PERFORMANCE_MONITOR 15 | ||
87 | #define BOOK3S_IRQPRIO_MAX 16 | ||
88 | |||
89 | #define BOOK3S_HFLAG_DCBZ32 0x1 | ||
90 | #define BOOK3S_HFLAG_SLB 0x2 | ||
91 | |||
52 | #define RESUME_FLAG_NV (1<<0) /* Reload guest nonvolatile state? */ | 92 | #define RESUME_FLAG_NV (1<<0) /* Reload guest nonvolatile state? */ |
53 | #define RESUME_FLAG_HOST (1<<1) /* Resume host? */ | 93 | #define RESUME_FLAG_HOST (1<<1) /* Resume host? */ |
54 | 94 | ||
@@ -57,4 +97,10 @@ | |||
57 | #define RESUME_HOST RESUME_FLAG_HOST | 97 | #define RESUME_HOST RESUME_FLAG_HOST |
58 | #define RESUME_HOST_NV (RESUME_FLAG_HOST|RESUME_FLAG_NV) | 98 | #define RESUME_HOST_NV (RESUME_FLAG_HOST|RESUME_FLAG_NV) |
59 | 99 | ||
100 | #define KVM_GUEST_MODE_NONE 0 | ||
101 | #define KVM_GUEST_MODE_GUEST 1 | ||
102 | #define KVM_GUEST_MODE_SKIP 2 | ||
103 | |||
104 | #define KVM_INST_FETCH_FAILED -1 | ||
105 | |||
60 | #endif /* __POWERPC_KVM_ASM_H__ */ | 106 | #endif /* __POWERPC_KVM_ASM_H__ */ |
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h new file mode 100644 index 000000000000..db7db0a96967 --- /dev/null +++ b/arch/powerpc/include/asm/kvm_book3s.h | |||
@@ -0,0 +1,146 @@ | |||
1 | /* | ||
2 | * This program is free software; you can redistribute it and/or modify | ||
3 | * it under the terms of the GNU General Public License, version 2, as | ||
4 | * published by the Free Software Foundation. | ||
5 | * | ||
6 | * This program is distributed in the hope that it will be useful, | ||
7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
9 | * GNU General Public License for more details. | ||
10 | * | ||
11 | * You should have received a copy of the GNU General Public License | ||
12 | * along with this program; if not, write to the Free Software | ||
13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | ||
14 | * | ||
15 | * Copyright SUSE Linux Products GmbH 2009 | ||
16 | * | ||
17 | * Authors: Alexander Graf <agraf@suse.de> | ||
18 | */ | ||
19 | |||
20 | #ifndef __ASM_KVM_BOOK3S_H__ | ||
21 | #define __ASM_KVM_BOOK3S_H__ | ||
22 | |||
23 | #include <linux/types.h> | ||
24 | #include <linux/kvm_host.h> | ||
25 | #include <asm/kvm_book3s_64_asm.h> | ||
26 | |||
27 | struct kvmppc_slb { | ||
28 | u64 esid; | ||
29 | u64 vsid; | ||
30 | u64 orige; | ||
31 | u64 origv; | ||
32 | bool valid; | ||
33 | bool Ks; | ||
34 | bool Kp; | ||
35 | bool nx; | ||
36 | bool large; /* PTEs are 16MB */ | ||
37 | bool tb; /* 1TB segment */ | ||
38 | bool class; | ||
39 | }; | ||
40 | |||
41 | struct kvmppc_sr { | ||
42 | u32 raw; | ||
43 | u32 vsid; | ||
44 | bool Ks; | ||
45 | bool Kp; | ||
46 | bool nx; | ||
47 | }; | ||
48 | |||
49 | struct kvmppc_bat { | ||
50 | u64 raw; | ||
51 | u32 bepi; | ||
52 | u32 bepi_mask; | ||
53 | bool vs; | ||
54 | bool vp; | ||
55 | u32 brpn; | ||
56 | u8 wimg; | ||
57 | u8 pp; | ||
58 | }; | ||
59 | |||
60 | struct kvmppc_sid_map { | ||
61 | u64 guest_vsid; | ||
62 | u64 guest_esid; | ||
63 | u64 host_vsid; | ||
64 | bool valid; | ||
65 | }; | ||
66 | |||
67 | #define SID_MAP_BITS 9 | ||
68 | #define SID_MAP_NUM (1 << SID_MAP_BITS) | ||
69 | #define SID_MAP_MASK (SID_MAP_NUM - 1) | ||
70 | |||
71 | struct kvmppc_vcpu_book3s { | ||
72 | struct kvm_vcpu vcpu; | ||
73 | struct kvmppc_book3s_shadow_vcpu shadow_vcpu; | ||
74 | struct kvmppc_sid_map sid_map[SID_MAP_NUM]; | ||
75 | struct kvmppc_slb slb[64]; | ||
76 | struct { | ||
77 | u64 esid; | ||
78 | u64 vsid; | ||
79 | } slb_shadow[64]; | ||
80 | u8 slb_shadow_max; | ||
81 | struct kvmppc_sr sr[16]; | ||
82 | struct kvmppc_bat ibat[8]; | ||
83 | struct kvmppc_bat dbat[8]; | ||
84 | u64 hid[6]; | ||
85 | int slb_nr; | ||
86 | u64 sdr1; | ||
87 | u64 dsisr; | ||
88 | u64 hior; | ||
89 | u64 msr_mask; | ||
90 | u64 vsid_first; | ||
91 | u64 vsid_next; | ||
92 | u64 vsid_max; | ||
93 | int context_id; | ||
94 | ulong prog_flags; /* flags to inject when giving a 700 trap */ | ||
95 | }; | ||
96 | |||
97 | #define CONTEXT_HOST 0 | ||
98 | #define CONTEXT_GUEST 1 | ||
99 | #define CONTEXT_GUEST_END 2 | ||
100 | |||
101 | #define VSID_REAL 0xfffffffffff00000 | ||
102 | #define VSID_REAL_DR 0xffffffffffe00000 | ||
103 | #define VSID_REAL_IR 0xffffffffffd00000 | ||
104 | #define VSID_BAT 0xffffffffffc00000 | ||
105 | #define VSID_PR 0x8000000000000000 | ||
106 | |||
107 | extern void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, u64 ea, u64 ea_mask); | ||
108 | extern void kvmppc_mmu_pte_vflush(struct kvm_vcpu *vcpu, u64 vp, u64 vp_mask); | ||
109 | extern void kvmppc_mmu_pte_pflush(struct kvm_vcpu *vcpu, u64 pa_start, u64 pa_end); | ||
110 | extern void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 new_msr); | ||
111 | extern void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu); | ||
112 | extern void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu); | ||
113 | extern int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte); | ||
114 | extern int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr); | ||
115 | extern void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu); | ||
116 | extern struct kvmppc_pte *kvmppc_mmu_find_pte(struct kvm_vcpu *vcpu, u64 ea, bool data); | ||
117 | extern int kvmppc_ld(struct kvm_vcpu *vcpu, ulong eaddr, int size, void *ptr, bool data); | ||
118 | extern int kvmppc_st(struct kvm_vcpu *vcpu, ulong eaddr, int size, void *ptr); | ||
119 | extern void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec); | ||
120 | extern void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, | ||
121 | bool upper, u32 val); | ||
122 | |||
123 | extern u32 kvmppc_trampoline_lowmem; | ||
124 | extern u32 kvmppc_trampoline_enter; | ||
125 | extern void kvmppc_rmcall(ulong srr0, ulong srr1); | ||
126 | extern void kvmppc_load_up_fpu(void); | ||
127 | extern void kvmppc_load_up_altivec(void); | ||
128 | extern void kvmppc_load_up_vsx(void); | ||
129 | |||
130 | static inline struct kvmppc_vcpu_book3s *to_book3s(struct kvm_vcpu *vcpu) | ||
131 | { | ||
132 | return container_of(vcpu, struct kvmppc_vcpu_book3s, vcpu); | ||
133 | } | ||
134 | |||
135 | static inline ulong dsisr(void) | ||
136 | { | ||
137 | ulong r; | ||
138 | asm ( "mfdsisr %0 " : "=r" (r) ); | ||
139 | return r; | ||
140 | } | ||
141 | |||
142 | extern void kvm_return_point(void); | ||
143 | |||
144 | #define INS_DCBZ 0x7c0007ec | ||
145 | |||
146 | #endif /* __ASM_KVM_BOOK3S_H__ */ | ||
diff --git a/arch/powerpc/include/asm/kvm_book3s_64_asm.h b/arch/powerpc/include/asm/kvm_book3s_64_asm.h new file mode 100644 index 000000000000..183461b48407 --- /dev/null +++ b/arch/powerpc/include/asm/kvm_book3s_64_asm.h | |||
@@ -0,0 +1,76 @@ | |||
1 | /* | ||
2 | * This program is free software; you can redistribute it and/or modify | ||
3 | * it under the terms of the GNU General Public License, version 2, as | ||
4 | * published by the Free Software Foundation. | ||
5 | * | ||
6 | * This program is distributed in the hope that it will be useful, | ||
7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
9 | * GNU General Public License for more details. | ||
10 | * | ||
11 | * You should have received a copy of the GNU General Public License | ||
12 | * along with this program; if not, write to the Free Software | ||
13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. | ||
14 | * | ||
15 | * Copyright SUSE Linux Products GmbH 2009 | ||
16 | * | ||
17 | * Authors: Alexander Graf <agraf@suse.de> | ||
18 | */ | ||
19 | |||
20 | #ifndef __ASM_KVM_BOOK3S_ASM_H__ | ||
21 | #define __ASM_KVM_BOOK3S_ASM_H__ | ||
22 | |||
23 | #ifdef __ASSEMBLY__ | ||
24 | |||
25 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER | ||
26 | |||
27 | #include <asm/kvm_asm.h> | ||
28 | |||
29 | .macro DO_KVM intno | ||
30 | .if (\intno == BOOK3S_INTERRUPT_SYSTEM_RESET) || \ | ||
31 | (\intno == BOOK3S_INTERRUPT_MACHINE_CHECK) || \ | ||
32 | (\intno == BOOK3S_INTERRUPT_DATA_STORAGE) || \ | ||
33 | (\intno == BOOK3S_INTERRUPT_INST_STORAGE) || \ | ||
34 | (\intno == BOOK3S_INTERRUPT_DATA_SEGMENT) || \ | ||
35 | (\intno == BOOK3S_INTERRUPT_INST_SEGMENT) || \ | ||
36 | (\intno == BOOK3S_INTERRUPT_EXTERNAL) || \ | ||
37 | (\intno == BOOK3S_INTERRUPT_ALIGNMENT) || \ | ||
38 | (\intno == BOOK3S_INTERRUPT_PROGRAM) || \ | ||
39 | (\intno == BOOK3S_INTERRUPT_FP_UNAVAIL) || \ | ||
40 | (\intno == BOOK3S_INTERRUPT_DECREMENTER) || \ | ||
41 | (\intno == BOOK3S_INTERRUPT_SYSCALL) || \ | ||
42 | (\intno == BOOK3S_INTERRUPT_TRACE) || \ | ||
43 | (\intno == BOOK3S_INTERRUPT_PERFMON) || \ | ||
44 | (\intno == BOOK3S_INTERRUPT_ALTIVEC) || \ | ||
45 | (\intno == BOOK3S_INTERRUPT_VSX) | ||
46 | |||
47 | b kvmppc_trampoline_\intno | ||
48 | kvmppc_resume_\intno: | ||
49 | |||
50 | .endif | ||
51 | .endm | ||
52 | |||
53 | #else | ||
54 | |||
55 | .macro DO_KVM intno | ||
56 | .endm | ||
57 | |||
58 | #endif /* CONFIG_KVM_BOOK3S_64_HANDLER */ | ||
59 | |||
60 | #else /*__ASSEMBLY__ */ | ||
61 | |||
62 | struct kvmppc_book3s_shadow_vcpu { | ||
63 | ulong gpr[14]; | ||
64 | u32 cr; | ||
65 | u32 xer; | ||
66 | ulong host_r1; | ||
67 | ulong host_r2; | ||
68 | ulong handler; | ||
69 | ulong scratch0; | ||
70 | ulong scratch1; | ||
71 | ulong vmhandler; | ||
72 | }; | ||
73 | |||
74 | #endif /*__ASSEMBLY__ */ | ||
75 | |||
76 | #endif /* __ASM_KVM_BOOK3S_ASM_H__ */ | ||
diff --git a/arch/powerpc/include/asm/kvm_e500.h b/arch/powerpc/include/asm/kvm_e500.h index 9d497ce49726..7fea26fffb25 100644 --- a/arch/powerpc/include/asm/kvm_e500.h +++ b/arch/powerpc/include/asm/kvm_e500.h | |||
@@ -52,9 +52,12 @@ struct kvmppc_vcpu_e500 { | |||
52 | u32 mas5; | 52 | u32 mas5; |
53 | u32 mas6; | 53 | u32 mas6; |
54 | u32 mas7; | 54 | u32 mas7; |
55 | u32 l1csr0; | ||
55 | u32 l1csr1; | 56 | u32 l1csr1; |
56 | u32 hid0; | 57 | u32 hid0; |
57 | u32 hid1; | 58 | u32 hid1; |
59 | u32 tlb0cfg; | ||
60 | u32 tlb1cfg; | ||
58 | 61 | ||
59 | struct kvm_vcpu vcpu; | 62 | struct kvm_vcpu vcpu; |
60 | }; | 63 | }; |
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h index c9c930ed11d7..5e5bae7e152f 100644 --- a/arch/powerpc/include/asm/kvm_host.h +++ b/arch/powerpc/include/asm/kvm_host.h | |||
@@ -21,7 +21,8 @@ | |||
21 | #define __POWERPC_KVM_HOST_H__ | 21 | #define __POWERPC_KVM_HOST_H__ |
22 | 22 | ||
23 | #include <linux/mutex.h> | 23 | #include <linux/mutex.h> |
24 | #include <linux/timer.h> | 24 | #include <linux/hrtimer.h> |
25 | #include <linux/interrupt.h> | ||
25 | #include <linux/types.h> | 26 | #include <linux/types.h> |
26 | #include <linux/kvm_types.h> | 27 | #include <linux/kvm_types.h> |
27 | #include <asm/kvm_asm.h> | 28 | #include <asm/kvm_asm.h> |
@@ -37,6 +38,8 @@ | |||
37 | #define KVM_NR_PAGE_SIZES 1 | 38 | #define KVM_NR_PAGE_SIZES 1 |
38 | #define KVM_PAGES_PER_HPAGE(x) (1UL<<31) | 39 | #define KVM_PAGES_PER_HPAGE(x) (1UL<<31) |
39 | 40 | ||
41 | #define HPTEG_CACHE_NUM 1024 | ||
42 | |||
40 | struct kvm; | 43 | struct kvm; |
41 | struct kvm_run; | 44 | struct kvm_run; |
42 | struct kvm_vcpu; | 45 | struct kvm_vcpu; |
@@ -63,6 +66,17 @@ struct kvm_vcpu_stat { | |||
63 | u32 dec_exits; | 66 | u32 dec_exits; |
64 | u32 ext_intr_exits; | 67 | u32 ext_intr_exits; |
65 | u32 halt_wakeup; | 68 | u32 halt_wakeup; |
69 | #ifdef CONFIG_PPC64 | ||
70 | u32 pf_storage; | ||
71 | u32 pf_instruc; | ||
72 | u32 sp_storage; | ||
73 | u32 sp_instruc; | ||
74 | u32 queue_intr; | ||
75 | u32 ld; | ||
76 | u32 ld_slow; | ||
77 | u32 st; | ||
78 | u32 st_slow; | ||
79 | #endif | ||
66 | }; | 80 | }; |
67 | 81 | ||
68 | enum kvm_exit_types { | 82 | enum kvm_exit_types { |
@@ -109,20 +123,85 @@ struct kvmppc_exit_timing { | |||
109 | struct kvm_arch { | 123 | struct kvm_arch { |
110 | }; | 124 | }; |
111 | 125 | ||
126 | struct kvmppc_pte { | ||
127 | u64 eaddr; | ||
128 | u64 vpage; | ||
129 | u64 raddr; | ||
130 | bool may_read; | ||
131 | bool may_write; | ||
132 | bool may_execute; | ||
133 | }; | ||
134 | |||
135 | struct kvmppc_mmu { | ||
136 | /* book3s_64 only */ | ||
137 | void (*slbmte)(struct kvm_vcpu *vcpu, u64 rb, u64 rs); | ||
138 | u64 (*slbmfee)(struct kvm_vcpu *vcpu, u64 slb_nr); | ||
139 | u64 (*slbmfev)(struct kvm_vcpu *vcpu, u64 slb_nr); | ||
140 | void (*slbie)(struct kvm_vcpu *vcpu, u64 slb_nr); | ||
141 | void (*slbia)(struct kvm_vcpu *vcpu); | ||
142 | /* book3s */ | ||
143 | void (*mtsrin)(struct kvm_vcpu *vcpu, u32 srnum, ulong value); | ||
144 | u32 (*mfsrin)(struct kvm_vcpu *vcpu, u32 srnum); | ||
145 | int (*xlate)(struct kvm_vcpu *vcpu, gva_t eaddr, struct kvmppc_pte *pte, bool data); | ||
146 | void (*reset_msr)(struct kvm_vcpu *vcpu); | ||
147 | void (*tlbie)(struct kvm_vcpu *vcpu, ulong addr, bool large); | ||
148 | int (*esid_to_vsid)(struct kvm_vcpu *vcpu, u64 esid, u64 *vsid); | ||
149 | u64 (*ea_to_vp)(struct kvm_vcpu *vcpu, gva_t eaddr, bool data); | ||
150 | bool (*is_dcbz32)(struct kvm_vcpu *vcpu); | ||
151 | }; | ||
152 | |||
153 | struct hpte_cache { | ||
154 | u64 host_va; | ||
155 | u64 pfn; | ||
156 | ulong slot; | ||
157 | struct kvmppc_pte pte; | ||
158 | }; | ||
159 | |||
112 | struct kvm_vcpu_arch { | 160 | struct kvm_vcpu_arch { |
113 | u32 host_stack; | 161 | ulong host_stack; |
114 | u32 host_pid; | 162 | u32 host_pid; |
163 | #ifdef CONFIG_PPC64 | ||
164 | ulong host_msr; | ||
165 | ulong host_r2; | ||
166 | void *host_retip; | ||
167 | ulong trampoline_lowmem; | ||
168 | ulong trampoline_enter; | ||
169 | ulong highmem_handler; | ||
170 | ulong rmcall; | ||
171 | ulong host_paca_phys; | ||
172 | struct kvmppc_mmu mmu; | ||
173 | #endif | ||
115 | 174 | ||
116 | u64 fpr[32]; | ||
117 | ulong gpr[32]; | 175 | ulong gpr[32]; |
118 | 176 | ||
177 | u64 fpr[32]; | ||
178 | u32 fpscr; | ||
179 | |||
180 | #ifdef CONFIG_ALTIVEC | ||
181 | vector128 vr[32]; | ||
182 | vector128 vscr; | ||
183 | #endif | ||
184 | |||
185 | #ifdef CONFIG_VSX | ||
186 | u64 vsr[32]; | ||
187 | #endif | ||
188 | |||
119 | ulong pc; | 189 | ulong pc; |
120 | u32 cr; | ||
121 | ulong ctr; | 190 | ulong ctr; |
122 | ulong lr; | 191 | ulong lr; |
192 | |||
193 | #ifdef CONFIG_BOOKE | ||
123 | ulong xer; | 194 | ulong xer; |
195 | u32 cr; | ||
196 | #endif | ||
124 | 197 | ||
125 | ulong msr; | 198 | ulong msr; |
199 | #ifdef CONFIG_PPC64 | ||
200 | ulong shadow_msr; | ||
201 | ulong shadow_srr1; | ||
202 | ulong hflags; | ||
203 | ulong guest_owned_ext; | ||
204 | #endif | ||
126 | u32 mmucr; | 205 | u32 mmucr; |
127 | ulong sprg0; | 206 | ulong sprg0; |
128 | ulong sprg1; | 207 | ulong sprg1; |
@@ -149,6 +228,7 @@ struct kvm_vcpu_arch { | |||
149 | u32 ivor[64]; | 228 | u32 ivor[64]; |
150 | ulong ivpr; | 229 | ulong ivpr; |
151 | u32 pir; | 230 | u32 pir; |
231 | u32 pvr; | ||
152 | 232 | ||
153 | u32 shadow_pid; | 233 | u32 shadow_pid; |
154 | u32 pid; | 234 | u32 pid; |
@@ -174,8 +254,13 @@ struct kvm_vcpu_arch { | |||
174 | #endif | 254 | #endif |
175 | 255 | ||
176 | u32 last_inst; | 256 | u32 last_inst; |
257 | #ifdef CONFIG_PPC64 | ||
258 | ulong fault_dsisr; | ||
259 | #endif | ||
177 | ulong fault_dear; | 260 | ulong fault_dear; |
178 | ulong fault_esr; | 261 | ulong fault_esr; |
262 | ulong queued_dear; | ||
263 | ulong queued_esr; | ||
179 | gpa_t paddr_accessed; | 264 | gpa_t paddr_accessed; |
180 | 265 | ||
181 | u8 io_gpr; /* GPR used as IO source/target */ | 266 | u8 io_gpr; /* GPR used as IO source/target */ |
@@ -185,8 +270,15 @@ struct kvm_vcpu_arch { | |||
185 | 270 | ||
186 | u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */ | 271 | u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */ |
187 | 272 | ||
188 | struct timer_list dec_timer; | 273 | struct hrtimer dec_timer; |
274 | struct tasklet_struct tasklet; | ||
275 | u64 dec_jiffies; | ||
189 | unsigned long pending_exceptions; | 276 | unsigned long pending_exceptions; |
277 | |||
278 | #ifdef CONFIG_PPC64 | ||
279 | struct hpte_cache hpte_cache[HPTEG_CACHE_NUM]; | ||
280 | int hpte_cache_offset; | ||
281 | #endif | ||
190 | }; | 282 | }; |
191 | 283 | ||
192 | #endif /* __POWERPC_KVM_HOST_H__ */ | 284 | #endif /* __POWERPC_KVM_HOST_H__ */ |
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h index 2c6ee349df5e..e2642829e435 100644 --- a/arch/powerpc/include/asm/kvm_ppc.h +++ b/arch/powerpc/include/asm/kvm_ppc.h | |||
@@ -28,6 +28,9 @@ | |||
28 | #include <linux/types.h> | 28 | #include <linux/types.h> |
29 | #include <linux/kvm_types.h> | 29 | #include <linux/kvm_types.h> |
30 | #include <linux/kvm_host.h> | 30 | #include <linux/kvm_host.h> |
31 | #ifdef CONFIG_PPC_BOOK3S | ||
32 | #include <asm/kvm_book3s.h> | ||
33 | #endif | ||
31 | 34 | ||
32 | enum emulation_result { | 35 | enum emulation_result { |
33 | EMULATE_DONE, /* no further processing */ | 36 | EMULATE_DONE, /* no further processing */ |
@@ -39,6 +42,7 @@ enum emulation_result { | |||
39 | extern int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu); | 42 | extern int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu); |
40 | extern char kvmppc_handlers_start[]; | 43 | extern char kvmppc_handlers_start[]; |
41 | extern unsigned long kvmppc_handler_len; | 44 | extern unsigned long kvmppc_handler_len; |
45 | extern void kvmppc_handler_highmem(void); | ||
42 | 46 | ||
43 | extern void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu); | 47 | extern void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu); |
44 | extern int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu, | 48 | extern int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu, |
@@ -79,8 +83,9 @@ extern void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu); | |||
79 | 83 | ||
80 | extern void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu); | 84 | extern void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu); |
81 | extern int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu); | 85 | extern int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu); |
82 | extern void kvmppc_core_queue_program(struct kvm_vcpu *vcpu); | 86 | extern void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags); |
83 | extern void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu); | 87 | extern void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu); |
88 | extern void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu); | ||
84 | extern void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, | 89 | extern void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, |
85 | struct kvm_interrupt *irq); | 90 | struct kvm_interrupt *irq); |
86 | 91 | ||
@@ -94,4 +99,81 @@ extern void kvmppc_booke_exit(void); | |||
94 | 99 | ||
95 | extern void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu); | 100 | extern void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu); |
96 | 101 | ||
102 | #ifdef CONFIG_PPC_BOOK3S | ||
103 | |||
104 | /* We assume we're always acting on the current vcpu */ | ||
105 | |||
106 | static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val) | ||
107 | { | ||
108 | if ( num < 14 ) { | ||
109 | get_paca()->shadow_vcpu.gpr[num] = val; | ||
110 | to_book3s(vcpu)->shadow_vcpu.gpr[num] = val; | ||
111 | } else | ||
112 | vcpu->arch.gpr[num] = val; | ||
113 | } | ||
114 | |||
115 | static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num) | ||
116 | { | ||
117 | if ( num < 14 ) | ||
118 | return get_paca()->shadow_vcpu.gpr[num]; | ||
119 | else | ||
120 | return vcpu->arch.gpr[num]; | ||
121 | } | ||
122 | |||
123 | static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val) | ||
124 | { | ||
125 | get_paca()->shadow_vcpu.cr = val; | ||
126 | to_book3s(vcpu)->shadow_vcpu.cr = val; | ||
127 | } | ||
128 | |||
129 | static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu) | ||
130 | { | ||
131 | return get_paca()->shadow_vcpu.cr; | ||
132 | } | ||
133 | |||
134 | static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val) | ||
135 | { | ||
136 | get_paca()->shadow_vcpu.xer = val; | ||
137 | to_book3s(vcpu)->shadow_vcpu.xer = val; | ||
138 | } | ||
139 | |||
140 | static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu) | ||
141 | { | ||
142 | return get_paca()->shadow_vcpu.xer; | ||
143 | } | ||
144 | |||
145 | #else | ||
146 | |||
147 | static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val) | ||
148 | { | ||
149 | vcpu->arch.gpr[num] = val; | ||
150 | } | ||
151 | |||
152 | static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num) | ||
153 | { | ||
154 | return vcpu->arch.gpr[num]; | ||
155 | } | ||
156 | |||
157 | static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val) | ||
158 | { | ||
159 | vcpu->arch.cr = val; | ||
160 | } | ||
161 | |||
162 | static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu) | ||
163 | { | ||
164 | return vcpu->arch.cr; | ||
165 | } | ||
166 | |||
167 | static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val) | ||
168 | { | ||
169 | vcpu->arch.xer = val; | ||
170 | } | ||
171 | |||
172 | static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu) | ||
173 | { | ||
174 | return vcpu->arch.xer; | ||
175 | } | ||
176 | |||
177 | #endif | ||
178 | |||
97 | #endif /* __POWERPC_KVM_PPC_H__ */ | 179 | #endif /* __POWERPC_KVM_PPC_H__ */ |
diff --git a/arch/powerpc/include/asm/local.h b/arch/powerpc/include/asm/local.h index 84b457a3c1bc..c2410af6bfd9 100644 --- a/arch/powerpc/include/asm/local.h +++ b/arch/powerpc/include/asm/local.h | |||
@@ -24,7 +24,7 @@ static __inline__ long local_add_return(long a, local_t *l) | |||
24 | long t; | 24 | long t; |
25 | 25 | ||
26 | __asm__ __volatile__( | 26 | __asm__ __volatile__( |
27 | "1:" PPC_LLARX "%0,0,%2 # local_add_return\n\ | 27 | "1:" PPC_LLARX(%0,0,%2,0) " # local_add_return\n\ |
28 | add %0,%1,%0\n" | 28 | add %0,%1,%0\n" |
29 | PPC405_ERR77(0,%2) | 29 | PPC405_ERR77(0,%2) |
30 | PPC_STLCX "%0,0,%2 \n\ | 30 | PPC_STLCX "%0,0,%2 \n\ |
@@ -43,7 +43,7 @@ static __inline__ long local_sub_return(long a, local_t *l) | |||
43 | long t; | 43 | long t; |
44 | 44 | ||
45 | __asm__ __volatile__( | 45 | __asm__ __volatile__( |
46 | "1:" PPC_LLARX "%0,0,%2 # local_sub_return\n\ | 46 | "1:" PPC_LLARX(%0,0,%2,0) " # local_sub_return\n\ |
47 | subf %0,%1,%0\n" | 47 | subf %0,%1,%0\n" |
48 | PPC405_ERR77(0,%2) | 48 | PPC405_ERR77(0,%2) |
49 | PPC_STLCX "%0,0,%2 \n\ | 49 | PPC_STLCX "%0,0,%2 \n\ |
@@ -60,7 +60,7 @@ static __inline__ long local_inc_return(local_t *l) | |||
60 | long t; | 60 | long t; |
61 | 61 | ||
62 | __asm__ __volatile__( | 62 | __asm__ __volatile__( |
63 | "1:" PPC_LLARX "%0,0,%1 # local_inc_return\n\ | 63 | "1:" PPC_LLARX(%0,0,%1,0) " # local_inc_return\n\ |
64 | addic %0,%0,1\n" | 64 | addic %0,%0,1\n" |
65 | PPC405_ERR77(0,%1) | 65 | PPC405_ERR77(0,%1) |
66 | PPC_STLCX "%0,0,%1 \n\ | 66 | PPC_STLCX "%0,0,%1 \n\ |
@@ -87,7 +87,7 @@ static __inline__ long local_dec_return(local_t *l) | |||
87 | long t; | 87 | long t; |
88 | 88 | ||
89 | __asm__ __volatile__( | 89 | __asm__ __volatile__( |
90 | "1:" PPC_LLARX "%0,0,%1 # local_dec_return\n\ | 90 | "1:" PPC_LLARX(%0,0,%1,0) " # local_dec_return\n\ |
91 | addic %0,%0,-1\n" | 91 | addic %0,%0,-1\n" |
92 | PPC405_ERR77(0,%1) | 92 | PPC405_ERR77(0,%1) |
93 | PPC_STLCX "%0,0,%1\n\ | 93 | PPC_STLCX "%0,0,%1\n\ |
@@ -117,7 +117,7 @@ static __inline__ int local_add_unless(local_t *l, long a, long u) | |||
117 | long t; | 117 | long t; |
118 | 118 | ||
119 | __asm__ __volatile__ ( | 119 | __asm__ __volatile__ ( |
120 | "1:" PPC_LLARX "%0,0,%1 # local_add_unless\n\ | 120 | "1:" PPC_LLARX(%0,0,%1,0) " # local_add_unless\n\ |
121 | cmpw 0,%0,%3 \n\ | 121 | cmpw 0,%0,%3 \n\ |
122 | beq- 2f \n\ | 122 | beq- 2f \n\ |
123 | add %0,%2,%0 \n" | 123 | add %0,%2,%0 \n" |
@@ -147,7 +147,7 @@ static __inline__ long local_dec_if_positive(local_t *l) | |||
147 | long t; | 147 | long t; |
148 | 148 | ||
149 | __asm__ __volatile__( | 149 | __asm__ __volatile__( |
150 | "1:" PPC_LLARX "%0,0,%1 # local_dec_if_positive\n\ | 150 | "1:" PPC_LLARX(%0,0,%1,0) " # local_dec_if_positive\n\ |
151 | cmpwi %0,1\n\ | 151 | cmpwi %0,1\n\ |
152 | addi %0,%0,-1\n\ | 152 | addi %0,%0,-1\n\ |
153 | blt- 2f\n" | 153 | blt- 2f\n" |
@@ -172,29 +172,4 @@ static __inline__ long local_dec_if_positive(local_t *l) | |||
172 | #define __local_add(i,l) ((l)->a.counter+=(i)) | 172 | #define __local_add(i,l) ((l)->a.counter+=(i)) |
173 | #define __local_sub(i,l) ((l)->a.counter-=(i)) | 173 | #define __local_sub(i,l) ((l)->a.counter-=(i)) |
174 | 174 | ||
175 | /* Need to disable preemption for the cpu local counters otherwise we could | ||
176 | still access a variable of a previous CPU in a non atomic way. */ | ||
177 | #define cpu_local_wrap_v(l) \ | ||
178 | ({ local_t res__; \ | ||
179 | preempt_disable(); \ | ||
180 | res__ = (l); \ | ||
181 | preempt_enable(); \ | ||
182 | res__; }) | ||
183 | #define cpu_local_wrap(l) \ | ||
184 | ({ preempt_disable(); \ | ||
185 | l; \ | ||
186 | preempt_enable(); }) \ | ||
187 | |||
188 | #define cpu_local_read(l) cpu_local_wrap_v(local_read(&__get_cpu_var(l))) | ||
189 | #define cpu_local_set(l, i) cpu_local_wrap(local_set(&__get_cpu_var(l), (i))) | ||
190 | #define cpu_local_inc(l) cpu_local_wrap(local_inc(&__get_cpu_var(l))) | ||
191 | #define cpu_local_dec(l) cpu_local_wrap(local_dec(&__get_cpu_var(l))) | ||
192 | #define cpu_local_add(i, l) cpu_local_wrap(local_add((i), &__get_cpu_var(l))) | ||
193 | #define cpu_local_sub(i, l) cpu_local_wrap(local_sub((i), &__get_cpu_var(l))) | ||
194 | |||
195 | #define __cpu_local_inc(l) cpu_local_inc(l) | ||
196 | #define __cpu_local_dec(l) cpu_local_dec(l) | ||
197 | #define __cpu_local_add(i, l) cpu_local_add((i), (l)) | ||
198 | #define __cpu_local_sub(i, l) cpu_local_sub((i), (l)) | ||
199 | |||
200 | #endif /* _ARCH_POWERPC_LOCAL_H */ | 175 | #endif /* _ARCH_POWERPC_LOCAL_H */ |
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h index f78f65c38f05..14b592dfb4e8 100644 --- a/arch/powerpc/include/asm/lppaca.h +++ b/arch/powerpc/include/asm/lppaca.h | |||
@@ -100,7 +100,14 @@ struct lppaca { | |||
100 | // Used to pass parms from the OS to PLIC for SetAsrAndRfid | 100 | // Used to pass parms from the OS to PLIC for SetAsrAndRfid |
101 | u64 saved_gpr3; // Saved GPR3 x20-x27 | 101 | u64 saved_gpr3; // Saved GPR3 x20-x27 |
102 | u64 saved_gpr4; // Saved GPR4 x28-x2F | 102 | u64 saved_gpr4; // Saved GPR4 x28-x2F |
103 | u64 saved_gpr5; // Saved GPR5 x30-x37 | 103 | union { |
104 | u64 saved_gpr5; /* Saved GPR5 x30-x37 */ | ||
105 | struct { | ||
106 | u8 cede_latency_hint; /* x30 */ | ||
107 | u8 reserved[7]; /* x31-x36 */ | ||
108 | } fields; | ||
109 | } gpr5_dword; | ||
110 | |||
104 | 111 | ||
105 | u8 dtl_enable_mask; // Dispatch Trace Log mask x38-x38 | 112 | u8 dtl_enable_mask; // Dispatch Trace Log mask x38-x38 |
106 | u8 donate_dedicated_cpu; // Donate dedicated CPU cycles x39-x39 | 113 | u8 donate_dedicated_cpu; // Donate dedicated CPU cycles x39-x39 |
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h index 9efa2be78331..9f0fc9e6ce0d 100644 --- a/arch/powerpc/include/asm/machdep.h +++ b/arch/powerpc/include/asm/machdep.h | |||
@@ -266,6 +266,11 @@ struct machdep_calls { | |||
266 | void (*suspend_disable_irqs)(void); | 266 | void (*suspend_disable_irqs)(void); |
267 | void (*suspend_enable_irqs)(void); | 267 | void (*suspend_enable_irqs)(void); |
268 | #endif | 268 | #endif |
269 | |||
270 | #ifdef CONFIG_ARCH_CPU_PROBE_RELEASE | ||
271 | ssize_t (*cpu_probe)(const char *, size_t); | ||
272 | ssize_t (*cpu_release)(const char *, size_t); | ||
273 | #endif | ||
269 | }; | 274 | }; |
270 | 275 | ||
271 | extern void e500_idle(void); | 276 | extern void e500_idle(void); |
diff --git a/arch/powerpc/include/asm/macio.h b/arch/powerpc/include/asm/macio.h index 079c06eae446..a062c57696d0 100644 --- a/arch/powerpc/include/asm/macio.h +++ b/arch/powerpc/include/asm/macio.h | |||
@@ -39,6 +39,7 @@ struct macio_dev | |||
39 | struct macio_bus *bus; /* macio bus this device is on */ | 39 | struct macio_bus *bus; /* macio bus this device is on */ |
40 | struct macio_dev *media_bay; /* Device is part of a media bay */ | 40 | struct macio_dev *media_bay; /* Device is part of a media bay */ |
41 | struct of_device ofdev; | 41 | struct of_device ofdev; |
42 | struct device_dma_parameters dma_parms; /* ide needs that */ | ||
42 | int n_resources; | 43 | int n_resources; |
43 | struct resource resource[MACIO_DEV_COUNT_RESOURCES]; | 44 | struct resource resource[MACIO_DEV_COUNT_RESOURCES]; |
44 | int n_interrupts; | 45 | int n_interrupts; |
@@ -78,6 +79,8 @@ static inline unsigned long macio_resource_len(struct macio_dev *dev, int resour | |||
78 | return res->end - res->start + 1; | 79 | return res->end - res->start + 1; |
79 | } | 80 | } |
80 | 81 | ||
82 | extern int macio_enable_devres(struct macio_dev *dev); | ||
83 | |||
81 | extern int macio_request_resource(struct macio_dev *dev, int resource_no, const char *name); | 84 | extern int macio_request_resource(struct macio_dev *dev, int resource_no, const char *name); |
82 | extern void macio_release_resource(struct macio_dev *dev, int resource_no); | 85 | extern void macio_release_resource(struct macio_dev *dev, int resource_no); |
83 | extern int macio_request_resources(struct macio_dev *dev, const char *name); | 86 | extern int macio_request_resources(struct macio_dev *dev, const char *name); |
@@ -131,6 +134,9 @@ struct macio_driver | |||
131 | int (*resume)(struct macio_dev* dev); | 134 | int (*resume)(struct macio_dev* dev); |
132 | int (*shutdown)(struct macio_dev* dev); | 135 | int (*shutdown)(struct macio_dev* dev); |
133 | 136 | ||
137 | #ifdef CONFIG_PMAC_MEDIABAY | ||
138 | void (*mediabay_event)(struct macio_dev* dev, int mb_state); | ||
139 | #endif | ||
134 | struct device_driver driver; | 140 | struct device_driver driver; |
135 | }; | 141 | }; |
136 | #define to_macio_driver(drv) container_of(drv,struct macio_driver, driver) | 142 | #define to_macio_driver(drv) container_of(drv,struct macio_driver, driver) |
diff --git a/arch/powerpc/include/asm/mediabay.h b/arch/powerpc/include/asm/mediabay.h index b2efb3325808..11037a4133ee 100644 --- a/arch/powerpc/include/asm/mediabay.h +++ b/arch/powerpc/include/asm/mediabay.h | |||
@@ -17,26 +17,31 @@ | |||
17 | #define MB_POWER 6 /* media bay contains a Power device (???) */ | 17 | #define MB_POWER 6 /* media bay contains a Power device (???) */ |
18 | #define MB_NO 7 /* media bay contains nothing */ | 18 | #define MB_NO 7 /* media bay contains nothing */ |
19 | 19 | ||
20 | /* Number of bays in the machine or 0 */ | 20 | struct macio_dev; |
21 | extern int media_bay_count; | ||
22 | 21 | ||
23 | #ifdef CONFIG_BLK_DEV_IDE_PMAC | 22 | #ifdef CONFIG_PMAC_MEDIABAY |
24 | #include <linux/ide.h> | ||
25 | 23 | ||
26 | int check_media_bay_by_base(unsigned long base, int what); | 24 | /* Check the content type of the bay, returns MB_NO if the bay is still |
27 | /* called by IDE PMAC host driver to register IDE controller for media bay */ | 25 | * transitionning |
28 | int media_bay_set_ide_infos(struct device_node *which_bay, unsigned long base, | 26 | */ |
29 | int irq, ide_hwif_t *hwif); | 27 | extern int check_media_bay(struct macio_dev *bay); |
30 | 28 | ||
31 | int check_media_bay(struct device_node *which_bay, int what); | 29 | /* The ATA driver uses the calls below to temporarily hold on the |
30 | * media bay callbacks while initializing the interface | ||
31 | */ | ||
32 | extern void lock_media_bay(struct macio_dev *bay); | ||
33 | extern void unlock_media_bay(struct macio_dev *bay); | ||
32 | 34 | ||
33 | #else | 35 | #else |
34 | 36 | ||
35 | static inline int check_media_bay(struct device_node *which_bay, int what) | 37 | static inline int check_media_bay(struct macio_dev *bay) |
36 | { | 38 | { |
37 | return -ENODEV; | 39 | return MB_NO; |
38 | } | 40 | } |
39 | 41 | ||
42 | static inline void lock_media_bay(struct macio_dev *bay) { } | ||
43 | static inline void unlock_media_bay(struct macio_dev *bay) { } | ||
44 | |||
40 | #endif | 45 | #endif |
41 | 46 | ||
42 | #endif /* __KERNEL__ */ | 47 | #endif /* __KERNEL__ */ |
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h index bebe31c2e907..2102b214a87c 100644 --- a/arch/powerpc/include/asm/mmu-hash64.h +++ b/arch/powerpc/include/asm/mmu-hash64.h | |||
@@ -173,14 +173,6 @@ extern unsigned long tce_alloc_start, tce_alloc_end; | |||
173 | */ | 173 | */ |
174 | extern int mmu_ci_restrictions; | 174 | extern int mmu_ci_restrictions; |
175 | 175 | ||
176 | #ifdef CONFIG_HUGETLB_PAGE | ||
177 | /* | ||
178 | * The page size indexes of the huge pages for use by hugetlbfs | ||
179 | */ | ||
180 | extern unsigned int mmu_huge_psizes[MMU_PAGE_COUNT]; | ||
181 | |||
182 | #endif /* CONFIG_HUGETLB_PAGE */ | ||
183 | |||
184 | /* | 176 | /* |
185 | * This function sets the AVPN and L fields of the HPTE appropriately | 177 | * This function sets the AVPN and L fields of the HPTE appropriately |
186 | * for the page size | 178 | * for the page size |
@@ -253,10 +245,11 @@ extern int __hash_page_64K(unsigned long ea, unsigned long access, | |||
253 | unsigned long vsid, pte_t *ptep, unsigned long trap, | 245 | unsigned long vsid, pte_t *ptep, unsigned long trap, |
254 | unsigned int local, int ssize); | 246 | unsigned int local, int ssize); |
255 | struct mm_struct; | 247 | struct mm_struct; |
248 | unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap); | ||
256 | extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); | 249 | extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); |
257 | extern int hash_huge_page(struct mm_struct *mm, unsigned long access, | 250 | int __hash_page_huge(unsigned long ea, unsigned long access, unsigned long vsid, |
258 | unsigned long ea, unsigned long vsid, int local, | 251 | pte_t *ptep, unsigned long trap, int local, int ssize, |
259 | unsigned long trap); | 252 | unsigned int shift, unsigned int mmu_psize); |
260 | 253 | ||
261 | extern int htab_bolt_mapping(unsigned long vstart, unsigned long vend, | 254 | extern int htab_bolt_mapping(unsigned long vstart, unsigned long vend, |
262 | unsigned long pstart, unsigned long prot, | 255 | unsigned long pstart, unsigned long prot, |
@@ -380,6 +373,38 @@ extern void slb_set_size(u16 size); | |||
380 | 373 | ||
381 | #ifndef __ASSEMBLY__ | 374 | #ifndef __ASSEMBLY__ |
382 | 375 | ||
376 | #ifdef CONFIG_PPC_SUBPAGE_PROT | ||
377 | /* | ||
378 | * For the sub-page protection option, we extend the PGD with one of | ||
379 | * these. Basically we have a 3-level tree, with the top level being | ||
380 | * the protptrs array. To optimize speed and memory consumption when | ||
381 | * only addresses < 4GB are being protected, pointers to the first | ||
382 | * four pages of sub-page protection words are stored in the low_prot | ||
383 | * array. | ||
384 | * Each page of sub-page protection words protects 1GB (4 bytes | ||
385 | * protects 64k). For the 3-level tree, each page of pointers then | ||
386 | * protects 8TB. | ||
387 | */ | ||
388 | struct subpage_prot_table { | ||
389 | unsigned long maxaddr; /* only addresses < this are protected */ | ||
390 | unsigned int **protptrs[2]; | ||
391 | unsigned int *low_prot[4]; | ||
392 | }; | ||
393 | |||
394 | #define SBP_L1_BITS (PAGE_SHIFT - 2) | ||
395 | #define SBP_L2_BITS (PAGE_SHIFT - 3) | ||
396 | #define SBP_L1_COUNT (1 << SBP_L1_BITS) | ||
397 | #define SBP_L2_COUNT (1 << SBP_L2_BITS) | ||
398 | #define SBP_L2_SHIFT (PAGE_SHIFT + SBP_L1_BITS) | ||
399 | #define SBP_L3_SHIFT (SBP_L2_SHIFT + SBP_L2_BITS) | ||
400 | |||
401 | extern void subpage_prot_free(struct mm_struct *mm); | ||
402 | extern void subpage_prot_init_new_context(struct mm_struct *mm); | ||
403 | #else | ||
404 | static inline void subpage_prot_free(struct mm_struct *mm) {} | ||
405 | static inline void subpage_prot_init_new_context(struct mm_struct *mm) { } | ||
406 | #endif /* CONFIG_PPC_SUBPAGE_PROT */ | ||
407 | |||
383 | typedef unsigned long mm_context_id_t; | 408 | typedef unsigned long mm_context_id_t; |
384 | 409 | ||
385 | typedef struct { | 410 | typedef struct { |
@@ -393,6 +418,9 @@ typedef struct { | |||
393 | u16 sllp; /* SLB page size encoding */ | 418 | u16 sllp; /* SLB page size encoding */ |
394 | #endif | 419 | #endif |
395 | unsigned long vdso_base; | 420 | unsigned long vdso_base; |
421 | #ifdef CONFIG_PPC_SUBPAGE_PROT | ||
422 | struct subpage_prot_table spt; | ||
423 | #endif /* CONFIG_PPC_SUBPAGE_PROT */ | ||
396 | } mm_context_t; | 424 | } mm_context_t; |
397 | 425 | ||
398 | 426 | ||
diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h index b34e94d94435..26383e0778aa 100644 --- a/arch/powerpc/include/asm/mmu_context.h +++ b/arch/powerpc/include/asm/mmu_context.h | |||
@@ -23,6 +23,8 @@ extern void switch_slb(struct task_struct *tsk, struct mm_struct *mm); | |||
23 | extern void set_context(unsigned long id, pgd_t *pgd); | 23 | extern void set_context(unsigned long id, pgd_t *pgd); |
24 | 24 | ||
25 | #ifdef CONFIG_PPC_BOOK3S_64 | 25 | #ifdef CONFIG_PPC_BOOK3S_64 |
26 | extern int __init_new_context(void); | ||
27 | extern void __destroy_context(int context_id); | ||
26 | static inline void mmu_context_init(void) { } | 28 | static inline void mmu_context_init(void) { } |
27 | #else | 29 | #else |
28 | extern void mmu_context_init(void); | 30 | extern void mmu_context_init(void); |
diff --git a/arch/powerpc/include/asm/module.h b/arch/powerpc/include/asm/module.h index 08454880a2c0..0192a4ee2bc2 100644 --- a/arch/powerpc/include/asm/module.h +++ b/arch/powerpc/include/asm/module.h | |||
@@ -87,5 +87,10 @@ struct exception_table_entry; | |||
87 | void sort_ex_table(struct exception_table_entry *start, | 87 | void sort_ex_table(struct exception_table_entry *start, |
88 | struct exception_table_entry *finish); | 88 | struct exception_table_entry *finish); |
89 | 89 | ||
90 | #ifdef CONFIG_MODVERSIONS | ||
91 | #define ARCH_RELOCATES_KCRCTAB | ||
92 | |||
93 | extern const unsigned long reloc_start[]; | ||
94 | #endif | ||
90 | #endif /* __KERNEL__ */ | 95 | #endif /* __KERNEL__ */ |
91 | #endif /* _ASM_POWERPC_MODULE_H */ | 96 | #endif /* _ASM_POWERPC_MODULE_H */ |
diff --git a/arch/powerpc/include/asm/mpc5121.h b/arch/powerpc/include/asm/mpc5121.h new file mode 100644 index 000000000000..e6a30bb1d16a --- /dev/null +++ b/arch/powerpc/include/asm/mpc5121.h | |||
@@ -0,0 +1,24 @@ | |||
1 | /* | ||
2 | * MPC5121 Prototypes and definitions | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. | ||
6 | */ | ||
7 | |||
8 | #ifndef __ASM_POWERPC_MPC5121_H__ | ||
9 | #define __ASM_POWERPC_MPC5121_H__ | ||
10 | |||
11 | /* MPC512x Reset module registers */ | ||
12 | struct mpc512x_reset_module { | ||
13 | u32 rcwlr; /* Reset Configuration Word Low Register */ | ||
14 | u32 rcwhr; /* Reset Configuration Word High Register */ | ||
15 | u32 reserved1; | ||
16 | u32 reserved2; | ||
17 | u32 rsr; /* Reset Status Register */ | ||
18 | u32 rmr; /* Reset Mode Register */ | ||
19 | u32 rpr; /* Reset Protection Register */ | ||
20 | u32 rcr; /* Reset Control Register */ | ||
21 | u32 rcer; /* Reset Control Enable Register */ | ||
22 | }; | ||
23 | |||
24 | #endif /* __ASM_POWERPC_MPC5121_H__ */ | ||
diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/mpc52xx.h index 1b4f697abbdd..b664ce79a172 100644 --- a/arch/powerpc/include/asm/mpc52xx.h +++ b/arch/powerpc/include/asm/mpc52xx.h | |||
@@ -276,6 +276,53 @@ extern int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv); | |||
276 | extern unsigned int mpc52xx_get_xtal_freq(struct device_node *node); | 276 | extern unsigned int mpc52xx_get_xtal_freq(struct device_node *node); |
277 | extern void mpc52xx_restart(char *cmd); | 277 | extern void mpc52xx_restart(char *cmd); |
278 | 278 | ||
279 | /* mpc52xx_gpt.c */ | ||
280 | struct mpc52xx_gpt_priv; | ||
281 | extern struct mpc52xx_gpt_priv *mpc52xx_gpt_from_irq(int irq); | ||
282 | extern int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, u64 period, | ||
283 | int continuous); | ||
284 | extern u64 mpc52xx_gpt_timer_period(struct mpc52xx_gpt_priv *gpt); | ||
285 | extern int mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt); | ||
286 | |||
287 | /* mpc52xx_lpbfifo.c */ | ||
288 | #define MPC52XX_LPBFIFO_FLAG_READ (0) | ||
289 | #define MPC52XX_LPBFIFO_FLAG_WRITE (1<<0) | ||
290 | #define MPC52XX_LPBFIFO_FLAG_NO_INCREMENT (1<<1) | ||
291 | #define MPC52XX_LPBFIFO_FLAG_NO_DMA (1<<2) | ||
292 | #define MPC52XX_LPBFIFO_FLAG_POLL_DMA (1<<3) | ||
293 | |||
294 | struct mpc52xx_lpbfifo_request { | ||
295 | struct list_head list; | ||
296 | |||
297 | /* localplus bus address */ | ||
298 | unsigned int cs; | ||
299 | size_t offset; | ||
300 | |||
301 | /* Memory address */ | ||
302 | void *data; | ||
303 | phys_addr_t data_phys; | ||
304 | |||
305 | /* Details of transfer */ | ||
306 | size_t size; | ||
307 | size_t pos; /* current position of transfer */ | ||
308 | int flags; | ||
309 | |||
310 | /* What to do when finished */ | ||
311 | void (*callback)(struct mpc52xx_lpbfifo_request *); | ||
312 | |||
313 | void *priv; /* Driver private data */ | ||
314 | |||
315 | /* statistics */ | ||
316 | int irq_count; | ||
317 | int irq_ticks; | ||
318 | u8 last_byte; | ||
319 | int buffer_not_done_cnt; | ||
320 | }; | ||
321 | |||
322 | extern int mpc52xx_lpbfifo_submit(struct mpc52xx_lpbfifo_request *req); | ||
323 | extern void mpc52xx_lpbfifo_abort(struct mpc52xx_lpbfifo_request *req); | ||
324 | extern void mpc52xx_lpbfifo_poll(void); | ||
325 | |||
279 | /* mpc52xx_pic.c */ | 326 | /* mpc52xx_pic.c */ |
280 | extern void mpc52xx_init_irq(void); | 327 | extern void mpc52xx_init_irq(void); |
281 | extern unsigned int mpc52xx_get_irq(void); | 328 | extern unsigned int mpc52xx_get_irq(void); |
diff --git a/arch/powerpc/include/asm/mpc52xx_psc.h b/arch/powerpc/include/asm/mpc52xx_psc.h index fb8412057450..42561f4f032d 100644 --- a/arch/powerpc/include/asm/mpc52xx_psc.h +++ b/arch/powerpc/include/asm/mpc52xx_psc.h | |||
@@ -25,7 +25,11 @@ | |||
25 | #include <asm/types.h> | 25 | #include <asm/types.h> |
26 | 26 | ||
27 | /* Max number of PSCs */ | 27 | /* Max number of PSCs */ |
28 | #ifdef CONFIG_PPC_MPC512x | ||
29 | #define MPC52xx_PSC_MAXNUM 12 | ||
30 | #else | ||
28 | #define MPC52xx_PSC_MAXNUM 6 | 31 | #define MPC52xx_PSC_MAXNUM 6 |
32 | #endif | ||
29 | 33 | ||
30 | /* Programmable Serial Controller (PSC) status register bits */ | 34 | /* Programmable Serial Controller (PSC) status register bits */ |
31 | #define MPC52xx_PSC_SR_UNEX_RX 0x0001 | 35 | #define MPC52xx_PSC_SR_UNEX_RX 0x0001 |
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h index a002682f3a6d..61913d9a21a0 100644 --- a/arch/powerpc/include/asm/mpic.h +++ b/arch/powerpc/include/asm/mpic.h | |||
@@ -289,7 +289,7 @@ struct mpic | |||
289 | #ifdef CONFIG_MPIC_U3_HT_IRQS | 289 | #ifdef CONFIG_MPIC_U3_HT_IRQS |
290 | /* The fixup table */ | 290 | /* The fixup table */ |
291 | struct mpic_irq_fixup *fixups; | 291 | struct mpic_irq_fixup *fixups; |
292 | spinlock_t fixup_lock; | 292 | raw_spinlock_t fixup_lock; |
293 | #endif | 293 | #endif |
294 | 294 | ||
295 | /* Register access method */ | 295 | /* Register access method */ |
diff --git a/arch/powerpc/include/asm/mutex.h b/arch/powerpc/include/asm/mutex.h index dabc01c727b8..5399f7e18102 100644 --- a/arch/powerpc/include/asm/mutex.h +++ b/arch/powerpc/include/asm/mutex.h | |||
@@ -15,7 +15,7 @@ static inline int __mutex_cmpxchg_lock(atomic_t *v, int old, int new) | |||
15 | PPC405_ERR77(0,%1) | 15 | PPC405_ERR77(0,%1) |
16 | " stwcx. %3,0,%1\n\ | 16 | " stwcx. %3,0,%1\n\ |
17 | bne- 1b" | 17 | bne- 1b" |
18 | ISYNC_ON_SMP | 18 | PPC_ACQUIRE_BARRIER |
19 | "\n\ | 19 | "\n\ |
20 | 2:" | 20 | 2:" |
21 | : "=&r" (t) | 21 | : "=&r" (t) |
@@ -35,7 +35,7 @@ static inline int __mutex_dec_return_lock(atomic_t *v) | |||
35 | PPC405_ERR77(0,%1) | 35 | PPC405_ERR77(0,%1) |
36 | " stwcx. %0,0,%1\n\ | 36 | " stwcx. %0,0,%1\n\ |
37 | bne- 1b" | 37 | bne- 1b" |
38 | ISYNC_ON_SMP | 38 | PPC_ACQUIRE_BARRIER |
39 | : "=&r" (t) | 39 | : "=&r" (t) |
40 | : "r" (&v->counter) | 40 | : "r" (&v->counter) |
41 | : "cc", "memory"); | 41 | : "cc", "memory"); |
@@ -48,7 +48,7 @@ static inline int __mutex_inc_return_unlock(atomic_t *v) | |||
48 | int t; | 48 | int t; |
49 | 49 | ||
50 | __asm__ __volatile__( | 50 | __asm__ __volatile__( |
51 | LWSYNC_ON_SMP | 51 | PPC_RELEASE_BARRIER |
52 | "1: lwarx %0,0,%1 # mutex unlock\n\ | 52 | "1: lwarx %0,0,%1 # mutex unlock\n\ |
53 | addic %0,%0,1\n" | 53 | addic %0,%0,1\n" |
54 | PPC405_ERR77(0,%1) | 54 | PPC405_ERR77(0,%1) |
diff --git a/arch/powerpc/include/asm/nvram.h b/arch/powerpc/include/asm/nvram.h index 6c587eddee59..850b72f27445 100644 --- a/arch/powerpc/include/asm/nvram.h +++ b/arch/powerpc/include/asm/nvram.h | |||
@@ -73,7 +73,6 @@ extern int nvram_write_error_log(char * buff, int length, | |||
73 | extern int nvram_read_error_log(char * buff, int length, | 73 | extern int nvram_read_error_log(char * buff, int length, |
74 | unsigned int * err_type, unsigned int *err_seq); | 74 | unsigned int * err_type, unsigned int *err_seq); |
75 | extern int nvram_clear_error_log(void); | 75 | extern int nvram_clear_error_log(void); |
76 | extern struct nvram_partition *nvram_find_partition(int sig, const char *name); | ||
77 | 76 | ||
78 | extern int pSeries_nvram_init(void); | 77 | extern int pSeries_nvram_init(void); |
79 | 78 | ||
diff --git a/arch/powerpc/include/asm/pSeries_reconfig.h b/arch/powerpc/include/asm/pSeries_reconfig.h index e482e5352e69..d4b4bfa26fb3 100644 --- a/arch/powerpc/include/asm/pSeries_reconfig.h +++ b/arch/powerpc/include/asm/pSeries_reconfig.h | |||
@@ -17,6 +17,7 @@ | |||
17 | #ifdef CONFIG_PPC_PSERIES | 17 | #ifdef CONFIG_PPC_PSERIES |
18 | extern int pSeries_reconfig_notifier_register(struct notifier_block *); | 18 | extern int pSeries_reconfig_notifier_register(struct notifier_block *); |
19 | extern void pSeries_reconfig_notifier_unregister(struct notifier_block *); | 19 | extern void pSeries_reconfig_notifier_unregister(struct notifier_block *); |
20 | extern struct blocking_notifier_head pSeries_reconfig_chain; | ||
20 | #else /* !CONFIG_PPC_PSERIES */ | 21 | #else /* !CONFIG_PPC_PSERIES */ |
21 | static inline int pSeries_reconfig_notifier_register(struct notifier_block *nb) | 22 | static inline int pSeries_reconfig_notifier_register(struct notifier_block *nb) |
22 | { | 23 | { |
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h index 7d8514ceceae..a011603d4079 100644 --- a/arch/powerpc/include/asm/paca.h +++ b/arch/powerpc/include/asm/paca.h | |||
@@ -14,11 +14,17 @@ | |||
14 | #define _ASM_POWERPC_PACA_H | 14 | #define _ASM_POWERPC_PACA_H |
15 | #ifdef __KERNEL__ | 15 | #ifdef __KERNEL__ |
16 | 16 | ||
17 | #ifdef CONFIG_PPC64 | ||
18 | |||
19 | #include <linux/init.h> | ||
17 | #include <asm/types.h> | 20 | #include <asm/types.h> |
18 | #include <asm/lppaca.h> | 21 | #include <asm/lppaca.h> |
19 | #include <asm/mmu.h> | 22 | #include <asm/mmu.h> |
20 | #include <asm/page.h> | 23 | #include <asm/page.h> |
21 | #include <asm/exception-64e.h> | 24 | #include <asm/exception-64e.h> |
25 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER | ||
26 | #include <asm/kvm_book3s_64_asm.h> | ||
27 | #endif | ||
22 | 28 | ||
23 | register struct paca_struct *local_paca asm("r13"); | 29 | register struct paca_struct *local_paca asm("r13"); |
24 | 30 | ||
@@ -129,10 +135,32 @@ struct paca_struct { | |||
129 | u64 system_time; /* accumulated system TB ticks */ | 135 | u64 system_time; /* accumulated system TB ticks */ |
130 | u64 startpurr; /* PURR/TB value snapshot */ | 136 | u64 startpurr; /* PURR/TB value snapshot */ |
131 | u64 startspurr; /* SPURR value snapshot */ | 137 | u64 startspurr; /* SPURR value snapshot */ |
138 | |||
139 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER | ||
140 | struct { | ||
141 | u64 esid; | ||
142 | u64 vsid; | ||
143 | } kvm_slb[64]; /* guest SLB */ | ||
144 | /* We use this to store guest state in */ | ||
145 | struct kvmppc_book3s_shadow_vcpu shadow_vcpu; | ||
146 | u8 kvm_slb_max; /* highest used guest slb entry */ | ||
147 | u8 kvm_in_guest; /* are we inside the guest? */ | ||
148 | #endif | ||
132 | }; | 149 | }; |
133 | 150 | ||
134 | extern struct paca_struct paca[]; | 151 | extern struct paca_struct *paca; |
135 | extern void initialise_pacas(void); | 152 | extern __initdata struct paca_struct boot_paca; |
153 | extern void initialise_paca(struct paca_struct *new_paca, int cpu); | ||
154 | |||
155 | extern void allocate_pacas(void); | ||
156 | extern void free_unused_pacas(void); | ||
157 | |||
158 | #else /* CONFIG_PPC64 */ | ||
159 | |||
160 | static inline void allocate_pacas(void) { }; | ||
161 | static inline void free_unused_pacas(void) { }; | ||
162 | |||
163 | #endif /* CONFIG_PPC64 */ | ||
136 | 164 | ||
137 | #endif /* __KERNEL__ */ | 165 | #endif /* __KERNEL__ */ |
138 | #endif /* _ASM_POWERPC_PACA_H */ | 166 | #endif /* _ASM_POWERPC_PACA_H */ |
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h index ff24254990e1..53b64be40eb2 100644 --- a/arch/powerpc/include/asm/page.h +++ b/arch/powerpc/include/asm/page.h | |||
@@ -108,8 +108,21 @@ extern phys_addr_t kernstart_addr; | |||
108 | #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) | 108 | #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) |
109 | #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) | 109 | #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) |
110 | 110 | ||
111 | #define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - MEMORY_START)) | 111 | /* |
112 | * On Book-E parts we need __va to parse the device tree and we can't | ||
113 | * determine MEMORY_START until then. However we can determine PHYSICAL_START | ||
114 | * from information at hand (program counter, TLB lookup). | ||
115 | * | ||
116 | * On non-Book-E PPC64 PAGE_OFFSET and MEMORY_START are constants so use | ||
117 | * the other definitions for __va & __pa. | ||
118 | */ | ||
119 | #ifdef CONFIG_BOOKE | ||
120 | #define __va(x) ((void *)(unsigned long)((phys_addr_t)(x) - PHYSICAL_START + KERNELBASE)) | ||
121 | #define __pa(x) ((unsigned long)(x) + PHYSICAL_START - KERNELBASE) | ||
122 | #else | ||
123 | #define __va(x) ((void *)(unsigned long)((phys_addr_t)(x) + PAGE_OFFSET - MEMORY_START)) | ||
112 | #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + MEMORY_START) | 124 | #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + MEMORY_START) |
125 | #endif | ||
113 | 126 | ||
114 | /* | 127 | /* |
115 | * Unfortunately the PLT is in the BSS in the PPC32 ELF ABI, | 128 | * Unfortunately the PLT is in the BSS in the PPC32 ELF ABI, |
@@ -229,6 +242,20 @@ typedef unsigned long pgprot_t; | |||
229 | 242 | ||
230 | #endif | 243 | #endif |
231 | 244 | ||
245 | typedef struct { signed long pd; } hugepd_t; | ||
246 | #define HUGEPD_SHIFT_MASK 0x3f | ||
247 | |||
248 | #ifdef CONFIG_HUGETLB_PAGE | ||
249 | static inline int hugepd_ok(hugepd_t hpd) | ||
250 | { | ||
251 | return (hpd.pd > 0); | ||
252 | } | ||
253 | |||
254 | #define is_hugepd(pdep) (hugepd_ok(*((hugepd_t *)(pdep)))) | ||
255 | #else /* CONFIG_HUGETLB_PAGE */ | ||
256 | #define is_hugepd(pdep) 0 | ||
257 | #endif /* CONFIG_HUGETLB_PAGE */ | ||
258 | |||
232 | struct page; | 259 | struct page; |
233 | extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg); | 260 | extern void clear_user_page(void *page, unsigned long vaddr, struct page *pg); |
234 | extern void copy_user_page(void *to, void *from, unsigned long vaddr, | 261 | extern void copy_user_page(void *to, void *from, unsigned long vaddr, |
diff --git a/arch/powerpc/include/asm/page_64.h b/arch/powerpc/include/asm/page_64.h index 3f17b83f55a1..bfc4e027e2ad 100644 --- a/arch/powerpc/include/asm/page_64.h +++ b/arch/powerpc/include/asm/page_64.h | |||
@@ -90,7 +90,7 @@ extern unsigned int HPAGE_SHIFT; | |||
90 | #define HPAGE_SIZE ((1UL) << HPAGE_SHIFT) | 90 | #define HPAGE_SIZE ((1UL) << HPAGE_SHIFT) |
91 | #define HPAGE_MASK (~(HPAGE_SIZE - 1)) | 91 | #define HPAGE_MASK (~(HPAGE_SIZE - 1)) |
92 | #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) | 92 | #define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) |
93 | #define HUGE_MAX_HSTATE 3 | 93 | #define HUGE_MAX_HSTATE (MMU_PAGE_COUNT-1) |
94 | 94 | ||
95 | #endif /* __ASSEMBLY__ */ | 95 | #endif /* __ASSEMBLY__ */ |
96 | 96 | ||
diff --git a/arch/powerpc/include/asm/param.h b/arch/powerpc/include/asm/param.h index 094f63d4d5ca..965d45427975 100644 --- a/arch/powerpc/include/asm/param.h +++ b/arch/powerpc/include/asm/param.h | |||
@@ -1,22 +1 @@ | |||
1 | #ifndef _ASM_POWERPC_PARAM_H | #include <asm-generic/param.h> | |
2 | #define _ASM_POWERPC_PARAM_H | ||
3 | |||
4 | #ifdef __KERNEL__ | ||
5 | #define HZ CONFIG_HZ /* internal kernel timer frequency */ | ||
6 | #define USER_HZ 100 /* for user interfaces in "ticks" */ | ||
7 | #define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */ | ||
8 | #endif /* __KERNEL__ */ | ||
9 | |||
10 | #ifndef HZ | ||
11 | #define HZ 100 | ||
12 | #endif | ||
13 | |||
14 | #define EXEC_PAGESIZE 4096 | ||
15 | |||
16 | #ifndef NOGROUP | ||
17 | #define NOGROUP (-1) | ||
18 | #endif | ||
19 | |||
20 | #define MAXHOSTNAMELEN 64 /* max length of hostname */ | ||
21 | |||
22 | #endif /* _ASM_POWERPC_PARAM_H */ | ||
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h index b5ea626eea2d..a20a9ad2258b 100644 --- a/arch/powerpc/include/asm/pci.h +++ b/arch/powerpc/include/asm/pci.h | |||
@@ -141,38 +141,6 @@ extern int pci_mmap_legacy_page_range(struct pci_bus *bus, | |||
141 | 141 | ||
142 | #define HAVE_PCI_LEGACY 1 | 142 | #define HAVE_PCI_LEGACY 1 |
143 | 143 | ||
144 | #if defined(CONFIG_PPC64) || defined(CONFIG_NOT_COHERENT_CACHE) | ||
145 | /* | ||
146 | * For 64-bit kernels, pci_unmap_{single,page} is not a nop. | ||
147 | * For 32-bit non-coherent kernels, pci_dma_sync_single_for_cpu() and | ||
148 | * so on are not nops. | ||
149 | * and thus... | ||
150 | */ | ||
151 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ | ||
152 | dma_addr_t ADDR_NAME; | ||
153 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ | ||
154 | __u32 LEN_NAME; | ||
155 | #define pci_unmap_addr(PTR, ADDR_NAME) \ | ||
156 | ((PTR)->ADDR_NAME) | ||
157 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ | ||
158 | (((PTR)->ADDR_NAME) = (VAL)) | ||
159 | #define pci_unmap_len(PTR, LEN_NAME) \ | ||
160 | ((PTR)->LEN_NAME) | ||
161 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ | ||
162 | (((PTR)->LEN_NAME) = (VAL)) | ||
163 | |||
164 | #else /* 32-bit && coherent */ | ||
165 | |||
166 | /* pci_unmap_{page,single} is a nop so... */ | ||
167 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) | ||
168 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) | ||
169 | #define pci_unmap_addr(PTR, ADDR_NAME) (0) | ||
170 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0) | ||
171 | #define pci_unmap_len(PTR, LEN_NAME) (0) | ||
172 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) | ||
173 | |||
174 | #endif /* CONFIG_PPC64 || CONFIG_NOT_COHERENT_CACHE */ | ||
175 | |||
176 | #ifdef CONFIG_PPC64 | 144 | #ifdef CONFIG_PPC64 |
177 | 145 | ||
178 | /* The PCI address space does not equal the physical memory address | 146 | /* The PCI address space does not equal the physical memory address |
diff --git a/arch/powerpc/include/asm/perf_event.h b/arch/powerpc/include/asm/perf_event.h index 3288ce3997e0..e6d4ce69b126 100644 --- a/arch/powerpc/include/asm/perf_event.h +++ b/arch/powerpc/include/asm/perf_event.h | |||
@@ -1,110 +1,23 @@ | |||
1 | /* | 1 | /* |
2 | * Performance event support - PowerPC-specific definitions. | 2 | * Performance event support - hardware-specific disambiguation |
3 | * | 3 | * |
4 | * Copyright 2008-2009 Paul Mackerras, IBM Corporation. | 4 | * For now this is a compile-time decision, but eventually it should be |
5 | * runtime. This would allow multiplatform perf event support for e300 (fsl | ||
6 | * embedded perf counters) plus server/classic, and would accommodate | ||
7 | * devices other than the core which provide their own performance counters. | ||
8 | * | ||
9 | * Copyright 2010 Freescale Semiconductor, Inc. | ||
5 | * | 10 | * |
6 | * This program is free software; you can redistribute it and/or | 11 | * This program is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU General Public License | 12 | * modify it under the terms of the GNU General Public License |
8 | * as published by the Free Software Foundation; either version | 13 | * as published by the Free Software Foundation; either version |
9 | * 2 of the License, or (at your option) any later version. | 14 | * 2 of the License, or (at your option) any later version. |
10 | */ | 15 | */ |
11 | #include <linux/types.h> | ||
12 | |||
13 | #include <asm/hw_irq.h> | ||
14 | |||
15 | #define MAX_HWEVENTS 8 | ||
16 | #define MAX_EVENT_ALTERNATIVES 8 | ||
17 | #define MAX_LIMITED_HWCOUNTERS 2 | ||
18 | |||
19 | /* | ||
20 | * This struct provides the constants and functions needed to | ||
21 | * describe the PMU on a particular POWER-family CPU. | ||
22 | */ | ||
23 | struct power_pmu { | ||
24 | const char *name; | ||
25 | int n_counter; | ||
26 | int max_alternatives; | ||
27 | unsigned long add_fields; | ||
28 | unsigned long test_adder; | ||
29 | int (*compute_mmcr)(u64 events[], int n_ev, | ||
30 | unsigned int hwc[], unsigned long mmcr[]); | ||
31 | int (*get_constraint)(u64 event_id, unsigned long *mskp, | ||
32 | unsigned long *valp); | ||
33 | int (*get_alternatives)(u64 event_id, unsigned int flags, | ||
34 | u64 alt[]); | ||
35 | void (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]); | ||
36 | int (*limited_pmc_event)(u64 event_id); | ||
37 | u32 flags; | ||
38 | int n_generic; | ||
39 | int *generic_events; | ||
40 | int (*cache_events)[PERF_COUNT_HW_CACHE_MAX] | ||
41 | [PERF_COUNT_HW_CACHE_OP_MAX] | ||
42 | [PERF_COUNT_HW_CACHE_RESULT_MAX]; | ||
43 | }; | ||
44 | |||
45 | /* | ||
46 | * Values for power_pmu.flags | ||
47 | */ | ||
48 | #define PPMU_LIMITED_PMC5_6 1 /* PMC5/6 have limited function */ | ||
49 | #define PPMU_ALT_SIPR 2 /* uses alternate posn for SIPR/HV */ | ||
50 | |||
51 | /* | ||
52 | * Values for flags to get_alternatives() | ||
53 | */ | ||
54 | #define PPMU_LIMITED_PMC_OK 1 /* can put this on a limited PMC */ | ||
55 | #define PPMU_LIMITED_PMC_REQD 2 /* have to put this on a limited PMC */ | ||
56 | #define PPMU_ONLY_COUNT_RUN 4 /* only counting in run state */ | ||
57 | |||
58 | extern int register_power_pmu(struct power_pmu *); | ||
59 | 16 | ||
60 | struct pt_regs; | ||
61 | extern unsigned long perf_misc_flags(struct pt_regs *regs); | ||
62 | extern unsigned long perf_instruction_pointer(struct pt_regs *regs); | ||
63 | |||
64 | #define PERF_EVENT_INDEX_OFFSET 1 | ||
65 | |||
66 | /* | ||
67 | * Only override the default definitions in include/linux/perf_event.h | ||
68 | * if we have hardware PMU support. | ||
69 | */ | ||
70 | #ifdef CONFIG_PPC_PERF_CTRS | 17 | #ifdef CONFIG_PPC_PERF_CTRS |
71 | #define perf_misc_flags(regs) perf_misc_flags(regs) | 18 | #include <asm/perf_event_server.h> |
72 | #endif | 19 | #endif |
73 | 20 | ||
74 | /* | 21 | #ifdef CONFIG_FSL_EMB_PERF_EVENT |
75 | * The power_pmu.get_constraint function returns a 32/64-bit value and | 22 | #include <asm/perf_event_fsl_emb.h> |
76 | * a 32/64-bit mask that express the constraints between this event_id and | 23 | #endif |
77 | * other events. | ||
78 | * | ||
79 | * The value and mask are divided up into (non-overlapping) bitfields | ||
80 | * of three different types: | ||
81 | * | ||
82 | * Select field: this expresses the constraint that some set of bits | ||
83 | * in MMCR* needs to be set to a specific value for this event_id. For a | ||
84 | * select field, the mask contains 1s in every bit of the field, and | ||
85 | * the value contains a unique value for each possible setting of the | ||
86 | * MMCR* bits. The constraint checking code will ensure that two events | ||
87 | * that set the same field in their masks have the same value in their | ||
88 | * value dwords. | ||
89 | * | ||
90 | * Add field: this expresses the constraint that there can be at most | ||
91 | * N events in a particular class. A field of k bits can be used for | ||
92 | * N <= 2^(k-1) - 1. The mask has the most significant bit of the field | ||
93 | * set (and the other bits 0), and the value has only the least significant | ||
94 | * bit of the field set. In addition, the 'add_fields' and 'test_adder' | ||
95 | * in the struct power_pmu for this processor come into play. The | ||
96 | * add_fields value contains 1 in the LSB of the field, and the | ||
97 | * test_adder contains 2^(k-1) - 1 - N in the field. | ||
98 | * | ||
99 | * NAND field: this expresses the constraint that you may not have events | ||
100 | * in all of a set of classes. (For example, on PPC970, you can't select | ||
101 | * events from the FPU, ISU and IDU simultaneously, although any two are | ||
102 | * possible.) For N classes, the field is N+1 bits wide, and each class | ||
103 | * is assigned one bit from the least-significant N bits. The mask has | ||
104 | * only the most-significant bit set, and the value has only the bit | ||
105 | * for the event_id's class set. The test_adder has the least significant | ||
106 | * bit set in the field. | ||
107 | * | ||
108 | * If an event_id is not subject to the constraint expressed by a particular | ||
109 | * field, then it will have 0 in both the mask and value for that field. | ||
110 | */ | ||
diff --git a/arch/powerpc/include/asm/perf_event_fsl_emb.h b/arch/powerpc/include/asm/perf_event_fsl_emb.h new file mode 100644 index 000000000000..718a9fa94e68 --- /dev/null +++ b/arch/powerpc/include/asm/perf_event_fsl_emb.h | |||
@@ -0,0 +1,50 @@ | |||
1 | /* | ||
2 | * Performance event support - Freescale embedded specific definitions. | ||
3 | * | ||
4 | * Copyright 2008-2009 Paul Mackerras, IBM Corporation. | ||
5 | * Copyright 2010 Freescale Semiconductor, Inc. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/types.h> | ||
14 | #include <asm/hw_irq.h> | ||
15 | |||
16 | #define MAX_HWEVENTS 4 | ||
17 | |||
18 | /* event flags */ | ||
19 | #define FSL_EMB_EVENT_VALID 1 | ||
20 | #define FSL_EMB_EVENT_RESTRICTED 2 | ||
21 | |||
22 | /* upper half of event flags is PMLCb */ | ||
23 | #define FSL_EMB_EVENT_THRESHMUL 0x0000070000000000ULL | ||
24 | #define FSL_EMB_EVENT_THRESH 0x0000003f00000000ULL | ||
25 | |||
26 | struct fsl_emb_pmu { | ||
27 | const char *name; | ||
28 | int n_counter; /* total number of counters */ | ||
29 | |||
30 | /* | ||
31 | * The number of contiguous counters starting at zero that | ||
32 | * can hold restricted events, or zero if there are no | ||
33 | * restricted events. | ||
34 | * | ||
35 | * This isn't a very flexible method of expressing constraints, | ||
36 | * but it's very simple and is adequate for existing chips. | ||
37 | */ | ||
38 | int n_restricted; | ||
39 | |||
40 | /* Returns event flags and PMLCb (FSL_EMB_EVENT_*) */ | ||
41 | u64 (*xlate_event)(u64 event_id); | ||
42 | |||
43 | int n_generic; | ||
44 | int *generic_events; | ||
45 | int (*cache_events)[PERF_COUNT_HW_CACHE_MAX] | ||
46 | [PERF_COUNT_HW_CACHE_OP_MAX] | ||
47 | [PERF_COUNT_HW_CACHE_RESULT_MAX]; | ||
48 | }; | ||
49 | |||
50 | int register_fsl_emb_pmu(struct fsl_emb_pmu *); | ||
diff --git a/arch/powerpc/include/asm/perf_event_server.h b/arch/powerpc/include/asm/perf_event_server.h new file mode 100644 index 000000000000..8f1df1208d23 --- /dev/null +++ b/arch/powerpc/include/asm/perf_event_server.h | |||
@@ -0,0 +1,110 @@ | |||
1 | /* | ||
2 | * Performance event support - PowerPC classic/server specific definitions. | ||
3 | * | ||
4 | * Copyright 2008-2009 Paul Mackerras, IBM Corporation. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version | ||
9 | * 2 of the License, or (at your option) any later version. | ||
10 | */ | ||
11 | |||
12 | #include <linux/types.h> | ||
13 | #include <asm/hw_irq.h> | ||
14 | |||
15 | #define MAX_HWEVENTS 8 | ||
16 | #define MAX_EVENT_ALTERNATIVES 8 | ||
17 | #define MAX_LIMITED_HWCOUNTERS 2 | ||
18 | |||
19 | /* | ||
20 | * This struct provides the constants and functions needed to | ||
21 | * describe the PMU on a particular POWER-family CPU. | ||
22 | */ | ||
23 | struct power_pmu { | ||
24 | const char *name; | ||
25 | int n_counter; | ||
26 | int max_alternatives; | ||
27 | unsigned long add_fields; | ||
28 | unsigned long test_adder; | ||
29 | int (*compute_mmcr)(u64 events[], int n_ev, | ||
30 | unsigned int hwc[], unsigned long mmcr[]); | ||
31 | int (*get_constraint)(u64 event_id, unsigned long *mskp, | ||
32 | unsigned long *valp); | ||
33 | int (*get_alternatives)(u64 event_id, unsigned int flags, | ||
34 | u64 alt[]); | ||
35 | void (*disable_pmc)(unsigned int pmc, unsigned long mmcr[]); | ||
36 | int (*limited_pmc_event)(u64 event_id); | ||
37 | u32 flags; | ||
38 | int n_generic; | ||
39 | int *generic_events; | ||
40 | int (*cache_events)[PERF_COUNT_HW_CACHE_MAX] | ||
41 | [PERF_COUNT_HW_CACHE_OP_MAX] | ||
42 | [PERF_COUNT_HW_CACHE_RESULT_MAX]; | ||
43 | }; | ||
44 | |||
45 | /* | ||
46 | * Values for power_pmu.flags | ||
47 | */ | ||
48 | #define PPMU_LIMITED_PMC5_6 1 /* PMC5/6 have limited function */ | ||
49 | #define PPMU_ALT_SIPR 2 /* uses alternate posn for SIPR/HV */ | ||
50 | |||
51 | /* | ||
52 | * Values for flags to get_alternatives() | ||
53 | */ | ||
54 | #define PPMU_LIMITED_PMC_OK 1 /* can put this on a limited PMC */ | ||
55 | #define PPMU_LIMITED_PMC_REQD 2 /* have to put this on a limited PMC */ | ||
56 | #define PPMU_ONLY_COUNT_RUN 4 /* only counting in run state */ | ||
57 | |||
58 | extern int register_power_pmu(struct power_pmu *); | ||
59 | |||
60 | struct pt_regs; | ||
61 | extern unsigned long perf_misc_flags(struct pt_regs *regs); | ||
62 | extern unsigned long perf_instruction_pointer(struct pt_regs *regs); | ||
63 | |||
64 | #define PERF_EVENT_INDEX_OFFSET 1 | ||
65 | |||
66 | /* | ||
67 | * Only override the default definitions in include/linux/perf_event.h | ||
68 | * if we have hardware PMU support. | ||
69 | */ | ||
70 | #ifdef CONFIG_PPC_PERF_CTRS | ||
71 | #define perf_misc_flags(regs) perf_misc_flags(regs) | ||
72 | #endif | ||
73 | |||
74 | /* | ||
75 | * The power_pmu.get_constraint function returns a 32/64-bit value and | ||
76 | * a 32/64-bit mask that express the constraints between this event_id and | ||
77 | * other events. | ||
78 | * | ||
79 | * The value and mask are divided up into (non-overlapping) bitfields | ||
80 | * of three different types: | ||
81 | * | ||
82 | * Select field: this expresses the constraint that some set of bits | ||
83 | * in MMCR* needs to be set to a specific value for this event_id. For a | ||
84 | * select field, the mask contains 1s in every bit of the field, and | ||
85 | * the value contains a unique value for each possible setting of the | ||
86 | * MMCR* bits. The constraint checking code will ensure that two events | ||
87 | * that set the same field in their masks have the same value in their | ||
88 | * value dwords. | ||
89 | * | ||
90 | * Add field: this expresses the constraint that there can be at most | ||
91 | * N events in a particular class. A field of k bits can be used for | ||
92 | * N <= 2^(k-1) - 1. The mask has the most significant bit of the field | ||
93 | * set (and the other bits 0), and the value has only the least significant | ||
94 | * bit of the field set. In addition, the 'add_fields' and 'test_adder' | ||
95 | * in the struct power_pmu for this processor come into play. The | ||
96 | * add_fields value contains 1 in the LSB of the field, and the | ||
97 | * test_adder contains 2^(k-1) - 1 - N in the field. | ||
98 | * | ||
99 | * NAND field: this expresses the constraint that you may not have events | ||
100 | * in all of a set of classes. (For example, on PPC970, you can't select | ||
101 | * events from the FPU, ISU and IDU simultaneously, although any two are | ||
102 | * possible.) For N classes, the field is N+1 bits wide, and each class | ||
103 | * is assigned one bit from the least-significant N bits. The mask has | ||
104 | * only the most-significant bit set, and the value has only the bit | ||
105 | * for the event_id's class set. The test_adder has the least significant | ||
106 | * bit set in the field. | ||
107 | * | ||
108 | * If an event_id is not subject to the constraint expressed by a particular | ||
109 | * field, then it will have 0 in both the mask and value for that field. | ||
110 | */ | ||
diff --git a/arch/powerpc/include/asm/pgalloc-32.h b/arch/powerpc/include/asm/pgalloc-32.h index c9500d666a1d..580cf73b96e8 100644 --- a/arch/powerpc/include/asm/pgalloc-32.h +++ b/arch/powerpc/include/asm/pgalloc-32.h | |||
@@ -3,7 +3,8 @@ | |||
3 | 3 | ||
4 | #include <linux/threads.h> | 4 | #include <linux/threads.h> |
5 | 5 | ||
6 | #define PTE_NONCACHE_NUM 0 /* dummy for now to share code w/ppc64 */ | 6 | /* For 32-bit, all levels of page tables are just drawn from get_free_page() */ |
7 | #define MAX_PGTABLE_INDEX_SIZE 0 | ||
7 | 8 | ||
8 | extern void __bad_pte(pmd_t *pmd); | 9 | extern void __bad_pte(pmd_t *pmd); |
9 | 10 | ||
@@ -36,11 +37,10 @@ extern void pgd_free(struct mm_struct *mm, pgd_t *pgd); | |||
36 | extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr); | 37 | extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr); |
37 | extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr); | 38 | extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr); |
38 | 39 | ||
39 | static inline void pgtable_free(pgtable_free_t pgf) | 40 | static inline void pgtable_free(void *table, unsigned index_size) |
40 | { | 41 | { |
41 | void *p = (void *)(pgf.val & ~PGF_CACHENUM_MASK); | 42 | BUG_ON(index_size); /* 32-bit doesn't use this */ |
42 | 43 | free_page((unsigned long)table); | |
43 | free_page((unsigned long)p); | ||
44 | } | 44 | } |
45 | 45 | ||
46 | #define check_pgt_cache() do { } while (0) | 46 | #define check_pgt_cache() do { } while (0) |
diff --git a/arch/powerpc/include/asm/pgalloc-64.h b/arch/powerpc/include/asm/pgalloc-64.h index e6f069c4f713..605f5c5398d1 100644 --- a/arch/powerpc/include/asm/pgalloc-64.h +++ b/arch/powerpc/include/asm/pgalloc-64.h | |||
@@ -11,27 +11,34 @@ | |||
11 | #include <linux/cpumask.h> | 11 | #include <linux/cpumask.h> |
12 | #include <linux/percpu.h> | 12 | #include <linux/percpu.h> |
13 | 13 | ||
14 | #ifndef CONFIG_PPC_SUBPAGE_PROT | 14 | /* |
15 | static inline void subpage_prot_free(pgd_t *pgd) {} | 15 | * Functions that deal with pagetables that could be at any level of |
16 | #endif | 16 | * the table need to be passed an "index_size" so they know how to |
17 | * handle allocation. For PTE pages (which are linked to a struct | ||
18 | * page for now, and drawn from the main get_free_pages() pool), the | ||
19 | * allocation size will be (2^index_size * sizeof(pointer)) and | ||
20 | * allocations are drawn from the kmem_cache in PGT_CACHE(index_size). | ||
21 | * | ||
22 | * The maximum index size needs to be big enough to allow any | ||
23 | * pagetable sizes we need, but small enough to fit in the low bits of | ||
24 | * any page table pointer. In other words all pagetables, even tiny | ||
25 | * ones, must be aligned to allow at least enough low 0 bits to | ||
26 | * contain this value. This value is also used as a mask, so it must | ||
27 | * be one less than a power of two. | ||
28 | */ | ||
29 | #define MAX_PGTABLE_INDEX_SIZE 0xf | ||
17 | 30 | ||
18 | extern struct kmem_cache *pgtable_cache[]; | 31 | extern struct kmem_cache *pgtable_cache[]; |
19 | 32 | #define PGT_CACHE(shift) (pgtable_cache[(shift)-1]) | |
20 | #define PGD_CACHE_NUM 0 | ||
21 | #define PUD_CACHE_NUM 1 | ||
22 | #define PMD_CACHE_NUM 1 | ||
23 | #define HUGEPTE_CACHE_NUM 2 | ||
24 | #define PTE_NONCACHE_NUM 7 /* from GFP rather than kmem_cache */ | ||
25 | 33 | ||
26 | static inline pgd_t *pgd_alloc(struct mm_struct *mm) | 34 | static inline pgd_t *pgd_alloc(struct mm_struct *mm) |
27 | { | 35 | { |
28 | return kmem_cache_alloc(pgtable_cache[PGD_CACHE_NUM], GFP_KERNEL); | 36 | return kmem_cache_alloc(PGT_CACHE(PGD_INDEX_SIZE), GFP_KERNEL); |
29 | } | 37 | } |
30 | 38 | ||
31 | static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) | 39 | static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) |
32 | { | 40 | { |
33 | subpage_prot_free(pgd); | 41 | kmem_cache_free(PGT_CACHE(PGD_INDEX_SIZE), pgd); |
34 | kmem_cache_free(pgtable_cache[PGD_CACHE_NUM], pgd); | ||
35 | } | 42 | } |
36 | 43 | ||
37 | #ifndef CONFIG_PPC_64K_PAGES | 44 | #ifndef CONFIG_PPC_64K_PAGES |
@@ -40,13 +47,13 @@ static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) | |||
40 | 47 | ||
41 | static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr) | 48 | static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr) |
42 | { | 49 | { |
43 | return kmem_cache_alloc(pgtable_cache[PUD_CACHE_NUM], | 50 | return kmem_cache_alloc(PGT_CACHE(PUD_INDEX_SIZE), |
44 | GFP_KERNEL|__GFP_REPEAT); | 51 | GFP_KERNEL|__GFP_REPEAT); |
45 | } | 52 | } |
46 | 53 | ||
47 | static inline void pud_free(struct mm_struct *mm, pud_t *pud) | 54 | static inline void pud_free(struct mm_struct *mm, pud_t *pud) |
48 | { | 55 | { |
49 | kmem_cache_free(pgtable_cache[PUD_CACHE_NUM], pud); | 56 | kmem_cache_free(PGT_CACHE(PUD_INDEX_SIZE), pud); |
50 | } | 57 | } |
51 | 58 | ||
52 | static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd) | 59 | static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd) |
@@ -78,13 +85,13 @@ static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd, | |||
78 | 85 | ||
79 | static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) | 86 | static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) |
80 | { | 87 | { |
81 | return kmem_cache_alloc(pgtable_cache[PMD_CACHE_NUM], | 88 | return kmem_cache_alloc(PGT_CACHE(PMD_INDEX_SIZE), |
82 | GFP_KERNEL|__GFP_REPEAT); | 89 | GFP_KERNEL|__GFP_REPEAT); |
83 | } | 90 | } |
84 | 91 | ||
85 | static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd) | 92 | static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd) |
86 | { | 93 | { |
87 | kmem_cache_free(pgtable_cache[PMD_CACHE_NUM], pmd); | 94 | kmem_cache_free(PGT_CACHE(PMD_INDEX_SIZE), pmd); |
88 | } | 95 | } |
89 | 96 | ||
90 | static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, | 97 | static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, |
@@ -107,24 +114,22 @@ static inline pgtable_t pte_alloc_one(struct mm_struct *mm, | |||
107 | return page; | 114 | return page; |
108 | } | 115 | } |
109 | 116 | ||
110 | static inline void pgtable_free(pgtable_free_t pgf) | 117 | static inline void pgtable_free(void *table, unsigned index_size) |
111 | { | 118 | { |
112 | void *p = (void *)(pgf.val & ~PGF_CACHENUM_MASK); | 119 | if (!index_size) |
113 | int cachenum = pgf.val & PGF_CACHENUM_MASK; | 120 | free_page((unsigned long)table); |
114 | 121 | else { | |
115 | if (cachenum == PTE_NONCACHE_NUM) | 122 | BUG_ON(index_size > MAX_PGTABLE_INDEX_SIZE); |
116 | free_page((unsigned long)p); | 123 | kmem_cache_free(PGT_CACHE(index_size), table); |
117 | else | 124 | } |
118 | kmem_cache_free(pgtable_cache[cachenum], p); | ||
119 | } | 125 | } |
120 | 126 | ||
121 | #define __pmd_free_tlb(tlb, pmd,addr) \ | 127 | #define __pmd_free_tlb(tlb, pmd, addr) \ |
122 | pgtable_free_tlb(tlb, pgtable_free_cache(pmd, \ | 128 | pgtable_free_tlb(tlb, pmd, PMD_INDEX_SIZE) |
123 | PMD_CACHE_NUM, PMD_TABLE_SIZE-1)) | ||
124 | #ifndef CONFIG_PPC_64K_PAGES | 129 | #ifndef CONFIG_PPC_64K_PAGES |
125 | #define __pud_free_tlb(tlb, pud, addr) \ | 130 | #define __pud_free_tlb(tlb, pud, addr) \ |
126 | pgtable_free_tlb(tlb, pgtable_free_cache(pud, \ | 131 | pgtable_free_tlb(tlb, pud, PUD_INDEX_SIZE) |
127 | PUD_CACHE_NUM, PUD_TABLE_SIZE-1)) | 132 | |
128 | #endif /* CONFIG_PPC_64K_PAGES */ | 133 | #endif /* CONFIG_PPC_64K_PAGES */ |
129 | 134 | ||
130 | #define check_pgt_cache() do { } while (0) | 135 | #define check_pgt_cache() do { } while (0) |
diff --git a/arch/powerpc/include/asm/pgalloc.h b/arch/powerpc/include/asm/pgalloc.h index f2e812de7c3c..abe8532bd14e 100644 --- a/arch/powerpc/include/asm/pgalloc.h +++ b/arch/powerpc/include/asm/pgalloc.h | |||
@@ -24,25 +24,6 @@ static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage) | |||
24 | __free_page(ptepage); | 24 | __free_page(ptepage); |
25 | } | 25 | } |
26 | 26 | ||
27 | typedef struct pgtable_free { | ||
28 | unsigned long val; | ||
29 | } pgtable_free_t; | ||
30 | |||
31 | /* This needs to be big enough to allow for MMU_PAGE_COUNT + 2 to be stored | ||
32 | * and small enough to fit in the low bits of any naturally aligned page | ||
33 | * table cache entry. Arbitrarily set to 0x1f, that should give us some | ||
34 | * room to grow | ||
35 | */ | ||
36 | #define PGF_CACHENUM_MASK 0x1f | ||
37 | |||
38 | static inline pgtable_free_t pgtable_free_cache(void *p, int cachenum, | ||
39 | unsigned long mask) | ||
40 | { | ||
41 | BUG_ON(cachenum > PGF_CACHENUM_MASK); | ||
42 | |||
43 | return (pgtable_free_t){.val = ((unsigned long) p & ~mask) | cachenum}; | ||
44 | } | ||
45 | |||
46 | #ifdef CONFIG_PPC64 | 27 | #ifdef CONFIG_PPC64 |
47 | #include <asm/pgalloc-64.h> | 28 | #include <asm/pgalloc-64.h> |
48 | #else | 29 | #else |
@@ -50,12 +31,12 @@ static inline pgtable_free_t pgtable_free_cache(void *p, int cachenum, | |||
50 | #endif | 31 | #endif |
51 | 32 | ||
52 | #ifdef CONFIG_SMP | 33 | #ifdef CONFIG_SMP |
53 | extern void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf); | 34 | extern void pgtable_free_tlb(struct mmu_gather *tlb, void *table, unsigned shift); |
54 | extern void pte_free_finish(void); | 35 | extern void pte_free_finish(void); |
55 | #else /* CONFIG_SMP */ | 36 | #else /* CONFIG_SMP */ |
56 | static inline void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf) | 37 | static inline void pgtable_free_tlb(struct mmu_gather *tlb, void *table, unsigned shift) |
57 | { | 38 | { |
58 | pgtable_free(pgf); | 39 | pgtable_free(table, shift); |
59 | } | 40 | } |
60 | static inline void pte_free_finish(void) { } | 41 | static inline void pte_free_finish(void) { } |
61 | #endif /* !CONFIG_SMP */ | 42 | #endif /* !CONFIG_SMP */ |
@@ -63,12 +44,9 @@ static inline void pte_free_finish(void) { } | |||
63 | static inline void __pte_free_tlb(struct mmu_gather *tlb, struct page *ptepage, | 44 | static inline void __pte_free_tlb(struct mmu_gather *tlb, struct page *ptepage, |
64 | unsigned long address) | 45 | unsigned long address) |
65 | { | 46 | { |
66 | pgtable_free_t pgf = pgtable_free_cache(page_address(ptepage), | ||
67 | PTE_NONCACHE_NUM, | ||
68 | PTE_TABLE_SIZE-1); | ||
69 | tlb_flush_pgtable(tlb, address); | 47 | tlb_flush_pgtable(tlb, address); |
70 | pgtable_page_dtor(ptepage); | 48 | pgtable_page_dtor(ptepage); |
71 | pgtable_free_tlb(tlb, pgf); | 49 | pgtable_free_tlb(tlb, page_address(ptepage), 0); |
72 | } | 50 | } |
73 | 51 | ||
74 | #endif /* __KERNEL__ */ | 52 | #endif /* __KERNEL__ */ |
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h index 806abe7a3fa5..49865045d56f 100644 --- a/arch/powerpc/include/asm/pgtable-ppc64.h +++ b/arch/powerpc/include/asm/pgtable-ppc64.h | |||
@@ -354,6 +354,7 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry) | |||
354 | #define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE}) | 354 | #define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE}) |
355 | #define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT) | 355 | #define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT) |
356 | 356 | ||
357 | void pgtable_cache_add(unsigned shift, void (*ctor)(void *)); | ||
357 | void pgtable_cache_init(void); | 358 | void pgtable_cache_init(void); |
358 | 359 | ||
359 | /* | 360 | /* |
@@ -378,7 +379,18 @@ void pgtable_cache_init(void); | |||
378 | return pt; | 379 | return pt; |
379 | } | 380 | } |
380 | 381 | ||
381 | pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long address); | 382 | #ifdef CONFIG_HUGETLB_PAGE |
383 | pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea, | ||
384 | unsigned *shift); | ||
385 | #else | ||
386 | static inline pte_t *find_linux_pte_or_hugepte(pgd_t *pgdir, unsigned long ea, | ||
387 | unsigned *shift) | ||
388 | { | ||
389 | if (shift) | ||
390 | *shift = 0; | ||
391 | return find_linux_pte(pgdir, ea); | ||
392 | } | ||
393 | #endif /* !CONFIG_HUGETLB_PAGE */ | ||
382 | 394 | ||
383 | #endif /* __ASSEMBLY__ */ | 395 | #endif /* __ASSEMBLY__ */ |
384 | 396 | ||
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h index 2a5da069714e..89f158731ce3 100644 --- a/arch/powerpc/include/asm/pgtable.h +++ b/arch/powerpc/include/asm/pgtable.h | |||
@@ -209,7 +209,10 @@ extern void paging_init(void); | |||
209 | * corresponding HPTE into the hash table ahead of time, instead of | 209 | * corresponding HPTE into the hash table ahead of time, instead of |
210 | * waiting for the inevitable extra hash-table miss exception. | 210 | * waiting for the inevitable extra hash-table miss exception. |
211 | */ | 211 | */ |
212 | extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); | 212 | extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t *); |
213 | |||
214 | extern int gup_hugepd(hugepd_t *hugepd, unsigned pdshift, unsigned long addr, | ||
215 | unsigned long end, int write, struct page **pages, int *nr); | ||
213 | 216 | ||
214 | #endif /* __ASSEMBLY__ */ | 217 | #endif /* __ASSEMBLY__ */ |
215 | 218 | ||
diff --git a/arch/powerpc/include/asm/pmac_feature.h b/arch/powerpc/include/asm/pmac_feature.h index 877c35a4356e..00eedc5a4e61 100644 --- a/arch/powerpc/include/asm/pmac_feature.h +++ b/arch/powerpc/include/asm/pmac_feature.h | |||
@@ -378,7 +378,7 @@ extern struct macio_chip* macio_find(struct device_node* child, int type); | |||
378 | * Those are exported by pmac feature for internal use by arch code | 378 | * Those are exported by pmac feature for internal use by arch code |
379 | * only like the platform function callbacks, do not use directly in drivers | 379 | * only like the platform function callbacks, do not use directly in drivers |
380 | */ | 380 | */ |
381 | extern spinlock_t feature_lock; | 381 | extern raw_spinlock_t feature_lock; |
382 | extern struct device_node *uninorth_node; | 382 | extern struct device_node *uninorth_node; |
383 | extern u32 __iomem *uninorth_base; | 383 | extern u32 __iomem *uninorth_base; |
384 | 384 | ||
diff --git a/arch/powerpc/include/asm/pmac_low_i2c.h b/arch/powerpc/include/asm/pmac_low_i2c.h index 131011bd7e76..01d71826d92f 100644 --- a/arch/powerpc/include/asm/pmac_low_i2c.h +++ b/arch/powerpc/include/asm/pmac_low_i2c.h | |||
@@ -72,11 +72,7 @@ extern int pmac_i2c_get_type(struct pmac_i2c_bus *bus); | |||
72 | extern int pmac_i2c_get_flags(struct pmac_i2c_bus *bus); | 72 | extern int pmac_i2c_get_flags(struct pmac_i2c_bus *bus); |
73 | extern int pmac_i2c_get_channel(struct pmac_i2c_bus *bus); | 73 | extern int pmac_i2c_get_channel(struct pmac_i2c_bus *bus); |
74 | 74 | ||
75 | /* i2c layer adapter attach/detach */ | 75 | /* i2c layer adapter helpers */ |
76 | extern void pmac_i2c_attach_adapter(struct pmac_i2c_bus *bus, | ||
77 | struct i2c_adapter *adapter); | ||
78 | extern void pmac_i2c_detach_adapter(struct pmac_i2c_bus *bus, | ||
79 | struct i2c_adapter *adapter); | ||
80 | extern struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus); | 76 | extern struct i2c_adapter *pmac_i2c_get_adapter(struct pmac_i2c_bus *bus); |
81 | extern struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter); | 77 | extern struct pmac_i2c_bus *pmac_i2c_adapter_to_bus(struct i2c_adapter *adapter); |
82 | 78 | ||
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index ef9aa84cac5a..d553bbeb726c 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h | |||
@@ -22,8 +22,10 @@ | |||
22 | #define PPC_INST_DCBZL 0x7c2007ec | 22 | #define PPC_INST_DCBZL 0x7c2007ec |
23 | #define PPC_INST_ISEL 0x7c00001e | 23 | #define PPC_INST_ISEL 0x7c00001e |
24 | #define PPC_INST_ISEL_MASK 0xfc00003e | 24 | #define PPC_INST_ISEL_MASK 0xfc00003e |
25 | #define PPC_INST_LDARX 0x7c0000a8 | ||
25 | #define PPC_INST_LSWI 0x7c0004aa | 26 | #define PPC_INST_LSWI 0x7c0004aa |
26 | #define PPC_INST_LSWX 0x7c00042a | 27 | #define PPC_INST_LSWX 0x7c00042a |
28 | #define PPC_INST_LWARX 0x7c000028 | ||
27 | #define PPC_INST_LWSYNC 0x7c2004ac | 29 | #define PPC_INST_LWSYNC 0x7c2004ac |
28 | #define PPC_INST_LXVD2X 0x7c000698 | 30 | #define PPC_INST_LXVD2X 0x7c000698 |
29 | #define PPC_INST_MCRXR 0x7c000400 | 31 | #define PPC_INST_MCRXR 0x7c000400 |
@@ -55,15 +57,31 @@ | |||
55 | #define __PPC_RA(a) (((a) & 0x1f) << 16) | 57 | #define __PPC_RA(a) (((a) & 0x1f) << 16) |
56 | #define __PPC_RB(b) (((b) & 0x1f) << 11) | 58 | #define __PPC_RB(b) (((b) & 0x1f) << 11) |
57 | #define __PPC_RS(s) (((s) & 0x1f) << 21) | 59 | #define __PPC_RS(s) (((s) & 0x1f) << 21) |
60 | #define __PPC_RT(s) __PPC_RS(s) | ||
58 | #define __PPC_XS(s) ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5)) | 61 | #define __PPC_XS(s) ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5)) |
59 | #define __PPC_T_TLB(t) (((t) & 0x3) << 21) | 62 | #define __PPC_T_TLB(t) (((t) & 0x3) << 21) |
60 | #define __PPC_WC(w) (((w) & 0x3) << 21) | 63 | #define __PPC_WC(w) (((w) & 0x3) << 21) |
64 | /* | ||
65 | * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a | ||
66 | * larx with EH set as an illegal instruction. | ||
67 | */ | ||
68 | #ifdef CONFIG_PPC64 | ||
69 | #define __PPC_EH(eh) (((eh) & 0x1) << 0) | ||
70 | #else | ||
71 | #define __PPC_EH(eh) 0 | ||
72 | #endif | ||
61 | 73 | ||
62 | /* Deal with instructions that older assemblers aren't aware of */ | 74 | /* Deal with instructions that older assemblers aren't aware of */ |
63 | #define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \ | 75 | #define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \ |
64 | __PPC_RA(a) | __PPC_RB(b)) | 76 | __PPC_RA(a) | __PPC_RB(b)) |
65 | #define PPC_DCBZL(a, b) stringify_in_c(.long PPC_INST_DCBZL | \ | 77 | #define PPC_DCBZL(a, b) stringify_in_c(.long PPC_INST_DCBZL | \ |
66 | __PPC_RA(a) | __PPC_RB(b)) | 78 | __PPC_RA(a) | __PPC_RB(b)) |
79 | #define PPC_LDARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LDARX | \ | ||
80 | __PPC_RT(t) | __PPC_RA(a) | \ | ||
81 | __PPC_RB(b) | __PPC_EH(eh)) | ||
82 | #define PPC_LWARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LWARX | \ | ||
83 | __PPC_RT(t) | __PPC_RA(a) | \ | ||
84 | __PPC_RB(b) | __PPC_EH(eh)) | ||
67 | #define PPC_MSGSND(b) stringify_in_c(.long PPC_INST_MSGSND | \ | 85 | #define PPC_MSGSND(b) stringify_in_c(.long PPC_INST_MSGSND | \ |
68 | __PPC_RB(b)) | 86 | __PPC_RB(b)) |
69 | #define PPC_RFCI stringify_in_c(.long PPC_INST_RFCI) | 87 | #define PPC_RFCI stringify_in_c(.long PPC_INST_RFCI) |
diff --git a/arch/powerpc/include/asm/ppc-pci.h b/arch/powerpc/include/asm/ppc-pci.h index 2828f9d0f66d..42fdff0e4b32 100644 --- a/arch/powerpc/include/asm/ppc-pci.h +++ b/arch/powerpc/include/asm/ppc-pci.h | |||
@@ -137,6 +137,11 @@ struct device_node * find_device_pe(struct device_node *dn); | |||
137 | void eeh_sysfs_add_device(struct pci_dev *pdev); | 137 | void eeh_sysfs_add_device(struct pci_dev *pdev); |
138 | void eeh_sysfs_remove_device(struct pci_dev *pdev); | 138 | void eeh_sysfs_remove_device(struct pci_dev *pdev); |
139 | 139 | ||
140 | static inline const char *eeh_pci_name(struct pci_dev *pdev) | ||
141 | { | ||
142 | return pdev ? pci_name(pdev) : "<null>"; | ||
143 | } | ||
144 | |||
140 | #endif /* CONFIG_EEH */ | 145 | #endif /* CONFIG_EEH */ |
141 | 146 | ||
142 | #else /* CONFIG_PCI */ | 147 | #else /* CONFIG_PCI */ |
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 9eed29eee604..221ba6240464 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h | |||
@@ -161,9 +161,41 @@ struct thread_struct { | |||
161 | #ifdef CONFIG_PPC32 | 161 | #ifdef CONFIG_PPC32 |
162 | void *pgdir; /* root of page-table tree */ | 162 | void *pgdir; /* root of page-table tree */ |
163 | #endif | 163 | #endif |
164 | #if defined(CONFIG_4xx) || defined (CONFIG_BOOKE) | 164 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS |
165 | unsigned long dbcr0; /* debug control register values */ | 165 | /* |
166 | * The following help to manage the use of Debug Control Registers | ||
167 | * om the BookE platforms. | ||
168 | */ | ||
169 | unsigned long dbcr0; | ||
166 | unsigned long dbcr1; | 170 | unsigned long dbcr1; |
171 | #ifdef CONFIG_BOOKE | ||
172 | unsigned long dbcr2; | ||
173 | #endif | ||
174 | /* | ||
175 | * The stored value of the DBSR register will be the value at the | ||
176 | * last debug interrupt. This register can only be read from the | ||
177 | * user (will never be written to) and has value while helping to | ||
178 | * describe the reason for the last debug trap. Torez | ||
179 | */ | ||
180 | unsigned long dbsr; | ||
181 | /* | ||
182 | * The following will contain addresses used by debug applications | ||
183 | * to help trace and trap on particular address locations. | ||
184 | * The bits in the Debug Control Registers above help define which | ||
185 | * of the following registers will contain valid data and/or addresses. | ||
186 | */ | ||
187 | unsigned long iac1; | ||
188 | unsigned long iac2; | ||
189 | #if CONFIG_PPC_ADV_DEBUG_IACS > 2 | ||
190 | unsigned long iac3; | ||
191 | unsigned long iac4; | ||
192 | #endif | ||
193 | unsigned long dac1; | ||
194 | unsigned long dac2; | ||
195 | #if CONFIG_PPC_ADV_DEBUG_DVCS > 0 | ||
196 | unsigned long dvc1; | ||
197 | unsigned long dvc2; | ||
198 | #endif | ||
167 | #endif | 199 | #endif |
168 | /* FP and VSX 0-31 register set */ | 200 | /* FP and VSX 0-31 register set */ |
169 | double fpr[32][TS_FPRWIDTH]; | 201 | double fpr[32][TS_FPRWIDTH]; |
diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h index 6ff04185d2aa..ddd408a93b5a 100644 --- a/arch/powerpc/include/asm/prom.h +++ b/arch/powerpc/include/asm/prom.h | |||
@@ -1,3 +1,4 @@ | |||
1 | #include <linux/of.h> /* linux/of.h gets to determine #include ordering */ | ||
1 | #ifndef _POWERPC_PROM_H | 2 | #ifndef _POWERPC_PROM_H |
2 | #define _POWERPC_PROM_H | 3 | #define _POWERPC_PROM_H |
3 | #ifdef __KERNEL__ | 4 | #ifdef __KERNEL__ |
@@ -16,145 +17,14 @@ | |||
16 | * 2 of the License, or (at your option) any later version. | 17 | * 2 of the License, or (at your option) any later version. |
17 | */ | 18 | */ |
18 | #include <linux/types.h> | 19 | #include <linux/types.h> |
20 | #include <linux/of_fdt.h> | ||
19 | #include <linux/proc_fs.h> | 21 | #include <linux/proc_fs.h> |
20 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
21 | #include <asm/irq.h> | 23 | #include <asm/irq.h> |
22 | #include <asm/atomic.h> | 24 | #include <asm/atomic.h> |
23 | 25 | ||
24 | #define OF_ROOT_NODE_ADDR_CELLS_DEFAULT 1 | ||
25 | #define OF_ROOT_NODE_SIZE_CELLS_DEFAULT 1 | ||
26 | |||
27 | #define of_compat_cmp(s1, s2, l) strcasecmp((s1), (s2)) | ||
28 | #define of_prop_cmp(s1, s2) strcmp((s1), (s2)) | ||
29 | #define of_node_cmp(s1, s2) strcasecmp((s1), (s2)) | ||
30 | |||
31 | /* Definitions used by the flattened device tree */ | ||
32 | #define OF_DT_HEADER 0xd00dfeed /* marker */ | ||
33 | #define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */ | ||
34 | #define OF_DT_END_NODE 0x2 /* End node */ | ||
35 | #define OF_DT_PROP 0x3 /* Property: name off, size, | ||
36 | * content */ | ||
37 | #define OF_DT_NOP 0x4 /* nop */ | ||
38 | #define OF_DT_END 0x9 | ||
39 | |||
40 | #define OF_DT_VERSION 0x10 | ||
41 | |||
42 | /* | ||
43 | * This is what gets passed to the kernel by prom_init or kexec | ||
44 | * | ||
45 | * The dt struct contains the device tree structure, full pathes and | ||
46 | * property contents. The dt strings contain a separate block with just | ||
47 | * the strings for the property names, and is fully page aligned and | ||
48 | * self contained in a page, so that it can be kept around by the kernel, | ||
49 | * each property name appears only once in this page (cheap compression) | ||
50 | * | ||
51 | * the mem_rsvmap contains a map of reserved ranges of physical memory, | ||
52 | * passing it here instead of in the device-tree itself greatly simplifies | ||
53 | * the job of everybody. It's just a list of u64 pairs (base/size) that | ||
54 | * ends when size is 0 | ||
55 | */ | ||
56 | struct boot_param_header | ||
57 | { | ||
58 | u32 magic; /* magic word OF_DT_HEADER */ | ||
59 | u32 totalsize; /* total size of DT block */ | ||
60 | u32 off_dt_struct; /* offset to structure */ | ||
61 | u32 off_dt_strings; /* offset to strings */ | ||
62 | u32 off_mem_rsvmap; /* offset to memory reserve map */ | ||
63 | u32 version; /* format version */ | ||
64 | u32 last_comp_version; /* last compatible version */ | ||
65 | /* version 2 fields below */ | ||
66 | u32 boot_cpuid_phys; /* Physical CPU id we're booting on */ | ||
67 | /* version 3 fields below */ | ||
68 | u32 dt_strings_size; /* size of the DT strings block */ | ||
69 | /* version 17 fields below */ | ||
70 | u32 dt_struct_size; /* size of the DT structure block */ | ||
71 | }; | ||
72 | |||
73 | |||
74 | |||
75 | typedef u32 phandle; | ||
76 | typedef u32 ihandle; | ||
77 | |||
78 | struct property { | ||
79 | char *name; | ||
80 | int length; | ||
81 | void *value; | ||
82 | struct property *next; | ||
83 | }; | ||
84 | |||
85 | struct device_node { | ||
86 | const char *name; | ||
87 | const char *type; | ||
88 | phandle node; | ||
89 | phandle linux_phandle; | ||
90 | char *full_name; | ||
91 | |||
92 | struct property *properties; | ||
93 | struct property *deadprops; /* removed properties */ | ||
94 | struct device_node *parent; | ||
95 | struct device_node *child; | ||
96 | struct device_node *sibling; | ||
97 | struct device_node *next; /* next device of same type */ | ||
98 | struct device_node *allnext; /* next in list of all nodes */ | ||
99 | struct proc_dir_entry *pde; /* this node's proc directory */ | ||
100 | struct kref kref; | ||
101 | unsigned long _flags; | ||
102 | void *data; | ||
103 | }; | ||
104 | |||
105 | extern struct device_node *of_chosen; | ||
106 | |||
107 | static inline int of_node_check_flag(struct device_node *n, unsigned long flag) | ||
108 | { | ||
109 | return test_bit(flag, &n->_flags); | ||
110 | } | ||
111 | |||
112 | static inline void of_node_set_flag(struct device_node *n, unsigned long flag) | ||
113 | { | ||
114 | set_bit(flag, &n->_flags); | ||
115 | } | ||
116 | |||
117 | |||
118 | #define HAVE_ARCH_DEVTREE_FIXUPS | 26 | #define HAVE_ARCH_DEVTREE_FIXUPS |
119 | 27 | ||
120 | static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_entry *de) | ||
121 | { | ||
122 | dn->pde = de; | ||
123 | } | ||
124 | |||
125 | |||
126 | extern struct device_node *of_find_all_nodes(struct device_node *prev); | ||
127 | extern struct device_node *of_node_get(struct device_node *node); | ||
128 | extern void of_node_put(struct device_node *node); | ||
129 | |||
130 | /* For scanning the flat device-tree at boot time */ | ||
131 | extern int __init of_scan_flat_dt(int (*it)(unsigned long node, | ||
132 | const char *uname, int depth, | ||
133 | void *data), | ||
134 | void *data); | ||
135 | extern void* __init of_get_flat_dt_prop(unsigned long node, const char *name, | ||
136 | unsigned long *size); | ||
137 | extern int __init of_flat_dt_is_compatible(unsigned long node, const char *name); | ||
138 | extern unsigned long __init of_get_flat_dt_root(void); | ||
139 | |||
140 | /* For updating the device tree at runtime */ | ||
141 | extern void of_attach_node(struct device_node *); | ||
142 | extern void of_detach_node(struct device_node *); | ||
143 | |||
144 | /* Other Prototypes */ | ||
145 | extern void finish_device_tree(void); | ||
146 | extern void unflatten_device_tree(void); | ||
147 | extern void early_init_devtree(void *); | ||
148 | extern int machine_is_compatible(const char *compat); | ||
149 | extern void print_properties(struct device_node *node); | ||
150 | extern int prom_n_intr_cells(struct device_node* np); | ||
151 | extern void prom_get_irq_senses(unsigned char *senses, int off, int max); | ||
152 | extern int prom_add_property(struct device_node* np, struct property* prop); | ||
153 | extern int prom_remove_property(struct device_node *np, struct property *prop); | ||
154 | extern int prom_update_property(struct device_node *np, | ||
155 | struct property *newprop, | ||
156 | struct property *oldprop); | ||
157 | |||
158 | #ifdef CONFIG_PPC32 | 28 | #ifdef CONFIG_PPC32 |
159 | /* | 29 | /* |
160 | * PCI <-> OF matching functions | 30 | * PCI <-> OF matching functions |
@@ -169,35 +39,10 @@ extern struct device_node* pci_device_to_OF_node(struct pci_dev *); | |||
169 | extern void pci_create_OF_bus_map(void); | 39 | extern void pci_create_OF_bus_map(void); |
170 | #endif | 40 | #endif |
171 | 41 | ||
172 | extern struct resource *request_OF_resource(struct device_node* node, | ||
173 | int index, const char* name_postfix); | ||
174 | extern int release_OF_resource(struct device_node* node, int index); | ||
175 | |||
176 | |||
177 | /* | 42 | /* |
178 | * OF address retreival & translation | 43 | * OF address retreival & translation |
179 | */ | 44 | */ |
180 | 45 | ||
181 | |||
182 | /* Helper to read a big number; size is in cells (not bytes) */ | ||
183 | static inline u64 of_read_number(const u32 *cell, int size) | ||
184 | { | ||
185 | u64 r = 0; | ||
186 | while (size--) | ||
187 | r = (r << 32) | *(cell++); | ||
188 | return r; | ||
189 | } | ||
190 | |||
191 | /* Like of_read_number, but we want an unsigned long result */ | ||
192 | #ifdef CONFIG_PPC32 | ||
193 | static inline unsigned long of_read_ulong(const u32 *cell, int size) | ||
194 | { | ||
195 | return cell[size-1]; | ||
196 | } | ||
197 | #else | ||
198 | #define of_read_ulong(cell, size) of_read_number(cell, size) | ||
199 | #endif | ||
200 | |||
201 | /* Translate an OF address block into a CPU physical address | 46 | /* Translate an OF address block into a CPU physical address |
202 | */ | 47 | */ |
203 | extern u64 of_translate_address(struct device_node *np, const u32 *addr); | 48 | extern u64 of_translate_address(struct device_node *np, const u32 *addr); |
@@ -349,11 +194,5 @@ extern int of_irq_to_resource(struct device_node *dev, int index, | |||
349 | */ | 194 | */ |
350 | extern void __iomem *of_iomap(struct device_node *device, int index); | 195 | extern void __iomem *of_iomap(struct device_node *device, int index); |
351 | 196 | ||
352 | /* | ||
353 | * NB: This is here while we transition from using asm/prom.h | ||
354 | * to linux/of.h | ||
355 | */ | ||
356 | #include <linux/of.h> | ||
357 | |||
358 | #endif /* __KERNEL__ */ | 197 | #endif /* __KERNEL__ */ |
359 | #endif /* _POWERPC_PROM_H */ | 198 | #endif /* _POWERPC_PROM_H */ |
diff --git a/arch/powerpc/include/asm/pte-8xx.h b/arch/powerpc/include/asm/pte-8xx.h index dd5ea95fe61e..d44826e4ff97 100644 --- a/arch/powerpc/include/asm/pte-8xx.h +++ b/arch/powerpc/include/asm/pte-8xx.h | |||
@@ -33,21 +33,21 @@ | |||
33 | #define _PAGE_NO_CACHE 0x0002 /* I: cache inhibit */ | 33 | #define _PAGE_NO_CACHE 0x0002 /* I: cache inhibit */ |
34 | #define _PAGE_SHARED 0x0004 /* No ASID (context) compare */ | 34 | #define _PAGE_SHARED 0x0004 /* No ASID (context) compare */ |
35 | #define _PAGE_SPECIAL 0x0008 /* SW entry, forced to 0 by the TLB miss */ | 35 | #define _PAGE_SPECIAL 0x0008 /* SW entry, forced to 0 by the TLB miss */ |
36 | #define _PAGE_DIRTY 0x0100 /* C: page changed */ | ||
36 | 37 | ||
37 | /* These five software bits must be masked out when the entry is loaded | 38 | /* These 4 software bits must be masked out when the entry is loaded |
38 | * into the TLB. | 39 | * into the TLB, 1 SW bit left(0x0080). |
39 | */ | 40 | */ |
40 | #define _PAGE_GUARDED 0x0010 /* software: guarded access */ | 41 | #define _PAGE_GUARDED 0x0010 /* software: guarded access */ |
41 | #define _PAGE_DIRTY 0x0020 /* software: page changed */ | 42 | #define _PAGE_ACCESSED 0x0020 /* software: page referenced */ |
42 | #define _PAGE_RW 0x0040 /* software: user write access allowed */ | 43 | #define _PAGE_WRITETHRU 0x0040 /* software: caching is write through */ |
43 | #define _PAGE_ACCESSED 0x0080 /* software: page referenced */ | ||
44 | 44 | ||
45 | /* Setting any bits in the nibble with the follow two controls will | 45 | /* Setting any bits in the nibble with the follow two controls will |
46 | * require a TLB exception handler change. It is assumed unused bits | 46 | * require a TLB exception handler change. It is assumed unused bits |
47 | * are always zero. | 47 | * are always zero. |
48 | */ | 48 | */ |
49 | #define _PAGE_HWWRITE 0x0100 /* h/w write enable: never set in Linux PTE */ | 49 | #define _PAGE_RW 0x0400 /* lsb PP bits, inverted in HW */ |
50 | #define _PAGE_USER 0x0800 /* One of the PP bits, the other is USER&~RW */ | 50 | #define _PAGE_USER 0x0800 /* msb PP bits */ |
51 | 51 | ||
52 | #define _PMD_PRESENT 0x0001 | 52 | #define _PMD_PRESENT 0x0001 |
53 | #define _PMD_BAD 0x0ff0 | 53 | #define _PMD_BAD 0x0ff0 |
diff --git a/arch/powerpc/include/asm/pte-hash64-64k.h b/arch/powerpc/include/asm/pte-hash64-64k.h index 82b72207c51c..c4490f9c67c4 100644 --- a/arch/powerpc/include/asm/pte-hash64-64k.h +++ b/arch/powerpc/include/asm/pte-hash64-64k.h | |||
@@ -76,41 +76,4 @@ | |||
76 | remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, \ | 76 | remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, \ |
77 | __pgprot(pgprot_val((prot)) | _PAGE_4K_PFN)) | 77 | __pgprot(pgprot_val((prot)) | _PAGE_4K_PFN)) |
78 | 78 | ||
79 | |||
80 | #ifdef CONFIG_PPC_SUBPAGE_PROT | ||
81 | /* | ||
82 | * For the sub-page protection option, we extend the PGD with one of | ||
83 | * these. Basically we have a 3-level tree, with the top level being | ||
84 | * the protptrs array. To optimize speed and memory consumption when | ||
85 | * only addresses < 4GB are being protected, pointers to the first | ||
86 | * four pages of sub-page protection words are stored in the low_prot | ||
87 | * array. | ||
88 | * Each page of sub-page protection words protects 1GB (4 bytes | ||
89 | * protects 64k). For the 3-level tree, each page of pointers then | ||
90 | * protects 8TB. | ||
91 | */ | ||
92 | struct subpage_prot_table { | ||
93 | unsigned long maxaddr; /* only addresses < this are protected */ | ||
94 | unsigned int **protptrs[2]; | ||
95 | unsigned int *low_prot[4]; | ||
96 | }; | ||
97 | |||
98 | #undef PGD_TABLE_SIZE | ||
99 | #define PGD_TABLE_SIZE ((sizeof(pgd_t) << PGD_INDEX_SIZE) + \ | ||
100 | sizeof(struct subpage_prot_table)) | ||
101 | |||
102 | #define SBP_L1_BITS (PAGE_SHIFT - 2) | ||
103 | #define SBP_L2_BITS (PAGE_SHIFT - 3) | ||
104 | #define SBP_L1_COUNT (1 << SBP_L1_BITS) | ||
105 | #define SBP_L2_COUNT (1 << SBP_L2_BITS) | ||
106 | #define SBP_L2_SHIFT (PAGE_SHIFT + SBP_L1_BITS) | ||
107 | #define SBP_L3_SHIFT (SBP_L2_SHIFT + SBP_L2_BITS) | ||
108 | |||
109 | extern void subpage_prot_free(pgd_t *pgd); | ||
110 | |||
111 | static inline struct subpage_prot_table *pgd_subpage_prot(pgd_t *pgd) | ||
112 | { | ||
113 | return (struct subpage_prot_table *)(pgd + PTRS_PER_PGD); | ||
114 | } | ||
115 | #endif /* CONFIG_PPC_SUBPAGE_PROT */ | ||
116 | #endif /* __ASSEMBLY__ */ | 79 | #endif /* __ASSEMBLY__ */ |
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h index 8c341490cfc5..9e2d84c06b74 100644 --- a/arch/powerpc/include/asm/ptrace.h +++ b/arch/powerpc/include/asm/ptrace.h | |||
@@ -24,6 +24,12 @@ | |||
24 | * 2 of the License, or (at your option) any later version. | 24 | * 2 of the License, or (at your option) any later version. |
25 | */ | 25 | */ |
26 | 26 | ||
27 | #ifdef __KERNEL__ | ||
28 | #include <linux/types.h> | ||
29 | #else | ||
30 | #include <stdint.h> | ||
31 | #endif | ||
32 | |||
27 | #ifndef __ASSEMBLY__ | 33 | #ifndef __ASSEMBLY__ |
28 | 34 | ||
29 | struct pt_regs { | 35 | struct pt_regs { |
@@ -131,14 +137,9 @@ do { \ | |||
131 | } while (0) | 137 | } while (0) |
132 | #endif /* __powerpc64__ */ | 138 | #endif /* __powerpc64__ */ |
133 | 139 | ||
134 | /* | ||
135 | * These are defined as per linux/ptrace.h, which see. | ||
136 | */ | ||
137 | #define arch_has_single_step() (1) | 140 | #define arch_has_single_step() (1) |
138 | #define arch_has_block_step() (!cpu_has_feature(CPU_FTR_601)) | 141 | #define arch_has_block_step() (!cpu_has_feature(CPU_FTR_601)) |
139 | extern void user_enable_single_step(struct task_struct *); | 142 | #define ARCH_HAS_USER_SINGLE_STEP_INFO |
140 | extern void user_enable_block_step(struct task_struct *); | ||
141 | extern void user_disable_single_step(struct task_struct *); | ||
142 | 143 | ||
143 | #endif /* __ASSEMBLY__ */ | 144 | #endif /* __ASSEMBLY__ */ |
144 | 145 | ||
@@ -292,4 +293,75 @@ extern void user_disable_single_step(struct task_struct *); | |||
292 | 293 | ||
293 | #define PTRACE_SINGLEBLOCK 0x100 /* resume execution until next branch */ | 294 | #define PTRACE_SINGLEBLOCK 0x100 /* resume execution until next branch */ |
294 | 295 | ||
296 | #define PPC_PTRACE_GETHWDBGINFO 0x89 | ||
297 | #define PPC_PTRACE_SETHWDEBUG 0x88 | ||
298 | #define PPC_PTRACE_DELHWDEBUG 0x87 | ||
299 | |||
300 | #ifndef __ASSEMBLY__ | ||
301 | |||
302 | struct ppc_debug_info { | ||
303 | uint32_t version; /* Only version 1 exists to date */ | ||
304 | uint32_t num_instruction_bps; | ||
305 | uint32_t num_data_bps; | ||
306 | uint32_t num_condition_regs; | ||
307 | uint32_t data_bp_alignment; | ||
308 | uint32_t sizeof_condition; /* size of the DVC register */ | ||
309 | uint64_t features; | ||
310 | }; | ||
311 | |||
312 | #endif /* __ASSEMBLY__ */ | ||
313 | |||
314 | /* | ||
315 | * features will have bits indication whether there is support for: | ||
316 | */ | ||
317 | #define PPC_DEBUG_FEATURE_INSN_BP_RANGE 0x0000000000000001 | ||
318 | #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x0000000000000002 | ||
319 | #define PPC_DEBUG_FEATURE_DATA_BP_RANGE 0x0000000000000004 | ||
320 | #define PPC_DEBUG_FEATURE_DATA_BP_MASK 0x0000000000000008 | ||
321 | |||
322 | #ifndef __ASSEMBLY__ | ||
323 | |||
324 | struct ppc_hw_breakpoint { | ||
325 | uint32_t version; /* currently, version must be 1 */ | ||
326 | uint32_t trigger_type; /* only some combinations allowed */ | ||
327 | uint32_t addr_mode; /* address match mode */ | ||
328 | uint32_t condition_mode; /* break/watchpoint condition flags */ | ||
329 | uint64_t addr; /* break/watchpoint address */ | ||
330 | uint64_t addr2; /* range end or mask */ | ||
331 | uint64_t condition_value; /* contents of the DVC register */ | ||
332 | }; | ||
333 | |||
334 | #endif /* __ASSEMBLY__ */ | ||
335 | |||
336 | /* | ||
337 | * Trigger Type | ||
338 | */ | ||
339 | #define PPC_BREAKPOINT_TRIGGER_EXECUTE 0x00000001 | ||
340 | #define PPC_BREAKPOINT_TRIGGER_READ 0x00000002 | ||
341 | #define PPC_BREAKPOINT_TRIGGER_WRITE 0x00000004 | ||
342 | #define PPC_BREAKPOINT_TRIGGER_RW \ | ||
343 | (PPC_BREAKPOINT_TRIGGER_READ | PPC_BREAKPOINT_TRIGGER_WRITE) | ||
344 | |||
345 | /* | ||
346 | * Address Mode | ||
347 | */ | ||
348 | #define PPC_BREAKPOINT_MODE_EXACT 0x00000000 | ||
349 | #define PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE 0x00000001 | ||
350 | #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x00000002 | ||
351 | #define PPC_BREAKPOINT_MODE_MASK 0x00000003 | ||
352 | |||
353 | /* | ||
354 | * Condition Mode | ||
355 | */ | ||
356 | #define PPC_BREAKPOINT_CONDITION_MODE 0x00000003 | ||
357 | #define PPC_BREAKPOINT_CONDITION_NONE 0x00000000 | ||
358 | #define PPC_BREAKPOINT_CONDITION_AND 0x00000001 | ||
359 | #define PPC_BREAKPOINT_CONDITION_EXACT PPC_BREAKPOINT_CONDITION_AND | ||
360 | #define PPC_BREAKPOINT_CONDITION_OR 0x00000002 | ||
361 | #define PPC_BREAKPOINT_CONDITION_AND_OR 0x00000003 | ||
362 | #define PPC_BREAKPOINT_CONDITION_BE_ALL 0x00ff0000 | ||
363 | #define PPC_BREAKPOINT_CONDITION_BE_SHIFT 16 | ||
364 | #define PPC_BREAKPOINT_CONDITION_BE(n) \ | ||
365 | (1<<((n)+PPC_BREAKPOINT_CONDITION_BE_SHIFT)) | ||
366 | |||
295 | #endif /* _ASM_POWERPC_PTRACE_H */ | 367 | #endif /* _ASM_POWERPC_PTRACE_H */ |
diff --git a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h index f388f0ab193f..0947b36e534c 100644 --- a/arch/powerpc/include/asm/qe.h +++ b/arch/powerpc/include/asm/qe.h | |||
@@ -87,7 +87,7 @@ extern spinlock_t cmxgcr_lock; | |||
87 | 87 | ||
88 | /* Export QE common operations */ | 88 | /* Export QE common operations */ |
89 | #ifdef CONFIG_QUICC_ENGINE | 89 | #ifdef CONFIG_QUICC_ENGINE |
90 | extern void __init qe_reset(void); | 90 | extern void qe_reset(void); |
91 | #else | 91 | #else |
92 | static inline void qe_reset(void) {} | 92 | static inline void qe_reset(void) {} |
93 | #endif | 93 | #endif |
@@ -145,8 +145,17 @@ static inline void qe_pin_set_gpio(struct qe_pin *qe_pin) {} | |||
145 | static inline void qe_pin_set_dedicated(struct qe_pin *pin) {} | 145 | static inline void qe_pin_set_dedicated(struct qe_pin *pin) {} |
146 | #endif /* CONFIG_QE_GPIO */ | 146 | #endif /* CONFIG_QE_GPIO */ |
147 | 147 | ||
148 | /* QE internal API */ | 148 | #ifdef CONFIG_QUICC_ENGINE |
149 | int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input); | 149 | int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input); |
150 | #else | ||
151 | static inline int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, | ||
152 | u32 cmd_input) | ||
153 | { | ||
154 | return -ENOSYS; | ||
155 | } | ||
156 | #endif /* CONFIG_QUICC_ENGINE */ | ||
157 | |||
158 | /* QE internal API */ | ||
150 | enum qe_clock qe_clock_source(const char *source); | 159 | enum qe_clock qe_clock_source(const char *source); |
151 | unsigned int qe_get_brg_clk(void); | 160 | unsigned int qe_get_brg_clk(void); |
152 | int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier); | 161 | int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier); |
@@ -154,7 +163,28 @@ int qe_get_snum(void); | |||
154 | void qe_put_snum(u8 snum); | 163 | void qe_put_snum(u8 snum); |
155 | unsigned int qe_get_num_of_risc(void); | 164 | unsigned int qe_get_num_of_risc(void); |
156 | unsigned int qe_get_num_of_snums(void); | 165 | unsigned int qe_get_num_of_snums(void); |
157 | int qe_alive_during_sleep(void); | 166 | |
167 | static inline int qe_alive_during_sleep(void) | ||
168 | { | ||
169 | /* | ||
170 | * MPC8568E reference manual says: | ||
171 | * | ||
172 | * "...power down sequence waits for all I/O interfaces to become idle. | ||
173 | * In some applications this may happen eventually without actively | ||
174 | * shutting down interfaces, but most likely, software will have to | ||
175 | * take steps to shut down the eTSEC, QUICC Engine Block, and PCI | ||
176 | * interfaces before issuing the command (either the write to the core | ||
177 | * MSR[WE] as described above or writing to POWMGTCSR) to put the | ||
178 | * device into sleep state." | ||
179 | * | ||
180 | * MPC8569E reference manual has a similar paragraph. | ||
181 | */ | ||
182 | #ifdef CONFIG_PPC_85xx | ||
183 | return 0; | ||
184 | #else | ||
185 | return 1; | ||
186 | #endif | ||
187 | } | ||
158 | 188 | ||
159 | /* we actually use cpm_muram implementation, define this for convenience */ | 189 | /* we actually use cpm_muram implementation, define this for convenience */ |
160 | #define qe_muram_init cpm_muram_init | 190 | #define qe_muram_init cpm_muram_init |
@@ -210,8 +240,15 @@ struct qe_firmware_info { | |||
210 | u64 extended_modes; /* Extended modes */ | 240 | u64 extended_modes; /* Extended modes */ |
211 | }; | 241 | }; |
212 | 242 | ||
243 | #ifdef CONFIG_QUICC_ENGINE | ||
213 | /* Upload a firmware to the QE */ | 244 | /* Upload a firmware to the QE */ |
214 | int qe_upload_firmware(const struct qe_firmware *firmware); | 245 | int qe_upload_firmware(const struct qe_firmware *firmware); |
246 | #else | ||
247 | static inline int qe_upload_firmware(const struct qe_firmware *firmware) | ||
248 | { | ||
249 | return -ENOSYS; | ||
250 | } | ||
251 | #endif /* CONFIG_QUICC_ENGINE */ | ||
215 | 252 | ||
216 | /* Obtain information on the uploaded firmware */ | 253 | /* Obtain information on the uploaded firmware */ |
217 | struct qe_firmware_info *qe_get_firmware_info(void); | 254 | struct qe_firmware_info *qe_get_firmware_info(void); |
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 6315edc205d8..5572e86223f4 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h | |||
@@ -426,6 +426,10 @@ | |||
426 | #define SRR1_WAKEMT 0x00280000 /* mtctrl */ | 426 | #define SRR1_WAKEMT 0x00280000 /* mtctrl */ |
427 | #define SRR1_WAKEDEC 0x00180000 /* Decrementer interrupt */ | 427 | #define SRR1_WAKEDEC 0x00180000 /* Decrementer interrupt */ |
428 | #define SRR1_WAKETHERM 0x00100000 /* Thermal management interrupt */ | 428 | #define SRR1_WAKETHERM 0x00100000 /* Thermal management interrupt */ |
429 | #define SRR1_PROGFPE 0x00100000 /* Floating Point Enabled */ | ||
430 | #define SRR1_PROGPRIV 0x00040000 /* Privileged instruction */ | ||
431 | #define SRR1_PROGTRAP 0x00020000 /* Trap */ | ||
432 | #define SRR1_PROGADDR 0x00010000 /* SRR0 contains subsequent addr */ | ||
429 | #define SPRN_HSRR0 0x13A /* Save/Restore Register 0 */ | 433 | #define SPRN_HSRR0 0x13A /* Save/Restore Register 0 */ |
430 | #define SPRN_HSRR1 0x13B /* Save/Restore Register 1 */ | 434 | #define SPRN_HSRR1 0x13B /* Save/Restore Register 1 */ |
431 | 435 | ||
@@ -489,6 +493,8 @@ | |||
489 | #define SPRN_MMCR1 798 | 493 | #define SPRN_MMCR1 798 |
490 | #define SPRN_MMCRA 0x312 | 494 | #define SPRN_MMCRA 0x312 |
491 | #define MMCRA_SDSYNC 0x80000000UL /* SDAR synced with SIAR */ | 495 | #define MMCRA_SDSYNC 0x80000000UL /* SDAR synced with SIAR */ |
496 | #define MMCRA_SDAR_DCACHE_MISS 0x40000000UL | ||
497 | #define MMCRA_SDAR_ERAT_MISS 0x20000000UL | ||
492 | #define MMCRA_SIHV 0x10000000UL /* state of MSR HV when SIAR set */ | 498 | #define MMCRA_SIHV 0x10000000UL /* state of MSR HV when SIAR set */ |
493 | #define MMCRA_SIPR 0x08000000UL /* state of MSR PR when SIAR set */ | 499 | #define MMCRA_SIPR 0x08000000UL /* state of MSR PR when SIAR set */ |
494 | #define MMCRA_SLOT 0x07000000UL /* SLOT bits (37-39) */ | 500 | #define MMCRA_SLOT 0x07000000UL /* SLOT bits (37-39) */ |
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index 3bf783505528..414d434a66d0 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h | |||
@@ -248,6 +248,8 @@ | |||
248 | #define DBSR_RET 0x00008000 /* Return Debug Event */ | 248 | #define DBSR_RET 0x00008000 /* Return Debug Event */ |
249 | #define DBSR_CIRPT 0x00000040 /* Critical Interrupt Taken Event */ | 249 | #define DBSR_CIRPT 0x00000040 /* Critical Interrupt Taken Event */ |
250 | #define DBSR_CRET 0x00000020 /* Critical Return Debug Event */ | 250 | #define DBSR_CRET 0x00000020 /* Critical Return Debug Event */ |
251 | #define DBSR_IAC12ATS 0x00000002 /* Instr Address Compare 1/2 Toggle */ | ||
252 | #define DBSR_IAC34ATS 0x00000001 /* Instr Address Compare 3/4 Toggle */ | ||
251 | #endif | 253 | #endif |
252 | #ifdef CONFIG_40x | 254 | #ifdef CONFIG_40x |
253 | #define DBSR_IC 0x80000000 /* Instruction Completion */ | 255 | #define DBSR_IC 0x80000000 /* Instruction Completion */ |
@@ -313,6 +315,38 @@ | |||
313 | #define DBCR0_IA12T 0x00008000 /* Instr Addr 1-2 range Toggle */ | 315 | #define DBCR0_IA12T 0x00008000 /* Instr Addr 1-2 range Toggle */ |
314 | #define DBCR0_IA34T 0x00004000 /* Instr Addr 3-4 range Toggle */ | 316 | #define DBCR0_IA34T 0x00004000 /* Instr Addr 3-4 range Toggle */ |
315 | #define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */ | 317 | #define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */ |
318 | |||
319 | #define dbcr_iac_range(task) ((task)->thread.dbcr0) | ||
320 | #define DBCR_IAC12I DBCR0_IA12 /* Range Inclusive */ | ||
321 | #define DBCR_IAC12X (DBCR0_IA12 | DBCR0_IA12X) /* Range Exclusive */ | ||
322 | #define DBCR_IAC12MODE (DBCR0_IA12 | DBCR0_IA12X) /* IAC 1-2 Mode Bits */ | ||
323 | #define DBCR_IAC34I DBCR0_IA34 /* Range Inclusive */ | ||
324 | #define DBCR_IAC34X (DBCR0_IA34 | DBCR0_IA34X) /* Range Exclusive */ | ||
325 | #define DBCR_IAC34MODE (DBCR0_IA34 | DBCR0_IA34X) /* IAC 3-4 Mode Bits */ | ||
326 | |||
327 | /* Bit definitions related to the DBCR1. */ | ||
328 | #define DBCR1_DAC1R 0x80000000 /* DAC1 Read Debug Event */ | ||
329 | #define DBCR1_DAC2R 0x40000000 /* DAC2 Read Debug Event */ | ||
330 | #define DBCR1_DAC1W 0x20000000 /* DAC1 Write Debug Event */ | ||
331 | #define DBCR1_DAC2W 0x10000000 /* DAC2 Write Debug Event */ | ||
332 | |||
333 | #define dbcr_dac(task) ((task)->thread.dbcr1) | ||
334 | #define DBCR_DAC1R DBCR1_DAC1R | ||
335 | #define DBCR_DAC1W DBCR1_DAC1W | ||
336 | #define DBCR_DAC2R DBCR1_DAC2R | ||
337 | #define DBCR_DAC2W DBCR1_DAC2W | ||
338 | |||
339 | /* | ||
340 | * Are there any active Debug Events represented in the | ||
341 | * Debug Control Registers? | ||
342 | */ | ||
343 | #define DBCR0_ACTIVE_EVENTS (DBCR0_ICMP | DBCR0_IAC1 | DBCR0_IAC2 | \ | ||
344 | DBCR0_IAC3 | DBCR0_IAC4) | ||
345 | #define DBCR1_ACTIVE_EVENTS (DBCR1_DAC1R | DBCR1_DAC2R | \ | ||
346 | DBCR1_DAC1W | DBCR1_DAC2W) | ||
347 | #define DBCR_ACTIVE_EVENTS(dbcr0, dbcr1) (((dbcr0) & DBCR0_ACTIVE_EVENTS) || \ | ||
348 | ((dbcr1) & DBCR1_ACTIVE_EVENTS)) | ||
349 | |||
316 | #elif defined(CONFIG_BOOKE) | 350 | #elif defined(CONFIG_BOOKE) |
317 | #define DBCR0_EDM 0x80000000 /* External Debug Mode */ | 351 | #define DBCR0_EDM 0x80000000 /* External Debug Mode */ |
318 | #define DBCR0_IDM 0x40000000 /* Internal Debug Mode */ | 352 | #define DBCR0_IDM 0x40000000 /* Internal Debug Mode */ |
@@ -342,19 +376,79 @@ | |||
342 | #define DBCR0_CRET 0x00000020 /* Critical Return Debug Event */ | 376 | #define DBCR0_CRET 0x00000020 /* Critical Return Debug Event */ |
343 | #define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */ | 377 | #define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */ |
344 | 378 | ||
379 | #define dbcr_dac(task) ((task)->thread.dbcr0) | ||
380 | #define DBCR_DAC1R DBCR0_DAC1R | ||
381 | #define DBCR_DAC1W DBCR0_DAC1W | ||
382 | #define DBCR_DAC2R DBCR0_DAC2R | ||
383 | #define DBCR_DAC2W DBCR0_DAC2W | ||
384 | |||
345 | /* Bit definitions related to the DBCR1. */ | 385 | /* Bit definitions related to the DBCR1. */ |
386 | #define DBCR1_IAC1US 0xC0000000 /* Instr Addr Cmp 1 Sup/User */ | ||
387 | #define DBCR1_IAC1ER 0x30000000 /* Instr Addr Cmp 1 Eff/Real */ | ||
388 | #define DBCR1_IAC1ER_01 0x10000000 /* reserved */ | ||
389 | #define DBCR1_IAC1ER_10 0x20000000 /* Instr Addr Cmp 1 Eff/Real MSR[IS]=0 */ | ||
390 | #define DBCR1_IAC1ER_11 0x30000000 /* Instr Addr Cmp 1 Eff/Real MSR[IS]=1 */ | ||
391 | #define DBCR1_IAC2US 0x0C000000 /* Instr Addr Cmp 2 Sup/User */ | ||
392 | #define DBCR1_IAC2ER 0x03000000 /* Instr Addr Cmp 2 Eff/Real */ | ||
393 | #define DBCR1_IAC2ER_01 0x01000000 /* reserved */ | ||
394 | #define DBCR1_IAC2ER_10 0x02000000 /* Instr Addr Cmp 2 Eff/Real MSR[IS]=0 */ | ||
395 | #define DBCR1_IAC2ER_11 0x03000000 /* Instr Addr Cmp 2 Eff/Real MSR[IS]=1 */ | ||
346 | #define DBCR1_IAC12M 0x00800000 /* Instr Addr 1-2 range enable */ | 396 | #define DBCR1_IAC12M 0x00800000 /* Instr Addr 1-2 range enable */ |
347 | #define DBCR1_IAC12MX 0x00C00000 /* Instr Addr 1-2 range eXclusive */ | 397 | #define DBCR1_IAC12MX 0x00C00000 /* Instr Addr 1-2 range eXclusive */ |
348 | #define DBCR1_IAC12AT 0x00010000 /* Instr Addr 1-2 range Toggle */ | 398 | #define DBCR1_IAC12AT 0x00010000 /* Instr Addr 1-2 range Toggle */ |
399 | #define DBCR1_IAC3US 0x0000C000 /* Instr Addr Cmp 3 Sup/User */ | ||
400 | #define DBCR1_IAC3ER 0x00003000 /* Instr Addr Cmp 3 Eff/Real */ | ||
401 | #define DBCR1_IAC3ER_01 0x00001000 /* reserved */ | ||
402 | #define DBCR1_IAC3ER_10 0x00002000 /* Instr Addr Cmp 3 Eff/Real MSR[IS]=0 */ | ||
403 | #define DBCR1_IAC3ER_11 0x00003000 /* Instr Addr Cmp 3 Eff/Real MSR[IS]=1 */ | ||
404 | #define DBCR1_IAC4US 0x00000C00 /* Instr Addr Cmp 4 Sup/User */ | ||
405 | #define DBCR1_IAC4ER 0x00000300 /* Instr Addr Cmp 4 Eff/Real */ | ||
406 | #define DBCR1_IAC4ER_01 0x00000100 /* Instr Addr Cmp 4 Eff/Real MSR[IS]=0 */ | ||
407 | #define DBCR1_IAC4ER_10 0x00000200 /* Instr Addr Cmp 4 Eff/Real MSR[IS]=0 */ | ||
408 | #define DBCR1_IAC4ER_11 0x00000300 /* Instr Addr Cmp 4 Eff/Real MSR[IS]=1 */ | ||
349 | #define DBCR1_IAC34M 0x00000080 /* Instr Addr 3-4 range enable */ | 409 | #define DBCR1_IAC34M 0x00000080 /* Instr Addr 3-4 range enable */ |
350 | #define DBCR1_IAC34MX 0x000000C0 /* Instr Addr 3-4 range eXclusive */ | 410 | #define DBCR1_IAC34MX 0x000000C0 /* Instr Addr 3-4 range eXclusive */ |
351 | #define DBCR1_IAC34AT 0x00000001 /* Instr Addr 3-4 range Toggle */ | 411 | #define DBCR1_IAC34AT 0x00000001 /* Instr Addr 3-4 range Toggle */ |
352 | 412 | ||
413 | #define dbcr_iac_range(task) ((task)->thread.dbcr1) | ||
414 | #define DBCR_IAC12I DBCR1_IAC12M /* Range Inclusive */ | ||
415 | #define DBCR_IAC12X DBCR1_IAC12MX /* Range Exclusive */ | ||
416 | #define DBCR_IAC12MODE DBCR1_IAC12MX /* IAC 1-2 Mode Bits */ | ||
417 | #define DBCR_IAC34I DBCR1_IAC34M /* Range Inclusive */ | ||
418 | #define DBCR_IAC34X DBCR1_IAC34MX /* Range Exclusive */ | ||
419 | #define DBCR_IAC34MODE DBCR1_IAC34MX /* IAC 3-4 Mode Bits */ | ||
420 | |||
353 | /* Bit definitions related to the DBCR2. */ | 421 | /* Bit definitions related to the DBCR2. */ |
422 | #define DBCR2_DAC1US 0xC0000000 /* Data Addr Cmp 1 Sup/User */ | ||
423 | #define DBCR2_DAC1ER 0x30000000 /* Data Addr Cmp 1 Eff/Real */ | ||
424 | #define DBCR2_DAC2US 0x0C000000 /* Data Addr Cmp 2 Sup/User */ | ||
425 | #define DBCR2_DAC2ER 0x03000000 /* Data Addr Cmp 2 Eff/Real */ | ||
354 | #define DBCR2_DAC12M 0x00800000 /* DAC 1-2 range enable */ | 426 | #define DBCR2_DAC12M 0x00800000 /* DAC 1-2 range enable */ |
427 | #define DBCR2_DAC12MM 0x00400000 /* DAC 1-2 Mask mode*/ | ||
355 | #define DBCR2_DAC12MX 0x00C00000 /* DAC 1-2 range eXclusive */ | 428 | #define DBCR2_DAC12MX 0x00C00000 /* DAC 1-2 range eXclusive */ |
429 | #define DBCR2_DAC12MODE 0x00C00000 /* DAC 1-2 Mode Bits */ | ||
356 | #define DBCR2_DAC12A 0x00200000 /* DAC 1-2 Asynchronous */ | 430 | #define DBCR2_DAC12A 0x00200000 /* DAC 1-2 Asynchronous */ |
357 | #endif | 431 | #define DBCR2_DVC1M 0x000C0000 /* Data Value Comp 1 Mode */ |
432 | #define DBCR2_DVC1M_SHIFT 18 /* # of bits to shift DBCR2_DVC1M */ | ||
433 | #define DBCR2_DVC2M 0x00030000 /* Data Value Comp 2 Mode */ | ||
434 | #define DBCR2_DVC2M_SHIFT 16 /* # of bits to shift DBCR2_DVC2M */ | ||
435 | #define DBCR2_DVC1BE 0x00000F00 /* Data Value Comp 1 Byte */ | ||
436 | #define DBCR2_DVC1BE_SHIFT 8 /* # of bits to shift DBCR2_DVC1BE */ | ||
437 | #define DBCR2_DVC2BE 0x0000000F /* Data Value Comp 2 Byte */ | ||
438 | #define DBCR2_DVC2BE_SHIFT 0 /* # of bits to shift DBCR2_DVC2BE */ | ||
439 | |||
440 | /* | ||
441 | * Are there any active Debug Events represented in the | ||
442 | * Debug Control Registers? | ||
443 | */ | ||
444 | #define DBCR0_ACTIVE_EVENTS (DBCR0_ICMP | DBCR0_IAC1 | DBCR0_IAC2 | \ | ||
445 | DBCR0_IAC3 | DBCR0_IAC4 | DBCR0_DAC1R | \ | ||
446 | DBCR0_DAC1W | DBCR0_DAC2R | DBCR0_DAC2W) | ||
447 | #define DBCR1_ACTIVE_EVENTS 0 | ||
448 | |||
449 | #define DBCR_ACTIVE_EVENTS(dbcr0, dbcr1) (((dbcr0) & DBCR0_ACTIVE_EVENTS) || \ | ||
450 | ((dbcr1) & DBCR1_ACTIVE_EVENTS)) | ||
451 | #endif /* #elif defined(CONFIG_BOOKE) */ | ||
358 | 452 | ||
359 | /* Bit definitions related to the TCR. */ | 453 | /* Bit definitions related to the TCR. */ |
360 | #define TCR_WP(x) (((x)&0x3)<<30) /* WDT Period */ | 454 | #define TCR_WP(x) (((x)&0x3)<<30) /* WDT Period */ |
diff --git a/arch/powerpc/include/asm/reg_fsl_emb.h b/arch/powerpc/include/asm/reg_fsl_emb.h index 1e180a594589..77bb71cfd991 100644 --- a/arch/powerpc/include/asm/reg_fsl_emb.h +++ b/arch/powerpc/include/asm/reg_fsl_emb.h | |||
@@ -31,7 +31,7 @@ | |||
31 | #define PMLCA_FCM0 0x08000000 /* Freeze when PMM==0 */ | 31 | #define PMLCA_FCM0 0x08000000 /* Freeze when PMM==0 */ |
32 | #define PMLCA_CE 0x04000000 /* Condition Enable */ | 32 | #define PMLCA_CE 0x04000000 /* Condition Enable */ |
33 | 33 | ||
34 | #define PMLCA_EVENT_MASK 0x007f0000 /* Event field */ | 34 | #define PMLCA_EVENT_MASK 0x00ff0000 /* Event field */ |
35 | #define PMLCA_EVENT_SHIFT 16 | 35 | #define PMLCA_EVENT_SHIFT 16 |
36 | 36 | ||
37 | #define PMRN_PMLCB0 0x110 /* PM Local Control B0 */ | 37 | #define PMRN_PMLCB0 0x110 /* PM Local Control B0 */ |
@@ -39,7 +39,7 @@ | |||
39 | #define PMRN_PMLCB2 0x112 /* PM Local Control B2 */ | 39 | #define PMRN_PMLCB2 0x112 /* PM Local Control B2 */ |
40 | #define PMRN_PMLCB3 0x113 /* PM Local Control B3 */ | 40 | #define PMRN_PMLCB3 0x113 /* PM Local Control B3 */ |
41 | 41 | ||
42 | #define PMLCB_THRESHMUL_MASK 0x0700 /* Threshhold Multiple Field */ | 42 | #define PMLCB_THRESHMUL_MASK 0x0700 /* Threshold Multiple Field */ |
43 | #define PMLCB_THRESHMUL_SHIFT 8 | 43 | #define PMLCB_THRESHMUL_SHIFT 8 |
44 | 44 | ||
45 | #define PMLCB_THRESHOLD_MASK 0x003f /* Threshold Field */ | 45 | #define PMLCB_THRESHOLD_MASK 0x003f /* Threshold Field */ |
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h index 168fce726201..20de73c36682 100644 --- a/arch/powerpc/include/asm/rtas.h +++ b/arch/powerpc/include/asm/rtas.h | |||
@@ -58,7 +58,7 @@ struct rtas_t { | |||
58 | unsigned long entry; /* physical address pointer */ | 58 | unsigned long entry; /* physical address pointer */ |
59 | unsigned long base; /* physical address pointer */ | 59 | unsigned long base; /* physical address pointer */ |
60 | unsigned long size; | 60 | unsigned long size; |
61 | raw_spinlock_t lock; | 61 | arch_spinlock_t lock; |
62 | struct rtas_args args; | 62 | struct rtas_args args; |
63 | struct device_node *dev; /* virtual address pointer */ | 63 | struct device_node *dev; /* virtual address pointer */ |
64 | }; | 64 | }; |
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h index d9ea8d39c342..1d3b270d3083 100644 --- a/arch/powerpc/include/asm/smp.h +++ b/arch/powerpc/include/asm/smp.h | |||
@@ -37,7 +37,7 @@ extern void cpu_die(void); | |||
37 | extern void smp_send_debugger_break(int cpu); | 37 | extern void smp_send_debugger_break(int cpu); |
38 | extern void smp_message_recv(int); | 38 | extern void smp_message_recv(int); |
39 | 39 | ||
40 | DECLARE_PER_CPU(unsigned int, pvr); | 40 | DECLARE_PER_CPU(unsigned int, cpu_pvr); |
41 | 41 | ||
42 | #ifdef CONFIG_HOTPLUG_CPU | 42 | #ifdef CONFIG_HOTPLUG_CPU |
43 | extern void fixup_irqs(cpumask_t map); | 43 | extern void fixup_irqs(cpumask_t map); |
diff --git a/arch/powerpc/include/asm/socket.h b/arch/powerpc/include/asm/socket.h index 3ab8b3e6feb0..866f7606da68 100644 --- a/arch/powerpc/include/asm/socket.h +++ b/arch/powerpc/include/asm/socket.h | |||
@@ -67,4 +67,6 @@ | |||
67 | #define SO_PROTOCOL 38 | 67 | #define SO_PROTOCOL 38 |
68 | #define SO_DOMAIN 39 | 68 | #define SO_DOMAIN 39 |
69 | 69 | ||
70 | #define SO_RXQ_OVFL 40 | ||
71 | |||
70 | #endif /* _ASM_POWERPC_SOCKET_H */ | 72 | #endif /* _ASM_POWERPC_SOCKET_H */ |
diff --git a/arch/powerpc/include/asm/spinlock.h b/arch/powerpc/include/asm/spinlock.h index 198266cf9e2d..f9611bd69ed2 100644 --- a/arch/powerpc/include/asm/spinlock.h +++ b/arch/powerpc/include/asm/spinlock.h | |||
@@ -27,8 +27,9 @@ | |||
27 | #endif | 27 | #endif |
28 | #include <asm/asm-compat.h> | 28 | #include <asm/asm-compat.h> |
29 | #include <asm/synch.h> | 29 | #include <asm/synch.h> |
30 | #include <asm/ppc-opcode.h> | ||
30 | 31 | ||
31 | #define __raw_spin_is_locked(x) ((x)->slock != 0) | 32 | #define arch_spin_is_locked(x) ((x)->slock != 0) |
32 | 33 | ||
33 | #ifdef CONFIG_PPC64 | 34 | #ifdef CONFIG_PPC64 |
34 | /* use 0x800000yy when locked, where yy == CPU number */ | 35 | /* use 0x800000yy when locked, where yy == CPU number */ |
@@ -54,29 +55,30 @@ | |||
54 | * This returns the old value in the lock, so we succeeded | 55 | * This returns the old value in the lock, so we succeeded |
55 | * in getting the lock if the return value is 0. | 56 | * in getting the lock if the return value is 0. |
56 | */ | 57 | */ |
57 | static inline unsigned long arch_spin_trylock(raw_spinlock_t *lock) | 58 | static inline unsigned long __arch_spin_trylock(arch_spinlock_t *lock) |
58 | { | 59 | { |
59 | unsigned long tmp, token; | 60 | unsigned long tmp, token; |
60 | 61 | ||
61 | token = LOCK_TOKEN; | 62 | token = LOCK_TOKEN; |
62 | __asm__ __volatile__( | 63 | __asm__ __volatile__( |
63 | "1: lwarx %0,0,%2\n\ | 64 | "1: " PPC_LWARX(%0,0,%2,1) "\n\ |
64 | cmpwi 0,%0,0\n\ | 65 | cmpwi 0,%0,0\n\ |
65 | bne- 2f\n\ | 66 | bne- 2f\n\ |
66 | stwcx. %1,0,%2\n\ | 67 | stwcx. %1,0,%2\n\ |
67 | bne- 1b\n\ | 68 | bne- 1b\n" |
68 | isync\n\ | 69 | PPC_ACQUIRE_BARRIER |
69 | 2:" : "=&r" (tmp) | 70 | "2:" |
71 | : "=&r" (tmp) | ||
70 | : "r" (token), "r" (&lock->slock) | 72 | : "r" (token), "r" (&lock->slock) |
71 | : "cr0", "memory"); | 73 | : "cr0", "memory"); |
72 | 74 | ||
73 | return tmp; | 75 | return tmp; |
74 | } | 76 | } |
75 | 77 | ||
76 | static inline int __raw_spin_trylock(raw_spinlock_t *lock) | 78 | static inline int arch_spin_trylock(arch_spinlock_t *lock) |
77 | { | 79 | { |
78 | CLEAR_IO_SYNC; | 80 | CLEAR_IO_SYNC; |
79 | return arch_spin_trylock(lock) == 0; | 81 | return __arch_spin_trylock(lock) == 0; |
80 | } | 82 | } |
81 | 83 | ||
82 | /* | 84 | /* |
@@ -96,19 +98,19 @@ static inline int __raw_spin_trylock(raw_spinlock_t *lock) | |||
96 | #if defined(CONFIG_PPC_SPLPAR) || defined(CONFIG_PPC_ISERIES) | 98 | #if defined(CONFIG_PPC_SPLPAR) || defined(CONFIG_PPC_ISERIES) |
97 | /* We only yield to the hypervisor if we are in shared processor mode */ | 99 | /* We only yield to the hypervisor if we are in shared processor mode */ |
98 | #define SHARED_PROCESSOR (get_lppaca()->shared_proc) | 100 | #define SHARED_PROCESSOR (get_lppaca()->shared_proc) |
99 | extern void __spin_yield(raw_spinlock_t *lock); | 101 | extern void __spin_yield(arch_spinlock_t *lock); |
100 | extern void __rw_yield(raw_rwlock_t *lock); | 102 | extern void __rw_yield(arch_rwlock_t *lock); |
101 | #else /* SPLPAR || ISERIES */ | 103 | #else /* SPLPAR || ISERIES */ |
102 | #define __spin_yield(x) barrier() | 104 | #define __spin_yield(x) barrier() |
103 | #define __rw_yield(x) barrier() | 105 | #define __rw_yield(x) barrier() |
104 | #define SHARED_PROCESSOR 0 | 106 | #define SHARED_PROCESSOR 0 |
105 | #endif | 107 | #endif |
106 | 108 | ||
107 | static inline void __raw_spin_lock(raw_spinlock_t *lock) | 109 | static inline void arch_spin_lock(arch_spinlock_t *lock) |
108 | { | 110 | { |
109 | CLEAR_IO_SYNC; | 111 | CLEAR_IO_SYNC; |
110 | while (1) { | 112 | while (1) { |
111 | if (likely(arch_spin_trylock(lock) == 0)) | 113 | if (likely(__arch_spin_trylock(lock) == 0)) |
112 | break; | 114 | break; |
113 | do { | 115 | do { |
114 | HMT_low(); | 116 | HMT_low(); |
@@ -120,13 +122,13 @@ static inline void __raw_spin_lock(raw_spinlock_t *lock) | |||
120 | } | 122 | } |
121 | 123 | ||
122 | static inline | 124 | static inline |
123 | void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags) | 125 | void arch_spin_lock_flags(arch_spinlock_t *lock, unsigned long flags) |
124 | { | 126 | { |
125 | unsigned long flags_dis; | 127 | unsigned long flags_dis; |
126 | 128 | ||
127 | CLEAR_IO_SYNC; | 129 | CLEAR_IO_SYNC; |
128 | while (1) { | 130 | while (1) { |
129 | if (likely(arch_spin_trylock(lock) == 0)) | 131 | if (likely(__arch_spin_trylock(lock) == 0)) |
130 | break; | 132 | break; |
131 | local_save_flags(flags_dis); | 133 | local_save_flags(flags_dis); |
132 | local_irq_restore(flags); | 134 | local_irq_restore(flags); |
@@ -140,19 +142,19 @@ void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags) | |||
140 | } | 142 | } |
141 | } | 143 | } |
142 | 144 | ||
143 | static inline void __raw_spin_unlock(raw_spinlock_t *lock) | 145 | static inline void arch_spin_unlock(arch_spinlock_t *lock) |
144 | { | 146 | { |
145 | SYNC_IO; | 147 | SYNC_IO; |
146 | __asm__ __volatile__("# __raw_spin_unlock\n\t" | 148 | __asm__ __volatile__("# arch_spin_unlock\n\t" |
147 | LWSYNC_ON_SMP: : :"memory"); | 149 | PPC_RELEASE_BARRIER: : :"memory"); |
148 | lock->slock = 0; | 150 | lock->slock = 0; |
149 | } | 151 | } |
150 | 152 | ||
151 | #ifdef CONFIG_PPC64 | 153 | #ifdef CONFIG_PPC64 |
152 | extern void __raw_spin_unlock_wait(raw_spinlock_t *lock); | 154 | extern void arch_spin_unlock_wait(arch_spinlock_t *lock); |
153 | #else | 155 | #else |
154 | #define __raw_spin_unlock_wait(lock) \ | 156 | #define arch_spin_unlock_wait(lock) \ |
155 | do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0) | 157 | do { while (arch_spin_is_locked(lock)) cpu_relax(); } while (0) |
156 | #endif | 158 | #endif |
157 | 159 | ||
158 | /* | 160 | /* |
@@ -166,8 +168,8 @@ extern void __raw_spin_unlock_wait(raw_spinlock_t *lock); | |||
166 | * read-locks. | 168 | * read-locks. |
167 | */ | 169 | */ |
168 | 170 | ||
169 | #define __raw_read_can_lock(rw) ((rw)->lock >= 0) | 171 | #define arch_read_can_lock(rw) ((rw)->lock >= 0) |
170 | #define __raw_write_can_lock(rw) (!(rw)->lock) | 172 | #define arch_write_can_lock(rw) (!(rw)->lock) |
171 | 173 | ||
172 | #ifdef CONFIG_PPC64 | 174 | #ifdef CONFIG_PPC64 |
173 | #define __DO_SIGN_EXTEND "extsw %0,%0\n" | 175 | #define __DO_SIGN_EXTEND "extsw %0,%0\n" |
@@ -181,20 +183,20 @@ extern void __raw_spin_unlock_wait(raw_spinlock_t *lock); | |||
181 | * This returns the old value in the lock + 1, | 183 | * This returns the old value in the lock + 1, |
182 | * so we got a read lock if the return value is > 0. | 184 | * so we got a read lock if the return value is > 0. |
183 | */ | 185 | */ |
184 | static inline long arch_read_trylock(raw_rwlock_t *rw) | 186 | static inline long __arch_read_trylock(arch_rwlock_t *rw) |
185 | { | 187 | { |
186 | long tmp; | 188 | long tmp; |
187 | 189 | ||
188 | __asm__ __volatile__( | 190 | __asm__ __volatile__( |
189 | "1: lwarx %0,0,%1\n" | 191 | "1: " PPC_LWARX(%0,0,%1,1) "\n" |
190 | __DO_SIGN_EXTEND | 192 | __DO_SIGN_EXTEND |
191 | " addic. %0,%0,1\n\ | 193 | " addic. %0,%0,1\n\ |
192 | ble- 2f\n" | 194 | ble- 2f\n" |
193 | PPC405_ERR77(0,%1) | 195 | PPC405_ERR77(0,%1) |
194 | " stwcx. %0,0,%1\n\ | 196 | " stwcx. %0,0,%1\n\ |
195 | bne- 1b\n\ | 197 | bne- 1b\n" |
196 | isync\n\ | 198 | PPC_ACQUIRE_BARRIER |
197 | 2:" : "=&r" (tmp) | 199 | "2:" : "=&r" (tmp) |
198 | : "r" (&rw->lock) | 200 | : "r" (&rw->lock) |
199 | : "cr0", "xer", "memory"); | 201 | : "cr0", "xer", "memory"); |
200 | 202 | ||
@@ -205,30 +207,30 @@ static inline long arch_read_trylock(raw_rwlock_t *rw) | |||
205 | * This returns the old value in the lock, | 207 | * This returns the old value in the lock, |
206 | * so we got the write lock if the return value is 0. | 208 | * so we got the write lock if the return value is 0. |
207 | */ | 209 | */ |
208 | static inline long arch_write_trylock(raw_rwlock_t *rw) | 210 | static inline long __arch_write_trylock(arch_rwlock_t *rw) |
209 | { | 211 | { |
210 | long tmp, token; | 212 | long tmp, token; |
211 | 213 | ||
212 | token = WRLOCK_TOKEN; | 214 | token = WRLOCK_TOKEN; |
213 | __asm__ __volatile__( | 215 | __asm__ __volatile__( |
214 | "1: lwarx %0,0,%2\n\ | 216 | "1: " PPC_LWARX(%0,0,%2,1) "\n\ |
215 | cmpwi 0,%0,0\n\ | 217 | cmpwi 0,%0,0\n\ |
216 | bne- 2f\n" | 218 | bne- 2f\n" |
217 | PPC405_ERR77(0,%1) | 219 | PPC405_ERR77(0,%1) |
218 | " stwcx. %1,0,%2\n\ | 220 | " stwcx. %1,0,%2\n\ |
219 | bne- 1b\n\ | 221 | bne- 1b\n" |
220 | isync\n\ | 222 | PPC_ACQUIRE_BARRIER |
221 | 2:" : "=&r" (tmp) | 223 | "2:" : "=&r" (tmp) |
222 | : "r" (token), "r" (&rw->lock) | 224 | : "r" (token), "r" (&rw->lock) |
223 | : "cr0", "memory"); | 225 | : "cr0", "memory"); |
224 | 226 | ||
225 | return tmp; | 227 | return tmp; |
226 | } | 228 | } |
227 | 229 | ||
228 | static inline void __raw_read_lock(raw_rwlock_t *rw) | 230 | static inline void arch_read_lock(arch_rwlock_t *rw) |
229 | { | 231 | { |
230 | while (1) { | 232 | while (1) { |
231 | if (likely(arch_read_trylock(rw) > 0)) | 233 | if (likely(__arch_read_trylock(rw) > 0)) |
232 | break; | 234 | break; |
233 | do { | 235 | do { |
234 | HMT_low(); | 236 | HMT_low(); |
@@ -239,10 +241,10 @@ static inline void __raw_read_lock(raw_rwlock_t *rw) | |||
239 | } | 241 | } |
240 | } | 242 | } |
241 | 243 | ||
242 | static inline void __raw_write_lock(raw_rwlock_t *rw) | 244 | static inline void arch_write_lock(arch_rwlock_t *rw) |
243 | { | 245 | { |
244 | while (1) { | 246 | while (1) { |
245 | if (likely(arch_write_trylock(rw) == 0)) | 247 | if (likely(__arch_write_trylock(rw) == 0)) |
246 | break; | 248 | break; |
247 | do { | 249 | do { |
248 | HMT_low(); | 250 | HMT_low(); |
@@ -253,23 +255,23 @@ static inline void __raw_write_lock(raw_rwlock_t *rw) | |||
253 | } | 255 | } |
254 | } | 256 | } |
255 | 257 | ||
256 | static inline int __raw_read_trylock(raw_rwlock_t *rw) | 258 | static inline int arch_read_trylock(arch_rwlock_t *rw) |
257 | { | 259 | { |
258 | return arch_read_trylock(rw) > 0; | 260 | return __arch_read_trylock(rw) > 0; |
259 | } | 261 | } |
260 | 262 | ||
261 | static inline int __raw_write_trylock(raw_rwlock_t *rw) | 263 | static inline int arch_write_trylock(arch_rwlock_t *rw) |
262 | { | 264 | { |
263 | return arch_write_trylock(rw) == 0; | 265 | return __arch_write_trylock(rw) == 0; |
264 | } | 266 | } |
265 | 267 | ||
266 | static inline void __raw_read_unlock(raw_rwlock_t *rw) | 268 | static inline void arch_read_unlock(arch_rwlock_t *rw) |
267 | { | 269 | { |
268 | long tmp; | 270 | long tmp; |
269 | 271 | ||
270 | __asm__ __volatile__( | 272 | __asm__ __volatile__( |
271 | "# read_unlock\n\t" | 273 | "# read_unlock\n\t" |
272 | LWSYNC_ON_SMP | 274 | PPC_RELEASE_BARRIER |
273 | "1: lwarx %0,0,%1\n\ | 275 | "1: lwarx %0,0,%1\n\ |
274 | addic %0,%0,-1\n" | 276 | addic %0,%0,-1\n" |
275 | PPC405_ERR77(0,%1) | 277 | PPC405_ERR77(0,%1) |
@@ -280,19 +282,19 @@ static inline void __raw_read_unlock(raw_rwlock_t *rw) | |||
280 | : "cr0", "xer", "memory"); | 282 | : "cr0", "xer", "memory"); |
281 | } | 283 | } |
282 | 284 | ||
283 | static inline void __raw_write_unlock(raw_rwlock_t *rw) | 285 | static inline void arch_write_unlock(arch_rwlock_t *rw) |
284 | { | 286 | { |
285 | __asm__ __volatile__("# write_unlock\n\t" | 287 | __asm__ __volatile__("# write_unlock\n\t" |
286 | LWSYNC_ON_SMP: : :"memory"); | 288 | PPC_RELEASE_BARRIER: : :"memory"); |
287 | rw->lock = 0; | 289 | rw->lock = 0; |
288 | } | 290 | } |
289 | 291 | ||
290 | #define __raw_read_lock_flags(lock, flags) __raw_read_lock(lock) | 292 | #define arch_read_lock_flags(lock, flags) arch_read_lock(lock) |
291 | #define __raw_write_lock_flags(lock, flags) __raw_write_lock(lock) | 293 | #define arch_write_lock_flags(lock, flags) arch_write_lock(lock) |
292 | 294 | ||
293 | #define _raw_spin_relax(lock) __spin_yield(lock) | 295 | #define arch_spin_relax(lock) __spin_yield(lock) |
294 | #define _raw_read_relax(lock) __rw_yield(lock) | 296 | #define arch_read_relax(lock) __rw_yield(lock) |
295 | #define _raw_write_relax(lock) __rw_yield(lock) | 297 | #define arch_write_relax(lock) __rw_yield(lock) |
296 | 298 | ||
297 | #endif /* __KERNEL__ */ | 299 | #endif /* __KERNEL__ */ |
298 | #endif /* __ASM_SPINLOCK_H */ | 300 | #endif /* __ASM_SPINLOCK_H */ |
diff --git a/arch/powerpc/include/asm/spinlock_types.h b/arch/powerpc/include/asm/spinlock_types.h index 74236c9f05b1..2351adc4fdc4 100644 --- a/arch/powerpc/include/asm/spinlock_types.h +++ b/arch/powerpc/include/asm/spinlock_types.h | |||
@@ -7,14 +7,14 @@ | |||
7 | 7 | ||
8 | typedef struct { | 8 | typedef struct { |
9 | volatile unsigned int slock; | 9 | volatile unsigned int slock; |
10 | } raw_spinlock_t; | 10 | } arch_spinlock_t; |
11 | 11 | ||
12 | #define __RAW_SPIN_LOCK_UNLOCKED { 0 } | 12 | #define __ARCH_SPIN_LOCK_UNLOCKED { 0 } |
13 | 13 | ||
14 | typedef struct { | 14 | typedef struct { |
15 | volatile signed int lock; | 15 | volatile signed int lock; |
16 | } raw_rwlock_t; | 16 | } arch_rwlock_t; |
17 | 17 | ||
18 | #define __RAW_RW_LOCK_UNLOCKED { 0 } | 18 | #define __ARCH_RW_LOCK_UNLOCKED { 0 } |
19 | 19 | ||
20 | #endif | 20 | #endif |
diff --git a/arch/powerpc/include/asm/synch.h b/arch/powerpc/include/asm/synch.h index 28f6ddbff4cf..d7cab44643c5 100644 --- a/arch/powerpc/include/asm/synch.h +++ b/arch/powerpc/include/asm/synch.h | |||
@@ -37,11 +37,15 @@ static inline void isync(void) | |||
37 | #endif | 37 | #endif |
38 | 38 | ||
39 | #ifdef CONFIG_SMP | 39 | #ifdef CONFIG_SMP |
40 | #define ISYNC_ON_SMP "\n\tisync\n" | 40 | #define __PPC_ACQUIRE_BARRIER \ |
41 | #define LWSYNC_ON_SMP stringify_in_c(LWSYNC) "\n" | 41 | START_LWSYNC_SECTION(97); \ |
42 | isync; \ | ||
43 | MAKE_LWSYNC_SECTION_ENTRY(97, __lwsync_fixup); | ||
44 | #define PPC_ACQUIRE_BARRIER "\n" stringify_in_c(__PPC_ACQUIRE_BARRIER) | ||
45 | #define PPC_RELEASE_BARRIER stringify_in_c(LWSYNC) "\n" | ||
42 | #else | 46 | #else |
43 | #define ISYNC_ON_SMP | 47 | #define PPC_ACQUIRE_BARRIER |
44 | #define LWSYNC_ON_SMP | 48 | #define PPC_RELEASE_BARRIER |
45 | #endif | 49 | #endif |
46 | 50 | ||
47 | #endif /* __KERNEL__ */ | 51 | #endif /* __KERNEL__ */ |
diff --git a/arch/powerpc/include/asm/syscall.h b/arch/powerpc/include/asm/syscall.h index efa7f0b879f3..23913e902fc3 100644 --- a/arch/powerpc/include/asm/syscall.h +++ b/arch/powerpc/include/asm/syscall.h | |||
@@ -30,7 +30,7 @@ static inline void syscall_rollback(struct task_struct *task, | |||
30 | static inline long syscall_get_error(struct task_struct *task, | 30 | static inline long syscall_get_error(struct task_struct *task, |
31 | struct pt_regs *regs) | 31 | struct pt_regs *regs) |
32 | { | 32 | { |
33 | return (regs->ccr & 0x1000) ? -regs->gpr[3] : 0; | 33 | return (regs->ccr & 0x10000000) ? -regs->gpr[3] : 0; |
34 | } | 34 | } |
35 | 35 | ||
36 | static inline long syscall_get_return_value(struct task_struct *task, | 36 | static inline long syscall_get_return_value(struct task_struct *task, |
@@ -44,10 +44,10 @@ static inline void syscall_set_return_value(struct task_struct *task, | |||
44 | int error, long val) | 44 | int error, long val) |
45 | { | 45 | { |
46 | if (error) { | 46 | if (error) { |
47 | regs->ccr |= 0x1000L; | 47 | regs->ccr |= 0x10000000L; |
48 | regs->gpr[3] = -error; | 48 | regs->gpr[3] = -error; |
49 | } else { | 49 | } else { |
50 | regs->ccr &= ~0x1000L; | 50 | regs->ccr &= ~0x10000000L; |
51 | regs->gpr[3] = val; | 51 | regs->gpr[3] = val; |
52 | } | 52 | } |
53 | } | 53 | } |
diff --git a/arch/powerpc/include/asm/syscalls.h b/arch/powerpc/include/asm/syscalls.h index eb8eb400c664..4084e567d28e 100644 --- a/arch/powerpc/include/asm/syscalls.h +++ b/arch/powerpc/include/asm/syscalls.h | |||
@@ -7,7 +7,6 @@ | |||
7 | #include <linux/types.h> | 7 | #include <linux/types.h> |
8 | #include <asm/signal.h> | 8 | #include <asm/signal.h> |
9 | 9 | ||
10 | struct new_utsname; | ||
11 | struct pt_regs; | 10 | struct pt_regs; |
12 | struct rtas_args; | 11 | struct rtas_args; |
13 | struct sigaction; | 12 | struct sigaction; |
@@ -35,12 +34,9 @@ asmlinkage long sys_pipe2(int __user *fildes, int flags); | |||
35 | asmlinkage long sys_rt_sigaction(int sig, | 34 | asmlinkage long sys_rt_sigaction(int sig, |
36 | const struct sigaction __user *act, | 35 | const struct sigaction __user *act, |
37 | struct sigaction __user *oact, size_t sigsetsize); | 36 | struct sigaction __user *oact, size_t sigsetsize); |
38 | asmlinkage int sys_ipc(uint call, int first, unsigned long second, | ||
39 | long third, void __user *ptr, long fifth); | ||
40 | asmlinkage long ppc64_personality(unsigned long personality); | 37 | asmlinkage long ppc64_personality(unsigned long personality); |
41 | asmlinkage int ppc_rtas(struct rtas_args __user *uargs); | 38 | asmlinkage int ppc_rtas(struct rtas_args __user *uargs); |
42 | asmlinkage time_t sys64_time(time_t __user * tloc); | 39 | asmlinkage time_t sys64_time(time_t __user * tloc); |
43 | asmlinkage long ppc_newuname(struct new_utsname __user * name); | ||
44 | 40 | ||
45 | asmlinkage long sys_rt_sigsuspend(sigset_t __user *unewset, | 41 | asmlinkage long sys_rt_sigsuspend(sigset_t __user *unewset, |
46 | size_t sigsetsize); | 42 | size_t sigsetsize); |
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h index c7d671a7d9a1..a5ee345b6a5c 100644 --- a/arch/powerpc/include/asm/systbl.h +++ b/arch/powerpc/include/asm/systbl.h | |||
@@ -125,7 +125,7 @@ SYSCALL_SPU(fsync) | |||
125 | SYS32ONLY(sigreturn) | 125 | SYS32ONLY(sigreturn) |
126 | PPC_SYS(clone) | 126 | PPC_SYS(clone) |
127 | COMPAT_SYS_SPU(setdomainname) | 127 | COMPAT_SYS_SPU(setdomainname) |
128 | PPC_SYS_SPU(newuname) | 128 | SYSCALL_SPU(newuname) |
129 | SYSCALL(ni_syscall) | 129 | SYSCALL(ni_syscall) |
130 | COMPAT_SYS_SPU(adjtimex) | 130 | COMPAT_SYS_SPU(adjtimex) |
131 | SYSCALL_SPU(mprotect) | 131 | SYSCALL_SPU(mprotect) |
@@ -145,7 +145,7 @@ SYSCALL_SPU(setfsuid) | |||
145 | SYSCALL_SPU(setfsgid) | 145 | SYSCALL_SPU(setfsgid) |
146 | SYSCALL_SPU(llseek) | 146 | SYSCALL_SPU(llseek) |
147 | COMPAT_SYS_SPU(getdents) | 147 | COMPAT_SYS_SPU(getdents) |
148 | SYSX_SPU(sys_select,ppc32_select,ppc_select) | 148 | SYSX_SPU(sys_select,ppc32_select,sys_select) |
149 | SYSCALL_SPU(flock) | 149 | SYSCALL_SPU(flock) |
150 | SYSCALL_SPU(msync) | 150 | SYSCALL_SPU(msync) |
151 | COMPAT_SYS_SPU(readv) | 151 | COMPAT_SYS_SPU(readv) |
diff --git a/arch/powerpc/include/asm/system.h b/arch/powerpc/include/asm/system.h index bb8e006a47c6..a6297c67c3d6 100644 --- a/arch/powerpc/include/asm/system.h +++ b/arch/powerpc/include/asm/system.h | |||
@@ -112,8 +112,13 @@ static inline int debugger_fault_handler(struct pt_regs *regs) { return 0; } | |||
112 | #endif | 112 | #endif |
113 | 113 | ||
114 | extern int set_dabr(unsigned long dabr); | 114 | extern int set_dabr(unsigned long dabr); |
115 | #ifdef CONFIG_PPC_ADV_DEBUG_REGS | ||
116 | extern void do_send_trap(struct pt_regs *regs, unsigned long address, | ||
117 | unsigned long error_code, int signal_code, int brkpt); | ||
118 | #else | ||
115 | extern void do_dabr(struct pt_regs *regs, unsigned long address, | 119 | extern void do_dabr(struct pt_regs *regs, unsigned long address, |
116 | unsigned long error_code); | 120 | unsigned long error_code); |
121 | #endif | ||
117 | extern void print_backtrace(unsigned long *); | 122 | extern void print_backtrace(unsigned long *); |
118 | extern void show_regs(struct pt_regs * regs); | 123 | extern void show_regs(struct pt_regs * regs); |
119 | extern void flush_instruction_cache(void); | 124 | extern void flush_instruction_cache(void); |
@@ -232,12 +237,12 @@ __xchg_u32(volatile void *p, unsigned long val) | |||
232 | unsigned long prev; | 237 | unsigned long prev; |
233 | 238 | ||
234 | __asm__ __volatile__( | 239 | __asm__ __volatile__( |
235 | LWSYNC_ON_SMP | 240 | PPC_RELEASE_BARRIER |
236 | "1: lwarx %0,0,%2 \n" | 241 | "1: lwarx %0,0,%2 \n" |
237 | PPC405_ERR77(0,%2) | 242 | PPC405_ERR77(0,%2) |
238 | " stwcx. %3,0,%2 \n\ | 243 | " stwcx. %3,0,%2 \n\ |
239 | bne- 1b" | 244 | bne- 1b" |
240 | ISYNC_ON_SMP | 245 | PPC_ACQUIRE_BARRIER |
241 | : "=&r" (prev), "+m" (*(volatile unsigned int *)p) | 246 | : "=&r" (prev), "+m" (*(volatile unsigned int *)p) |
242 | : "r" (p), "r" (val) | 247 | : "r" (p), "r" (val) |
243 | : "cc", "memory"); | 248 | : "cc", "memory"); |
@@ -275,12 +280,12 @@ __xchg_u64(volatile void *p, unsigned long val) | |||
275 | unsigned long prev; | 280 | unsigned long prev; |
276 | 281 | ||
277 | __asm__ __volatile__( | 282 | __asm__ __volatile__( |
278 | LWSYNC_ON_SMP | 283 | PPC_RELEASE_BARRIER |
279 | "1: ldarx %0,0,%2 \n" | 284 | "1: ldarx %0,0,%2 \n" |
280 | PPC405_ERR77(0,%2) | 285 | PPC405_ERR77(0,%2) |
281 | " stdcx. %3,0,%2 \n\ | 286 | " stdcx. %3,0,%2 \n\ |
282 | bne- 1b" | 287 | bne- 1b" |
283 | ISYNC_ON_SMP | 288 | PPC_ACQUIRE_BARRIER |
284 | : "=&r" (prev), "+m" (*(volatile unsigned long *)p) | 289 | : "=&r" (prev), "+m" (*(volatile unsigned long *)p) |
285 | : "r" (p), "r" (val) | 290 | : "r" (p), "r" (val) |
286 | : "cc", "memory"); | 291 | : "cc", "memory"); |
@@ -366,14 +371,14 @@ __cmpxchg_u32(volatile unsigned int *p, unsigned long old, unsigned long new) | |||
366 | unsigned int prev; | 371 | unsigned int prev; |
367 | 372 | ||
368 | __asm__ __volatile__ ( | 373 | __asm__ __volatile__ ( |
369 | LWSYNC_ON_SMP | 374 | PPC_RELEASE_BARRIER |
370 | "1: lwarx %0,0,%2 # __cmpxchg_u32\n\ | 375 | "1: lwarx %0,0,%2 # __cmpxchg_u32\n\ |
371 | cmpw 0,%0,%3\n\ | 376 | cmpw 0,%0,%3\n\ |
372 | bne- 2f\n" | 377 | bne- 2f\n" |
373 | PPC405_ERR77(0,%2) | 378 | PPC405_ERR77(0,%2) |
374 | " stwcx. %4,0,%2\n\ | 379 | " stwcx. %4,0,%2\n\ |
375 | bne- 1b" | 380 | bne- 1b" |
376 | ISYNC_ON_SMP | 381 | PPC_ACQUIRE_BARRIER |
377 | "\n\ | 382 | "\n\ |
378 | 2:" | 383 | 2:" |
379 | : "=&r" (prev), "+m" (*p) | 384 | : "=&r" (prev), "+m" (*p) |
@@ -412,13 +417,13 @@ __cmpxchg_u64(volatile unsigned long *p, unsigned long old, unsigned long new) | |||
412 | unsigned long prev; | 417 | unsigned long prev; |
413 | 418 | ||
414 | __asm__ __volatile__ ( | 419 | __asm__ __volatile__ ( |
415 | LWSYNC_ON_SMP | 420 | PPC_RELEASE_BARRIER |
416 | "1: ldarx %0,0,%2 # __cmpxchg_u64\n\ | 421 | "1: ldarx %0,0,%2 # __cmpxchg_u64\n\ |
417 | cmpd 0,%0,%3\n\ | 422 | cmpd 0,%0,%3\n\ |
418 | bne- 2f\n\ | 423 | bne- 2f\n\ |
419 | stdcx. %4,0,%2\n\ | 424 | stdcx. %4,0,%2\n\ |
420 | bne- 1b" | 425 | bne- 1b" |
421 | ISYNC_ON_SMP | 426 | PPC_ACQUIRE_BARRIER |
422 | "\n\ | 427 | "\n\ |
423 | 2:" | 428 | 2:" |
424 | : "=&r" (prev), "+m" (*p) | 429 | : "=&r" (prev), "+m" (*p) |
diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h index c8b329255678..aa9d383a1c09 100644 --- a/arch/powerpc/include/asm/thread_info.h +++ b/arch/powerpc/include/asm/thread_info.h | |||
@@ -111,7 +111,6 @@ static inline struct thread_info *current_thread_info(void) | |||
111 | #define TIF_NOTIFY_RESUME 13 /* callback before returning to user */ | 111 | #define TIF_NOTIFY_RESUME 13 /* callback before returning to user */ |
112 | #define TIF_FREEZE 14 /* Freezing for suspend */ | 112 | #define TIF_FREEZE 14 /* Freezing for suspend */ |
113 | #define TIF_RUNLATCH 15 /* Is the runlatch enabled? */ | 113 | #define TIF_RUNLATCH 15 /* Is the runlatch enabled? */ |
114 | #define TIF_ABI_PENDING 16 /* 32/64 bit switch needed */ | ||
115 | 114 | ||
116 | /* as above, but as bit values */ | 115 | /* as above, but as bit values */ |
117 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) | 116 | #define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) |
@@ -129,7 +128,6 @@ static inline struct thread_info *current_thread_info(void) | |||
129 | #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) | 128 | #define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) |
130 | #define _TIF_FREEZE (1<<TIF_FREEZE) | 129 | #define _TIF_FREEZE (1<<TIF_FREEZE) |
131 | #define _TIF_RUNLATCH (1<<TIF_RUNLATCH) | 130 | #define _TIF_RUNLATCH (1<<TIF_RUNLATCH) |
132 | #define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING) | ||
133 | #define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP) | 131 | #define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP) |
134 | 132 | ||
135 | #define _TIF_USER_WORK_MASK (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \ | 133 | #define _TIF_USER_WORK_MASK (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \ |
diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm/topology.h index 22f738d12ad9..8eaec310a25b 100644 --- a/arch/powerpc/include/asm/topology.h +++ b/arch/powerpc/include/asm/topology.h | |||
@@ -17,7 +17,9 @@ static inline int cpu_to_node(int cpu) | |||
17 | 17 | ||
18 | #define parent_node(node) (node) | 18 | #define parent_node(node) (node) |
19 | 19 | ||
20 | #define cpumask_of_node(node) (&numa_cpumask_lookup_table[node]) | 20 | #define cpumask_of_node(node) ((node) == -1 ? \ |
21 | cpu_all_mask : \ | ||
22 | &numa_cpumask_lookup_table[node]) | ||
21 | 23 | ||
22 | int of_node_to_nid(struct device_node *device); | 24 | int of_node_to_nid(struct device_node *device); |
23 | 25 | ||
@@ -36,27 +38,33 @@ static inline int pcibus_to_node(struct pci_bus *bus) | |||
36 | cpumask_of_node(pcibus_to_node(bus))) | 38 | cpumask_of_node(pcibus_to_node(bus))) |
37 | 39 | ||
38 | /* sched_domains SD_NODE_INIT for PPC64 machines */ | 40 | /* sched_domains SD_NODE_INIT for PPC64 machines */ |
39 | #define SD_NODE_INIT (struct sched_domain) { \ | 41 | #define SD_NODE_INIT (struct sched_domain) { \ |
40 | .parent = NULL, \ | 42 | .min_interval = 8, \ |
41 | .child = NULL, \ | 43 | .max_interval = 32, \ |
42 | .groups = NULL, \ | 44 | .busy_factor = 32, \ |
43 | .min_interval = 8, \ | 45 | .imbalance_pct = 125, \ |
44 | .max_interval = 32, \ | 46 | .cache_nice_tries = 1, \ |
45 | .busy_factor = 32, \ | 47 | .busy_idx = 3, \ |
46 | .imbalance_pct = 125, \ | 48 | .idle_idx = 1, \ |
47 | .cache_nice_tries = 1, \ | 49 | .newidle_idx = 0, \ |
48 | .busy_idx = 3, \ | 50 | .wake_idx = 0, \ |
49 | .idle_idx = 1, \ | 51 | .forkexec_idx = 0, \ |
50 | .newidle_idx = 0, \ | 52 | \ |
51 | .wake_idx = 0, \ | 53 | .flags = 1*SD_LOAD_BALANCE \ |
52 | .flags = SD_LOAD_BALANCE \ | 54 | | 1*SD_BALANCE_NEWIDLE \ |
53 | | SD_BALANCE_EXEC \ | 55 | | 1*SD_BALANCE_EXEC \ |
54 | | SD_BALANCE_FORK \ | 56 | | 1*SD_BALANCE_FORK \ |
55 | | SD_BALANCE_NEWIDLE \ | 57 | | 0*SD_BALANCE_WAKE \ |
56 | | SD_SERIALIZE, \ | 58 | | 0*SD_WAKE_AFFINE \ |
57 | .last_balance = jiffies, \ | 59 | | 0*SD_PREFER_LOCAL \ |
58 | .balance_interval = 1, \ | 60 | | 0*SD_SHARE_CPUPOWER \ |
59 | .nr_balance_failed = 0, \ | 61 | | 0*SD_POWERSAVINGS_BALANCE \ |
62 | | 0*SD_SHARE_PKG_RESOURCES \ | ||
63 | | 1*SD_SERIALIZE \ | ||
64 | | 0*SD_PREFER_SIBLING \ | ||
65 | , \ | ||
66 | .last_balance = jiffies, \ | ||
67 | .balance_interval = 1, \ | ||
60 | } | 68 | } |
61 | 69 | ||
62 | extern void __init dump_numa_cpu_topology(void); | 70 | extern void __init dump_numa_cpu_topology(void); |
diff --git a/arch/powerpc/include/asm/trace.h b/arch/powerpc/include/asm/trace.h new file mode 100644 index 000000000000..cbe2297d68b6 --- /dev/null +++ b/arch/powerpc/include/asm/trace.h | |||
@@ -0,0 +1,133 @@ | |||
1 | #undef TRACE_SYSTEM | ||
2 | #define TRACE_SYSTEM powerpc | ||
3 | |||
4 | #if !defined(_TRACE_POWERPC_H) || defined(TRACE_HEADER_MULTI_READ) | ||
5 | #define _TRACE_POWERPC_H | ||
6 | |||
7 | #include <linux/tracepoint.h> | ||
8 | |||
9 | struct pt_regs; | ||
10 | |||
11 | TRACE_EVENT(irq_entry, | ||
12 | |||
13 | TP_PROTO(struct pt_regs *regs), | ||
14 | |||
15 | TP_ARGS(regs), | ||
16 | |||
17 | TP_STRUCT__entry( | ||
18 | __field(struct pt_regs *, regs) | ||
19 | ), | ||
20 | |||
21 | TP_fast_assign( | ||
22 | __entry->regs = regs; | ||
23 | ), | ||
24 | |||
25 | TP_printk("pt_regs=%p", __entry->regs) | ||
26 | ); | ||
27 | |||
28 | TRACE_EVENT(irq_exit, | ||
29 | |||
30 | TP_PROTO(struct pt_regs *regs), | ||
31 | |||
32 | TP_ARGS(regs), | ||
33 | |||
34 | TP_STRUCT__entry( | ||
35 | __field(struct pt_regs *, regs) | ||
36 | ), | ||
37 | |||
38 | TP_fast_assign( | ||
39 | __entry->regs = regs; | ||
40 | ), | ||
41 | |||
42 | TP_printk("pt_regs=%p", __entry->regs) | ||
43 | ); | ||
44 | |||
45 | TRACE_EVENT(timer_interrupt_entry, | ||
46 | |||
47 | TP_PROTO(struct pt_regs *regs), | ||
48 | |||
49 | TP_ARGS(regs), | ||
50 | |||
51 | TP_STRUCT__entry( | ||
52 | __field(struct pt_regs *, regs) | ||
53 | ), | ||
54 | |||
55 | TP_fast_assign( | ||
56 | __entry->regs = regs; | ||
57 | ), | ||
58 | |||
59 | TP_printk("pt_regs=%p", __entry->regs) | ||
60 | ); | ||
61 | |||
62 | TRACE_EVENT(timer_interrupt_exit, | ||
63 | |||
64 | TP_PROTO(struct pt_regs *regs), | ||
65 | |||
66 | TP_ARGS(regs), | ||
67 | |||
68 | TP_STRUCT__entry( | ||
69 | __field(struct pt_regs *, regs) | ||
70 | ), | ||
71 | |||
72 | TP_fast_assign( | ||
73 | __entry->regs = regs; | ||
74 | ), | ||
75 | |||
76 | TP_printk("pt_regs=%p", __entry->regs) | ||
77 | ); | ||
78 | |||
79 | #ifdef CONFIG_PPC_PSERIES | ||
80 | extern void hcall_tracepoint_regfunc(void); | ||
81 | extern void hcall_tracepoint_unregfunc(void); | ||
82 | |||
83 | TRACE_EVENT_FN(hcall_entry, | ||
84 | |||
85 | TP_PROTO(unsigned long opcode, unsigned long *args), | ||
86 | |||
87 | TP_ARGS(opcode, args), | ||
88 | |||
89 | TP_STRUCT__entry( | ||
90 | __field(unsigned long, opcode) | ||
91 | ), | ||
92 | |||
93 | TP_fast_assign( | ||
94 | __entry->opcode = opcode; | ||
95 | ), | ||
96 | |||
97 | TP_printk("opcode=%lu", __entry->opcode), | ||
98 | |||
99 | hcall_tracepoint_regfunc, hcall_tracepoint_unregfunc | ||
100 | ); | ||
101 | |||
102 | TRACE_EVENT_FN(hcall_exit, | ||
103 | |||
104 | TP_PROTO(unsigned long opcode, unsigned long retval, | ||
105 | unsigned long *retbuf), | ||
106 | |||
107 | TP_ARGS(opcode, retval, retbuf), | ||
108 | |||
109 | TP_STRUCT__entry( | ||
110 | __field(unsigned long, opcode) | ||
111 | __field(unsigned long, retval) | ||
112 | ), | ||
113 | |||
114 | TP_fast_assign( | ||
115 | __entry->opcode = opcode; | ||
116 | __entry->retval = retval; | ||
117 | ), | ||
118 | |||
119 | TP_printk("opcode=%lu retval=%lu", __entry->opcode, __entry->retval), | ||
120 | |||
121 | hcall_tracepoint_regfunc, hcall_tracepoint_unregfunc | ||
122 | ); | ||
123 | #endif | ||
124 | |||
125 | #endif /* _TRACE_POWERPC_H */ | ||
126 | |||
127 | #undef TRACE_INCLUDE_PATH | ||
128 | #undef TRACE_INCLUDE_FILE | ||
129 | |||
130 | #define TRACE_INCLUDE_PATH asm | ||
131 | #define TRACE_INCLUDE_FILE trace | ||
132 | |||
133 | #include <trace/define_trace.h> | ||
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h index cd21e5e6b04f..11ae699135ba 100644 --- a/arch/powerpc/include/asm/udbg.h +++ b/arch/powerpc/include/asm/udbg.h | |||
@@ -51,6 +51,7 @@ extern void __init udbg_init_btext(void); | |||
51 | extern void __init udbg_init_44x_as1(void); | 51 | extern void __init udbg_init_44x_as1(void); |
52 | extern void __init udbg_init_40x_realmode(void); | 52 | extern void __init udbg_init_40x_realmode(void); |
53 | extern void __init udbg_init_cpm(void); | 53 | extern void __init udbg_init_cpm(void); |
54 | extern void __init udbg_init_usbgecko(void); | ||
54 | 55 | ||
55 | #endif /* __KERNEL__ */ | 56 | #endif /* __KERNEL__ */ |
56 | #endif /* _ASM_POWERPC_UDBG_H */ | 57 | #endif /* _ASM_POWERPC_UDBG_H */ |
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h index f6ca76176766..f0a10266e7f7 100644 --- a/arch/powerpc/include/asm/unistd.h +++ b/arch/powerpc/include/asm/unistd.h | |||
@@ -364,6 +364,7 @@ | |||
364 | #define __ARCH_WANT_STAT64 | 364 | #define __ARCH_WANT_STAT64 |
365 | #define __ARCH_WANT_SYS_ALARM | 365 | #define __ARCH_WANT_SYS_ALARM |
366 | #define __ARCH_WANT_SYS_GETHOSTNAME | 366 | #define __ARCH_WANT_SYS_GETHOSTNAME |
367 | #define __ARCH_WANT_SYS_IPC | ||
367 | #define __ARCH_WANT_SYS_PAUSE | 368 | #define __ARCH_WANT_SYS_PAUSE |
368 | #define __ARCH_WANT_SYS_SGETMASK | 369 | #define __ARCH_WANT_SYS_SGETMASK |
369 | #define __ARCH_WANT_SYS_SIGNAL | 370 | #define __ARCH_WANT_SYS_SIGNAL |
@@ -376,6 +377,7 @@ | |||
376 | #define __ARCH_WANT_SYS_LLSEEK | 377 | #define __ARCH_WANT_SYS_LLSEEK |
377 | #define __ARCH_WANT_SYS_NICE | 378 | #define __ARCH_WANT_SYS_NICE |
378 | #define __ARCH_WANT_SYS_OLD_GETRLIMIT | 379 | #define __ARCH_WANT_SYS_OLD_GETRLIMIT |
380 | #define __ARCH_WANT_SYS_OLD_UNAME | ||
379 | #define __ARCH_WANT_SYS_OLDUMOUNT | 381 | #define __ARCH_WANT_SYS_OLDUMOUNT |
380 | #define __ARCH_WANT_SYS_SIGPENDING | 382 | #define __ARCH_WANT_SYS_SIGPENDING |
381 | #define __ARCH_WANT_SYS_SIGPROCMASK | 383 | #define __ARCH_WANT_SYS_SIGPROCMASK |