Merge commit 'v3.1-rc1' into imx-fixes

46 files changed, 2060 insertions, 289 deletions

diff --git a/arch/powerpc/include/asm/8253pit.h b/arch/powerpc/include/asm/8253pit.h
deleted file mode 100644
index a71c9c1455a7..000000000000
--- a/arch/powerpc/include/asm/8253pit.h
+++ /dev/null
@@ -1,3 +0,0 @@
-/*
- * 8253/8254 Programmable Interval Timer
- */
diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h
index b8f152ece025..e2a4c26ad377 100644
--- a/arch/powerpc/include/asm/atomic.h
+++ b/arch/powerpc/include/asm/atomic.h
@@ -181,21 +181,21 @@ static __inline__ int atomic_dec_return(atomic_t *v)
 #define atomic_xchg(v, new) (xchg(&((v)->counter), new))
 
 /**
- * atomic_add_unless - add unless the number is a given value
+ * __atomic_add_unless - add unless the number is a given value
  * @v: pointer of type atomic_t
  * @a: the amount to add to v...
  * @u: ...unless v is equal to u.
  *
  * Atomically adds @a to @v, so long as it was not @u.
- * Returns non-zero if @v was not @u, and zero otherwise.
+ * Returns the old value of @v.
  */
-static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
+static __inline__ int __atomic_add_unless(atomic_t *v, int a, int u)
 {
         int t;
 
         __asm__ __volatile__ (
         PPC_RELEASE_BARRIER
-"1:     lwarx   %0,0,%1         # atomic_add_unless\n\
+"1:     lwarx   %0,0,%1         # __atomic_add_unless\n\
         cmpw    0,%0,%3 \n\
         beq-    2f \n\
         add     %0,%2,%0 \n"
@@ -209,10 +209,9 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
         : "r" (&v->counter), "r" (a), "r" (u)
         : "cc", "memory");
 
-        return t != u;
+        return t;
 }
 
-#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
 
 #define atomic_sub_and_test(a, v)       (atomic_sub_return((a), (v)) == 0)
 #define atomic_dec_and_test(v)          (atomic_dec_return((v)) == 0)
@@ -444,7 +443,7 @@ static __inline__ long atomic64_dec_if_positive(atomic64_t *v)
  * @u: ...unless v is equal to u.
  *
  * Atomically adds @a to @v, so long as it was not @u.
- * Returns non-zero if @v was not @u, and zero otherwise.
+ * Returns the old value of @v.
  */
 static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
 {
@@ -452,7 +451,7 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
 
         __asm__ __volatile__ (
         PPC_RELEASE_BARRIER
-"1:     ldarx   %0,0,%1         # atomic_add_unless\n\
+"1:     ldarx   %0,0,%1         # __atomic_add_unless\n\
         cmpd    0,%0,%3 \n\
         beq-    2f \n\
         add     %0,%2,%0 \n"
@@ -470,11 +469,7 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
 
 #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
 
-#else  /* __powerpc64__ */
-#include <asm-generic/atomic64.h>
-
 #endif /* __powerpc64__ */
 
-#include <asm-generic/atomic-long.h>
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_ATOMIC_H_ */
diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h
index f18c6d9b9510..e137afcc10fa 100644
--- a/arch/powerpc/include/asm/bitops.h
+++ b/arch/powerpc/include/asm/bitops.h
@@ -327,10 +327,7 @@ unsigned long find_next_bit_le(const void *addr,
                                     unsigned long size, unsigned long offset);
 /* Bitmap functions for the ext2 filesystem */
 
-#define ext2_set_bit_atomic(lock, nr, addr) \
-        test_and_set_bit_le((nr), (unsigned long*)addr)
-#define ext2_clear_bit_atomic(lock, nr, addr) \
-        test_and_clear_bit_le((nr), (unsigned long*)addr)
+#include <asm-generic/bitops/ext2-atomic-setbit.h>
 
 #include <asm-generic/bitops/sched.h>
 
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index c0d842cfd012..e30442c539ce 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -179,8 +179,9 @@ extern const char *powerpc_base_platform;
 #define LONG_ASM_CONST(x)               0
 #endif
 
-
-#define CPU_FTR_HVMODE_206              LONG_ASM_CONST(0x0000000800000000)
+#define CPU_FTR_HVMODE                  LONG_ASM_CONST(0x0000000200000000)
+#define CPU_FTR_ARCH_201                LONG_ASM_CONST(0x0000000400000000)
+#define CPU_FTR_ARCH_206                LONG_ASM_CONST(0x0000000800000000)
 #define CPU_FTR_CFAR                    LONG_ASM_CONST(0x0000001000000000)
 #define CPU_FTR_IABR                    LONG_ASM_CONST(0x0000002000000000)
 #define CPU_FTR_MMCRA                   LONG_ASM_CONST(0x0000004000000000)
@@ -401,9 +402,10 @@ extern const char *powerpc_base_platform;
             CPU_FTR_MMCRA | CPU_FTR_CP_USE_DCBTZ | \
             CPU_FTR_STCX_CHECKS_ADDRESS)
 #define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
-            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
+            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_ARCH_201 | \
             CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA | \
-            CPU_FTR_CP_USE_DCBTZ | CPU_FTR_STCX_CHECKS_ADDRESS)
+            CPU_FTR_CP_USE_DCBTZ | CPU_FTR_STCX_CHECKS_ADDRESS | \
+            CPU_FTR_HVMODE)
 #define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
             CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
             CPU_FTR_MMCRA | CPU_FTR_SMT | \
@@ -417,13 +419,13 @@ extern const char *powerpc_base_platform;
             CPU_FTR_DSCR | CPU_FTR_UNALIGNED_LD_STD | \
             CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_CFAR)
 #define CPU_FTRS_POWER7 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
-            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_HVMODE_206 |\
+            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_ARCH_206 |\
             CPU_FTR_MMCRA | CPU_FTR_SMT | \
             CPU_FTR_COHERENT_ICACHE | \
             CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
             CPU_FTR_DSCR | CPU_FTR_SAO  | CPU_FTR_ASYM_SMT | \
             CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
-            CPU_FTR_ICSWX | CPU_FTR_CFAR)
+            CPU_FTR_ICSWX | CPU_FTR_CFAR | CPU_FTR_HVMODE)
 #define CPU_FTRS_CELL   (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
             CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
             CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
diff --git a/arch/powerpc/include/asm/dbell.h b/arch/powerpc/include/asm/dbell.h
index 9c70d0ca96d4..efa74ac44a35 100644
--- a/arch/powerpc/include/asm/dbell.h
+++ b/arch/powerpc/include/asm/dbell.h
@@ -18,7 +18,7 @@
 #include <asm/ppc-opcode.h>
 
 #define PPC_DBELL_MSG_BRDCAST   (0x04000000)
-#define PPC_DBELL_TYPE(x)       (((x) & 0xf) << 28)
+#define PPC_DBELL_TYPE(x)       (((x) & 0xf) << (63-36))
 enum ppc_dbell {
         PPC_DBELL = 0,          /* doorbell */
         PPC_DBELL_CRIT = 1,     /* critical doorbell */
diff --git a/arch/powerpc/include/asm/ehv_pic.h b/arch/powerpc/include/asm/ehv_pic.h
new file mode 100644
index 000000000000..a9e1f4f796f6
--- /dev/null
+++ b/arch/powerpc/include/asm/ehv_pic.h
@@ -0,0 +1,40 @@
+/*
+ * EHV_PIC private definitions and structure.
+ *
+ * Copyright 2008-2010 Freescale Semiconductor, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2.  This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+#ifndef __EHV_PIC_H__
+#define __EHV_PIC_H__
+
+#include <linux/irq.h>
+
+#define NR_EHV_PIC_INTS 1024
+
+#define EHV_PIC_INFO(name) EHV_PIC_##name
+
+#define EHV_PIC_VECPRI_POLARITY_NEGATIVE 0
+#define EHV_PIC_VECPRI_POLARITY_POSITIVE 1
+#define EHV_PIC_VECPRI_SENSE_EDGE 0
+#define EHV_PIC_VECPRI_SENSE_LEVEL 0x2
+#define EHV_PIC_VECPRI_POLARITY_MASK 0x1
+#define EHV_PIC_VECPRI_SENSE_MASK 0x2
+
+struct ehv_pic {
+        /* The remapper for this EHV_PIC */
+        struct irq_host *irqhost;
+
+        /* The "linux" controller struct */
+        struct irq_chip hc_irq;
+
+        /* core int flag */
+        int coreint_flag;
+};
+
+void ehv_pic_init(void);
+unsigned int ehv_pic_get_irq(void);
+
+#endif /* __EHV_PIC_H__ */
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h
index 2b917c69ed15..3bf9cca35147 100644
--- a/arch/powerpc/include/asm/elf.h
+++ b/arch/powerpc/include/asm/elf.h
@@ -267,7 +267,7 @@ extern int ucache_bsize;
 struct linux_binprm;
 extern int arch_setup_additional_pages(struct linux_binprm *bprm,
                                        int uses_interp);
-#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b);
+#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b)
 
 /* 1GB for 64bit, 8MB for 32bit */
 #define STACK_RND_MASK (is_32bit_task() ? \
@@ -298,7 +298,7 @@ do {									\
         NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize);                      \
         NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize);                      \
         NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize);                      \
-        VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base)   \
+        VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->mm->context.vdso_base);  \
 } while (0)
 
 /* PowerPC64 relocations defined by the ABIs */
diff --git a/arch/powerpc/include/asm/emulated_ops.h b/arch/powerpc/include/asm/emulated_ops.h
index 45921672b97a..63f2a22e9954 100644
--- a/arch/powerpc/include/asm/emulated_ops.h
+++ b/arch/powerpc/include/asm/emulated_ops.h
@@ -18,7 +18,7 @@
 #ifndef _ASM_POWERPC_EMULATED_OPS_H
 #define _ASM_POWERPC_EMULATED_OPS_H
 
-#include <asm/atomic.h>
+#include <linux/atomic.h>
 #include <linux/perf_event.h>
 
 
@@ -78,14 +78,14 @@ extern void ppc_warn_emulated_print(const char *type);
 #define PPC_WARN_EMULATED(type, regs)                                   \
         do {                                                            \
                 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS,           \
-                        1, 0, regs, 0);                                 \
+                        1, regs, 0);                                    \
                 __PPC_WARN_EMULATED(type);                              \
         } while (0)
 
 #define PPC_WARN_ALIGNMENT(type, regs)                                  \
         do {                                                            \
                 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS,           \
-                        1, 0, regs, regs->dar);                         \
+                        1, regs, regs->dar);                            \
                 __PPC_WARN_EMULATED(type);                              \
         } while (0)
 
diff --git a/arch/powerpc/include/asm/epapr_hcalls.h b/arch/powerpc/include/asm/epapr_hcalls.h
new file mode 100644
index 000000000000..f3b0c2cc9fea
--- /dev/null
+++ b/arch/powerpc/include/asm/epapr_hcalls.h
@@ -0,0 +1,502 @@
+/*
+ * ePAPR hcall interface
+ *
+ * Copyright 2008-2011 Freescale Semiconductor, Inc.
+ *
+ * Author: Timur Tabi <timur@freescale.com>
+ *
+ * This file is provided under a dual BSD/GPL license.  When using or
+ * redistributing this file, you may do so under either license.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* A "hypercall" is an "sc 1" instruction.  This header file file provides C
+ * wrapper functions for the ePAPR hypervisor interface.  It is inteded
+ * for use by Linux device drivers and other operating systems.
+ *
+ * The hypercalls are implemented as inline assembly, rather than assembly
+ * language functions in a .S file, for optimization.  It allows
+ * the caller to issue the hypercall instruction directly, improving both
+ * performance and memory footprint.
+ */
+
+#ifndef _EPAPR_HCALLS_H
+#define _EPAPR_HCALLS_H
+
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <asm/byteorder.h>
+
+#define EV_BYTE_CHANNEL_SEND            1
+#define EV_BYTE_CHANNEL_RECEIVE         2
+#define EV_BYTE_CHANNEL_POLL            3
+#define EV_INT_SET_CONFIG               4
+#define EV_INT_GET_CONFIG               5
+#define EV_INT_SET_MASK                 6
+#define EV_INT_GET_MASK                 7
+#define EV_INT_IACK                     9
+#define EV_INT_EOI                      10
+#define EV_INT_SEND_IPI                 11
+#define EV_INT_SET_TASK_PRIORITY        12
+#define EV_INT_GET_TASK_PRIORITY        13
+#define EV_DOORBELL_SEND                14
+#define EV_MSGSND                       15
+#define EV_IDLE                         16
+
+/* vendor ID: epapr */
+#define EV_LOCAL_VENDOR_ID              0       /* for private use */
+#define EV_EPAPR_VENDOR_ID              1
+#define EV_FSL_VENDOR_ID                2       /* Freescale Semiconductor */
+#define EV_IBM_VENDOR_ID                3       /* IBM */
+#define EV_GHS_VENDOR_ID                4       /* Green Hills Software */
+#define EV_ENEA_VENDOR_ID               5       /* Enea */
+#define EV_WR_VENDOR_ID                 6       /* Wind River Systems */
+#define EV_AMCC_VENDOR_ID               7       /* Applied Micro Circuits */
+#define EV_KVM_VENDOR_ID                42      /* KVM */
+
+/* The max number of bytes that a byte channel can send or receive per call */
+#define EV_BYTE_CHANNEL_MAX_BYTES       16
+
+
+#define _EV_HCALL_TOKEN(id, num) (((id) << 16) | (num))
+#define EV_HCALL_TOKEN(hcall_num) _EV_HCALL_TOKEN(EV_EPAPR_VENDOR_ID, hcall_num)
+
+/* epapr error codes */
+#define EV_EPERM                1       /* Operation not permitted */
+#define EV_ENOENT               2       /*  Entry Not Found */
+#define EV_EIO                  3       /* I/O error occured */
+#define EV_EAGAIN               4       /* The operation had insufficient
+                                         * resources to complete and should be
+                                         * retried
+                                         */
+#define EV_ENOMEM               5       /* There was insufficient memory to
+                                         * complete the operation */
+#define EV_EFAULT               6       /* Bad guest address */
+#define EV_ENODEV               7       /* No such device */
+#define EV_EINVAL               8       /* An argument supplied to the hcall
+                                           was out of range or invalid */
+#define EV_INTERNAL             9       /* An internal error occured */
+#define EV_CONFIG               10      /* A configuration error was detected */
+#define EV_INVALID_STATE        11      /* The object is in an invalid state */
+#define EV_UNIMPLEMENTED        12      /* Unimplemented hypercall */
+#define EV_BUFFER_OVERFLOW      13      /* Caller-supplied buffer too small */
+
+/*
+ * Hypercall register clobber list
+ *
+ * These macros are used to define the list of clobbered registers during a
+ * hypercall.  Technically, registers r0 and r3-r12 are always clobbered,
+ * but the gcc inline assembly syntax does not allow us to specify registers
+ * on the clobber list that are also on the input/output list.  Therefore,
+ * the lists of clobbered registers depends on the number of register
+ * parmeters ("+r" and "=r") passed to the hypercall.
+ *
+ * Each assembly block should use one of the HCALL_CLOBBERSx macros.  As a
+ * general rule, 'x' is the number of parameters passed to the assembly
+ * block *except* for r11.
+ *
+ * If you're not sure, just use the smallest value of 'x' that does not
+ * generate a compilation error.  Because these are static inline functions,
+ * the compiler will only check the clobber list for a function if you
+ * compile code that calls that function.
+ *
+ * r3 and r11 are not included in any clobbers list because they are always
+ * listed as output registers.
+ *
+ * XER, CTR, and LR are currently listed as clobbers because it's uncertain
+ * whether they will be clobbered.
+ *
+ * Note that r11 can be used as an output parameter.
+*/
+
+/* List of common clobbered registers.  Do not use this macro. */
+#define EV_HCALL_CLOBBERS "r0", "r12", "xer", "ctr", "lr", "cc"
+
+#define EV_HCALL_CLOBBERS8 EV_HCALL_CLOBBERS
+#define EV_HCALL_CLOBBERS7 EV_HCALL_CLOBBERS8, "r10"
+#define EV_HCALL_CLOBBERS6 EV_HCALL_CLOBBERS7, "r9"
+#define EV_HCALL_CLOBBERS5 EV_HCALL_CLOBBERS6, "r8"
+#define EV_HCALL_CLOBBERS4 EV_HCALL_CLOBBERS5, "r7"
+#define EV_HCALL_CLOBBERS3 EV_HCALL_CLOBBERS4, "r6"
+#define EV_HCALL_CLOBBERS2 EV_HCALL_CLOBBERS3, "r5"
+#define EV_HCALL_CLOBBERS1 EV_HCALL_CLOBBERS2, "r4"
+
+
+/*
+ * We use "uintptr_t" to define a register because it's guaranteed to be a
+ * 32-bit integer on a 32-bit platform, and a 64-bit integer on a 64-bit
+ * platform.
+ *
+ * All registers are either input/output or output only.  Registers that are
+ * initialized before making the hypercall are input/output.  All
+ * input/output registers are represented with "+r".  Output-only registers
+ * are represented with "=r".  Do not specify any unused registers.  The
+ * clobber list will tell the compiler that the hypercall modifies those
+ * registers, which is good enough.
+ */
+
+/**
+ * ev_int_set_config - configure the specified interrupt
+ * @interrupt: the interrupt number
+ * @config: configuration for this interrupt
+ * @priority: interrupt priority
+ * @destination: destination CPU number
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int ev_int_set_config(unsigned int interrupt,
+        uint32_t config, unsigned int priority, uint32_t destination)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+        register uintptr_t r5 __asm__("r5");
+        register uintptr_t r6 __asm__("r6");
+
+        r11 = EV_HCALL_TOKEN(EV_INT_SET_CONFIG);
+        r3  = interrupt;
+        r4  = config;
+        r5  = priority;
+        r6  = destination;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3), "+r" (r4), "+r" (r5), "+r" (r6)
+                : : EV_HCALL_CLOBBERS4
+        );
+
+        return r3;
+}
+
+/**
+ * ev_int_get_config - return the config of the specified interrupt
+ * @interrupt: the interrupt number
+ * @config: returned configuration for this interrupt
+ * @priority: returned interrupt priority
+ * @destination: returned destination CPU number
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int ev_int_get_config(unsigned int interrupt,
+        uint32_t *config, unsigned int *priority, uint32_t *destination)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+        register uintptr_t r5 __asm__("r5");
+        register uintptr_t r6 __asm__("r6");
+
+        r11 = EV_HCALL_TOKEN(EV_INT_GET_CONFIG);
+        r3 = interrupt;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3), "=r" (r4), "=r" (r5), "=r" (r6)
+                : : EV_HCALL_CLOBBERS4
+        );
+
+        *config = r4;
+        *priority = r5;
+        *destination = r6;
+
+        return r3;
+}
+
+/**
+ * ev_int_set_mask - sets the mask for the specified interrupt source
+ * @interrupt: the interrupt number
+ * @mask: 0=enable interrupts, 1=disable interrupts
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int ev_int_set_mask(unsigned int interrupt,
+        unsigned int mask)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+
+        r11 = EV_HCALL_TOKEN(EV_INT_SET_MASK);
+        r3 = interrupt;
+        r4 = mask;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3), "+r" (r4)
+                : : EV_HCALL_CLOBBERS2
+        );
+
+        return r3;
+}
+
+/**
+ * ev_int_get_mask - returns the mask for the specified interrupt source
+ * @interrupt: the interrupt number
+ * @mask: returned mask for this interrupt (0=enabled, 1=disabled)
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int ev_int_get_mask(unsigned int interrupt,
+        unsigned int *mask)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+
+        r11 = EV_HCALL_TOKEN(EV_INT_GET_MASK);
+        r3 = interrupt;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3), "=r" (r4)
+                : : EV_HCALL_CLOBBERS2
+        );
+
+        *mask = r4;
+
+        return r3;
+}
+
+/**
+ * ev_int_eoi - signal the end of interrupt processing
+ * @interrupt: the interrupt number
+ *
+ * This function signals the end of processing for the the specified
+ * interrupt, which must be the interrupt currently in service. By
+ * definition, this is also the highest-priority interrupt.
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int ev_int_eoi(unsigned int interrupt)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+
+        r11 = EV_HCALL_TOKEN(EV_INT_EOI);
+        r3 = interrupt;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3)
+                : : EV_HCALL_CLOBBERS1
+        );
+
+        return r3;
+}
+
+/**
+ * ev_byte_channel_send - send characters to a byte stream
+ * @handle: byte stream handle
+ * @count: (input) num of chars to send, (output) num chars sent
+ * @buffer: pointer to a 16-byte buffer
+ *
+ * @buffer must be at least 16 bytes long, because all 16 bytes will be
+ * read from memory into registers, even if count < 16.
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int ev_byte_channel_send(unsigned int handle,
+        unsigned int *count, const char buffer[EV_BYTE_CHANNEL_MAX_BYTES])
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+        register uintptr_t r5 __asm__("r5");
+        register uintptr_t r6 __asm__("r6");
+        register uintptr_t r7 __asm__("r7");
+        register uintptr_t r8 __asm__("r8");
+        const uint32_t *p = (const uint32_t *) buffer;
+
+        r11 = EV_HCALL_TOKEN(EV_BYTE_CHANNEL_SEND);
+        r3 = handle;
+        r4 = *count;
+        r5 = be32_to_cpu(p[0]);
+        r6 = be32_to_cpu(p[1]);
+        r7 = be32_to_cpu(p[2]);
+        r8 = be32_to_cpu(p[3]);
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3),
+                  "+r" (r4), "+r" (r5), "+r" (r6), "+r" (r7), "+r" (r8)
+                : : EV_HCALL_CLOBBERS6
+        );
+
+        *count = r4;
+
+        return r3;
+}
+
+/**
+ * ev_byte_channel_receive - fetch characters from a byte channel
+ * @handle: byte channel handle
+ * @count: (input) max num of chars to receive, (output) num chars received
+ * @buffer: pointer to a 16-byte buffer
+ *
+ * The size of @buffer must be at least 16 bytes, even if you request fewer
+ * than 16 characters, because we always write 16 bytes to @buffer.  This is
+ * for performance reasons.
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int ev_byte_channel_receive(unsigned int handle,
+        unsigned int *count, char buffer[EV_BYTE_CHANNEL_MAX_BYTES])
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+        register uintptr_t r5 __asm__("r5");
+        register uintptr_t r6 __asm__("r6");
+        register uintptr_t r7 __asm__("r7");
+        register uintptr_t r8 __asm__("r8");
+        uint32_t *p = (uint32_t *) buffer;
+
+        r11 = EV_HCALL_TOKEN(EV_BYTE_CHANNEL_RECEIVE);
+        r3 = handle;
+        r4 = *count;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3), "+r" (r4),
+                  "=r" (r5), "=r" (r6), "=r" (r7), "=r" (r8)
+                : : EV_HCALL_CLOBBERS6
+        );
+
+        *count = r4;
+        p[0] = cpu_to_be32(r5);
+        p[1] = cpu_to_be32(r6);
+        p[2] = cpu_to_be32(r7);
+        p[3] = cpu_to_be32(r8);
+
+        return r3;
+}
+
+/**
+ * ev_byte_channel_poll - returns the status of the byte channel buffers
+ * @handle: byte channel handle
+ * @rx_count: returned count of bytes in receive queue
+ * @tx_count: returned count of free space in transmit queue
+ *
+ * This function reports the amount of data in the receive queue (i.e. the
+ * number of bytes you can read), and the amount of free space in the transmit
+ * queue (i.e. the number of bytes you can write).
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int ev_byte_channel_poll(unsigned int handle,
+        unsigned int *rx_count, unsigned int *tx_count)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+        register uintptr_t r5 __asm__("r5");
+
+        r11 = EV_HCALL_TOKEN(EV_BYTE_CHANNEL_POLL);
+        r3 = handle;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3), "=r" (r4), "=r" (r5)
+                : : EV_HCALL_CLOBBERS3
+        );
+
+        *rx_count = r4;
+        *tx_count = r5;
+
+        return r3;
+}
+
+/**
+ * ev_int_iack - acknowledge an interrupt
+ * @handle: handle to the target interrupt controller
+ * @vector: returned interrupt vector
+ *
+ * If handle is zero, the function returns the next interrupt source
+ * number to be handled irrespective of the hierarchy or cascading
+ * of interrupt controllers. If non-zero, specifies a handle to the
+ * interrupt controller that is the target of the acknowledge.
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int ev_int_iack(unsigned int handle,
+        unsigned int *vector)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+
+        r11 = EV_HCALL_TOKEN(EV_INT_IACK);
+        r3 = handle;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3), "=r" (r4)
+                : : EV_HCALL_CLOBBERS2
+        );
+
+        *vector = r4;
+
+        return r3;
+}
+
+/**
+ * ev_doorbell_send - send a doorbell to another partition
+ * @handle: doorbell send handle
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int ev_doorbell_send(unsigned int handle)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+
+        r11 = EV_HCALL_TOKEN(EV_DOORBELL_SEND);
+        r3 = handle;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3)
+                : : EV_HCALL_CLOBBERS1
+        );
+
+        return r3;
+}
+
+/**
+ * ev_idle -- wait for next interrupt on this core
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int ev_idle(void)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+
+        r11 = EV_HCALL_TOKEN(EV_IDLE);
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "=r" (r3)
+                : : EV_HCALL_CLOBBERS1
+        );
+
+        return r3;
+}
+
+#endif
diff --git a/arch/powerpc/include/asm/exception-64e.h b/arch/powerpc/include/asm/exception-64e.h
index 6d53f311d942..ac13addb8495 100644
--- a/arch/powerpc/include/asm/exception-64e.h
+++ b/arch/powerpc/include/asm/exception-64e.h
@@ -48,30 +48,33 @@
 #define EX_R14          (4 * 8)
 #define EX_R15          (5 * 8)
 
-/* The TLB miss exception uses different slots */
+/*
+ * The TLB miss exception uses different slots.
+ *
+ * The bolted variant uses only the first six fields,
+ * which in combination with pgd and kernel_pgd fits in
+ * one 64-byte cache line.
+ */
 
 #define EX_TLB_R10      ( 0 * 8)
 #define EX_TLB_R11      ( 1 * 8)
-#define EX_TLB_R12      ( 2 * 8)
-#define EX_TLB_R13      ( 3 * 8)
-#define EX_TLB_R14      ( 4 * 8)
-#define EX_TLB_R15      ( 5 * 8)
-#define EX_TLB_R16      ( 6 * 8)
-#define EX_TLB_CR       ( 7 * 8)
+#define EX_TLB_R14      ( 2 * 8)
+#define EX_TLB_R15      ( 3 * 8)
+#define EX_TLB_R16      ( 4 * 8)
+#define EX_TLB_CR       ( 5 * 8)
+#define EX_TLB_R12      ( 6 * 8)
+#define EX_TLB_R13      ( 7 * 8)
 #define EX_TLB_DEAR     ( 8 * 8) /* Level 0 and 2 only */
 #define EX_TLB_ESR      ( 9 * 8) /* Level 0 and 2 only */
 #define EX_TLB_SRR0     (10 * 8)
 #define EX_TLB_SRR1     (11 * 8)
-#define EX_TLB_MMUCR0   (12 * 8) /* Level 0 */
-#define EX_TLB_MAS1     (12 * 8) /* Level 0 */
-#define EX_TLB_MAS2     (13 * 8) /* Level 0 */
 #ifdef CONFIG_BOOK3E_MMU_TLB_STATS
-#define EX_TLB_R8       (14 * 8)
-#define EX_TLB_R9       (15 * 8)
-#define EX_TLB_LR       (16 * 8)
-#define EX_TLB_SIZE     (17 * 8)
+#define EX_TLB_R8       (12 * 8)
+#define EX_TLB_R9       (13 * 8)
+#define EX_TLB_LR       (14 * 8)
+#define EX_TLB_SIZE     (15 * 8)
 #else
-#define EX_TLB_SIZE     (14 * 8)
+#define EX_TLB_SIZE     (12 * 8)
 #endif
 
 #define START_EXCEPTION(label)                                          \
@@ -168,6 +171,16 @@ exc_##label##_book3e:
         ld      r9,EX_TLB_R9(r12);                                          \
         ld      r8,EX_TLB_R8(r12);                                          \
         mtlr    r16;
+#define TLB_MISS_PROLOG_STATS_BOLTED                                                \
+        mflr    r10;                                                        \
+        std     r8,PACA_EXTLB+EX_TLB_R8(r13);                               \
+        std     r9,PACA_EXTLB+EX_TLB_R9(r13);                               \
+        std     r10,PACA_EXTLB+EX_TLB_LR(r13);
+#define TLB_MISS_RESTORE_STATS_BOLTED                                               \
+        ld      r16,PACA_EXTLB+EX_TLB_LR(r13);                              \
+        ld      r9,PACA_EXTLB+EX_TLB_R9(r13);                               \
+        ld      r8,PACA_EXTLB+EX_TLB_R8(r13);                               \
+        mtlr    r16;
 #define TLB_MISS_STATS_D(name)                                              \
         addi    r9,r13,MMSTAT_DSTATS+name;                                  \
         bl      .tlb_stat_inc;
@@ -183,17 +196,20 @@ exc_##label##_book3e:
 61:     addi    r9,r13,MMSTAT_ISTATS+name;                                  \
 62:     bl      .tlb_stat_inc;
 #define TLB_MISS_STATS_SAVE_INFO                                            \
-        std     r14,EX_TLB_ESR(r12);    /* save ESR */                      \
-
-
+        std     r14,EX_TLB_ESR(r12);    /* save ESR */
+#define TLB_MISS_STATS_SAVE_INFO_BOLTED                                     \
+        std     r14,PACA_EXTLB+EX_TLB_ESR(r13); /* save ESR */
 #else
 #define TLB_MISS_PROLOG_STATS
 #define TLB_MISS_RESTORE_STATS
+#define TLB_MISS_PROLOG_STATS_BOLTED
+#define TLB_MISS_RESTORE_STATS_BOLTED
 #define TLB_MISS_STATS_D(name)
 #define TLB_MISS_STATS_I(name)
 #define TLB_MISS_STATS_X(name)
 #define TLB_MISS_STATS_Y(name)
 #define TLB_MISS_STATS_SAVE_INFO
+#define TLB_MISS_STATS_SAVE_INFO_BOLTED
 #endif
 
 #define SET_IVOR(vector_number, vector_offset)  \
diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h
index f5dfe3411f64..8057f4f6980f 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -61,19 +61,22 @@
 #define EXC_HV  H
 #define EXC_STD
 
-#define EXCEPTION_PROLOG_1(area)                                        \
+#define __EXCEPTION_PROLOG_1(area, extra, vec)                          \
         GET_PACA(r13);                                                  \
         std     r9,area+EX_R9(r13);     /* save r9 - r12 */             \
         std     r10,area+EX_R10(r13);                                   \
-        std     r11,area+EX_R11(r13);                                   \
-        std     r12,area+EX_R12(r13);                                   \
         BEGIN_FTR_SECTION_NESTED(66);                                   \
         mfspr   r10,SPRN_CFAR;                                          \
         std     r10,area+EX_CFAR(r13);                                  \
         END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66);         \
-        GET_SCRATCH0(r9);                                               \
-        std     r9,area+EX_R13(r13);                                    \
-        mfcr    r9
+        mfcr    r9;                                                     \
+        extra(vec);                                                     \
+        std     r11,area+EX_R11(r13);                                   \
+        std     r12,area+EX_R12(r13);                                   \
+        GET_SCRATCH0(r10);                                              \
+        std     r10,area+EX_R13(r13)
+#define EXCEPTION_PROLOG_1(area, extra, vec)                            \
+        __EXCEPTION_PROLOG_1(area, extra, vec)
 
 #define __EXCEPTION_PROLOG_PSERIES_1(label, h)                          \
         ld      r12,PACAKBASE(r13);     /* get high part of &label */   \
@@ -85,13 +88,65 @@
         mtspr   SPRN_##h##SRR1,r10;                                     \
         h##rfid;                                                        \
         b       .       /* prevent speculative execution */
-#define EXCEPTION_PROLOG_PSERIES_1(label, h) \
+#define EXCEPTION_PROLOG_PSERIES_1(label, h)                            \
         __EXCEPTION_PROLOG_PSERIES_1(label, h)
 
-#define EXCEPTION_PROLOG_PSERIES(area, label, h)                        \
-        EXCEPTION_PROLOG_1(area);                                       \
+#define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec)            \
+        EXCEPTION_PROLOG_1(area, extra, vec);                           \
         EXCEPTION_PROLOG_PSERIES_1(label, h);
 
+#define __KVMTEST(n)                                                    \
+        lbz     r10,HSTATE_IN_GUEST(r13);                       \
+        cmpwi   r10,0;                                                  \
+        bne     do_kvm_##n
+
+#define __KVM_HANDLER(area, h, n)                                       \
+do_kvm_##n:                                                             \
+        ld      r10,area+EX_R10(r13);                                   \
+        stw     r9,HSTATE_SCRATCH1(r13);                        \
+        ld      r9,area+EX_R9(r13);                                     \
+        std     r12,HSTATE_SCRATCH0(r13);                       \
+        li      r12,n;                                                  \
+        b       kvmppc_interrupt
+
+#define __KVM_HANDLER_SKIP(area, h, n)                                  \
+do_kvm_##n:                                                             \
+        cmpwi   r10,KVM_GUEST_MODE_SKIP;                                \
+        ld      r10,area+EX_R10(r13);                                   \
+        beq     89f;                                                    \
+        stw     r9,HSTATE_SCRATCH1(r13);                        \
+        ld      r9,area+EX_R9(r13);                                     \
+        std     r12,HSTATE_SCRATCH0(r13);                       \
+        li      r12,n;                                                  \
+        b       kvmppc_interrupt;                                       \
+89:     mtocrf  0x80,r9;                                                \
+        ld      r9,area+EX_R9(r13);                                     \
+        b       kvmppc_skip_##h##interrupt
+
+#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
+#define KVMTEST(n)                      __KVMTEST(n)
+#define KVM_HANDLER(area, h, n)         __KVM_HANDLER(area, h, n)
+#define KVM_HANDLER_SKIP(area, h, n)    __KVM_HANDLER_SKIP(area, h, n)
+
+#else
+#define KVMTEST(n)
+#define KVM_HANDLER(area, h, n)
+#define KVM_HANDLER_SKIP(area, h, n)
+#endif
+
+#ifdef CONFIG_KVM_BOOK3S_PR
+#define KVMTEST_PR(n)                   __KVMTEST(n)
+#define KVM_HANDLER_PR(area, h, n)      __KVM_HANDLER(area, h, n)
+#define KVM_HANDLER_PR_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
+
+#else
+#define KVMTEST_PR(n)
+#define KVM_HANDLER_PR(area, h, n)
+#define KVM_HANDLER_PR_SKIP(area, h, n)
+#endif
+
+#define NOTEST(n)
+
 /*
  * The common exception prolog is used for all except a few exceptions
  * such as a segment miss on a kernel address.  We have to be prepared
@@ -164,57 +219,58 @@
         .globl label##_pSeries;                         \
 label##_pSeries:                                        \
         HMT_MEDIUM;                                     \
-        DO_KVM  vec;                                    \
         SET_SCRATCH0(r13);              /* save r13 */          \
-        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_STD)
+        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common,    \
+                                 EXC_STD, KVMTEST_PR, vec)
 
 #define STD_EXCEPTION_HV(loc, vec, label)               \
         . = loc;                                        \
         .globl label##_hv;                              \
 label##_hv:                                             \
         HMT_MEDIUM;                                     \
-        DO_KVM  vec;                                    \
-        SET_SCRATCH0(r13);      /* save r13 */          \
-        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_HV)
+        SET_SCRATCH0(r13);      /* save r13 */                  \
+        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common,    \
+                                 EXC_HV, KVMTEST, vec)
 
-#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h)                     \
-        HMT_MEDIUM;                                                     \
-        DO_KVM  vec;                                                    \
-        SET_SCRATCH0(r13);    /* save r13 */                            \
-        GET_PACA(r13);                                                  \
-        std     r9,PACA_EXGEN+EX_R9(r13);       /* save r9, r10 */      \
-        std     r10,PACA_EXGEN+EX_R10(r13);                             \
+#define __SOFTEN_TEST(h)                                                \
         lbz     r10,PACASOFTIRQEN(r13);                                 \
-        mfcr    r9;                                                     \
         cmpwi   r10,0;                                                  \
-        beq     masked_##h##interrupt;                                  \
-        GET_SCRATCH0(r10);                                              \
-        std     r10,PACA_EXGEN+EX_R13(r13);                             \
-        std     r11,PACA_EXGEN+EX_R11(r13);                             \
-        std     r12,PACA_EXGEN+EX_R12(r13);                             \
-        ld      r12,PACAKBASE(r13);     /* get high part of &label */   \
-        ld      r10,PACAKMSR(r13);      /* get MSR value for kernel */  \
-        mfspr   r11,SPRN_##h##SRR0;     /* save SRR0 */                 \
-        LOAD_HANDLER(r12,label##_common)                                \
-        mtspr   SPRN_##h##SRR0,r12;                                     \
-        mfspr   r12,SPRN_##h##SRR1;     /* and SRR1 */                  \
-        mtspr   SPRN_##h##SRR1,r10;                                     \
-        h##rfid;                                                        \
-        b       .       /* prevent speculative execution */
-#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h)                      \
-        __MASKABLE_EXCEPTION_PSERIES(vec, label, h)
+        beq     masked_##h##interrupt
+#define _SOFTEN_TEST(h) __SOFTEN_TEST(h)
+
+#define SOFTEN_TEST_PR(vec)                                             \
+        KVMTEST_PR(vec);                                                \
+        _SOFTEN_TEST(EXC_STD)
+
+#define SOFTEN_TEST_HV(vec)                                             \
+        KVMTEST(vec);                                                   \
+        _SOFTEN_TEST(EXC_HV)
+
+#define SOFTEN_TEST_HV_201(vec)                                         \
+        KVMTEST(vec);                                                   \
+        _SOFTEN_TEST(EXC_STD)
+
+#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)              \
+        HMT_MEDIUM;                                                     \
+        SET_SCRATCH0(r13);    /* save r13 */                            \
+        __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec);           \
+        EXCEPTION_PROLOG_PSERIES_1(label##_common, h);
+#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)               \
+        __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
 
 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label)                     \
         . = loc;                                                        \
         .globl label##_pSeries;                                         \
 label##_pSeries:                                                        \
-        _MASKABLE_EXCEPTION_PSERIES(vec, label, EXC_STD)
+        _MASKABLE_EXCEPTION_PSERIES(vec, label,                         \
+                                    EXC_STD, SOFTEN_TEST_PR)
 
 #define MASKABLE_EXCEPTION_HV(loc, vec, label)                          \
         . = loc;                                                        \
         .globl label##_hv;                                              \
 label##_hv:                                                             \
-        _MASKABLE_EXCEPTION_PSERIES(vec, label, EXC_HV)
+        _MASKABLE_EXCEPTION_PSERIES(vec, label,                         \
+                                    EXC_HV, SOFTEN_TEST_HV)
 
 #ifdef CONFIG_PPC_ISERIES
 #define DISABLE_INTS                            \
diff --git a/arch/powerpc/include/asm/fsl_hcalls.h b/arch/powerpc/include/asm/fsl_hcalls.h
new file mode 100644
index 000000000000..922d9b5fe3d5
--- /dev/null
+++ b/arch/powerpc/include/asm/fsl_hcalls.h
@@ -0,0 +1,655 @@
+/*
+ * Freescale hypervisor call interface
+ *
+ * Copyright 2008-2010 Freescale Semiconductor, Inc.
+ *
+ * Author: Timur Tabi <timur@freescale.com>
+ *
+ * This file is provided under a dual BSD/GPL license.  When using or
+ * redistributing this file, you may do so under either license.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef _FSL_HCALLS_H
+#define _FSL_HCALLS_H
+
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <asm/byteorder.h>
+#include <asm/epapr_hcalls.h>
+
+#define FH_API_VERSION                  1
+
+#define FH_ERR_GET_INFO                 1
+#define FH_PARTITION_GET_DTPROP         2
+#define FH_PARTITION_SET_DTPROP         3
+#define FH_PARTITION_RESTART            4
+#define FH_PARTITION_GET_STATUS         5
+#define FH_PARTITION_START              6
+#define FH_PARTITION_STOP               7
+#define FH_PARTITION_MEMCPY             8
+#define FH_DMA_ENABLE                   9
+#define FH_DMA_DISABLE                  10
+#define FH_SEND_NMI                     11
+#define FH_VMPIC_GET_MSIR               12
+#define FH_SYSTEM_RESET                 13
+#define FH_GET_CORE_STATE               14
+#define FH_ENTER_NAP                    15
+#define FH_EXIT_NAP                     16
+#define FH_CLAIM_DEVICE                 17
+#define FH_PARTITION_STOP_DMA           18
+
+/* vendor ID: Freescale Semiconductor */
+#define FH_HCALL_TOKEN(num)             _EV_HCALL_TOKEN(EV_FSL_VENDOR_ID, num)
+
+/*
+ * We use "uintptr_t" to define a register because it's guaranteed to be a
+ * 32-bit integer on a 32-bit platform, and a 64-bit integer on a 64-bit
+ * platform.
+ *
+ * All registers are either input/output or output only.  Registers that are
+ * initialized before making the hypercall are input/output.  All
+ * input/output registers are represented with "+r".  Output-only registers
+ * are represented with "=r".  Do not specify any unused registers.  The
+ * clobber list will tell the compiler that the hypercall modifies those
+ * registers, which is good enough.
+ */
+
+/**
+ * fh_send_nmi - send NMI to virtual cpu(s).
+ * @vcpu_mask: send NMI to virtual cpu(s) specified by this mask.
+ *
+ * Returns 0 for success, or EINVAL for invalid vcpu_mask.
+ */
+static inline unsigned int fh_send_nmi(unsigned int vcpu_mask)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+
+        r11 = FH_HCALL_TOKEN(FH_SEND_NMI);
+        r3 = vcpu_mask;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3)
+                : : EV_HCALL_CLOBBERS1
+        );
+
+        return r3;
+}
+
+/* Arbitrary limits to avoid excessive memory allocation in hypervisor */
+#define FH_DTPROP_MAX_PATHLEN 4096
+#define FH_DTPROP_MAX_PROPLEN 32768
+
+/**
+ * fh_partiton_get_dtprop - get a property from a guest device tree.
+ * @handle: handle of partition whose device tree is to be accessed
+ * @dtpath_addr: physical address of device tree path to access
+ * @propname_addr: physical address of name of property
+ * @propvalue_addr: physical address of property value buffer
+ * @propvalue_len: length of buffer on entry, length of property on return
+ *
+ * Returns zero on success, non-zero on error.
+ */
+static inline unsigned int fh_partition_get_dtprop(int handle,
+                                                   uint64_t dtpath_addr,
+                                                   uint64_t propname_addr,
+                                                   uint64_t propvalue_addr,
+                                                   uint32_t *propvalue_len)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+        register uintptr_t r5 __asm__("r5");
+        register uintptr_t r6 __asm__("r6");
+        register uintptr_t r7 __asm__("r7");
+        register uintptr_t r8 __asm__("r8");
+        register uintptr_t r9 __asm__("r9");
+        register uintptr_t r10 __asm__("r10");
+
+        r11 = FH_HCALL_TOKEN(FH_PARTITION_GET_DTPROP);
+        r3 = handle;
+
+#ifdef CONFIG_PHYS_64BIT
+        r4 = dtpath_addr >> 32;
+        r6 = propname_addr >> 32;
+        r8 = propvalue_addr >> 32;
+#else
+        r4 = 0;
+        r6 = 0;
+        r8 = 0;
+#endif
+        r5 = (uint32_t)dtpath_addr;
+        r7 = (uint32_t)propname_addr;
+        r9 = (uint32_t)propvalue_addr;
+        r10 = *propvalue_len;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11),
+                  "+r" (r3), "+r" (r4), "+r" (r5), "+r" (r6), "+r" (r7),
+                  "+r" (r8), "+r" (r9), "+r" (r10)
+                : : EV_HCALL_CLOBBERS8
+        );
+
+        *propvalue_len = r4;
+        return r3;
+}
+
+/**
+ * Set a property in a guest device tree.
+ * @handle: handle of partition whose device tree is to be accessed
+ * @dtpath_addr: physical address of device tree path to access
+ * @propname_addr: physical address of name of property
+ * @propvalue_addr: physical address of property value
+ * @propvalue_len: length of property
+ *
+ * Returns zero on success, non-zero on error.
+ */
+static inline unsigned int fh_partition_set_dtprop(int handle,
+                                                   uint64_t dtpath_addr,
+                                                   uint64_t propname_addr,
+                                                   uint64_t propvalue_addr,
+                                                   uint32_t propvalue_len)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+        register uintptr_t r6 __asm__("r6");
+        register uintptr_t r8 __asm__("r8");
+        register uintptr_t r5 __asm__("r5");
+        register uintptr_t r7 __asm__("r7");
+        register uintptr_t r9 __asm__("r9");
+        register uintptr_t r10 __asm__("r10");
+
+        r11 = FH_HCALL_TOKEN(FH_PARTITION_SET_DTPROP);
+        r3 = handle;
+
+#ifdef CONFIG_PHYS_64BIT
+        r4 = dtpath_addr >> 32;
+        r6 = propname_addr >> 32;
+        r8 = propvalue_addr >> 32;
+#else
+        r4 = 0;
+        r6 = 0;
+        r8 = 0;
+#endif
+        r5 = (uint32_t)dtpath_addr;
+        r7 = (uint32_t)propname_addr;
+        r9 = (uint32_t)propvalue_addr;
+        r10 = propvalue_len;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11),
+                  "+r" (r3), "+r" (r4), "+r" (r5), "+r" (r6), "+r" (r7),
+                  "+r" (r8), "+r" (r9), "+r" (r10)
+                : : EV_HCALL_CLOBBERS8
+        );
+
+        return r3;
+}
+
+/**
+ * fh_partition_restart - reboot the current partition
+ * @partition: partition ID
+ *
+ * Returns an error code if reboot failed.  Does not return if it succeeds.
+ */
+static inline unsigned int fh_partition_restart(unsigned int partition)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+
+        r11 = FH_HCALL_TOKEN(FH_PARTITION_RESTART);
+        r3 = partition;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3)
+                : : EV_HCALL_CLOBBERS1
+        );
+
+        return r3;
+}
+
+#define FH_PARTITION_STOPPED    0
+#define FH_PARTITION_RUNNING    1
+#define FH_PARTITION_STARTING   2
+#define FH_PARTITION_STOPPING   3
+#define FH_PARTITION_PAUSING    4
+#define FH_PARTITION_PAUSED     5
+#define FH_PARTITION_RESUMING   6
+
+/**
+ * fh_partition_get_status - gets the status of a partition
+ * @partition: partition ID
+ * @status: returned status code
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int fh_partition_get_status(unsigned int partition,
+        unsigned int *status)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+
+        r11 = FH_HCALL_TOKEN(FH_PARTITION_GET_STATUS);
+        r3 = partition;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3), "=r" (r4)
+                : : EV_HCALL_CLOBBERS2
+        );
+
+        *status = r4;
+
+        return r3;
+}
+
+/**
+ * fh_partition_start - boots and starts execution of the specified partition
+ * @partition: partition ID
+ * @entry_point: guest physical address to start execution
+ *
+ * The hypervisor creates a 1-to-1 virtual/physical IMA mapping, so at boot
+ * time, guest physical address are the same as guest virtual addresses.
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int fh_partition_start(unsigned int partition,
+        uint32_t entry_point, int load)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+        register uintptr_t r5 __asm__("r5");
+
+        r11 = FH_HCALL_TOKEN(FH_PARTITION_START);
+        r3 = partition;
+        r4 = entry_point;
+        r5 = load;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3), "+r" (r4), "+r" (r5)
+                : : EV_HCALL_CLOBBERS3
+        );
+
+        return r3;
+}
+
+/**
+ * fh_partition_stop - stops another partition
+ * @partition: partition ID
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int fh_partition_stop(unsigned int partition)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+
+        r11 = FH_HCALL_TOKEN(FH_PARTITION_STOP);
+        r3 = partition;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3)
+                : : EV_HCALL_CLOBBERS1
+        );
+
+        return r3;
+}
+
+/**
+ * struct fh_sg_list: definition of the fh_partition_memcpy S/G list
+ * @source: guest physical address to copy from
+ * @target: guest physical address to copy to
+ * @size: number of bytes to copy
+ * @reserved: reserved, must be zero
+ *
+ * The scatter/gather list for fh_partition_memcpy() is an array of these
+ * structures.  The array must be guest physically contiguous.
+ *
+ * This structure must be aligned on 32-byte boundary, so that no single
+ * strucuture can span two pages.
+ */
+struct fh_sg_list {
+        uint64_t source;   /**< guest physical address to copy from */
+        uint64_t target;   /**< guest physical address to copy to */
+        uint64_t size;     /**< number of bytes to copy */
+        uint64_t reserved; /**< reserved, must be zero */
+} __attribute__ ((aligned(32)));
+
+/**
+ * fh_partition_memcpy - copies data from one guest to another
+ * @source: the ID of the partition to copy from
+ * @target: the ID of the partition to copy to
+ * @sg_list: guest physical address of an array of &fh_sg_list structures
+ * @count: the number of entries in @sg_list
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int fh_partition_memcpy(unsigned int source,
+        unsigned int target, phys_addr_t sg_list, unsigned int count)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+        register uintptr_t r5 __asm__("r5");
+        register uintptr_t r6 __asm__("r6");
+        register uintptr_t r7 __asm__("r7");
+
+        r11 = FH_HCALL_TOKEN(FH_PARTITION_MEMCPY);
+        r3 = source;
+        r4 = target;
+        r5 = (uint32_t) sg_list;
+
+#ifdef CONFIG_PHYS_64BIT
+        r6 = sg_list >> 32;
+#else
+        r6 = 0;
+#endif
+        r7 = count;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11),
+                  "+r" (r3), "+r" (r4), "+r" (r5), "+r" (r6), "+r" (r7)
+                : : EV_HCALL_CLOBBERS5
+        );
+
+        return r3;
+}
+
+/**
+ * fh_dma_enable - enable DMA for the specified device
+ * @liodn: the LIODN of the I/O device for which to enable DMA
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int fh_dma_enable(unsigned int liodn)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+
+        r11 = FH_HCALL_TOKEN(FH_DMA_ENABLE);
+        r3 = liodn;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3)
+                : : EV_HCALL_CLOBBERS1
+        );
+
+        return r3;
+}
+
+/**
+ * fh_dma_disable - disable DMA for the specified device
+ * @liodn: the LIODN of the I/O device for which to disable DMA
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int fh_dma_disable(unsigned int liodn)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+
+        r11 = FH_HCALL_TOKEN(FH_DMA_DISABLE);
+        r3 = liodn;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3)
+                : : EV_HCALL_CLOBBERS1
+        );
+
+        return r3;
+}
+
+
+/**
+ * fh_vmpic_get_msir - returns the MPIC-MSI register value
+ * @interrupt: the interrupt number
+ * @msir_val: returned MPIC-MSI register value
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int fh_vmpic_get_msir(unsigned int interrupt,
+        unsigned int *msir_val)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+
+        r11 = FH_HCALL_TOKEN(FH_VMPIC_GET_MSIR);
+        r3 = interrupt;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3), "=r" (r4)
+                : : EV_HCALL_CLOBBERS2
+        );
+
+        *msir_val = r4;
+
+        return r3;
+}
+
+/**
+ * fh_system_reset - reset the system
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int fh_system_reset(void)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+
+        r11 = FH_HCALL_TOKEN(FH_SYSTEM_RESET);
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "=r" (r3)
+                : : EV_HCALL_CLOBBERS1
+        );
+
+        return r3;
+}
+
+
+/**
+ * fh_err_get_info - get platform error information
+ * @queue id:
+ * 0 for guest error event queue
+ * 1 for global error event queue
+ *
+ * @pointer to store the platform error data:
+ * platform error data is returned in registers r4 - r11
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int fh_err_get_info(int queue, uint32_t *bufsize,
+        uint32_t addr_hi, uint32_t addr_lo, int peek)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+        register uintptr_t r5 __asm__("r5");
+        register uintptr_t r6 __asm__("r6");
+        register uintptr_t r7 __asm__("r7");
+
+        r11 = FH_HCALL_TOKEN(FH_ERR_GET_INFO);
+        r3 = queue;
+        r4 = *bufsize;
+        r5 = addr_hi;
+        r6 = addr_lo;
+        r7 = peek;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3), "+r" (r4), "+r" (r5), "+r" (r6),
+                  "+r" (r7)
+                : : EV_HCALL_CLOBBERS5
+        );
+
+        *bufsize = r4;
+
+        return r3;
+}
+
+
+#define FH_VCPU_RUN     0
+#define FH_VCPU_IDLE    1
+#define FH_VCPU_NAP     2
+
+/**
+ * fh_get_core_state - get the state of a vcpu
+ *
+ * @handle: handle of partition containing the vcpu
+ * @vcpu: vcpu number within the partition
+ * @state:the current state of the vcpu, see FH_VCPU_*
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int fh_get_core_state(unsigned int handle,
+        unsigned int vcpu, unsigned int *state)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+
+        r11 = FH_HCALL_TOKEN(FH_GET_CORE_STATE);
+        r3 = handle;
+        r4 = vcpu;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3), "+r" (r4)
+                : : EV_HCALL_CLOBBERS2
+        );
+
+        *state = r4;
+        return r3;
+}
+
+/**
+ * fh_enter_nap - enter nap on a vcpu
+ *
+ * Note that though the API supports entering nap on a vcpu other
+ * than the caller, this may not be implmented and may return EINVAL.
+ *
+ * @handle: handle of partition containing the vcpu
+ * @vcpu: vcpu number within the partition
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int fh_enter_nap(unsigned int handle, unsigned int vcpu)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+
+        r11 = FH_HCALL_TOKEN(FH_ENTER_NAP);
+        r3 = handle;
+        r4 = vcpu;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3), "+r" (r4)
+                : : EV_HCALL_CLOBBERS2
+        );
+
+        return r3;
+}
+
+/**
+ * fh_exit_nap - exit nap on a vcpu
+ * @handle: handle of partition containing the vcpu
+ * @vcpu: vcpu number within the partition
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int fh_exit_nap(unsigned int handle, unsigned int vcpu)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+        register uintptr_t r4 __asm__("r4");
+
+        r11 = FH_HCALL_TOKEN(FH_EXIT_NAP);
+        r3 = handle;
+        r4 = vcpu;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3), "+r" (r4)
+                : : EV_HCALL_CLOBBERS2
+        );
+
+        return r3;
+}
+/**
+ * fh_claim_device - claim a "claimable" shared device
+ * @handle: fsl,hv-device-handle of node to claim
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int fh_claim_device(unsigned int handle)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+
+        r11 = FH_HCALL_TOKEN(FH_CLAIM_DEVICE);
+        r3 = handle;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3)
+                : : EV_HCALL_CLOBBERS1
+        );
+
+        return r3;
+}
+
+/**
+ * Run deferred DMA disabling on a partition's private devices
+ *
+ * This applies to devices which a partition owns either privately,
+ * or which are claimable and still actively owned by that partition,
+ * and which do not have the no-dma-disable property.
+ *
+ * @handle: partition (must be stopped) whose DMA is to be disabled
+ *
+ * Returns 0 for success, or an error code.
+ */
+static inline unsigned int fh_partition_stop_dma(unsigned int handle)
+{
+        register uintptr_t r11 __asm__("r11");
+        register uintptr_t r3 __asm__("r3");
+
+        r11 = FH_HCALL_TOKEN(FH_PARTITION_STOP_DMA);
+        r3 = handle;
+
+        __asm__ __volatile__ ("sc 1"
+                : "+r" (r11), "+r" (r3)
+                : : EV_HCALL_CLOBBERS1
+        );
+
+        return r3;
+}
+#endif
diff --git a/arch/powerpc/include/asm/hvcall.h b/arch/powerpc/include/asm/hvcall.h
index fd8201dddd4b..1c324ff55ea8 100644
--- a/arch/powerpc/include/asm/hvcall.h
+++ b/arch/powerpc/include/asm/hvcall.h
@@ -29,6 +29,10 @@
 #define H_LONG_BUSY_ORDER_100_SEC       9905  /* Long busy, hint that 100sec \
                                                  is a good time to retry */
 #define H_LONG_BUSY_END_RANGE           9905  /* End of long busy range */
+
+/* Internal value used in book3s_hv kvm support; not returned to guests */
+#define H_TOO_HARD      9999
+
 #define H_HARDWARE      -1      /* Hardware error */
 #define H_FUNCTION      -2      /* Function not supported */
 #define H_PRIVILEGE     -3      /* Caller not privileged */
@@ -100,6 +104,7 @@
 #define H_PAGE_SET_ACTIVE       H_PAGE_STATE_CHANGE
 #define H_AVPN                  (1UL<<(63-32))  /* An avpn is provided as a sanity test */
 #define H_ANDCOND               (1UL<<(63-33))
+#define H_LOCAL                 (1UL<<(63-35))
 #define H_ICACHE_INVALIDATE     (1UL<<(63-40))  /* icbi, etc.  (ignored for IO pages) */
 #define H_ICACHE_SYNCHRONIZE    (1UL<<(63-41))  /* dcbst, icbi, etc (ignored for IO pages */
 #define H_COALESCE_CAND (1UL<<(63-42))  /* page is a good candidate for coalescing */
diff --git a/arch/powerpc/include/asm/hvsi.h b/arch/powerpc/include/asm/hvsi.h
new file mode 100644
index 000000000000..d3f64f361814
--- /dev/null
+++ b/arch/powerpc/include/asm/hvsi.h
@@ -0,0 +1,94 @@
+#ifndef _HVSI_H
+#define _HVSI_H
+
+#define VS_DATA_PACKET_HEADER           0xff
+#define VS_CONTROL_PACKET_HEADER        0xfe
+#define VS_QUERY_PACKET_HEADER          0xfd
+#define VS_QUERY_RESPONSE_PACKET_HEADER 0xfc
+
+/* control verbs */
+#define VSV_SET_MODEM_CTL    1 /* to service processor only */
+#define VSV_MODEM_CTL_UPDATE 2 /* from service processor only */
+#define VSV_CLOSE_PROTOCOL   3
+
+/* query verbs */
+#define VSV_SEND_VERSION_NUMBER 1
+#define VSV_SEND_MODEM_CTL_STATUS 2
+
+/* yes, these masks are not consecutive. */
+#define HVSI_TSDTR 0x01
+#define HVSI_TSCD  0x20
+
+#define HVSI_MAX_OUTGOING_DATA 12
+#define HVSI_VERSION 1
+
+struct hvsi_header {
+        uint8_t  type;
+        uint8_t  len;
+        uint16_t seqno;
+} __attribute__((packed));
+
+struct hvsi_data {
+        struct hvsi_header hdr;
+        uint8_t  data[HVSI_MAX_OUTGOING_DATA];
+} __attribute__((packed));
+
+struct hvsi_control {
+        struct hvsi_header hdr;
+        uint16_t verb;
+        /* optional depending on verb: */
+        uint32_t word;
+        uint32_t mask;
+} __attribute__((packed));
+
+struct hvsi_query {
+        struct hvsi_header hdr;
+        uint16_t verb;
+} __attribute__((packed));
+
+struct hvsi_query_response {
+        struct hvsi_header hdr;
+        uint16_t verb;
+        uint16_t query_seqno;
+        union {
+                uint8_t  version;
+                uint32_t mctrl_word;
+        } u;
+} __attribute__((packed));
+
+/* hvsi lib struct definitions */
+#define HVSI_INBUF_SIZE         255
+struct tty_struct;
+struct hvsi_priv {
+        unsigned int    inbuf_len;      /* data in input buffer */
+        unsigned char   inbuf[HVSI_INBUF_SIZE];
+        unsigned int    inbuf_cur;      /* Cursor in input buffer */
+        unsigned int    inbuf_pktlen;   /* packet lenght from cursor */
+        atomic_t        seqno;          /* packet sequence number */
+        unsigned int    opened:1;       /* driver opened */
+        unsigned int    established:1;  /* protocol established */
+        unsigned int    is_console:1;   /* used as a kernel console device */
+        unsigned int    mctrl_update:1; /* modem control updated */
+        unsigned short  mctrl;          /* modem control */
+        struct tty_struct *tty;         /* tty structure */
+        int (*get_chars)(uint32_t termno, char *buf, int count);
+        int (*put_chars)(uint32_t termno, const char *buf, int count);
+        uint32_t        termno;
+};
+
+/* hvsi lib functions */
+struct hvc_struct;
+extern void hvsilib_init(struct hvsi_priv *pv,
+                         int (*get_chars)(uint32_t termno, char *buf, int count),
+                         int (*put_chars)(uint32_t termno, const char *buf,
+                                          int count),
+                         int termno, int is_console);
+extern int hvsilib_open(struct hvsi_priv *pv, struct hvc_struct *hp);
+extern void hvsilib_close(struct hvsi_priv *pv, struct hvc_struct *hp);
+extern int hvsilib_read_mctrl(struct hvsi_priv *pv);
+extern int hvsilib_write_mctrl(struct hvsi_priv *pv, int dtr);
+extern void hvsilib_establish(struct hvsi_priv *pv);
+extern int hvsilib_get_chars(struct hvsi_priv *pv, char *buf, int count);
+extern int hvsilib_put_chars(struct hvsi_priv *pv, const char *buf, int count);
+
+#endif /* _HVSI_H */
diff --git a/arch/powerpc/include/asm/hw_breakpoint.h b/arch/powerpc/include/asm/hw_breakpoint.h
index 1c33ec17ca36..80fd4d2b4a62 100644
--- a/arch/powerpc/include/asm/hw_breakpoint.h
+++ b/arch/powerpc/include/asm/hw_breakpoint.h
@@ -57,7 +57,7 @@ void hw_breakpoint_pmu_read(struct perf_event *bp);
 extern void flush_ptrace_hw_breakpoint(struct task_struct *tsk);
 
 extern struct pmu perf_ops_bp;
-extern void ptrace_triggered(struct perf_event *bp, int nmi,
+extern void ptrace_triggered(struct perf_event *bp,
                         struct perf_sample_data *data, struct pt_regs *regs);
 static inline void hw_breakpoint_disable(void)
 {
diff --git a/arch/powerpc/include/asm/irq.h b/arch/powerpc/include/asm/irq.h
index 1bff591f7f72..c0e1bc319e35 100644
--- a/arch/powerpc/include/asm/irq.h
+++ b/arch/powerpc/include/asm/irq.h
@@ -14,7 +14,7 @@
 #include <linux/radix-tree.h>
 
 #include <asm/types.h>
-#include <asm/atomic.h>
+#include <linux/atomic.h>
 
 
 /* Define a way to iterate across irqs. */
@@ -330,5 +330,7 @@ extern int call_handle_irq(int irq, void *p1,
                            struct thread_info *tp, void *func);
 extern void do_IRQ(struct pt_regs *regs);
 
+int irq_choose_cpu(const struct cpumask *mask);
+
 #endif /* _ASM_IRQ_H */
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/jump_label.h b/arch/powerpc/include/asm/jump_label.h
new file mode 100644
index 000000000000..1f780b95c0f0
--- /dev/null
+++ b/arch/powerpc/include/asm/jump_label.h
@@ -0,0 +1,47 @@
+#ifndef _ASM_POWERPC_JUMP_LABEL_H
+#define _ASM_POWERPC_JUMP_LABEL_H
+
+/*
+ * Copyright 2010 Michael Ellerman, IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/types.h>
+
+#include <asm/feature-fixups.h>
+
+#define JUMP_ENTRY_TYPE         stringify_in_c(FTR_ENTRY_LONG)
+#define JUMP_LABEL_NOP_SIZE     4
+
+static __always_inline bool arch_static_branch(struct jump_label_key *key)
+{
+        asm goto("1:\n\t"
+                 "nop\n\t"
+                 ".pushsection __jump_table,  \"aw\"\n\t"
+                 ".align 4\n\t"
+                 JUMP_ENTRY_TYPE "1b, %l[l_yes], %c0\n\t"
+                 ".popsection \n\t"
+                 : :  "i" (key) : : l_yes);
+        return false;
+l_yes:
+        return true;
+}
+
+#ifdef CONFIG_PPC64
+typedef u64 jump_label_t;
+#else
+typedef u32 jump_label_t;
+#endif
+
+struct jump_entry {
+        jump_label_t code;
+        jump_label_t target;
+        jump_label_t key;
+        jump_label_t pad;
+};
+
+#endif /* _ASM_POWERPC_JUMP_LABEL_H */
diff --git a/arch/powerpc/include/asm/kvm.h b/arch/powerpc/include/asm/kvm.h
index d2ca5ed3877b..a4f6c85431f8 100644
--- a/arch/powerpc/include/asm/kvm.h
+++ b/arch/powerpc/include/asm/kvm.h
@@ -22,6 +22,10 @@
 
 #include <linux/types.h>
 
+/* Select powerpc specific features in <linux/kvm.h> */
+#define __KVM_HAVE_SPAPR_TCE
+#define __KVM_HAVE_PPC_SMT
+
 struct kvm_regs {
         __u64 pc;
         __u64 cr;
@@ -272,4 +276,15 @@ struct kvm_guest_debug_arch {
 #define KVM_INTERRUPT_UNSET     -2U
 #define KVM_INTERRUPT_SET_LEVEL -3U
 
+/* for KVM_CAP_SPAPR_TCE */
+struct kvm_create_spapr_tce {
+        __u64 liobn;
+        __u32 window_size;
+};
+
+/* for KVM_ALLOCATE_RMA */
+struct kvm_allocate_rma {
+        __u64 rma_size;
+};
+
 #endif /* __LINUX_KVM_POWERPC_H */
diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h
index 0951b17f4eb5..7b1f0e0fc653 100644
--- a/arch/powerpc/include/asm/kvm_asm.h
+++ b/arch/powerpc/include/asm/kvm_asm.h
@@ -64,8 +64,12 @@
 #define BOOK3S_INTERRUPT_PROGRAM        0x700
 #define BOOK3S_INTERRUPT_FP_UNAVAIL     0x800
 #define BOOK3S_INTERRUPT_DECREMENTER    0x900
+#define BOOK3S_INTERRUPT_HV_DECREMENTER 0x980
 #define BOOK3S_INTERRUPT_SYSCALL        0xc00
 #define BOOK3S_INTERRUPT_TRACE          0xd00
+#define BOOK3S_INTERRUPT_H_DATA_STORAGE 0xe00
+#define BOOK3S_INTERRUPT_H_INST_STORAGE 0xe20
+#define BOOK3S_INTERRUPT_H_EMUL_ASSIST  0xe40
 #define BOOK3S_INTERRUPT_PERFMON        0xf00
 #define BOOK3S_INTERRUPT_ALTIVEC        0xf20
 #define BOOK3S_INTERRUPT_VSX            0xf40
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index d62e703f1214..98da010252a3 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -24,20 +24,6 @@
 #include <linux/kvm_host.h>
 #include <asm/kvm_book3s_asm.h>
 
-struct kvmppc_slb {
-        u64 esid;
-        u64 vsid;
-        u64 orige;
-        u64 origv;
-        bool valid      : 1;
-        bool Ks         : 1;
-        bool Kp         : 1;
-        bool nx         : 1;
-        bool large      : 1;    /* PTEs are 16MB */
-        bool tb         : 1;    /* 1TB segment */
-        bool class      : 1;
-};
-
 struct kvmppc_bat {
         u64 raw;
         u32 bepi;
@@ -67,11 +53,22 @@ struct kvmppc_sid_map {
 #define VSID_POOL_SIZE  (SID_CONTEXTS * 16)
 #endif
 
+struct hpte_cache {
+        struct hlist_node list_pte;
+        struct hlist_node list_pte_long;
+        struct hlist_node list_vpte;
+        struct hlist_node list_vpte_long;
+        struct rcu_head rcu_head;
+        u64 host_va;
+        u64 pfn;
+        ulong slot;
+        struct kvmppc_pte pte;
+};
+
 struct kvmppc_vcpu_book3s {
         struct kvm_vcpu vcpu;
         struct kvmppc_book3s_shadow_vcpu *shadow_vcpu;
         struct kvmppc_sid_map sid_map[SID_MAP_NUM];
-        struct kvmppc_slb slb[64];
         struct {
                 u64 esid;
                 u64 vsid;
@@ -81,7 +78,6 @@ struct kvmppc_vcpu_book3s {
         struct kvmppc_bat dbat[8];
         u64 hid[6];
         u64 gqr[8];
-        int slb_nr;
         u64 sdr1;
         u64 hior;
         u64 msr_mask;
@@ -93,7 +89,13 @@ struct kvmppc_vcpu_book3s {
         u64 vsid_max;
 #endif
         int context_id[SID_CONTEXTS];
-        ulong prog_flags; /* flags to inject when giving a 700 trap */
+
+        struct hlist_head hpte_hash_pte[HPTEG_HASH_NUM_PTE];
+        struct hlist_head hpte_hash_pte_long[HPTEG_HASH_NUM_PTE_LONG];
+        struct hlist_head hpte_hash_vpte[HPTEG_HASH_NUM_VPTE];
+        struct hlist_head hpte_hash_vpte_long[HPTEG_HASH_NUM_VPTE_LONG];
+        int hpte_cache_count;
+        spinlock_t mmu_lock;
 };
 
 #define CONTEXT_HOST            0
@@ -110,8 +112,10 @@ extern void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong ea, ulong ea_mask)
 extern void kvmppc_mmu_pte_vflush(struct kvm_vcpu *vcpu, u64 vp, u64 vp_mask);
 extern void kvmppc_mmu_pte_pflush(struct kvm_vcpu *vcpu, ulong pa_start, ulong pa_end);
 extern void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 new_msr);
+extern void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr);
 extern void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu);
 extern void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu);
+extern void kvmppc_mmu_book3s_hv_init(struct kvm_vcpu *vcpu);
 extern int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte);
 extern int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr);
 extern void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu);
@@ -123,19 +127,22 @@ extern int kvmppc_mmu_hpte_init(struct kvm_vcpu *vcpu);
 extern void kvmppc_mmu_invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte);
 extern int kvmppc_mmu_hpte_sysinit(void);
 extern void kvmppc_mmu_hpte_sysexit(void);
+extern int kvmppc_mmu_hv_init(void);
 
 extern int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, bool data);
 extern int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, bool data);
 extern void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec);
+extern void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags);
 extern void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat,
                            bool upper, u32 val);
 extern void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr);
 extern int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu);
 extern pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn);
 
-extern ulong kvmppc_trampoline_lowmem;
-extern ulong kvmppc_trampoline_enter;
+extern void kvmppc_handler_lowmem_trampoline(void);
+extern void kvmppc_handler_trampoline_enter(void);
 extern void kvmppc_rmcall(ulong srr0, ulong srr1);
+extern void kvmppc_hv_entry_trampoline(void);
 extern void kvmppc_load_up_fpu(void);
 extern void kvmppc_load_up_altivec(void);
 extern void kvmppc_load_up_vsx(void);
@@ -147,15 +154,32 @@ static inline struct kvmppc_vcpu_book3s *to_book3s(struct kvm_vcpu *vcpu)
         return container_of(vcpu, struct kvmppc_vcpu_book3s, vcpu);
 }
 
-static inline ulong dsisr(void)
+extern void kvm_return_point(void);
+
+/* Also add subarch specific defines */
+
+#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
+#include <asm/kvm_book3s_32.h>
+#endif
+#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
+#include <asm/kvm_book3s_64.h>
+#endif
+
+#ifdef CONFIG_KVM_BOOK3S_PR
+
+static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
 {
-        ulong r;
-        asm ( "mfdsisr %0 " : "=r" (r) );
-        return r;
+        return to_book3s(vcpu)->hior;
 }
 
-extern void kvm_return_point(void);
-static inline struct kvmppc_book3s_shadow_vcpu *to_svcpu(struct kvm_vcpu *vcpu);
+static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
+                        unsigned long pending_now, unsigned long old_pending)
+{
+        if (pending_now)
+                vcpu->arch.shared->int_pending = 1;
+        else if (old_pending)
+                vcpu->arch.shared->int_pending = 0;
+}
 
 static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val)
 {
@@ -244,6 +268,120 @@ static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu *vcpu)
         return to_svcpu(vcpu)->fault_dar;
 }
 
+static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
+{
+        ulong crit_raw = vcpu->arch.shared->critical;
+        ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
+        bool crit;
+
+        /* Truncate crit indicators in 32 bit mode */
+        if (!(vcpu->arch.shared->msr & MSR_SF)) {
+                crit_raw &= 0xffffffff;
+                crit_r1 &= 0xffffffff;
+        }
+
+        /* Critical section when crit == r1 */
+        crit = (crit_raw == crit_r1);
+        /* ... and we're in supervisor mode */
+        crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
+
+        return crit;
+}
+#else /* CONFIG_KVM_BOOK3S_PR */
+
+static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu)
+{
+        return 0;
+}
+
+static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu,
+                        unsigned long pending_now, unsigned long old_pending)
+{
+}
+
+static inline void kvmppc_set_gpr(struct kvm_vcpu *vcpu, int num, ulong val)
+{
+        vcpu->arch.gpr[num] = val;
+}
+
+static inline ulong kvmppc_get_gpr(struct kvm_vcpu *vcpu, int num)
+{
+        return vcpu->arch.gpr[num];
+}
+
+static inline void kvmppc_set_cr(struct kvm_vcpu *vcpu, u32 val)
+{
+        vcpu->arch.cr = val;
+}
+
+static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu)
+{
+        return vcpu->arch.cr;
+}
+
+static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val)
+{
+        vcpu->arch.xer = val;
+}
+
+static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu)
+{
+        return vcpu->arch.xer;
+}
+
+static inline void kvmppc_set_ctr(struct kvm_vcpu *vcpu, ulong val)
+{
+        vcpu->arch.ctr = val;
+}
+
+static inline ulong kvmppc_get_ctr(struct kvm_vcpu *vcpu)
+{
+        return vcpu->arch.ctr;
+}
+
+static inline void kvmppc_set_lr(struct kvm_vcpu *vcpu, ulong val)
+{
+        vcpu->arch.lr = val;
+}
+
+static inline ulong kvmppc_get_lr(struct kvm_vcpu *vcpu)
+{
+        return vcpu->arch.lr;
+}
+
+static inline void kvmppc_set_pc(struct kvm_vcpu *vcpu, ulong val)
+{
+        vcpu->arch.pc = val;
+}
+
+static inline ulong kvmppc_get_pc(struct kvm_vcpu *vcpu)
+{
+        return vcpu->arch.pc;
+}
+
+static inline u32 kvmppc_get_last_inst(struct kvm_vcpu *vcpu)
+{
+        ulong pc = kvmppc_get_pc(vcpu);
+
+        /* Load the instruction manually if it failed to do so in the
+         * exit path */
+        if (vcpu->arch.last_inst == KVM_INST_FETCH_FAILED)
+                kvmppc_ld(vcpu, &pc, sizeof(u32), &vcpu->arch.last_inst, false);
+
+        return vcpu->arch.last_inst;
+}
+
+static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu *vcpu)
+{
+        return vcpu->arch.fault_dar;
+}
+
+static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
+{
+        return false;
+}
+#endif
+
 /* Magic register values loaded into r3 and r4 before the 'sc' assembly
  * instruction for the OSI hypercalls */
 #define OSI_SC_MAGIC_R3                 0x113724FA
@@ -251,12 +389,4 @@ static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu *vcpu)
 
 #define INS_DCBZ                        0x7c0007ec
 
-/* Also add subarch specific defines */
-
-#ifdef CONFIG_PPC_BOOK3S_32
-#include <asm/kvm_book3s_32.h>
-#else
-#include <asm/kvm_book3s_64.h>
-#endif
-
 #endif /* __ASM_KVM_BOOK3S_H__ */
diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h b/arch/powerpc/include/asm/kvm_book3s_64.h
index 4cadd612d575..e43fe42b9875 100644
--- a/arch/powerpc/include/asm/kvm_book3s_64.h
+++ b/arch/powerpc/include/asm/kvm_book3s_64.h
@@ -20,9 +20,13 @@
 #ifndef __ASM_KVM_BOOK3S_64_H__
 #define __ASM_KVM_BOOK3S_64_H__
 
+#ifdef CONFIG_KVM_BOOK3S_PR
 static inline struct kvmppc_book3s_shadow_vcpu *to_svcpu(struct kvm_vcpu *vcpu)
 {
         return &get_paca()->shadow_vcpu;
 }
+#endif
+
+#define SPAPR_TCE_SHIFT         12
 
 #endif /* __ASM_KVM_BOOK3S_64_H__ */
diff --git a/arch/powerpc/include/asm/kvm_book3s_asm.h b/arch/powerpc/include/asm/kvm_book3s_asm.h
index d5a8a3861635..ef7b3688c3b6 100644
--- a/arch/powerpc/include/asm/kvm_book3s_asm.h
+++ b/arch/powerpc/include/asm/kvm_book3s_asm.h
@@ -60,6 +60,36 @@ kvmppc_resume_\intno:
 
 #else  /*__ASSEMBLY__ */
 
+/*
+ * This struct goes in the PACA on 64-bit processors.  It is used
+ * to store host state that needs to be saved when we enter a guest
+ * and restored when we exit, but isn't specific to any particular
+ * guest or vcpu.  It also has some scratch fields used by the guest
+ * exit code.
+ */
+struct kvmppc_host_state {
+        ulong host_r1;
+        ulong host_r2;
+        ulong host_msr;
+        ulong vmhandler;
+        ulong scratch0;
+        ulong scratch1;
+        u8 in_guest;
+
+#ifdef CONFIG_KVM_BOOK3S_64_HV
+        struct kvm_vcpu *kvm_vcpu;
+        struct kvmppc_vcore *kvm_vcore;
+        unsigned long xics_phys;
+        u64 dabr;
+        u64 host_mmcr[3];
+        u32 host_pmc[8];
+        u64 host_purr;
+        u64 host_spurr;
+        u64 host_dscr;
+        u64 dec_expires;
+#endif
+};
+
 struct kvmppc_book3s_shadow_vcpu {
         ulong gpr[14];
         u32 cr;
@@ -73,17 +103,12 @@ struct kvmppc_book3s_shadow_vcpu {
         ulong shadow_srr1;
         ulong fault_dar;
 
-        ulong host_r1;
-        ulong host_r2;
-        ulong handler;
-        ulong scratch0;
-        ulong scratch1;
-        ulong vmhandler;
-        u8 in_guest;
-
 #ifdef CONFIG_PPC_BOOK3S_32
         u32     sr[16];                 /* Guest SRs */
+
+        struct kvmppc_host_state hstate;
 #endif
+
 #ifdef CONFIG_PPC_BOOK3S_64
         u8 slb_max;                     /* highest used guest slb entry */
         struct  {
diff --git a/arch/powerpc/include/asm/kvm_booke.h b/arch/powerpc/include/asm/kvm_booke.h
index 9c9ba3d59b1b..a90e09188777 100644
--- a/arch/powerpc/include/asm/kvm_booke.h
+++ b/arch/powerpc/include/asm/kvm_booke.h
@@ -93,4 +93,8 @@ static inline ulong kvmppc_get_fault_dar(struct kvm_vcpu *vcpu)
         return vcpu->arch.fault_dear;
 }
 
+static inline ulong kvmppc_get_msr(struct kvm_vcpu *vcpu)
+{
+        return vcpu->arch.shared->msr;
+}
 #endif /* __ASM_KVM_BOOKE_H__ */
diff --git a/arch/powerpc/include/asm/kvm_e500.h b/arch/powerpc/include/asm/kvm_e500.h
index 7a2a565f88c4..adbfca9dd100 100644
--- a/arch/powerpc/include/asm/kvm_e500.h
+++ b/arch/powerpc/include/asm/kvm_e500.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
  *
  * Author: Yu Liu, <yu.liu@freescale.com>
  *
@@ -29,17 +29,25 @@ struct tlbe{
         u32 mas7;
 };
 
+#define E500_TLB_VALID 1
+#define E500_TLB_DIRTY 2
+
+struct tlbe_priv {
+        pfn_t pfn;
+        unsigned int flags; /* E500_TLB_* */
+};
+
+struct vcpu_id_table;
+
 struct kvmppc_vcpu_e500 {
         /* Unmodified copy of the guest's TLB. */
-        struct tlbe *guest_tlb[E500_TLB_NUM];
-        /* TLB that's actually used when the guest is running. */
-        struct tlbe *shadow_tlb[E500_TLB_NUM];
-        /* Pages which are referenced in the shadow TLB. */
-        struct page **shadow_pages[E500_TLB_NUM];
+        struct tlbe *gtlb_arch[E500_TLB_NUM];
 
-        unsigned int guest_tlb_size[E500_TLB_NUM];
-        unsigned int shadow_tlb_size[E500_TLB_NUM];
-        unsigned int guest_tlb_nv[E500_TLB_NUM];
+        /* KVM internal information associated with each guest TLB entry */
+        struct tlbe_priv *gtlb_priv[E500_TLB_NUM];
+
+        unsigned int gtlb_size[E500_TLB_NUM];
+        unsigned int gtlb_nv[E500_TLB_NUM];
 
         u32 host_pid[E500_PID_NUM];
         u32 pid[E500_PID_NUM];
@@ -53,6 +61,10 @@ struct kvmppc_vcpu_e500 {
         u32 mas5;
         u32 mas6;
         u32 mas7;
+
+        /* vcpu id table */
+        struct vcpu_id_table *idt;
+
         u32 l1csr0;
         u32 l1csr1;
         u32 hid0;
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index 186f150b9b89..cc22b282d755 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -25,15 +25,23 @@
 #include <linux/interrupt.h>
 #include <linux/types.h>
 #include <linux/kvm_types.h>
+#include <linux/threads.h>
+#include <linux/spinlock.h>
 #include <linux/kvm_para.h>
+#include <linux/list.h>
+#include <linux/atomic.h>
 #include <asm/kvm_asm.h>
+#include <asm/processor.h>
 
-#define KVM_MAX_VCPUS 1
+#define KVM_MAX_VCPUS           NR_CPUS
+#define KVM_MAX_VCORES          NR_CPUS
 #define KVM_MEMORY_SLOTS 32
 /* memory slots that does not exposed to userspace */
 #define KVM_PRIVATE_MEM_SLOTS 4
 
+#ifdef CONFIG_KVM_MMIO
 #define KVM_COALESCED_MMIO_PAGE_OFFSET 1
+#endif
 
 /* We don't currently support large pages. */
 #define KVM_HPAGE_GFN_SHIFT(x)  0
@@ -57,6 +65,10 @@ struct kvm;
 struct kvm_run;
 struct kvm_vcpu;
 
+struct lppaca;
+struct slb_shadow;
+struct dtl;
+
 struct kvm_vm_stat {
         u32 remote_tlb_flush;
 };
@@ -133,9 +145,74 @@ struct kvmppc_exit_timing {
         };
 };
 
+struct kvmppc_pginfo {
+        unsigned long pfn;
+        atomic_t refcnt;
+};
+
+struct kvmppc_spapr_tce_table {
+        struct list_head list;
+        struct kvm *kvm;
+        u64 liobn;
+        u32 window_size;
+        struct page *pages[0];
+};
+
+struct kvmppc_rma_info {
+        void            *base_virt;
+        unsigned long    base_pfn;
+        unsigned long    npages;
+        struct list_head list;
+        atomic_t         use_count;
+};
+
 struct kvm_arch {
+#ifdef CONFIG_KVM_BOOK3S_64_HV
+        unsigned long hpt_virt;
+        unsigned long ram_npages;
+        unsigned long ram_psize;
+        unsigned long ram_porder;
+        struct kvmppc_pginfo *ram_pginfo;
+        unsigned int lpid;
+        unsigned int host_lpid;
+        unsigned long host_lpcr;
+        unsigned long sdr1;
+        unsigned long host_sdr1;
+        int tlbie_lock;
+        int n_rma_pages;
+        unsigned long lpcr;
+        unsigned long rmor;
+        struct kvmppc_rma_info *rma;
+        struct list_head spapr_tce_tables;
+        unsigned short last_vcpu[NR_CPUS];
+        struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
+#endif /* CONFIG_KVM_BOOK3S_64_HV */
 };
 
+/*
+ * Struct for a virtual core.
+ * Note: entry_exit_count combines an entry count in the bottom 8 bits
+ * and an exit count in the next 8 bits.  This is so that we can
+ * atomically increment the entry count iff the exit count is 0
+ * without taking the lock.
+ */
+struct kvmppc_vcore {
+        int n_runnable;
+        int n_blocked;
+        int num_threads;
+        int entry_exit_count;
+        int n_woken;
+        int nap_count;
+        u16 pcpu;
+        u8 vcore_running;
+        u8 in_guest;
+        struct list_head runnable_threads;
+        spinlock_t lock;
+};
+
+#define VCORE_ENTRY_COUNT(vc)   ((vc)->entry_exit_count & 0xff)
+#define VCORE_EXIT_COUNT(vc)    ((vc)->entry_exit_count >> 8)
+
 struct kvmppc_pte {
         ulong eaddr;
         u64 vpage;
@@ -163,16 +240,18 @@ struct kvmppc_mmu {
         bool (*is_dcbz32)(struct kvm_vcpu *vcpu);
 };
 
-struct hpte_cache {
-        struct hlist_node list_pte;
-        struct hlist_node list_pte_long;
-        struct hlist_node list_vpte;
-        struct hlist_node list_vpte_long;
-        struct rcu_head rcu_head;
-        u64 host_va;
-        u64 pfn;
-        ulong slot;
-        struct kvmppc_pte pte;
+struct kvmppc_slb {
+        u64 esid;
+        u64 vsid;
+        u64 orige;
+        u64 origv;
+        bool valid      : 1;
+        bool Ks         : 1;
+        bool Kp         : 1;
+        bool nx         : 1;
+        bool large      : 1;    /* PTEs are 16MB */
+        bool tb         : 1;    /* 1TB segment */
+        bool class      : 1;
 };
 
 struct kvm_vcpu_arch {
@@ -187,6 +266,9 @@ struct kvm_vcpu_arch {
         ulong highmem_handler;
         ulong rmcall;
         ulong host_paca_phys;
+        struct kvmppc_slb slb[64];
+        int slb_max;            /* 1 + index of last valid entry in slb[] */
+        int slb_nr;             /* total number of entries in SLB */
         struct kvmppc_mmu mmu;
 #endif
 
@@ -195,13 +277,19 @@ struct kvm_vcpu_arch {
         u64 fpr[32];
         u64 fpscr;
 
+#ifdef CONFIG_SPE
+        ulong evr[32];
+        ulong spefscr;
+        ulong host_spefscr;
+        u64 acc;
+#endif
 #ifdef CONFIG_ALTIVEC
         vector128 vr[32];
         vector128 vscr;
 #endif
 
 #ifdef CONFIG_VSX
-        u64 vsr[32];
+        u64 vsr[64];
 #endif
 
 #ifdef CONFIG_PPC_BOOK3S
@@ -209,22 +297,27 @@ struct kvm_vcpu_arch {
         u32 qpr[32];
 #endif
 
-#ifdef CONFIG_BOOKE
         ulong pc;
         ulong ctr;
         ulong lr;
 
         ulong xer;
         u32 cr;
-#endif
 
 #ifdef CONFIG_PPC_BOOK3S
-        ulong shadow_msr;
         ulong hflags;
         ulong guest_owned_ext;
+        ulong purr;
+        ulong spurr;
+        ulong dscr;
+        ulong amr;
+        ulong uamor;
+        u32 ctrl;
+        ulong dabr;
 #endif
         u32 vrsave; /* also USPRG0 */
         u32 mmucr;
+        ulong shadow_msr;
         ulong sprg4;
         ulong sprg5;
         ulong sprg6;
@@ -249,6 +342,7 @@ struct kvm_vcpu_arch {
         u32 pvr;
 
         u32 shadow_pid;
+        u32 shadow_pid1;
         u32 pid;
         u32 swap_pid;
 
@@ -258,6 +352,9 @@ struct kvm_vcpu_arch {
         u32 dbcr1;
         u32 dbsr;
 
+        u64 mmcr[3];
+        u32 pmc[8];
+
 #ifdef CONFIG_KVM_EXIT_TIMING
         struct mutex exit_timing_lock;
         struct kvmppc_exit_timing timing_exit;
@@ -272,8 +369,12 @@ struct kvm_vcpu_arch {
         struct dentry *debugfs_exit_timing;
 #endif
 
+#ifdef CONFIG_PPC_BOOK3S
+        ulong fault_dar;
+        u32 fault_dsisr;
+#endif
+
 #ifdef CONFIG_BOOKE
-        u32 last_inst;
         ulong fault_dear;
         ulong fault_esr;
         ulong queued_dear;
@@ -288,25 +389,47 @@ struct kvm_vcpu_arch {
         u8 dcr_is_write;
         u8 osi_needed;
         u8 osi_enabled;
+        u8 hcall_needed;
 
         u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */
 
         struct hrtimer dec_timer;
         struct tasklet_struct tasklet;
         u64 dec_jiffies;
+        u64 dec_expires;
         unsigned long pending_exceptions;
+        u16 last_cpu;
+        u8 ceded;
+        u8 prodded;
+        u32 last_inst;
+
+        struct lppaca *vpa;
+        struct slb_shadow *slb_shadow;
+        struct dtl *dtl;
+        struct dtl *dtl_end;
+
+        struct kvmppc_vcore *vcore;
+        int ret;
+        int trap;
+        int state;
+        int ptid;
+        wait_queue_head_t cpu_run;
+
         struct kvm_vcpu_arch_shared *shared;
         unsigned long magic_page_pa; /* phys addr to map the magic page to */
         unsigned long magic_page_ea; /* effect. addr to map the magic page to */
 
-#ifdef CONFIG_PPC_BOOK3S
-        struct hlist_head hpte_hash_pte[HPTEG_HASH_NUM_PTE];
-        struct hlist_head hpte_hash_pte_long[HPTEG_HASH_NUM_PTE_LONG];
-        struct hlist_head hpte_hash_vpte[HPTEG_HASH_NUM_VPTE];
-        struct hlist_head hpte_hash_vpte_long[HPTEG_HASH_NUM_VPTE_LONG];
-        int hpte_cache_count;
-        spinlock_t mmu_lock;
+#ifdef CONFIG_KVM_BOOK3S_64_HV
+        struct kvm_vcpu_arch_shared shregs;
+
+        struct list_head run_list;
+        struct task_struct *run_task;
+        struct kvm_run *kvm_run;
 #endif
 };
 
+#define KVMPPC_VCPU_BUSY_IN_HOST        0
+#define KVMPPC_VCPU_BLOCKED             1
+#define KVMPPC_VCPU_RUNNABLE            2
+
 #endif /* __POWERPC_KVM_HOST_H__ */
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index 9345238edecf..d121f49d62b8 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -33,6 +33,9 @@
 #else
 #include <asm/kvm_booke.h>
 #endif
+#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
+#include <asm/paca.h>
+#endif
 
 enum emulation_result {
         EMULATE_DONE,         /* no further processing */
@@ -42,6 +45,7 @@ enum emulation_result {
         EMULATE_AGAIN,        /* something went wrong. go again */
 };
 
+extern int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu);
 extern int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu);
 extern char kvmppc_handlers_start[];
 extern unsigned long kvmppc_handler_len;
@@ -109,6 +113,27 @@ extern void kvmppc_booke_exit(void);
 
 extern void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu);
 extern int kvmppc_kvm_pv(struct kvm_vcpu *vcpu);
+extern void kvmppc_map_magic(struct kvm_vcpu *vcpu);
+
+extern long kvmppc_alloc_hpt(struct kvm *kvm);
+extern void kvmppc_free_hpt(struct kvm *kvm);
+extern long kvmppc_prepare_vrma(struct kvm *kvm,
+                                struct kvm_userspace_memory_region *mem);
+extern void kvmppc_map_vrma(struct kvm *kvm,
+                            struct kvm_userspace_memory_region *mem);
+extern int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu);
+extern long kvm_vm_ioctl_create_spapr_tce(struct kvm *kvm,
+                                struct kvm_create_spapr_tce *args);
+extern long kvm_vm_ioctl_allocate_rma(struct kvm *kvm,
+                                struct kvm_allocate_rma *rma);
+extern struct kvmppc_rma_info *kvm_alloc_rma(void);
+extern void kvm_release_rma(struct kvmppc_rma_info *ri);
+extern int kvmppc_core_init_vm(struct kvm *kvm);
+extern void kvmppc_core_destroy_vm(struct kvm *kvm);
+extern int kvmppc_core_prepare_memory_region(struct kvm *kvm,
+                                struct kvm_userspace_memory_region *mem);
+extern void kvmppc_core_commit_memory_region(struct kvm *kvm,
+                                struct kvm_userspace_memory_region *mem);
 
 /*
  * Cuts out inst bits with ordering according to spec.
@@ -151,4 +176,20 @@ int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
 
 void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid);
 
+#ifdef CONFIG_KVM_BOOK3S_64_HV
+static inline void kvmppc_set_xics_phys(int cpu, unsigned long addr)
+{
+        paca[cpu].kvm_hstate.xics_phys = addr;
+}
+
+extern void kvm_rma_init(void);
+
+#else
+static inline void kvmppc_set_xics_phys(int cpu, unsigned long addr)
+{}
+
+static inline void kvm_rma_init(void)
+{}
+#endif
+
 #endif /* __POWERPC_KVM_PPC_H__ */
diff --git a/arch/powerpc/include/asm/local.h b/arch/powerpc/include/asm/local.h
index c2410af6bfd9..b8da91363864 100644
--- a/arch/powerpc/include/asm/local.h
+++ b/arch/powerpc/include/asm/local.h
@@ -2,7 +2,7 @@
 #define _ARCH_POWERPC_LOCAL_H
 
 #include <linux/percpu.h>
-#include <asm/atomic.h>
+#include <linux/atomic.h>
 
 typedef struct
 {
diff --git a/arch/powerpc/include/asm/macio.h b/arch/powerpc/include/asm/macio.h
index 7ab82c825a03..27af7f8bbb8d 100644
--- a/arch/powerpc/include/asm/macio.h
+++ b/arch/powerpc/include/asm/macio.h
@@ -76,7 +76,7 @@ static inline unsigned long macio_resource_len(struct macio_dev *dev, int resour
         struct resource *res = &dev->resource[resource_no];
         if (res->start == 0 || res->end == 0 || res->end < res->start)
                 return 0;
-        return res->end - res->start + 1;
+        return resource_size(res);
 }
 
 extern int macio_enable_devres(struct macio_dev *dev);
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index d865bd909c7d..b445e0af4c2b 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -90,13 +90,19 @@ extern char initial_stab[];
 
 #define HPTE_R_PP0              ASM_CONST(0x8000000000000000)
 #define HPTE_R_TS               ASM_CONST(0x4000000000000000)
+#define HPTE_R_KEY_HI           ASM_CONST(0x3000000000000000)
 #define HPTE_R_RPN_SHIFT        12
-#define HPTE_R_RPN              ASM_CONST(0x3ffffffffffff000)
-#define HPTE_R_FLAGS            ASM_CONST(0x00000000000003ff)
+#define HPTE_R_RPN              ASM_CONST(0x0ffffffffffff000)
 #define HPTE_R_PP               ASM_CONST(0x0000000000000003)
 #define HPTE_R_N                ASM_CONST(0x0000000000000004)
+#define HPTE_R_G                ASM_CONST(0x0000000000000008)
+#define HPTE_R_M                ASM_CONST(0x0000000000000010)
+#define HPTE_R_I                ASM_CONST(0x0000000000000020)
+#define HPTE_R_W                ASM_CONST(0x0000000000000040)
+#define HPTE_R_WIMG             ASM_CONST(0x0000000000000078)
 #define HPTE_R_C                ASM_CONST(0x0000000000000080)
 #define HPTE_R_R                ASM_CONST(0x0000000000000100)
+#define HPTE_R_KEY_LO           ASM_CONST(0x0000000000000e00)
 
 #define HPTE_V_1TB_SEG          ASM_CONST(0x4000000000000000)
 #define HPTE_V_VRMA_MASK        ASM_CONST(0x4001ffffff000000)
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index 4138b21ae80a..698b30638681 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -115,14 +115,24 @@
 #ifndef __ASSEMBLY__
 #include <asm/cputable.h>
 
+#ifdef CONFIG_PPC_FSL_BOOK3E
+#include <asm/percpu.h>
+DECLARE_PER_CPU(int, next_tlbcam_idx);
+#endif
+
 static inline int mmu_has_feature(unsigned long feature)
 {
         return (cur_cpu_spec->mmu_features & feature);
 }
 
+static inline void mmu_clear_feature(unsigned long feature)
+{
+        cur_cpu_spec->mmu_features &= ~feature;
+}
+
 extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup;
 
-/* MMU initialization (64-bit only fo now) */
+/* MMU initialization */
 extern void early_init_mmu(void);
 extern void early_init_mmu_secondary(void);
 
diff --git a/arch/powerpc/include/asm/pSeries_reconfig.h b/arch/powerpc/include/asm/pSeries_reconfig.h
index 89d2f99c1bf4..23cd6cc30bcf 100644
--- a/arch/powerpc/include/asm/pSeries_reconfig.h
+++ b/arch/powerpc/include/asm/pSeries_reconfig.h
@@ -17,7 +17,7 @@
 #ifdef CONFIG_PPC_PSERIES
 extern int pSeries_reconfig_notifier_register(struct notifier_block *);
 extern void pSeries_reconfig_notifier_unregister(struct notifier_block *);
-extern struct blocking_notifier_head pSeries_reconfig_chain;
+extern int pSeries_reconfig_notify(unsigned long action, void *p);
 /* Not the best place to put this, will be fixed when we move some
  * of the rtas suspend-me stuff to pseries */
 extern void pSeries_coalesce_init(void);
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index 74126765106a..516bfb3f47d9 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -103,11 +103,12 @@ struct paca_struct {
 #endif /* CONFIG_PPC_STD_MMU_64 */
 
 #ifdef CONFIG_PPC_BOOK3E
-        pgd_t *pgd;                     /* Current PGD */
-        pgd_t *kernel_pgd;              /* Kernel PGD */
         u64 exgen[8] __attribute__((aligned(0x80)));
+        /* Keep pgd in the same cacheline as the start of extlb */
+        pgd_t *pgd __attribute__((aligned(0x80))); /* Current PGD */
+        pgd_t *kernel_pgd;              /* Kernel PGD */
         /* We can have up to 3 levels of reentrancy in the TLB miss handler */
-        u64 extlb[3][EX_TLB_SIZE / sizeof(u64)] __attribute__((aligned(0x80)));
+        u64 extlb[3][EX_TLB_SIZE / sizeof(u64)];
         u64 exmc[8];            /* used for machine checks */
         u64 excrit[8];          /* used for crit interrupts */
         u64 exdbg[8];           /* used for debug interrupts */
@@ -147,9 +148,12 @@ struct paca_struct {
         struct dtl_entry *dtl_curr;     /* pointer corresponding to dtl_ridx */
 
 #ifdef CONFIG_KVM_BOOK3S_HANDLER
+#ifdef CONFIG_KVM_BOOK3S_PR
         /* We use this to store guest state in */
         struct kvmppc_book3s_shadow_vcpu shadow_vcpu;
 #endif
+        struct kvmppc_host_state kvm_hstate;
+#endif
 };
 
 extern struct paca_struct *paca;
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index b90dbf8e5cd9..56b879ab3a40 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -10,58 +10,10 @@
 #include <linux/pci.h>
 #include <linux/list.h>
 #include <linux/ioport.h>
+#include <asm-generic/pci-bridge.h>
 
 struct device_node;
 
-enum {
-        /* Force re-assigning all resources (ignore firmware
-         * setup completely)
-         */
-        PPC_PCI_REASSIGN_ALL_RSRC       = 0x00000001,
-
-        /* Re-assign all bus numbers */
-        PPC_PCI_REASSIGN_ALL_BUS        = 0x00000002,
-
-        /* Do not try to assign, just use existing setup */
-        PPC_PCI_PROBE_ONLY              = 0x00000004,
-
-        /* Don't bother with ISA alignment unless the bridge has
-         * ISA forwarding enabled
-         */
-        PPC_PCI_CAN_SKIP_ISA_ALIGN      = 0x00000008,
-
-        /* Enable domain numbers in /proc */
-        PPC_PCI_ENABLE_PROC_DOMAINS     = 0x00000010,
-        /* ... except for domain 0 */
-        PPC_PCI_COMPAT_DOMAIN_0         = 0x00000020,
-};
-#ifdef CONFIG_PCI
-extern unsigned int ppc_pci_flags;
-
-static inline void ppc_pci_set_flags(int flags)
-{
-        ppc_pci_flags = flags;
-}
-
-static inline void ppc_pci_add_flags(int flags)
-{
-        ppc_pci_flags |= flags;
-}
-
-static inline int ppc_pci_has_flag(int flag)
-{
-        return (ppc_pci_flags & flag);
-}
-#else
-static inline void ppc_pci_set_flags(int flags) { }
-static inline void ppc_pci_add_flags(int flags) { }
-static inline int ppc_pci_has_flag(int flag)
-{
-        return 0;
-}
-#endif
-
-
 /*
  * Structure of a PCI controller (host bridge)
  */
@@ -171,15 +123,9 @@ static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
 
 #ifndef CONFIG_PPC64
 
-static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
-{
-        struct pci_controller *host;
-
-        if (bus->self)
-                return pci_device_to_OF_node(bus->self);
-        host = pci_bus_to_host(bus);
-        return host ? host->dn : NULL;
-}
+extern int pci_device_from_OF_node(struct device_node *node,
+                                   u8 *bus, u8 *devfn);
+extern void pci_create_OF_bus_map(void);
 
 static inline int isa_vaddr_is_ioport(void __iomem *address)
 {
@@ -223,17 +169,8 @@ struct pci_dn {
 /* Get the pointer to a device_node's pci_dn */
 #define PCI_DN(dn)      ((struct pci_dn *) (dn)->data)
 
-extern struct device_node *fetch_dev_dn(struct pci_dev *dev);
 extern void * update_dn_pci_info(struct device_node *dn, void *data);
 
-/* Get a device_node from a pci_dev.  This code must be fast except
- * in the case where the sysdata is incorrect and needs to be fixed
- * up (this will only happen once). */
-static inline struct device_node *pci_device_to_OF_node(struct pci_dev *dev)
-{
-        return dev->dev.of_node ? dev->dev.of_node : fetch_dev_dn(dev);
-}
-
 static inline int pci_device_from_OF_node(struct device_node *np,
                                           u8 *bus, u8 *devfn)
 {
@@ -244,14 +181,6 @@ static inline int pci_device_from_OF_node(struct device_node *np,
         return 0;
 }
 
-static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
-{
-        if (bus->self)
-                return pci_device_to_OF_node(bus->self);
-        else
-                return bus->dev.of_node; /* Must be root bus (PHB) */
-}
-
 /** Find the bus corresponding to the indicated device node */
 extern struct pci_bus *pcibios_find_pci_bus(struct device_node *dn);
 
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 7d7790954e02..49c3de582be0 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -44,7 +44,7 @@ struct pci_dev;
  * bus numbers (don't do that on ppc64 yet !)
  */
 #define pcibios_assign_all_busses() \
-        (ppc_pci_has_flag(PPC_PCI_REASSIGN_ALL_BUS))
+        (pci_has_flag(PCI_REASSIGN_ALL_BUS))
 
 static inline void pcibios_set_master(struct pci_dev *dev)
 {
@@ -179,8 +179,7 @@ extern int remove_phb_dynamic(struct pci_controller *phb);
 extern struct pci_dev *of_create_pci_dev(struct device_node *node,
                                         struct pci_bus *bus, int devfn);
 
-extern void of_scan_pci_bridge(struct device_node *node,
-                                struct pci_dev *dev);
+extern void of_scan_pci_bridge(struct pci_dev *dev);
 
 extern void of_scan_bus(struct device_node *node, struct pci_bus *bus);
 extern void of_rescan_bus(struct device_node *node, struct pci_bus *bus);
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index 81576ee0cfb1..c4205616dfb5 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -357,7 +357,8 @@ void pgtable_cache_init(void);
 /*
  * find_linux_pte returns the address of a linux pte for a given
  * effective address and directory.  If not found, it returns zero.
- */static inline pte_t *find_linux_pte(pgd_t *pgdir, unsigned long ea)
+ */
+static inline pte_t *find_linux_pte(pgd_t *pgdir, unsigned long ea)
 {
         pgd_t *pg;
         pud_t *pu;
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index e472659d906c..e980faae4225 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -71,6 +71,42 @@
 #define PPC_INST_ERATSX                 0x7c000126
 #define PPC_INST_ERATSX_DOT             0x7c000127
 
+/* Misc instructions for BPF compiler */
+#define PPC_INST_LD                     0xe8000000
+#define PPC_INST_LHZ                    0xa0000000
+#define PPC_INST_LWZ                    0x80000000
+#define PPC_INST_STD                    0xf8000000
+#define PPC_INST_STDU                   0xf8000001
+#define PPC_INST_MFLR                   0x7c0802a6
+#define PPC_INST_MTLR                   0x7c0803a6
+#define PPC_INST_CMPWI                  0x2c000000
+#define PPC_INST_CMPDI                  0x2c200000
+#define PPC_INST_CMPLW                  0x7c000040
+#define PPC_INST_CMPLWI                 0x28000000
+#define PPC_INST_ADDI                   0x38000000
+#define PPC_INST_ADDIS                  0x3c000000
+#define PPC_INST_ADD                    0x7c000214
+#define PPC_INST_SUB                    0x7c000050
+#define PPC_INST_BLR                    0x4e800020
+#define PPC_INST_BLRL                   0x4e800021
+#define PPC_INST_MULLW                  0x7c0001d6
+#define PPC_INST_MULHWU                 0x7c000016
+#define PPC_INST_MULLI                  0x1c000000
+#define PPC_INST_DIVWU                  0x7c0003d6
+#define PPC_INST_RLWINM                 0x54000000
+#define PPC_INST_RLDICR                 0x78000004
+#define PPC_INST_SLW                    0x7c000030
+#define PPC_INST_SRW                    0x7c000430
+#define PPC_INST_AND                    0x7c000038
+#define PPC_INST_ANDDOT                 0x7c000039
+#define PPC_INST_OR                     0x7c000378
+#define PPC_INST_ANDI                   0x70000000
+#define PPC_INST_ORI                    0x60000000
+#define PPC_INST_ORIS                   0x64000000
+#define PPC_INST_NEG                    0x7c0000d0
+#define PPC_INST_BRANCH                 0x48000000
+#define PPC_INST_BRANCH_COND            0x40800000
+
 /* macros to insert fields into opcodes */
 #define __PPC_RA(a)     (((a) & 0x1f) << 16)
 #define __PPC_RB(b)     (((b) & 0x1f) << 11)
@@ -83,6 +119,10 @@
 #define __PPC_T_TLB(t)  (((t) & 0x3) << 21)
 #define __PPC_WC(w)     (((w) & 0x3) << 21)
 #define __PPC_WS(w)     (((w) & 0x1f) << 11)
+#define __PPC_SH(s)     __PPC_WS(s)
+#define __PPC_MB(s)     (((s) & 0x1f) << 6)
+#define __PPC_ME(s)     (((s) & 0x1f) << 1)
+#define __PPC_BI(s)     (((s) & 0x1f) << 16)
 
 /*
  * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 1b422381fc16..368f72f79808 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -150,18 +150,22 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
 #define REST_16VSRSU(n,b,base)  REST_8VSRSU(n,b,base); REST_8VSRSU(n+8,b,base)
 #define REST_32VSRSU(n,b,base)  REST_16VSRSU(n,b,base); REST_16VSRSU(n+16,b,base)
 
-#define SAVE_EVR(n,s,base)      evmergehi s,s,n; stw s,THREAD_EVR0+4*(n)(base)
-#define SAVE_2EVRS(n,s,base)    SAVE_EVR(n,s,base); SAVE_EVR(n+1,s,base)
-#define SAVE_4EVRS(n,s,base)    SAVE_2EVRS(n,s,base); SAVE_2EVRS(n+2,s,base)
-#define SAVE_8EVRS(n,s,base)    SAVE_4EVRS(n,s,base); SAVE_4EVRS(n+4,s,base)
-#define SAVE_16EVRS(n,s,base)   SAVE_8EVRS(n,s,base); SAVE_8EVRS(n+8,s,base)
-#define SAVE_32EVRS(n,s,base)   SAVE_16EVRS(n,s,base); SAVE_16EVRS(n+16,s,base)
-#define REST_EVR(n,s,base)      lwz s,THREAD_EVR0+4*(n)(base); evmergelo n,s,n
-#define REST_2EVRS(n,s,base)    REST_EVR(n,s,base); REST_EVR(n+1,s,base)
-#define REST_4EVRS(n,s,base)    REST_2EVRS(n,s,base); REST_2EVRS(n+2,s,base)
-#define REST_8EVRS(n,s,base)    REST_4EVRS(n,s,base); REST_4EVRS(n+4,s,base)
-#define REST_16EVRS(n,s,base)   REST_8EVRS(n,s,base); REST_8EVRS(n+8,s,base)
-#define REST_32EVRS(n,s,base)   REST_16EVRS(n,s,base); REST_16EVRS(n+16,s,base)
+/*
+ * b = base register for addressing, o = base offset from register of 1st EVR
+ * n = first EVR, s = scratch
+ */
+#define SAVE_EVR(n,s,b,o)       evmergehi s,s,n; stw s,o+4*(n)(b)
+#define SAVE_2EVRS(n,s,b,o)     SAVE_EVR(n,s,b,o); SAVE_EVR(n+1,s,b,o)
+#define SAVE_4EVRS(n,s,b,o)     SAVE_2EVRS(n,s,b,o); SAVE_2EVRS(n+2,s,b,o)
+#define SAVE_8EVRS(n,s,b,o)     SAVE_4EVRS(n,s,b,o); SAVE_4EVRS(n+4,s,b,o)
+#define SAVE_16EVRS(n,s,b,o)    SAVE_8EVRS(n,s,b,o); SAVE_8EVRS(n+8,s,b,o)
+#define SAVE_32EVRS(n,s,b,o)    SAVE_16EVRS(n,s,b,o); SAVE_16EVRS(n+16,s,b,o)
+#define REST_EVR(n,s,b,o)       lwz s,o+4*(n)(b); evmergelo n,s,n
+#define REST_2EVRS(n,s,b,o)     REST_EVR(n,s,b,o); REST_EVR(n+1,s,b,o)
+#define REST_4EVRS(n,s,b,o)     REST_2EVRS(n,s,b,o); REST_2EVRS(n+2,s,b,o)
+#define REST_8EVRS(n,s,b,o)     REST_4EVRS(n,s,b,o); REST_4EVRS(n+4,s,b,o)
+#define REST_16EVRS(n,s,b,o)    REST_8EVRS(n,s,b,o); REST_8EVRS(n+8,s,b,o)
+#define REST_32EVRS(n,s,b,o)    REST_16EVRS(n,s,b,o); REST_16EVRS(n+16,s,b,o)
 
 /* Macros to adjust thread priority for hardware multithreading */
 #define HMT_VERY_LOW    or      31,31,31        # very low priority
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index d50c2b6d9bc3..eb11a446720e 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -20,6 +20,7 @@
 
 #ifndef __ASSEMBLY__
 #include <linux/compiler.h>
+#include <linux/cache.h>
 #include <asm/ptrace.h>
 #include <asm/types.h>
 
@@ -156,6 +157,10 @@ struct thread_struct {
 #endif
         struct pt_regs  *regs;          /* Pointer to saved register state */
         mm_segment_t    fs;             /* for get_fs() validation */
+#ifdef CONFIG_BOOKE
+        /* BookE base exception scratch space; align on cacheline */
+        unsigned long   normsave[8] ____cacheline_aligned;
+#endif
 #ifdef CONFIG_PPC32
         void            *pgdir;         /* root of page-table tree */
 #endif
diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h
index c189aa5fe1f4..b5c91901e384 100644
--- a/arch/powerpc/include/asm/prom.h
+++ b/arch/powerpc/include/asm/prom.h
@@ -18,24 +18,10 @@
  */
 #include <linux/types.h>
 #include <asm/irq.h>
-#include <asm/atomic.h>
+#include <linux/atomic.h>
 
 #define HAVE_ARCH_DEVTREE_FIXUPS
 
-#ifdef CONFIG_PPC32
-/*
- * PCI <-> OF matching functions
- * (XXX should these be here?)
- */
-struct pci_bus;
-struct pci_dev;
-extern int pci_device_from_OF_node(struct device_node *node,
-                                   u8* bus, u8* devfn);
-extern struct device_node* pci_busdev_to_OF_node(struct pci_bus *, int);
-extern struct device_node* pci_device_to_OF_node(struct pci_dev *);
-extern void pci_create_OF_bus_map(void);
-#endif
-
 /*
  * OF address retreival & translation
  */
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index c5cae0dd176c..e8aaf6fce38b 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -189,6 +189,9 @@
 #define SPRN_CTR        0x009   /* Count Register */
 #define SPRN_DSCR       0x11
 #define SPRN_CFAR       0x1c    /* Come From Address Register */
+#define SPRN_AMR        0x1d    /* Authority Mask Register */
+#define SPRN_UAMOR      0x9d    /* User Authority Mask Override Register */
+#define SPRN_AMOR       0x15d   /* Authority Mask Override Register */
 #define SPRN_ACOP       0x1F    /* Available Coprocessor Register */
 #define SPRN_CTRLF      0x088
 #define SPRN_CTRLT      0x098
@@ -232,22 +235,28 @@
 #define   LPCR_VPM0     (1ul << (63-0))
 #define   LPCR_VPM1     (1ul << (63-1))
 #define   LPCR_ISL      (1ul << (63-2))
+#define   LPCR_VC_SH    (63-2)
 #define   LPCR_DPFD_SH  (63-11)
 #define   LPCR_VRMA_L   (1ul << (63-12))
 #define   LPCR_VRMA_LP0 (1ul << (63-15))
 #define   LPCR_VRMA_LP1 (1ul << (63-16))
+#define   LPCR_VRMASD_SH (63-16)
 #define   LPCR_RMLS    0x1C000000      /* impl dependent rmo limit sel */
+#define   LPCR_RMLS_SH  (63-37)
 #define   LPCR_ILE     0x02000000      /* !HV irqs set MSR:LE */
 #define   LPCR_PECE     0x00007000      /* powersave exit cause enable */
 #define     LPCR_PECE0  0x00004000      /* ext. exceptions can cause exit */
 #define     LPCR_PECE1  0x00002000      /* decrementer can cause exit */
 #define     LPCR_PECE2  0x00001000      /* machine check etc can cause exit */
 #define   LPCR_MER      0x00000800      /* Mediated External Exception */
+#define   LPCR_LPES    0x0000000c
 #define   LPCR_LPES0   0x00000008      /* LPAR Env selector 0 */
 #define   LPCR_LPES1   0x00000004      /* LPAR Env selector 1 */
+#define   LPCR_LPES_SH  2
 #define   LPCR_RMI     0x00000002      /* real mode is cache inhibit */
 #define   LPCR_HDICE   0x00000001      /* Hyp Decr enable (HV,PR,EE) */
 #define SPRN_LPID       0x13F   /* Logical Partition Identifier */
+#define   LPID_RSVD     0x3ff           /* Reserved LPID for partn switching */
 #define SPRN_HMER       0x150   /* Hardware m? error recovery */
 #define SPRN_HMEER      0x151   /* Hardware m? enable error recovery */
 #define SPRN_HEIR       0x153   /* Hypervisor Emulated Instruction Register */
@@ -298,6 +307,7 @@
 #define SPRN_HASH1      0x3D2           /* Primary Hash Address Register */
 #define SPRN_HASH2      0x3D3           /* Secondary Hash Address Resgister */
 #define SPRN_HID0       0x3F0           /* Hardware Implementation Register 0 */
+#define HID0_HDICE_SH   (63 - 23)       /* 970 HDEC interrupt enable */
 #define HID0_EMCP       (1<<31)         /* Enable Machine Check pin */
 #define HID0_EBA        (1<<29)         /* Enable Bus Address Parity */
 #define HID0_EBD        (1<<28)         /* Enable Bus Data Parity */
@@ -353,6 +363,13 @@
 #define SPRN_IABR2      0x3FA           /* 83xx */
 #define SPRN_IBCR       0x135           /* 83xx Insn Breakpoint Control Reg */
 #define SPRN_HID4       0x3F4           /* 970 HID4 */
+#define  HID4_LPES0      (1ul << (63-0)) /* LPAR env. sel. bit 0 */
+#define  HID4_RMLS2_SH   (63 - 2)       /* Real mode limit bottom 2 bits */
+#define  HID4_LPID5_SH   (63 - 6)       /* partition ID bottom 4 bits */
+#define  HID4_RMOR_SH    (63 - 22)      /* real mode offset (16 bits) */
+#define  HID4_LPES1      (1 << (63-57)) /* LPAR env. sel. bit 1 */
+#define  HID4_RMLS0_SH   (63 - 58)      /* Real mode limit top bit */
+#define  HID4_LPID1_SH   0              /* partition ID top 2 bits */
 #define SPRN_HID4_GEKKO 0x3F3           /* Gekko HID4 */
 #define SPRN_HID5       0x3F6           /* 970 HID5 */
 #define SPRN_HID6       0x3F9   /* BE HID 6 */
@@ -802,28 +819,28 @@
         mfspr   rX,SPRN_SPRG_PACA;                      \
         FTR_SECTION_ELSE_NESTED(66);                    \
         mfspr   rX,SPRN_SPRG_HPACA;                     \
-        ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_HVMODE_206, 66)
+        ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_HVMODE, 66)
 
 #define SET_PACA(rX)                                    \
         BEGIN_FTR_SECTION_NESTED(66);                   \
         mtspr   SPRN_SPRG_PACA,rX;                      \
         FTR_SECTION_ELSE_NESTED(66);                    \
         mtspr   SPRN_SPRG_HPACA,rX;                     \
-        ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_HVMODE_206, 66)
+        ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_HVMODE, 66)
 
 #define GET_SCRATCH0(rX)                                \
         BEGIN_FTR_SECTION_NESTED(66);                   \
         mfspr   rX,SPRN_SPRG_SCRATCH0;                  \
         FTR_SECTION_ELSE_NESTED(66);                    \
         mfspr   rX,SPRN_SPRG_HSCRATCH0;                 \
-        ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_HVMODE_206, 66)
+        ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_HVMODE, 66)
 
 #define SET_SCRATCH0(rX)                                \
         BEGIN_FTR_SECTION_NESTED(66);                   \
         mtspr   SPRN_SPRG_SCRATCH0,rX;                  \
         FTR_SECTION_ELSE_NESTED(66);                    \
         mtspr   SPRN_SPRG_HSCRATCH0,rX;                 \
-        ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_HVMODE_206, 66)
+        ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_HVMODE, 66)
 
 #else /* CONFIG_PPC_BOOK3S_64 */
 #define GET_SCRATCH0(rX)        mfspr   rX,SPRN_SPRG_SCRATCH0
@@ -872,8 +889,8 @@
 #define SPRN_SPRG_WSCRATCH2     SPRN_SPRG4W
 #define SPRN_SPRG_RSCRATCH3     SPRN_SPRG5R
 #define SPRN_SPRG_WSCRATCH3     SPRN_SPRG5W
-#define SPRN_SPRG_RSCRATCH_MC   SPRN_SPRG6R
-#define SPRN_SPRG_WSCRATCH_MC   SPRN_SPRG6W
+#define SPRN_SPRG_RSCRATCH_MC   SPRN_SPRG1
+#define SPRN_SPRG_WSCRATCH_MC   SPRN_SPRG1
 #define SPRN_SPRG_RSCRATCH4     SPRN_SPRG7R
 #define SPRN_SPRG_WSCRATCH4     SPRN_SPRG7W
 #ifdef CONFIG_E200
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 0f0ad9fa01c1..9ec0b39f9ddc 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -318,6 +318,7 @@
 #define ESR_ILK         0x00100000      /* Instr. Cache Locking */
 #define ESR_PUO         0x00040000      /* Unimplemented Operation exception */
 #define ESR_BO          0x00020000      /* Byte Ordering */
+#define ESR_SPV         0x00000080      /* Signal Processing operation */
 
 /* Bit definitions related to the DBCR0. */
 #if defined(CONFIG_40x)
diff --git a/arch/powerpc/include/asm/setup.h b/arch/powerpc/include/asm/setup.h
index dae19342f0b9..186e0fb835bd 100644
--- a/arch/powerpc/include/asm/setup.h
+++ b/arch/powerpc/include/asm/setup.h
@@ -3,4 +3,8 @@
 
 #include <asm-generic/setup.h>
 
+#ifndef __ASSEMBLY__
+extern void ppc_printk_progress(char *s, unsigned short hex);
+#endif
+
 #endif  /* _ASM_POWERPC_SETUP_H */
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h
index 11eb404b5606..15a70b7f638b 100644
--- a/arch/powerpc/include/asm/smp.h
+++ b/arch/powerpc/include/asm/smp.h
@@ -30,7 +30,7 @@
 #include <asm/percpu.h>
 
 extern int boot_cpuid;
-extern int boot_cpu_count;
+extern int spinning_secondaries;
 
 extern void cpu_die(void);
 
@@ -119,7 +119,6 @@ extern const char *smp_ipi_name[];
 /* for irq controllers with only a single ipi */
 extern void smp_muxed_ipi_set_data(int cpu, unsigned long data);
 extern void smp_muxed_ipi_message_pass(int cpu, int msg);
-extern void smp_muxed_ipi_resend(void);
 extern irqreturn_t smp_ipi_demux(void);
 
 void smp_init_iSeries(void);
diff --git a/arch/powerpc/include/asm/smu.h b/arch/powerpc/include/asm/smu.h
index e3bdada8c542..ae20ce1af4c7 100644
--- a/arch/powerpc/include/asm/smu.h
+++ b/arch/powerpc/include/asm/smu.h
@@ -547,7 +547,7 @@ struct smu_sdbp_header {
  * (currently, afaik, this concerns only the FVT partition
  * (0x12)
  */
-#define SMU_U16_MIX(x)  le16_to_cpu(x);
+#define SMU_U16_MIX(x)  le16_to_cpu(x)
 #define SMU_U32_MIX(x)  ((((x) & 0xff00ff00u) >> 8)|(((x) & 0x00ff00ffu) << 8))
 
 
diff --git a/arch/powerpc/include/asm/system.h b/arch/powerpc/include/asm/system.h
index 2dc595dda03b..e30a13d1ee76 100644
--- a/arch/powerpc/include/asm/system.h
+++ b/arch/powerpc/include/asm/system.h
@@ -120,7 +120,6 @@ extern void do_dabr(struct pt_regs *regs, unsigned long address,
                     unsigned long error_code);
 #endif
 extern void print_backtrace(unsigned long *);
-extern void show_regs(struct pt_regs * regs);
 extern void flush_instruction_cache(void);
 extern void hard_reset_now(void);
 extern void poweroff_now(void);
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h
index 58580e94a2bb..93e05d1b34b2 100644
--- a/arch/powerpc/include/asm/udbg.h
+++ b/arch/powerpc/include/asm/udbg.h
@@ -40,6 +40,7 @@ extern void udbg_adb_init_early(void);
 
 extern void __init udbg_early_init(void);
 extern void __init udbg_init_debug_lpar(void);
+extern void __init udbg_init_debug_lpar_hvsi(void);
 extern void __init udbg_init_pmac_realmode(void);
 extern void __init udbg_init_maple_realmode(void);
 extern void __init udbg_init_pas_realmode(void);