diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-19 16:42:43 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-03-19 16:42:43 -0400 |
commit | 95c46afe6034d15bdf0f95d69f25489cecad9a47 (patch) | |
tree | a3bff5de25890f6de94cbf431bb0f94073893507 /arch/powerpc/include/asm/ppc-opcode.h | |
parent | cf3966bf6ecfe25a75d625771e327b84878bc09d (diff) | |
parent | 191aee58b6568cf8143901bfa3f57a9b8faa6f1c (diff) |
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc:
powerpc: Remove IOMMU_VMERGE config option
powerpc: Fix swiotlb to respect the boot option
powerpc: Do not call prink when CONFIG_PRINTK is not defined
powerpc: Use correct ccr bit for syscall error status
powerpc/fsl-booke: Get coherent bit from PTE
powerpc/85xx: Make sure lwarx hint isn't set on ppc32
Diffstat (limited to 'arch/powerpc/include/asm/ppc-opcode.h')
-rw-r--r-- | arch/powerpc/include/asm/ppc-opcode.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index aea714797590..d553bbeb726c 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h | |||
@@ -25,7 +25,7 @@ | |||
25 | #define PPC_INST_LDARX 0x7c0000a8 | 25 | #define PPC_INST_LDARX 0x7c0000a8 |
26 | #define PPC_INST_LSWI 0x7c0004aa | 26 | #define PPC_INST_LSWI 0x7c0004aa |
27 | #define PPC_INST_LSWX 0x7c00042a | 27 | #define PPC_INST_LSWX 0x7c00042a |
28 | #define PPC_INST_LWARX 0x7c000029 | 28 | #define PPC_INST_LWARX 0x7c000028 |
29 | #define PPC_INST_LWSYNC 0x7c2004ac | 29 | #define PPC_INST_LWSYNC 0x7c2004ac |
30 | #define PPC_INST_LXVD2X 0x7c000698 | 30 | #define PPC_INST_LXVD2X 0x7c000698 |
31 | #define PPC_INST_MCRXR 0x7c000400 | 31 | #define PPC_INST_MCRXR 0x7c000400 |
@@ -62,8 +62,8 @@ | |||
62 | #define __PPC_T_TLB(t) (((t) & 0x3) << 21) | 62 | #define __PPC_T_TLB(t) (((t) & 0x3) << 21) |
63 | #define __PPC_WC(w) (((w) & 0x3) << 21) | 63 | #define __PPC_WC(w) (((w) & 0x3) << 21) |
64 | /* | 64 | /* |
65 | * Only use the larx hint bit on 64bit CPUs. Once we verify it doesn't have | 65 | * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a |
66 | * any side effects on all 32bit processors, we can do this all the time. | 66 | * larx with EH set as an illegal instruction. |
67 | */ | 67 | */ |
68 | #ifdef CONFIG_PPC64 | 68 | #ifdef CONFIG_PPC64 |
69 | #define __PPC_EH(eh) (((eh) & 0x1) << 0) | 69 | #define __PPC_EH(eh) (((eh) & 0x1) << 0) |