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authorMichael Neuling <mikey@neuling.org>2012-12-20 09:06:44 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-01-10 01:01:44 -0500
commit9422de3e953d0e60eb95f5430a9dd803eec1c6d7 (patch)
tree7255a4a2b873a0c3daf7b312a0845202edf6b2d5 /arch/powerpc/include/asm/hw_breakpoint.h
parenta8190a59e7440a7e3f7c0889d72a13e157988b3c (diff)
powerpc: Hardware breakpoints rewrite to handle non DABR breakpoint registers
This is a rewrite so that we don't assume we are using the DABR throughout the code. We now use the arch_hw_breakpoint to store the breakpoint in a generic manner in the thread_struct, rather than storing the raw DABR value. The ptrace GET/SET_DEBUGREG interface currently passes the raw DABR in from userspace. We keep this functionality, so that future changes (like the POWER8 DAWR), will still fake the DABR to userspace. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/hw_breakpoint.h')
-rw-r--r--arch/powerpc/include/asm/hw_breakpoint.h33
1 files changed, 26 insertions, 7 deletions
diff --git a/arch/powerpc/include/asm/hw_breakpoint.h b/arch/powerpc/include/asm/hw_breakpoint.h
index 423424599dad..2c91faf981db 100644
--- a/arch/powerpc/include/asm/hw_breakpoint.h
+++ b/arch/powerpc/include/asm/hw_breakpoint.h
@@ -24,16 +24,30 @@
24#define _PPC_BOOK3S_64_HW_BREAKPOINT_H 24#define _PPC_BOOK3S_64_HW_BREAKPOINT_H
25 25
26#ifdef __KERNEL__ 26#ifdef __KERNEL__
27#ifdef CONFIG_HAVE_HW_BREAKPOINT
28
29struct arch_hw_breakpoint { 27struct arch_hw_breakpoint {
30 unsigned long address; 28 unsigned long address;
31 unsigned long dabrx; 29 u16 type;
32 int type; 30 u16 len; /* length of the target data symbol */
33 u8 len; /* length of the target data symbol */
34 bool extraneous_interrupt;
35}; 31};
36 32
33/* Note: Don't change the the first 6 bits below as they are in the same order
34 * as the dabr and dabrx.
35 */
36#define HW_BRK_TYPE_READ 0x01
37#define HW_BRK_TYPE_WRITE 0x02
38#define HW_BRK_TYPE_TRANSLATE 0x04
39#define HW_BRK_TYPE_USER 0x08
40#define HW_BRK_TYPE_KERNEL 0x10
41#define HW_BRK_TYPE_HYP 0x20
42#define HW_BRK_TYPE_EXTRANEOUS_IRQ 0x80
43
44/* bits that overlap with the bottom 3 bits of the dabr */
45#define HW_BRK_TYPE_RDWR (HW_BRK_TYPE_READ | HW_BRK_TYPE_WRITE)
46#define HW_BRK_TYPE_DABR (HW_BRK_TYPE_RDWR | HW_BRK_TYPE_TRANSLATE)
47#define HW_BRK_TYPE_PRIV_ALL (HW_BRK_TYPE_USER | HW_BRK_TYPE_KERNEL | \
48 HW_BRK_TYPE_HYP)
49
50#ifdef CONFIG_HAVE_HW_BREAKPOINT
37#include <linux/kdebug.h> 51#include <linux/kdebug.h>
38#include <asm/reg.h> 52#include <asm/reg.h>
39#include <asm/debug.h> 53#include <asm/debug.h>
@@ -62,7 +76,12 @@ extern void ptrace_triggered(struct perf_event *bp,
62 struct perf_sample_data *data, struct pt_regs *regs); 76 struct perf_sample_data *data, struct pt_regs *regs);
63static inline void hw_breakpoint_disable(void) 77static inline void hw_breakpoint_disable(void)
64{ 78{
65 set_dabr(0, 0); 79 struct arch_hw_breakpoint brk;
80
81 brk.address = 0;
82 brk.type = 0;
83 brk.len = 0;
84 set_break(&brk);
66} 85}
67extern void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs); 86extern void thread_change_pc(struct task_struct *tsk, struct pt_regs *regs);
68 87