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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-04-29 21:10:09 -0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-04-29 21:10:09 -0400
commitbc23100a0d646aedb6e17fbcecdc35a24cd3bf2a (patch)
treeafbf44b177d17a8450d606b6d976e76e8e964273 /arch/powerpc/boot
parent28bf41a1fedad76e9b4de70c9573bb3f8afc3709 (diff)
parent9e2ecdbba3b0745f9ed454ab86961e3ccf9dc224 (diff)
Merge remote-tracking branch 'kumar/next' into next
From Kumar Gala: << Add support for T4 and B4 SoC families from Freescale, e6500 altivec support, some various board fixes and other minor cleanups. >>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/b4420qds.dts50
-rw-r--r--arch/powerpc/boot/dts/b4860qds.dts61
-rw-r--r--arch/powerpc/boot/dts/b4qds.dts169
-rw-r--r--arch/powerpc/boot/dts/fsl/b4420si-post.dtsi98
-rw-r--r--arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi73
-rw-r--r--arch/powerpc/boot/dts/fsl/b4860si-post.dtsi142
-rw-r--r--arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi83
-rw-r--r--arch/powerpc/boot/dts/fsl/b4si-post.dtsi268
-rw-r--r--arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi1
-rw-r--r--arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi1
-rw-r--r--arch/powerpc/boot/dts/fsl/e6500_power_isa.dtsi65
-rw-r--r--arch/powerpc/boot/dts/fsl/p1023si-post.dtsi1
-rw-r--r--arch/powerpc/boot/dts/fsl/p2041si-post.dtsi2
-rw-r--r--arch/powerpc/boot/dts/fsl/p3041si-post.dtsi2
-rw-r--r--arch/powerpc/boot/dts/fsl/p4080si-post.dtsi2
-rw-r--r--arch/powerpc/boot/dts/fsl/p5020si-post.dtsi2
-rw-r--r--arch/powerpc/boot/dts/fsl/p5040si-post.dtsi2
-rw-r--r--arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi1
-rw-r--r--arch/powerpc/boot/dts/fsl/qonverge-usb2-dr-0.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-gpio-1.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-gpio-2.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-gpio-3.dtsi41
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi1
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi1
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sec5.0-0.dtsi (renamed from arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi)27
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sec5.2-0.dtsi1
-rw-r--r--arch/powerpc/boot/dts/fsl/qoriq-sec5.3-0.dtsi119
-rw-r--r--arch/powerpc/boot/dts/fsl/t4240si-post.dtsi442
-rw-r--r--arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi128
-rw-r--r--arch/powerpc/boot/dts/mpc8536ds_36b.dts6
-rw-r--r--arch/powerpc/boot/dts/p1021rdb-pc.dtsi12
-rw-r--r--arch/powerpc/boot/dts/p1025rdb_36b.dts5
-rw-r--r--arch/powerpc/boot/dts/t4240qds.dts224
33 files changed, 2130 insertions, 23 deletions
diff --git a/arch/powerpc/boot/dts/b4420qds.dts b/arch/powerpc/boot/dts/b4420qds.dts
new file mode 100644
index 000000000000..923156d03b30
--- /dev/null
+++ b/arch/powerpc/boot/dts/b4420qds.dts
@@ -0,0 +1,50 @@
1/*
2 * B4420DS Device Tree Source
3 *
4 * Copyright 2012 Freescale Semiconductor, Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of
32 * this software, even if advised of the possibility of such damage.
33 */
34
35/include/ "fsl/b4420si-pre.dtsi"
36/include/ "b4qds.dts"
37
38/ {
39 model = "fsl,B4420QDS";
40 compatible = "fsl,B4420QDS";
41
42 ifc: localbus@ffe124000 {
43 board-control@3,0 {
44 compatible = "fsl,b4420qds-fpga", "fsl,fpga-qixis";
45 };
46 };
47
48};
49
50/include/ "fsl/b4420si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/b4860qds.dts b/arch/powerpc/boot/dts/b4860qds.dts
new file mode 100644
index 000000000000..78907f38bb77
--- /dev/null
+++ b/arch/powerpc/boot/dts/b4860qds.dts
@@ -0,0 +1,61 @@
1/*
2 * B4860DS Device Tree Source
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/b4860si-pre.dtsi"
36/include/ "b4qds.dts"
37
38/ {
39 model = "fsl,B4860QDS";
40 compatible = "fsl,B4860QDS";
41
42 ifc: localbus@ffe124000 {
43 board-control@3,0 {
44 compatible = "fsl,b4860qds-fpga", "fsl,fpga-qixis";
45 };
46 };
47
48 rio: rapidio@ffe0c0000 {
49 reg = <0xf 0xfe0c0000 0 0x11000>;
50
51 port1 {
52 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
53 };
54 port2 {
55 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
56 };
57 };
58
59};
60
61/include/ "fsl/b4860si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/b4qds.dts b/arch/powerpc/boot/dts/b4qds.dts
new file mode 100644
index 000000000000..e6d2f8f90544
--- /dev/null
+++ b/arch/powerpc/boot/dts/b4qds.dts
@@ -0,0 +1,169 @@
1/*
2 * B4420DS Device Tree Source
3 *
4 * Copyright 2012 Freescale Semiconductor, Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of
32 * this software, even if advised of the possibility of such damage.
33 */
34
35/ {
36 model = "fsl,B4QDS";
37 compatible = "fsl,B4QDS";
38 #address-cells = <2>;
39 #size-cells = <2>;
40 interrupt-parent = <&mpic>;
41
42 ifc: localbus@ffe124000 {
43 reg = <0xf 0xfe124000 0 0x2000>;
44 ranges = <0 0 0xf 0xe8000000 0x08000000
45 2 0 0xf 0xff800000 0x00010000
46 3 0 0xf 0xffdf0000 0x00008000>;
47
48 nor@0,0 {
49 #address-cells = <1>;
50 #size-cells = <1>;
51 compatible = "cfi-flash";
52 reg = <0x0 0x0 0x8000000>;
53 bank-width = <2>;
54 device-width = <1>;
55 };
56
57 nand@2,0 {
58 #address-cells = <1>;
59 #size-cells = <1>;
60 compatible = "fsl,ifc-nand";
61 reg = <0x2 0x0 0x10000>;
62
63 partition@0 {
64 /* This location must not be altered */
65 /* 1MB for u-boot Bootloader Image */
66 reg = <0x0 0x00100000>;
67 label = "NAND U-Boot Image";
68 read-only;
69 };
70
71 partition@100000 {
72 /* 1MB for DTB Image */
73 reg = <0x00100000 0x00100000>;
74 label = "NAND DTB Image";
75 };
76
77 partition@200000 {
78 /* 10MB for Linux Kernel Image */
79 reg = <0x00200000 0x00A00000>;
80 label = "NAND Linux Kernel Image";
81 };
82
83 partition@c00000 {
84 /* 500MB for Root file System Image */
85 reg = <0x00c00000 0x1F400000>;
86 label = "NAND RFS Image";
87 };
88 };
89
90 board-control@3,0 {
91 compatible = "fsl,b4qds-fpga", "fsl,fpga-qixis";
92 reg = <3 0 0x300>;
93 };
94 };
95
96 memory {
97 device_type = "memory";
98 };
99
100 dcsr: dcsr@f00000000 {
101 ranges = <0x00000000 0xf 0x00000000 0x01052000>;
102 };
103
104 soc: soc@ffe000000 {
105 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
106 reg = <0xf 0xfe000000 0 0x00001000>;
107 spi@110000 {
108 flash@0 {
109 #address-cells = <1>;
110 #size-cells = <1>;
111 compatible = "sst,sst25wf040";
112 reg = <0>;
113 spi-max-frequency = <40000000>; /* input clock */
114 };
115 };
116
117 sdhc@114000 {
118 /*Disabled as there is no sdhc connector on B4420QDS board*/
119 status = "disabled";
120 };
121
122 i2c@118000 {
123 eeprom@50 {
124 compatible = "at24,24c64";
125 reg = <0x50>;
126 };
127 eeprom@51 {
128 compatible = "at24,24c256";
129 reg = <0x51>;
130 };
131 eeprom@53 {
132 compatible = "at24,24c256";
133 reg = <0x53>;
134 };
135 eeprom@57 {
136 compatible = "at24,24c256";
137 reg = <0x57>;
138 };
139 rtc@68 {
140 compatible = "dallas,ds3232";
141 reg = <0x68>;
142 };
143 };
144
145 usb@210000 {
146 dr_mode = "host";
147 phy_type = "ulpi";
148 };
149
150 };
151
152 pci0: pcie@ffe200000 {
153 reg = <0xf 0xfe200000 0 0x10000>;
154 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
155 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
156 pcie@0 {
157 ranges = <0x02000000 0 0xe0000000
158 0x02000000 0 0xe0000000
159 0 0x20000000
160
161 0x01000000 0 0x00000000
162 0x01000000 0 0x00000000
163 0 0x00010000>;
164 };
165 };
166
167};
168
169/include/ "fsl/b4si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
new file mode 100644
index 000000000000..5a6615d0ade2
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/b4420si-post.dtsi
@@ -0,0 +1,98 @@
1/*
2 * B4420 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2012 Freescale Semiconductor, Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of
32 * this software, even if advised of the possibility of such damage.
33 */
34
35/include/ "b4si-post.dtsi"
36
37/* controller at 0x200000 */
38&pci0 {
39 compatible = "fsl,b4420-pcie", "fsl,qoriq-pcie-v2.4";
40};
41
42&dcsr {
43 dcsr-epu@0 {
44 compatible = "fsl,b4420-dcsr-epu", "fsl,dcsr-epu";
45 };
46 dcsr-npc {
47 compatible = "fsl,b4420-dcsr-cnpc", "fsl,dcsr-cnpc";
48 };
49 dcsr-dpaa@9000 {
50 compatible = "fsl,b4420-dcsr-dpaa", "fsl,dcsr-dpaa";
51 };
52 dcsr-ocn@11000 {
53 compatible = "fsl,b4420-dcsr-ocn", "fsl,dcsr-ocn";
54 };
55 dcsr-nal@18000 {
56 compatible = "fsl,b4420-dcsr-nal", "fsl,dcsr-nal";
57 };
58 dcsr-rcpm@22000 {
59 compatible = "fsl,b4420-dcsr-rcpm", "fsl,dcsr-rcpm";
60 };
61 dcsr-snpc@30000 {
62 compatible = "fsl,b4420-dcsr-snpc", "fsl,dcsr-snpc";
63 };
64 dcsr-snpc@31000 {
65 compatible = "fsl,b4420-dcsr-snpc", "fsl,dcsr-snpc";
66 };
67 dcsr-cpu-sb-proxy@108000 {
68 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
69 cpu-handle = <&cpu1>;
70 reg = <0x108000 0x1000 0x109000 0x1000>;
71 };
72};
73
74&soc {
75 cpc: l3-cache-controller@10000 {
76 compatible = "fsl,b4420-l3-cache-controller", "cache";
77 };
78
79 corenet-cf@18000 {
80 compatible = "fsl,b4420-corenet-cf";
81 };
82
83 guts: global-utilities@e0000 {
84 compatible = "fsl,b4420-device-config", "fsl,qoriq-device-config-2.0";
85 };
86
87 clockgen: global-utilities@e1000 {
88 compatible = "fsl,b4420-clockgen", "fsl,qoriq-clockgen-2.0";
89 };
90
91 rcpm: global-utilities@e2000 {
92 compatible = "fsl,b4420-rcpm", "fsl,qoriq-rcpm-2.0";
93 };
94
95 L2: l2-cache-controller@c20000 {
96 compatible = "fsl,b4420-l2-cache-controller";
97 };
98};
diff --git a/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
new file mode 100644
index 000000000000..7b4426e0a5a5
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/b4420si-pre.dtsi
@@ -0,0 +1,73 @@
1/*
2 * B4420 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2012 Freescale Semiconductor, Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of
32 * this software, even if advised of the possibility of such damage.
33 */
34
35/dts-v1/;
36
37/ {
38 compatible = "fsl,B4420";
39 #address-cells = <2>;
40 #size-cells = <2>;
41 interrupt-parent = <&mpic>;
42
43 aliases {
44 ccsr = &soc;
45 dcsr = &dcsr;
46
47 serial0 = &serial0;
48 serial1 = &serial1;
49 serial2 = &serial2;
50 serial3 = &serial3;
51 pci0 = &pci0;
52 dma0 = &dma0;
53 dma1 = &dma1;
54 sdhc = &sdhc;
55 };
56
57
58 cpus {
59 #address-cells = <1>;
60 #size-cells = <0>;
61
62 cpu0: PowerPC,e6500@0 {
63 device_type = "cpu";
64 reg = <0 1>;
65 next-level-cache = <&L2>;
66 };
67 cpu1: PowerPC,e6500@2 {
68 device_type = "cpu";
69 reg = <2 3>;
70 next-level-cache = <&L2>;
71 };
72 };
73};
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
new file mode 100644
index 000000000000..e5cf6c81dd66
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/b4860si-post.dtsi
@@ -0,0 +1,142 @@
1/*
2 * B4860 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "b4si-post.dtsi"
36
37/* controller at 0x200000 */
38&pci0 {
39 compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4";
40};
41
42&rio {
43 compatible = "fsl,srio";
44 interrupts = <16 2 1 11>;
45 #address-cells = <2>;
46 #size-cells = <2>;
47 fsl,iommu-parent = <&pamu0>;
48 ranges;
49
50 port1 {
51 #address-cells = <2>;
52 #size-cells = <2>;
53 cell-index = <1>;
54 fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
55 };
56
57 port2 {
58 #address-cells = <2>;
59 #size-cells = <2>;
60 cell-index = <2>;
61 fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
62 };
63};
64
65&dcsr {
66 dcsr-epu@0 {
67 compatible = "fsl,b4860-dcsr-epu", "fsl,dcsr-epu";
68 };
69 dcsr-npc {
70 compatible = "fsl,b4860-dcsr-cnpc", "fsl,dcsr-cnpc";
71 };
72 dcsr-dpaa@9000 {
73 compatible = "fsl,b4860-dcsr-dpaa", "fsl,dcsr-dpaa";
74 };
75 dcsr-ocn@11000 {
76 compatible = "fsl,b4860-dcsr-ocn", "fsl,dcsr-ocn";
77 };
78 dcsr-ddr@13000 {
79 compatible = "fsl,dcsr-ddr";
80 dev-handle = <&ddr2>;
81 reg = <0x13000 0x1000>;
82 };
83 dcsr-nal@18000 {
84 compatible = "fsl,b4860-dcsr-nal", "fsl,dcsr-nal";
85 };
86 dcsr-rcpm@22000 {
87 compatible = "fsl,b4860-dcsr-rcpm", "fsl,dcsr-rcpm";
88 };
89 dcsr-snpc@30000 {
90 compatible = "fsl,b4860-dcsr-snpc", "fsl,dcsr-snpc";
91 };
92 dcsr-snpc@31000 {
93 compatible = "fsl,b4860-dcsr-snpc", "fsl,dcsr-snpc";
94 };
95 dcsr-cpu-sb-proxy@108000 {
96 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
97 cpu-handle = <&cpu1>;
98 reg = <0x108000 0x1000 0x109000 0x1000>;
99 };
100 dcsr-cpu-sb-proxy@110000 {
101 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
102 cpu-handle = <&cpu2>;
103 reg = <0x110000 0x1000 0x111000 0x1000>;
104 };
105 dcsr-cpu-sb-proxy@118000 {
106 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
107 cpu-handle = <&cpu3>;
108 reg = <0x118000 0x1000 0x119000 0x1000>;
109 };
110};
111
112&soc {
113 ddr2: memory-controller@9000 {
114 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
115 reg = <0x9000 0x1000>;
116 interrupts = <16 2 1 9>;
117 };
118
119 cpc: l3-cache-controller@10000 {
120 compatible = "fsl,b4860-l3-cache-controller", "cache";
121 };
122
123 corenet-cf@18000 {
124 compatible = "fsl,b4860-corenet-cf";
125 };
126
127 guts: global-utilities@e0000 {
128 compatible = "fsl,b4860-device-config", "fsl,qoriq-device-config-2.0";
129 };
130
131 clockgen: global-utilities@e1000 {
132 compatible = "fsl,b4860-clockgen", "fsl,qoriq-clockgen-2.0";
133 };
134
135 rcpm: global-utilities@e2000 {
136 compatible = "fsl,b4860-rcpm", "fsl,qoriq-rcpm-2.0";
137 };
138
139 L2: l2-cache-controller@c20000 {
140 compatible = "fsl,b4860-l2-cache-controller";
141 };
142};
diff --git a/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
new file mode 100644
index 000000000000..5263fa46a3fb
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/b4860si-pre.dtsi
@@ -0,0 +1,83 @@
1/*
2 * B4860 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/ {
38 compatible = "fsl,B4860";
39 #address-cells = <2>;
40 #size-cells = <2>;
41 interrupt-parent = <&mpic>;
42
43 aliases {
44 ccsr = &soc;
45 dcsr = &dcsr;
46
47 serial0 = &serial0;
48 serial1 = &serial1;
49 serial2 = &serial2;
50 serial3 = &serial3;
51 pci0 = &pci0;
52 dma0 = &dma0;
53 dma1 = &dma1;
54 sdhc = &sdhc;
55 };
56
57
58 cpus {
59 #address-cells = <1>;
60 #size-cells = <0>;
61
62 cpu0: PowerPC,e6500@0 {
63 device_type = "cpu";
64 reg = <0 1>;
65 next-level-cache = <&L2>;
66 };
67 cpu1: PowerPC,e6500@2 {
68 device_type = "cpu";
69 reg = <2 3>;
70 next-level-cache = <&L2>;
71 };
72 cpu2: PowerPC,e6500@4 {
73 device_type = "cpu";
74 reg = <4 5>;
75 next-level-cache = <&L2>;
76 };
77 cpu3: PowerPC,e6500@6 {
78 device_type = "cpu";
79 reg = <6 7>;
80 next-level-cache = <&L2>;
81 };
82 };
83};
diff --git a/arch/powerpc/boot/dts/fsl/b4si-post.dtsi b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
new file mode 100644
index 000000000000..73991547c69b
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/b4si-post.dtsi
@@ -0,0 +1,268 @@
1/*
2 * B4420 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2012 Freescale Semiconductor, Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * This software is provided by Freescale Semiconductor "as is" and any
24 * express or implied warranties, including, but not limited to, the implied
25 * warranties of merchantability and fitness for a particular purpose are
26 * disclaimed. In no event shall Freescale Semiconductor be liable for any
27 * direct, indirect, incidental, special, exemplary, or consequential damages
28 * (including, but not limited to, procurement of substitute goods or services;
29 * loss of use, data, or profits; or business interruption) however caused and
30 * on any theory of liability, whether in contract, strict liability, or tort
31 * (including negligence or otherwise) arising in any way out of the use of
32 * this software, even if advised of the possibility of such damage.
33 */
34
35&ifc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,ifc", "simple-bus";
39 interrupts = <25 2 0 0>;
40};
41
42/* controller at 0x200000 */
43&pci0 {
44 compatible = "fsl,b4-pcie", "fsl,qoriq-pcie-v2.4";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 interrupts = <20 2 0 0>;
50 fsl,iommu-parent = <&pamu0>;
51 pcie@0 {
52 #interrupt-cells = <1>;
53 #size-cells = <2>;
54 #address-cells = <3>;
55 device_type = "pci";
56 reg = <0 0 0 0 0>;
57 interrupts = <20 2 0 0>;
58 interrupt-map-mask = <0xf800 0 0 7>;
59 interrupt-map = <
60 /* IDSEL 0x0 */
61 0000 0 0 1 &mpic 40 1 0 0
62 0000 0 0 2 &mpic 1 1 0 0
63 0000 0 0 3 &mpic 2 1 0 0
64 0000 0 0 4 &mpic 3 1 0 0
65 >;
66 };
67};
68
69&dcsr {
70 #address-cells = <1>;
71 #size-cells = <1>;
72 compatible = "fsl,dcsr", "simple-bus";
73
74 dcsr-epu@0 {
75 compatible = "fsl,b4-dcsr-epu", "fsl,dcsr-epu";
76 interrupts = <52 2 0 0
77 84 2 0 0
78 85 2 0 0
79 94 2 0 0
80 95 2 0 0>;
81 reg = <0x0 0x1000>;
82 };
83 dcsr-npc {
84 compatible = "fsl,b4-dcsr-cnpc", "fsl,dcsr-cnpc";
85 reg = <0x1000 0x1000 0x1002000 0x10000>;
86 };
87 dcsr-nxc@2000 {
88 compatible = "fsl,dcsr-nxc";
89 reg = <0x2000 0x1000>;
90 };
91 dcsr-corenet {
92 compatible = "fsl,dcsr-corenet";
93 reg = <0x8000 0x1000 0x1A000 0x1000>;
94 };
95 dcsr-dpaa@9000 {
96 compatible = "fsl,b4-dcsr-dpaa", "fsl,dcsr-dpaa";
97 reg = <0x9000 0x1000>;
98 };
99 dcsr-ocn@11000 {
100 compatible = "fsl,b4-dcsr-ocn", "fsl,dcsr-ocn";
101 reg = <0x11000 0x1000>;
102 };
103 dcsr-ddr@12000 {
104 compatible = "fsl,dcsr-ddr";
105 dev-handle = <&ddr1>;
106 reg = <0x12000 0x1000>;
107 };
108 dcsr-nal@18000 {
109 compatible = "fsl,b4-dcsr-nal", "fsl,dcsr-nal";
110 reg = <0x18000 0x1000>;
111 };
112 dcsr-rcpm@22000 {
113 compatible = "fsl,b4-dcsr-rcpm", "fsl,dcsr-rcpm";
114 reg = <0x22000 0x1000>;
115 };
116 dcsr-snpc@30000 {
117 compatible = "fsl,b4-dcsr-snpc", "fsl,dcsr-snpc";
118 reg = <0x30000 0x1000 0x1022000 0x10000>;
119 };
120 dcsr-snpc@31000 {
121 compatible = "fsl,b4-dcsr-snpc", "fsl,dcsr-snpc";
122 reg = <0x31000 0x1000 0x1042000 0x10000>;
123 };
124 dcsr-cpu-sb-proxy@100000 {
125 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
126 cpu-handle = <&cpu0>;
127 reg = <0x100000 0x1000 0x101000 0x1000>;
128 };
129};
130
131&soc {
132 #address-cells = <1>;
133 #size-cells = <1>;
134 device_type = "soc";
135 compatible = "simple-bus";
136
137 soc-sram-error {
138 compatible = "fsl,soc-sram-error";
139 interrupts = <16 2 1 2>;
140 };
141
142 corenet-law@0 {
143 compatible = "fsl,corenet-law";
144 reg = <0x0 0x1000>;
145 fsl,num-laws = <32>;
146 };
147
148 ddr1: memory-controller@8000 {
149 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
150 reg = <0x8000 0x1000>;
151 interrupts = <16 2 1 8>;
152 };
153
154 cpc: l3-cache-controller@10000 {
155 compatible = "fsl,b4-l3-cache-controller", "cache";
156 reg = <0x10000 0x1000>;
157 interrupts = <16 2 1 4>;
158 };
159
160 corenet-cf@18000 {
161 compatible = "fsl,b4-corenet-cf";
162 reg = <0x18000 0x1000>;
163 interrupts = <16 2 1 0>;
164 fsl,ccf-num-csdids = <32>;
165 fsl,ccf-num-snoopids = <32>;
166 };
167
168 iommu@20000 {
169 compatible = "fsl,pamu-v1.0", "fsl,pamu";
170 reg = <0x20000 0x4000>;
171 #address-cells = <1>;
172 #size-cells = <1>;
173 interrupts = <
174 24 2 0 0
175 16 2 1 1>;
176
177
178 /* PCIe, DMA, SRIO */
179 pamu0: pamu@0 {
180 reg = <0 0x1000>;
181 fsl,primary-cache-geometry = <8 1>;
182 fsl,secondary-cache-geometry = <32 2>;
183 };
184
185 /* AXI2, Maple */
186 pamu1: pamu@1000 {
187 reg = <0x1000 0x1000>;
188 fsl,primary-cache-geometry = <32 1>;
189 fsl,secondary-cache-geometry = <32 2>;
190 };
191
192 /* Q/BMan */
193 pamu2: pamu@2000 {
194 reg = <0x2000 0x1000>;
195 fsl,primary-cache-geometry = <32 1>;
196 fsl,secondary-cache-geometry = <32 2>;
197 };
198
199 /* AXI1, FMAN */
200 pamu3: pamu@3000 {
201 reg = <0x3000 0x1000>;
202 fsl,primary-cache-geometry = <32 1>;
203 fsl,secondary-cache-geometry = <32 2>;
204 };
205 };
206
207/include/ "qoriq-mpic.dtsi"
208
209 guts: global-utilities@e0000 {
210 compatible = "fsl,b4-device-config";
211 reg = <0xe0000 0xe00>;
212 fsl,has-rstcr;
213 fsl,liodn-bits = <12>;
214 };
215
216 clockgen: global-utilities@e1000 {
217 compatible = "fsl,b4-clockgen", "fsl,qoriq-clockgen-2.0";
218 reg = <0xe1000 0x1000>;
219 };
220
221 rcpm: global-utilities@e2000 {
222 compatible = "fsl,b4-rcpm", "fsl,qoriq-rcpm-2.0";
223 reg = <0xe2000 0x1000>;
224 };
225
226/include/ "qoriq-dma-0.dtsi"
227 dma@100300 {
228 fsl,iommu-parent = <&pamu0>;
229 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
230 };
231
232/include/ "qoriq-dma-1.dtsi"
233 dma@101300 {
234 fsl,iommu-parent = <&pamu0>;
235 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
236 };
237
238/include/ "qonverge-usb2-dr-0.dtsi"
239 usb0: usb@210000 {
240 compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr";
241 fsl,iommu-parent = <&pamu1>;
242 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
243 };
244
245/include/ "qoriq-espi-0.dtsi"
246 spi@110000 {
247 fsl,espi-num-chipselects = <4>;
248 };
249
250/include/ "qoriq-esdhc-0.dtsi"
251 sdhc@114000 {
252 sdhci,auto-cmd12;
253 fsl,iommu-parent = <&pamu1>;
254 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
255 };
256
257/include/ "qoriq-i2c-0.dtsi"
258/include/ "qoriq-i2c-1.dtsi"
259/include/ "qoriq-duart-0.dtsi"
260/include/ "qoriq-duart-1.dtsi"
261/include/ "qoriq-sec5.3-0.dtsi"
262
263 L2: l2-cache-controller@c20000 {
264 compatible = "fsl,b4-l2-cache-controller";
265 reg = <0xc20000 0x1000>;
266 next-level-cache = <&cpc>;
267 };
268};
diff --git a/arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi b/arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi
index 870c6535a053..ea145c91cfbd 100644
--- a/arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi
+++ b/arch/powerpc/boot/dts/fsl/e500mc_power_isa.dtsi
@@ -53,6 +53,7 @@
53 power-isa-mmc; // Memory Coherence 53 power-isa-mmc; // Memory Coherence
54 power-isa-scpm; // Store Conditional Page Mobility 54 power-isa-scpm; // Store Conditional Page Mobility
55 power-isa-wt; // Wait 55 power-isa-wt; // Wait
56 fsl,eref-deo; // Data Cache Extended Operations
56 mmu-type = "power-embedded"; 57 mmu-type = "power-embedded";
57 }; 58 };
58}; 59};
diff --git a/arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi b/arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi
index 3230212f7ad5..c254c981ae87 100644
--- a/arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi
+++ b/arch/powerpc/boot/dts/fsl/e5500_power_isa.dtsi
@@ -54,6 +54,7 @@
54 power-isa-scpm; // Store Conditional Page Mobility 54 power-isa-scpm; // Store Conditional Page Mobility
55 power-isa-wt; // Wait 55 power-isa-wt; // Wait
56 power-isa-64; // 64-bit 56 power-isa-64; // 64-bit
57 fsl,eref-deo; // Data Cache Extended Operations
57 mmu-type = "power-embedded"; 58 mmu-type = "power-embedded";
58 }; 59 };
59}; 60};
diff --git a/arch/powerpc/boot/dts/fsl/e6500_power_isa.dtsi b/arch/powerpc/boot/dts/fsl/e6500_power_isa.dtsi
new file mode 100644
index 000000000000..a912dbeff359
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/e6500_power_isa.dtsi
@@ -0,0 +1,65 @@
1/*
2 * e6500 Power ISA Device Tree Source (include)
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/ {
36 cpus {
37 power-isa-version = "2.06";
38 power-isa-b; // Base
39 power-isa-e; // Embedded
40 power-isa-atb; // Alternate Time Base
41 power-isa-cs; // Cache Specification
42 power-isa-ds; // Decorated Storage
43 power-isa-e.ed; // Embedded.Enhanced Debug
44 power-isa-e.pd; // Embedded.External PID
45 power-isa-e.hv; // Embedded.Hypervisor
46 power-isa-e.le; // Embedded.Little-Endian
47 power-isa-e.pm; // Embedded.Performance Monitor
48 power-isa-e.pc; // Embedded.Processor Control
49 power-isa-ecl; // Embedded Cache Locking
50 power-isa-exp; // External Proxy
51 power-isa-fp; // Floating Point
52 power-isa-fp.r; // Floating Point.Record
53 power-isa-mmc; // Memory Coherence
54 power-isa-scpm; // Store Conditional Page Mobility
55 power-isa-wt; // Wait
56 power-isa-64; // 64-bit
57 power-isa-e.pt; // Embedded.Page Table
58 power-isa-e.hv.lrat; // Embedded.Hypervisor.LRAT
59 power-isa-e.em; // Embedded Multi-Threading
60 power-isa-v; // Vector (AltiVec)
61 fsl,eref-er; // Enhanced Reservations (Load and Reserve and Store Cond.)
62 fsl,eref-deo; // Data Cache Extended Operations
63 mmu-type = "power-embedded";
64 };
65};
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
index 941fa159cefb..f1105bffa915 100644
--- a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
@@ -148,6 +148,7 @@
148 148
149 crypto: crypto@300000 { 149 crypto: crypto@300000 {
150 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; 150 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
151 fsl,sec-era = <3>;
151 #address-cells = <1>; 152 #address-cells = <1>;
152 #size-cells = <1>; 153 #size-cells = <1>;
153 reg = <0x30000 0x10000>; 154 reg = <0x30000 0x10000>;
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index 69ac1acd4349..dc6cc5afd189 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -155,7 +155,7 @@
155 compatible = "fsl,dcsr", "simple-bus"; 155 compatible = "fsl,dcsr", "simple-bus";
156 156
157 dcsr-epu@0 { 157 dcsr-epu@0 {
158 compatible = "fsl,dcsr-epu"; 158 compatible = "fsl,p2041-dcsr-epu", "fsl,dcsr-epu";
159 interrupts = <52 2 0 0 159 interrupts = <52 2 0 0
160 84 2 0 0 160 84 2 0 0
161 85 2 0 0>; 161 85 2 0 0>;
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
index 9b5a81a4529c..3fa1e22d544a 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -182,7 +182,7 @@
182 compatible = "fsl,dcsr", "simple-bus"; 182 compatible = "fsl,dcsr", "simple-bus";
183 183
184 dcsr-epu@0 { 184 dcsr-epu@0 {
185 compatible = "fsl,dcsr-epu"; 185 compatible = "fsl,p3041-dcsr-epu", "fsl,dcsr-epu";
186 interrupts = <52 2 0 0 186 interrupts = <52 2 0 0
187 84 2 0 0 187 84 2 0 0
188 85 2 0 0>; 188 85 2 0 0>;
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 19859ad851eb..34769a7eafea 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -156,7 +156,7 @@
156 compatible = "fsl,dcsr", "simple-bus"; 156 compatible = "fsl,dcsr", "simple-bus";
157 157
158 dcsr-epu@0 { 158 dcsr-epu@0 {
159 compatible = "fsl,dcsr-epu"; 159 compatible = "fsl,p4080-dcsr-epu", "fsl,dcsr-epu";
160 interrupts = <52 2 0 0 160 interrupts = <52 2 0 0
161 84 2 0 0 161 84 2 0 0
162 85 2 0 0>; 162 85 2 0 0>;
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
index 9ea77c3513f6..bc3ae5a2252f 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -184,7 +184,7 @@
184 compatible = "fsl,dcsr", "simple-bus"; 184 compatible = "fsl,dcsr", "simple-bus";
185 185
186 dcsr-epu@0 { 186 dcsr-epu@0 {
187 compatible = "fsl,dcsr-epu"; 187 compatible = "fsl,p5020-dcsr-epu", "fsl,dcsr-epu";
188 interrupts = <52 2 0 0 188 interrupts = <52 2 0 0
189 84 2 0 0 189 84 2 0 0
190 85 2 0 0>; 190 85 2 0 0>;
diff --git a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
index 97f8c26f9709..a91897f6af09 100644
--- a/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5040si-post.dtsi
@@ -129,7 +129,7 @@
129 compatible = "fsl,dcsr", "simple-bus"; 129 compatible = "fsl,dcsr", "simple-bus";
130 130
131 dcsr-epu@0 { 131 dcsr-epu@0 {
132 compatible = "fsl,dcsr-epu"; 132 compatible = "fsl,p5040-dcsr-epu", "fsl,dcsr-epu";
133 interrupts = <52 2 0 0 133 interrupts = <52 2 0 0
134 84 2 0 0 134 84 2 0 0
135 85 2 0 0>; 135 85 2 0 0>;
diff --git a/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi b/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
index ffadcb563ada..bb3d8266b5ce 100644
--- a/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
+++ b/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
@@ -34,6 +34,7 @@
34 34
35crypto@30000 { 35crypto@30000 {
36 compatible = "fsl,sec-v4.4", "fsl,sec-v4.0"; 36 compatible = "fsl,sec-v4.4", "fsl,sec-v4.0";
37 fsl,sec-era = <3>;
37 #address-cells = <1>; 38 #address-cells = <1>;
38 #size-cells = <1>; 39 #size-cells = <1>;
39 ranges = <0x0 0x30000 0x10000>; 40 ranges = <0x0 0x30000 0x10000>;
diff --git a/arch/powerpc/boot/dts/fsl/qonverge-usb2-dr-0.dtsi b/arch/powerpc/boot/dts/fsl/qonverge-usb2-dr-0.dtsi
new file mode 100644
index 000000000000..29dad723091e
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qonverge-usb2-dr-0.dtsi
@@ -0,0 +1,41 @@
1/*
2 * QorIQ Qonverge USB Host device tree stub [ controller @ offset 0x210000 ]
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35usb@210000 {
36 compatible = "fsl-usb2-dr";
37 reg = <0x210000 0x1000>;
38 #address-cells = <1>;
39 #size-cells = <0>;
40 interrupts = <44 0x2 0 0>;
41};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-gpio-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-gpio-1.dtsi
new file mode 100644
index 000000000000..c2f9cdadb604
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-gpio-1.dtsi
@@ -0,0 +1,41 @@
1/*
2 * QorIQ GPIO device tree stub [ controller @ offset 0x131000 ]
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35gpio1: gpio@131000 {
36 compatible = "fsl,qoriq-gpio";
37 reg = <0x131000 0x1000>;
38 interrupts = <54 2 0 0>;
39 #gpio-cells = <2>;
40 gpio-controller;
41};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-gpio-2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-gpio-2.dtsi
new file mode 100644
index 000000000000..33f3ccbac83f
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-gpio-2.dtsi
@@ -0,0 +1,41 @@
1/*
2 * QorIQ GPIO device tree stub [ controller @ offset 0x132000 ]
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35gpio2: gpio@132000 {
36 compatible = "fsl,qoriq-gpio";
37 reg = <0x132000 0x1000>;
38 interrupts = <86 2 0 0>;
39 #gpio-cells = <2>;
40 gpio-controller;
41};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-gpio-3.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-gpio-3.dtsi
new file mode 100644
index 000000000000..86954e95ea02
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-gpio-3.dtsi
@@ -0,0 +1,41 @@
1/*
2 * QorIQ GPIO device tree stub [ controller @ offset 0x133000 ]
3 *
4 * Copyright 2013 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35gpio3: gpio@133000 {
36 compatible = "fsl,qoriq-gpio";
37 reg = <0x133000 0x1000>;
38 interrupts = <87 2 0 0>;
39 #gpio-cells = <2>;
40 gpio-controller;
41};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi
index 0cbbac329539..02bee5fcbb9a 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sec4.0-0.dtsi
@@ -34,6 +34,7 @@
34 34
35crypto: crypto@300000 { 35crypto: crypto@300000 {
36 compatible = "fsl,sec-v4.0"; 36 compatible = "fsl,sec-v4.0";
37 fsl,sec-era = <1>;
37 #address-cells = <1>; 38 #address-cells = <1>;
38 #size-cells = <1>; 39 #size-cells = <1>;
39 reg = <0x300000 0x10000>; 40 reg = <0x300000 0x10000>;
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi
index 7990e0d3d6f2..7f7574e53323 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sec4.2-0.dtsi
@@ -34,6 +34,7 @@
34 34
35crypto: crypto@300000 { 35crypto: crypto@300000 {
36 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0"; 36 compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
37 fsl,sec-era = <3>;
37 #address-cells = <1>; 38 #address-cells = <1>;
38 #size-cells = <1>; 39 #size-cells = <1>;
39 reg = <0x300000 0x10000>; 40 reg = <0x300000 0x10000>;
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec5.0-0.dtsi
index 3308986bba0d..e298efbb0f3e 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-sec4.1-0.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sec5.0-0.dtsi
@@ -1,7 +1,7 @@
1/* 1/*
2 * QorIQ Sec/Crypto 4.1 device tree stub [ controller @ offset 0x300000 ] 2 * QorIQ Sec/Crypto 5.0 device tree stub [ controller @ offset 0x300000 ]
3 * 3 *
4 * Copyright 2011 Freescale Semiconductor Inc. 4 * Copyright 2012 Freescale Semiconductor Inc.
5 * 5 *
6 * Redistribution and use in source and binary forms, with or without 6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met: 7 * modification, are permitted provided that the following conditions are met:
@@ -33,7 +33,8 @@
33 */ 33 */
34 34
35crypto: crypto@300000 { 35crypto: crypto@300000 {
36 compatible = "fsl,sec-v4.1", "fsl,sec-v4.0"; 36 compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
37 fsl,sec-era = <5>;
37 #address-cells = <1>; 38 #address-cells = <1>;
38 #size-cells = <1>; 39 #size-cells = <1>;
39 reg = <0x300000 0x10000>; 40 reg = <0x300000 0x10000>;
@@ -41,35 +42,35 @@ crypto: crypto@300000 {
41 interrupts = <92 2 0 0>; 42 interrupts = <92 2 0 0>;
42 43
43 sec_jr0: jr@1000 { 44 sec_jr0: jr@1000 {
44 compatible = "fsl,sec-v4.1-job-ring", 45 compatible = "fsl,sec-v5.0-job-ring",
45 "fsl,sec-v4.0-job-ring"; 46 "fsl,sec-v4.0-job-ring";
46 reg = <0x1000 0x1000>; 47 reg = <0x1000 0x1000>;
47 interrupts = <88 2 0 0>; 48 interrupts = <88 2 0 0>;
48 }; 49 };
49 50
50 sec_jr1: jr@2000 { 51 sec_jr1: jr@2000 {
51 compatible = "fsl,sec-v4.1-job-ring", 52 compatible = "fsl,sec-v5.0-job-ring",
52 "fsl,sec-v4.0-job-ring"; 53 "fsl,sec-v4.0-job-ring";
53 reg = <0x2000 0x1000>; 54 reg = <0x2000 0x1000>;
54 interrupts = <89 2 0 0>; 55 interrupts = <89 2 0 0>;
55 }; 56 };
56 57
57 sec_jr2: jr@3000 { 58 sec_jr2: jr@3000 {
58 compatible = "fsl,sec-v4.1-job-ring", 59 compatible = "fsl,sec-v5.0-job-ring",
59 "fsl,sec-v4.0-job-ring"; 60 "fsl,sec-v4.0-job-ring";
60 reg = <0x3000 0x1000>; 61 reg = <0x3000 0x1000>;
61 interrupts = <90 2 0 0>; 62 interrupts = <90 2 0 0>;
62 }; 63 };
63 64
64 sec_jr3: jr@4000 { 65 sec_jr3: jr@4000 {
65 compatible = "fsl,sec-v4.1-job-ring", 66 compatible = "fsl,sec-v5.0-job-ring",
66 "fsl,sec-v4.0-job-ring"; 67 "fsl,sec-v4.0-job-ring";
67 reg = <0x4000 0x1000>; 68 reg = <0x4000 0x1000>;
68 interrupts = <91 2 0 0>; 69 interrupts = <91 2 0 0>;
69 }; 70 };
70 71
71 rtic@6000 { 72 rtic@6000 {
72 compatible = "fsl,sec-v4.1-rtic", 73 compatible = "fsl,sec-v5.0-rtic",
73 "fsl,sec-v4.0-rtic"; 74 "fsl,sec-v4.0-rtic";
74 #address-cells = <1>; 75 #address-cells = <1>;
75 #size-cells = <1>; 76 #size-cells = <1>;
@@ -77,25 +78,25 @@ crypto: crypto@300000 {
77 ranges = <0x0 0x6100 0xe00>; 78 ranges = <0x0 0x6100 0xe00>;
78 79
79 rtic_a: rtic-a@0 { 80 rtic_a: rtic-a@0 {
80 compatible = "fsl,sec-v4.1-rtic-memory", 81 compatible = "fsl,sec-v5.0-rtic-memory",
81 "fsl,sec-v4.0-rtic-memory"; 82 "fsl,sec-v4.0-rtic-memory";
82 reg = <0x00 0x20 0x100 0x80>; 83 reg = <0x00 0x20 0x100 0x80>;
83 }; 84 };
84 85
85 rtic_b: rtic-b@20 { 86 rtic_b: rtic-b@20 {
86 compatible = "fsl,sec-v4.1-rtic-memory", 87 compatible = "fsl,sec-v5.0-rtic-memory",
87 "fsl,sec-v4.0-rtic-memory"; 88 "fsl,sec-v4.0-rtic-memory";
88 reg = <0x20 0x20 0x200 0x80>; 89 reg = <0x20 0x20 0x200 0x80>;
89 }; 90 };
90 91
91 rtic_c: rtic-c@40 { 92 rtic_c: rtic-c@40 {
92 compatible = "fsl,sec-v4.1-rtic-memory", 93 compatible = "fsl,sec-v5.0-rtic-memory",
93 "fsl,sec-v4.0-rtic-memory"; 94 "fsl,sec-v4.0-rtic-memory";
94 reg = <0x40 0x20 0x300 0x80>; 95 reg = <0x40 0x20 0x300 0x80>;
95 }; 96 };
96 97
97 rtic_d: rtic-d@60 { 98 rtic_d: rtic-d@60 {
98 compatible = "fsl,sec-v4.1-rtic-memory", 99 compatible = "fsl,sec-v5.0-rtic-memory",
99 "fsl,sec-v4.0-rtic-memory"; 100 "fsl,sec-v4.0-rtic-memory";
100 reg = <0x60 0x20 0x500 0x80>; 101 reg = <0x60 0x20 0x500 0x80>;
101 }; 102 };
@@ -103,7 +104,7 @@ crypto: crypto@300000 {
103}; 104};
104 105
105sec_mon: sec_mon@314000 { 106sec_mon: sec_mon@314000 {
106 compatible = "fsl,sec-v4.1-mon", "fsl,sec-v4.0-mon"; 107 compatible = "fsl,sec-v5.0-mon", "fsl,sec-v4.0-mon";
107 reg = <0x314000 0x1000>; 108 reg = <0x314000 0x1000>;
108 interrupts = <93 2 0 0>; 109 interrupts = <93 2 0 0>;
109}; 110};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec5.2-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec5.2-0.dtsi
index 7b2ab8a8c1f4..33ff09d52e05 100644
--- a/arch/powerpc/boot/dts/fsl/qoriq-sec5.2-0.dtsi
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sec5.2-0.dtsi
@@ -34,6 +34,7 @@
34 34
35crypto: crypto@300000 { 35crypto: crypto@300000 {
36 compatible = "fsl,sec-v5.2", "fsl,sec-v5.0", "fsl,sec-v4.0"; 36 compatible = "fsl,sec-v5.2", "fsl,sec-v5.0", "fsl,sec-v4.0";
37 fsl,sec-era = <5>;
37 #address-cells = <1>; 38 #address-cells = <1>;
38 #size-cells = <1>; 39 #size-cells = <1>;
39 reg = <0x300000 0x10000>; 40 reg = <0x300000 0x10000>;
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-sec5.3-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-sec5.3-0.dtsi
new file mode 100644
index 000000000000..08778221c194
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-sec5.3-0.dtsi
@@ -0,0 +1,119 @@
1/*
2 * QorIQ Sec/Crypto 5.3 device tree stub [ controller @ offset 0x300000 ]
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35crypto: crypto@300000 {
36 compatible = "fsl,sec-v5.3", "fsl,sec-v5.0", "fsl,sec-v4.0";
37 fsl,sec-era = <4>;
38 #address-cells = <1>;
39 #size-cells = <1>;
40 reg = <0x300000 0x10000>;
41 ranges = <0 0x300000 0x10000>;
42 interrupts = <92 2 0 0>;
43
44 sec_jr0: jr@1000 {
45 compatible = "fsl,sec-v5.3-job-ring",
46 "fsl,sec-v5.0-job-ring",
47 "fsl,sec-v4.0-job-ring";
48 reg = <0x1000 0x1000>;
49 interrupts = <88 2 0 0>;
50 };
51
52 sec_jr1: jr@2000 {
53 compatible = "fsl,sec-v5.3-job-ring",
54 "fsl,sec-v5.0-job-ring",
55 "fsl,sec-v4.0-job-ring";
56 reg = <0x2000 0x1000>;
57 interrupts = <89 2 0 0>;
58 };
59
60 sec_jr2: jr@3000 {
61 compatible = "fsl,sec-v5.3-job-ring",
62 "fsl,sec-v5.0-job-ring",
63 "fsl,sec-v4.0-job-ring";
64 reg = <0x3000 0x1000>;
65 interrupts = <90 2 0 0>;
66 };
67
68 sec_jr3: jr@4000 {
69 compatible = "fsl,sec-v5.3-job-ring",
70 "fsl,sec-v5.0-job-ring",
71 "fsl,sec-v4.0-job-ring";
72 reg = <0x4000 0x1000>;
73 interrupts = <91 2 0 0>;
74 };
75
76 rtic@6000 {
77 compatible = "fsl,sec-v5.3-rtic",
78 "fsl,sec-v5.0-rtic",
79 "fsl,sec-v4.0-rtic";
80 #address-cells = <1>;
81 #size-cells = <1>;
82 reg = <0x6000 0x100>;
83 ranges = <0x0 0x6100 0xe00>;
84
85 rtic_a: rtic-a@0 {
86 compatible = "fsl,sec-v5.3-rtic-memory",
87 "fsl,sec-v5.0-rtic-memory",
88 "fsl,sec-v4.0-rtic-memory";
89 reg = <0x00 0x20 0x100 0x80>;
90 };
91
92 rtic_b: rtic-b@20 {
93 compatible = "fsl,sec-v5.3-rtic-memory",
94 "fsl,sec-v5.0-rtic-memory",
95 "fsl,sec-v4.0-rtic-memory";
96 reg = <0x20 0x20 0x200 0x80>;
97 };
98
99 rtic_c: rtic-c@40 {
100 compatible = "fsl,sec-v5.3-rtic-memory",
101 "fsl,sec-v5.0-rtic-memory",
102 "fsl,sec-v4.0-rtic-memory";
103 reg = <0x40 0x20 0x300 0x80>;
104 };
105
106 rtic_d: rtic-d@60 {
107 compatible = "fsl,sec-v5.3-rtic-memory",
108 "fsl,sec-v5.0-rtic-memory",
109 "fsl,sec-v4.0-rtic-memory";
110 reg = <0x60 0x20 0x500 0x80>;
111 };
112 };
113};
114
115sec_mon: sec_mon@314000 {
116 compatible = "fsl,sec-v5.3-mon", "fsl,sec-v5.0-mon", "fsl,sec-v4.0-mon";
117 reg = <0x314000 0x1000>;
118 interrupts = <93 2 0 0>;
119};
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
new file mode 100644
index 000000000000..bd611a9cad32
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -0,0 +1,442 @@
1/*
2 * T4240 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&ifc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,ifc", "simple-bus";
39 interrupts = <25 2 0 0>;
40};
41
42/* controller at 0x240000 */
43&pci0 {
44 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
45 device_type = "pci";
46 #size-cells = <2>;
47 #address-cells = <3>;
48 bus-range = <0x0 0xff>;
49 interrupts = <20 2 0 0>;
50 pcie@0 {
51 #interrupt-cells = <1>;
52 #size-cells = <2>;
53 #address-cells = <3>;
54 device_type = "pci";
55 reg = <0 0 0 0 0>;
56 interrupts = <20 2 0 0>;
57 interrupt-map-mask = <0xf800 0 0 7>;
58 interrupt-map = <
59 /* IDSEL 0x0 */
60 0000 0 0 1 &mpic 40 1 0 0
61 0000 0 0 2 &mpic 1 1 0 0
62 0000 0 0 3 &mpic 2 1 0 0
63 0000 0 0 4 &mpic 3 1 0 0
64 >;
65 };
66};
67
68/* controller at 0x250000 */
69&pci1 {
70 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
71 device_type = "pci";
72 #size-cells = <2>;
73 #address-cells = <3>;
74 bus-range = <0 0xff>;
75 interrupts = <21 2 0 0>;
76 pcie@0 {
77 #interrupt-cells = <1>;
78 #size-cells = <2>;
79 #address-cells = <3>;
80 device_type = "pci";
81 reg = <0 0 0 0 0>;
82 interrupts = <21 2 0 0>;
83 interrupt-map-mask = <0xf800 0 0 7>;
84 interrupt-map = <
85 /* IDSEL 0x0 */
86 0000 0 0 1 &mpic 41 1 0 0
87 0000 0 0 2 &mpic 5 1 0 0
88 0000 0 0 3 &mpic 6 1 0 0
89 0000 0 0 4 &mpic 7 1 0 0
90 >;
91 };
92};
93
94/* controller at 0x260000 */
95&pci2 {
96 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
97 device_type = "pci";
98 #size-cells = <2>;
99 #address-cells = <3>;
100 bus-range = <0x0 0xff>;
101 interrupts = <22 2 0 0>;
102 pcie@0 {
103 #interrupt-cells = <1>;
104 #size-cells = <2>;
105 #address-cells = <3>;
106 device_type = "pci";
107 reg = <0 0 0 0 0>;
108 interrupts = <22 2 0 0>;
109 interrupt-map-mask = <0xf800 0 0 7>;
110 interrupt-map = <
111 /* IDSEL 0x0 */
112 0000 0 0 1 &mpic 42 1 0 0
113 0000 0 0 2 &mpic 9 1 0 0
114 0000 0 0 3 &mpic 10 1 0 0
115 0000 0 0 4 &mpic 11 1 0 0
116 >;
117 };
118};
119
120/* controller at 0x270000 */
121&pci3 {
122 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
123 device_type = "pci";
124 #size-cells = <2>;
125 #address-cells = <3>;
126 bus-range = <0x0 0xff>;
127 interrupts = <23 2 0 0>;
128 pcie@0 {
129 #interrupt-cells = <1>;
130 #size-cells = <2>;
131 #address-cells = <3>;
132 device_type = "pci";
133 reg = <0 0 0 0 0>;
134 interrupts = <23 2 0 0>;
135 interrupt-map-mask = <0xf800 0 0 7>;
136 interrupt-map = <
137 /* IDSEL 0x0 */
138 0000 0 0 1 &mpic 43 1 0 0
139 0000 0 0 2 &mpic 0 1 0 0
140 0000 0 0 3 &mpic 4 1 0 0
141 0000 0 0 4 &mpic 8 1 0 0
142 >;
143 };
144};
145
146&rio {
147 compatible = "fsl,srio";
148 interrupts = <16 2 1 11>;
149 #address-cells = <2>;
150 #size-cells = <2>;
151 ranges;
152
153 port1 {
154 #address-cells = <2>;
155 #size-cells = <2>;
156 cell-index = <1>;
157 };
158
159 port2 {
160 #address-cells = <2>;
161 #size-cells = <2>;
162 cell-index = <2>;
163 };
164};
165
166&dcsr {
167 #address-cells = <1>;
168 #size-cells = <1>;
169 compatible = "fsl,dcsr", "simple-bus";
170
171 dcsr-epu@0 {
172 compatible = "fsl,t4240-dcsr-epu", "fsl,dcsr-epu";
173 interrupts = <52 2 0 0
174 84 2 0 0
175 85 2 0 0
176 94 2 0 0
177 95 2 0 0>;
178 reg = <0x0 0x1000>;
179 };
180 dcsr-npc {
181 compatible = "fsl,t4240-dcsr-cnpc", "fsl,dcsr-cnpc";
182 reg = <0x1000 0x1000 0x1002000 0x10000>;
183 };
184 dcsr-nxc@2000 {
185 compatible = "fsl,dcsr-nxc";
186 reg = <0x2000 0x1000>;
187 };
188 dcsr-corenet {
189 compatible = "fsl,dcsr-corenet";
190 reg = <0x8000 0x1000 0x1A000 0x1000>;
191 };
192 dcsr-dpaa@9000 {
193 compatible = "fsl,t4240-dcsr-dpaa", "fsl,dcsr-dpaa";
194 reg = <0x9000 0x1000>;
195 };
196 dcsr-ocn@11000 {
197 compatible = "fsl,t4240-dcsr-ocn", "fsl,dcsr-ocn";
198 reg = <0x11000 0x1000>;
199 };
200 dcsr-ddr@12000 {
201 compatible = "fsl,dcsr-ddr";
202 dev-handle = <&ddr1>;
203 reg = <0x12000 0x1000>;
204 };
205 dcsr-ddr@13000 {
206 compatible = "fsl,dcsr-ddr";
207 dev-handle = <&ddr2>;
208 reg = <0x13000 0x1000>;
209 };
210 dcsr-ddr@14000 {
211 compatible = "fsl,dcsr-ddr";
212 dev-handle = <&ddr3>;
213 reg = <0x14000 0x1000>;
214 };
215 dcsr-nal@18000 {
216 compatible = "fsl,t4240-dcsr-nal", "fsl,dcsr-nal";
217 reg = <0x18000 0x1000>;
218 };
219 dcsr-rcpm@22000 {
220 compatible = "fsl,t4240-dcsr-rcpm", "fsl,dcsr-rcpm";
221 reg = <0x22000 0x1000>;
222 };
223 dcsr-snpc@30000 {
224 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc";
225 reg = <0x30000 0x1000 0x1022000 0x10000>;
226 };
227 dcsr-snpc@31000 {
228 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc";
229 reg = <0x31000 0x1000 0x1042000 0x10000>;
230 };
231 dcsr-snpc@32000 {
232 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc";
233 reg = <0x32000 0x1000 0x1062000 0x10000>;
234 };
235 dcsr-cpu-sb-proxy@100000 {
236 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
237 cpu-handle = <&cpu0>;
238 reg = <0x100000 0x1000 0x101000 0x1000>;
239 };
240 dcsr-cpu-sb-proxy@108000 {
241 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
242 cpu-handle = <&cpu1>;
243 reg = <0x108000 0x1000 0x109000 0x1000>;
244 };
245 dcsr-cpu-sb-proxy@110000 {
246 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
247 cpu-handle = <&cpu2>;
248 reg = <0x110000 0x1000 0x111000 0x1000>;
249 };
250 dcsr-cpu-sb-proxy@118000 {
251 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
252 cpu-handle = <&cpu3>;
253 reg = <0x118000 0x1000 0x119000 0x1000>;
254 };
255 dcsr-cpu-sb-proxy@120000 {
256 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
257 cpu-handle = <&cpu4>;
258 reg = <0x120000 0x1000 0x121000 0x1000>;
259 };
260 dcsr-cpu-sb-proxy@128000 {
261 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
262 cpu-handle = <&cpu5>;
263 reg = <0x128000 0x1000 0x129000 0x1000>;
264 };
265 dcsr-cpu-sb-proxy@130000 {
266 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
267 cpu-handle = <&cpu6>;
268 reg = <0x130000 0x1000 0x131000 0x1000>;
269 };
270 dcsr-cpu-sb-proxy@138000 {
271 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
272 cpu-handle = <&cpu7>;
273 reg = <0x138000 0x1000 0x139000 0x1000>;
274 };
275 dcsr-cpu-sb-proxy@140000 {
276 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
277 cpu-handle = <&cpu8>;
278 reg = <0x140000 0x1000 0x141000 0x1000>;
279 };
280 dcsr-cpu-sb-proxy@148000 {
281 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
282 cpu-handle = <&cpu9>;
283 reg = <0x148000 0x1000 0x149000 0x1000>;
284 };
285 dcsr-cpu-sb-proxy@150000 {
286 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
287 cpu-handle = <&cpu10>;
288 reg = <0x150000 0x1000 0x151000 0x1000>;
289 };
290 dcsr-cpu-sb-proxy@158000 {
291 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
292 cpu-handle = <&cpu11>;
293 reg = <0x158000 0x1000 0x159000 0x1000>;
294 };
295};
296
297&soc {
298 #address-cells = <1>;
299 #size-cells = <1>;
300 device_type = "soc";
301 compatible = "simple-bus";
302
303 soc-sram-error {
304 compatible = "fsl,soc-sram-error";
305 interrupts = <16 2 1 29>;
306 };
307
308 corenet-law@0 {
309 compatible = "fsl,corenet-law";
310 reg = <0x0 0x1000>;
311 fsl,num-laws = <32>;
312 };
313
314 ddr1: memory-controller@8000 {
315 compatible = "fsl,qoriq-memory-controller-v4.7",
316 "fsl,qoriq-memory-controller";
317 reg = <0x8000 0x1000>;
318 interrupts = <16 2 1 23>;
319 };
320
321 ddr2: memory-controller@9000 {
322 compatible = "fsl,qoriq-memory-controller-v4.7",
323 "fsl,qoriq-memory-controller";
324 reg = <0x9000 0x1000>;
325 interrupts = <16 2 1 22>;
326 };
327
328 ddr3: memory-controller@a000 {
329 compatible = "fsl,qoriq-memory-controller-v4.7",
330 "fsl,qoriq-memory-controller";
331 reg = <0xa000 0x1000>;
332 interrupts = <16 2 1 21>;
333 };
334
335 cpc: l3-cache-controller@10000 {
336 compatible = "fsl,t4240-l3-cache-controller", "cache";
337 reg = <0x10000 0x1000
338 0x11000 0x1000
339 0x12000 0x1000>;
340 interrupts = <16 2 1 27
341 16 2 1 26
342 16 2 1 25>;
343 };
344
345 corenet-cf@18000 {
346 compatible = "fsl,corenet-cf";
347 reg = <0x18000 0x1000>;
348 interrupts = <16 2 1 31>;
349 fsl,ccf-num-csdids = <32>;
350 fsl,ccf-num-snoopids = <32>;
351 };
352
353 iommu@20000 {
354 compatible = "fsl,pamu-v1.0", "fsl,pamu";
355 reg = <0x20000 0x6000>;
356 interrupts = <
357 24 2 0 0
358 16 2 1 30>;
359 };
360
361/include/ "qoriq-mpic.dtsi"
362
363 guts: global-utilities@e0000 {
364 compatible = "fsl,t4240-device-config", "fsl,qoriq-device-config-2.0";
365 reg = <0xe0000 0xe00>;
366 fsl,has-rstcr;
367 fsl,liodn-bits = <12>;
368 };
369
370 clockgen: global-utilities@e1000 {
371 compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0";
372 reg = <0xe1000 0x1000>;
373 };
374
375 rcpm: global-utilities@e2000 {
376 compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2.0";
377 reg = <0xe2000 0x1000>;
378 };
379
380 sfp: sfp@e8000 {
381 compatible = "fsl,t4240-sfp";
382 reg = <0xe8000 0x1000>;
383 };
384
385 serdes: serdes@ea000 {
386 compatible = "fsl,t4240-serdes";
387 reg = <0xea000 0x4000>;
388 };
389
390/include/ "qoriq-dma-0.dtsi"
391/include/ "qoriq-dma-1.dtsi"
392
393/include/ "qoriq-espi-0.dtsi"
394 spi@110000 {
395 fsl,espi-num-chipselects = <4>;
396 };
397
398/include/ "qoriq-esdhc-0.dtsi"
399 sdhc@114000 {
400 compatible = "fsl,t4240-esdhc", "fsl,esdhc";
401 sdhci,auto-cmd12;
402 };
403/include/ "qoriq-i2c-0.dtsi"
404/include/ "qoriq-i2c-1.dtsi"
405/include/ "qoriq-duart-0.dtsi"
406/include/ "qoriq-duart-1.dtsi"
407/include/ "qoriq-gpio-0.dtsi"
408/include/ "qoriq-gpio-1.dtsi"
409/include/ "qoriq-gpio-2.dtsi"
410/include/ "qoriq-gpio-3.dtsi"
411/include/ "qoriq-usb2-mph-0.dtsi"
412 usb0: usb@210000 {
413 compatible = "fsl-usb2-mph-v2.4", "fsl-usb2-mph";
414 phy_type = "utmi";
415 port0;
416 };
417/include/ "qoriq-usb2-dr-0.dtsi"
418 usb1: usb@211000 {
419 compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr";
420 dr_mode = "host";
421 phy_type = "utmi";
422 };
423/include/ "qoriq-sata2-0.dtsi"
424/include/ "qoriq-sata2-1.dtsi"
425/include/ "qoriq-sec5.0-0.dtsi"
426
427 L2_1: l2-cache-controller@c20000 {
428 compatible = "fsl,t4240-l2-cache-controller";
429 reg = <0xc20000 0x40000>;
430 next-level-cache = <&cpc>;
431 };
432 L2_2: l2-cache-controller@c60000 {
433 compatible = "fsl,t4240-l2-cache-controller";
434 reg = <0xc60000 0x40000>;
435 next-level-cache = <&cpc>;
436 };
437 L2_3: l2-cache-controller@ca0000 {
438 compatible = "fsl,t4240-l2-cache-controller";
439 reg = <0xca0000 0x40000>;
440 next-level-cache = <&cpc>;
441 };
442};
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
new file mode 100644
index 000000000000..a93c55a88560
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/t4240si-pre.dtsi
@@ -0,0 +1,128 @@
1/*
2 * T4240 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e6500_power_isa.dtsi"
38
39/ {
40 compatible = "fsl,T4240";
41 #address-cells = <2>;
42 #size-cells = <2>;
43 interrupt-parent = <&mpic>;
44
45 aliases {
46 ccsr = &soc;
47 dcsr = &dcsr;
48
49 serial0 = &serial0;
50 serial1 = &serial1;
51 serial2 = &serial2;
52 serial3 = &serial3;
53 crypto = &crypto;
54 pci0 = &pci0;
55 pci1 = &pci1;
56 pci2 = &pci2;
57 pci3 = &pci3;
58 dma0 = &dma0;
59 dma1 = &dma1;
60 sdhc = &sdhc;
61 };
62
63 cpus {
64 #address-cells = <1>;
65 #size-cells = <0>;
66
67 cpu0: PowerPC,e6500@0 {
68 device_type = "cpu";
69 reg = <0 1>;
70 next-level-cache = <&L2_1>;
71 };
72 cpu1: PowerPC,e6500@2 {
73 device_type = "cpu";
74 reg = <2 3>;
75 next-level-cache = <&L2_1>;
76 };
77 cpu2: PowerPC,e6500@4 {
78 device_type = "cpu";
79 reg = <4 5>;
80 next-level-cache = <&L2_1>;
81 };
82 cpu3: PowerPC,e6500@6 {
83 device_type = "cpu";
84 reg = <6 7>;
85 next-level-cache = <&L2_1>;
86 };
87 cpu4: PowerPC,e6500@8 {
88 device_type = "cpu";
89 reg = <8 9>;
90 next-level-cache = <&L2_2>;
91 };
92 cpu5: PowerPC,e6500@10 {
93 device_type = "cpu";
94 reg = <10 11>;
95 next-level-cache = <&L2_2>;
96 };
97 cpu6: PowerPC,e6500@12 {
98 device_type = "cpu";
99 reg = <12 13>;
100 next-level-cache = <&L2_2>;
101 };
102 cpu7: PowerPC,e6500@14 {
103 device_type = "cpu";
104 reg = <14 15>;
105 next-level-cache = <&L2_2>;
106 };
107 cpu8: PowerPC,e6500@16 {
108 device_type = "cpu";
109 reg = <16 17>;
110 next-level-cache = <&L2_3>;
111 };
112 cpu9: PowerPC,e6500@18 {
113 device_type = "cpu";
114 reg = <18 19>;
115 next-level-cache = <&L2_3>;
116 };
117 cpu10: PowerPC,e6500@20 {
118 device_type = "cpu";
119 reg = <20 21>;
120 next-level-cache = <&L2_3>;
121 };
122 cpu11: PowerPC,e6500@22 {
123 device_type = "cpu";
124 reg = <22 23>;
125 next-level-cache = <&L2_3>;
126 };
127 };
128};
diff --git a/arch/powerpc/boot/dts/mpc8536ds_36b.dts b/arch/powerpc/boot/dts/mpc8536ds_36b.dts
index f8a3b3413176..6c723ee108cd 100644
--- a/arch/powerpc/boot/dts/mpc8536ds_36b.dts
+++ b/arch/powerpc/boot/dts/mpc8536ds_36b.dts
@@ -32,7 +32,7 @@
32 reg = <0 0 0 0>; // Filled by U-Boot 32 reg = <0 0 0 0>; // Filled by U-Boot
33 }; 33 };
34 34
35 lbc: localbus@ffe05000 { 35 lbc: localbus@fffe05000 {
36 reg = <0xf 0xffe05000 0 0x1000>; 36 reg = <0xf 0xffe05000 0 0x1000>;
37 37
38 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000 38 ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
@@ -44,7 +44,7 @@
44 ranges = <0x0 0xf 0xffe00000 0x100000>; 44 ranges = <0x0 0xf 0xffe00000 0x100000>;
45 }; 45 };
46 46
47 pci0: pci@ffe08000 { 47 pci0: pci@fffe08000 {
48 reg = <0xf 0xffe08000 0 0x1000>; 48 reg = <0xf 0xffe08000 0 0x1000>;
49 ranges = <0x02000000 0 0xf0000000 0xc 0x00000000 0 0x10000000 49 ranges = <0x02000000 0 0xf0000000 0xc 0x00000000 0 0x10000000
50 0x01000000 0 0x00000000 0xf 0xffc00000 0 0x00010000>; 50 0x01000000 0 0x00000000 0xf 0xffc00000 0 0x00010000>;
@@ -59,7 +59,7 @@
59 0x8800 0 0 4 &mpic 4 1 0 0>; 59 0x8800 0 0 4 &mpic 4 1 0 0>;
60 }; 60 };
61 61
62 pci1: pcie@ffe09000 { 62 pci1: pcie@fffe09000 {
63 reg = <0xf 0xffe09000 0 0x1000>; 63 reg = <0xf 0xffe09000 0 0x1000>;
64 ranges = <0x02000000 0 0xf8000000 0xc 0x18000000 0 0x08000000 64 ranges = <0x02000000 0 0xf8000000 0xc 0x18000000 0 0x08000000
65 0x01000000 0 0x00000000 0xf 0xffc20000 0 0x00010000>; 65 0x01000000 0 0x00000000 0xf 0xffc20000 0 0x00010000>;
diff --git a/arch/powerpc/boot/dts/p1021rdb-pc.dtsi b/arch/powerpc/boot/dts/p1021rdb-pc.dtsi
index c13abfbbe2e2..d6274c58f496 100644
--- a/arch/powerpc/boot/dts/p1021rdb-pc.dtsi
+++ b/arch/powerpc/boot/dts/p1021rdb-pc.dtsi
@@ -62,11 +62,19 @@
62 }; 62 };
63 63
64 partition@400000 { 64 partition@400000 {
65 /* 11MB for JFFS2 based Root file System */ 65 /* 10.75MB for JFFS2 based Root file System */
66 reg = <0x00400000 0x00b00000>; 66 reg = <0x00400000 0x00ac0000>;
67 label = "NOR JFFS2 Root File System"; 67 label = "NOR JFFS2 Root File System";
68 }; 68 };
69 69
70 partition@ec0000 {
71 /* This location must not be altered */
72 /* 256KB for QE ucode firmware*/
73 reg = <0x00ec0000 0x00040000>;
74 label = "NOR QE microcode firmware";
75 read-only;
76 };
77
70 partition@f00000 { 78 partition@f00000 {
71 /* This location must not be altered */ 79 /* This location must not be altered */
72 /* 512KB for u-boot Bootloader Image */ 80 /* 512KB for u-boot Bootloader Image */
diff --git a/arch/powerpc/boot/dts/p1025rdb_36b.dts b/arch/powerpc/boot/dts/p1025rdb_36b.dts
index 4ce4bfa0eda4..06deb6f341ba 100644
--- a/arch/powerpc/boot/dts/p1025rdb_36b.dts
+++ b/arch/powerpc/boot/dts/p1025rdb_36b.dts
@@ -82,6 +82,11 @@
82 0x0 0x100000>; 82 0x0 0x100000>;
83 }; 83 };
84 }; 84 };
85
86 qe: qe@fffe80000 {
87 status = "disabled"; /* no firmware loaded */
88 };
89
85}; 90};
86 91
87/include/ "p1025rdb.dtsi" 92/include/ "p1025rdb.dtsi"
diff --git a/arch/powerpc/boot/dts/t4240qds.dts b/arch/powerpc/boot/dts/t4240qds.dts
new file mode 100644
index 000000000000..0555976dd0f3
--- /dev/null
+++ b/arch/powerpc/boot/dts/t4240qds.dts
@@ -0,0 +1,224 @@
1/*
2 * T4240QDS Device Tree Source
3 *
4 * Copyright 2012 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/include/ "fsl/t4240si-pre.dtsi"
36
37/ {
38 model = "fsl,T4240QDS";
39 compatible = "fsl,T4240QDS";
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
43
44 ifc: localbus@ffe124000 {
45 reg = <0xf 0xfe124000 0 0x2000>;
46 ranges = <0 0 0xf 0xe8000000 0x08000000
47 2 0 0xf 0xff800000 0x00010000
48 3 0 0xf 0xffdf0000 0x00008000>;
49
50 nor@0,0 {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 compatible = "cfi-flash";
54 reg = <0x0 0x0 0x8000000>;
55
56 bank-width = <2>;
57 device-width = <1>;
58 };
59
60 nand@2,0 {
61 #address-cells = <1>;
62 #size-cells = <1>;
63 compatible = "fsl,ifc-nand";
64 reg = <0x2 0x0 0x10000>;
65
66 partition@0 {
67 /* This location must not be altered */
68 /* 1MB for u-boot Bootloader Image */
69 reg = <0x0 0x00100000>;
70 label = "NAND U-Boot Image";
71 read-only;
72 };
73
74 partition@100000 {
75 /* 1MB for DTB Image */
76 reg = <0x00100000 0x00100000>;
77 label = "NAND DTB Image";
78 };
79
80 partition@200000 {
81 /* 10MB for Linux Kernel Image */
82 reg = <0x00200000 0x00A00000>;
83 label = "NAND Linux Kernel Image";
84 };
85
86 partition@C00000 {
87 /* 500MB for Root file System Image */
88 reg = <0x00c00000 0x1F400000>;
89 label = "NAND RFS Image";
90 };
91 };
92
93 board-control@3,0 {
94 compatible = "fsl,t4240qds-fpga", "fsl,fpga-qixis";
95 reg = <3 0 0x300>;
96 };
97 };
98
99 memory {
100 device_type = "memory";
101 };
102
103 dcsr: dcsr@f00000000 {
104 ranges = <0x00000000 0xf 0x00000000 0x01072000>;
105 };
106
107 soc: soc@ffe000000 {
108 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
109 reg = <0xf 0xfe000000 0 0x00001000>;
110 spi@110000 {
111 flash@0 {
112 #address-cells = <1>;
113 #size-cells = <1>;
114 compatible = "sst,sst25wf040";
115 reg = <0>;
116 spi-max-frequency = <40000000>; /* input clock */
117 };
118 };
119
120 i2c@118000 {
121 eeprom@51 {
122 compatible = "at24,24c256";
123 reg = <0x51>;
124 };
125 eeprom@52 {
126 compatible = "at24,24c256";
127 reg = <0x52>;
128 };
129 eeprom@53 {
130 compatible = "at24,24c256";
131 reg = <0x53>;
132 };
133 eeprom@54 {
134 compatible = "at24,24c256";
135 reg = <0x54>;
136 };
137 eeprom@55 {
138 compatible = "at24,24c256";
139 reg = <0x55>;
140 };
141 eeprom@56 {
142 compatible = "at24,24c256";
143 reg = <0x56>;
144 };
145 rtc@68 {
146 compatible = "dallas,ds3232";
147 reg = <0x68>;
148 interrupts = <0x1 0x1 0 0>;
149 };
150 };
151 };
152
153 pci0: pcie@ffe240000 {
154 reg = <0xf 0xfe240000 0 0x10000>;
155 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
156 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
157 pcie@0 {
158 ranges = <0x02000000 0 0xe0000000
159 0x02000000 0 0xe0000000
160 0 0x20000000
161
162 0x01000000 0 0x00000000
163 0x01000000 0 0x00000000
164 0 0x00010000>;
165 };
166 };
167
168 pci1: pcie@ffe250000 {
169 reg = <0xf 0xfe250000 0 0x10000>;
170 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
171 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
172 pcie@0 {
173 ranges = <0x02000000 0 0xe0000000
174 0x02000000 0 0xe0000000
175 0 0x20000000
176
177 0x01000000 0 0x00000000
178 0x01000000 0 0x00000000
179 0 0x00010000>;
180 };
181 };
182
183 pci2: pcie@ffe260000 {
184 reg = <0xf 0xfe260000 0 0x1000>;
185 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
186 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
187 pcie@0 {
188 ranges = <0x02000000 0 0xe0000000
189 0x02000000 0 0xe0000000
190 0 0x20000000
191
192 0x01000000 0 0x00000000
193 0x01000000 0 0x00000000
194 0 0x00010000>;
195 };
196 };
197
198 pci3: pcie@ffe270000 {
199 reg = <0xf 0xfe270000 0 0x10000>;
200 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
201 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
202 pcie@0 {
203 ranges = <0x02000000 0 0xe0000000
204 0x02000000 0 0xe0000000
205 0 0x20000000
206
207 0x01000000 0 0x00000000
208 0x01000000 0 0x00000000
209 0 0x00010000>;
210 };
211 };
212 rio: rapidio@ffe0c0000 {
213 reg = <0xf 0xfe0c0000 0 0x11000>;
214
215 port1 {
216 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
217 };
218 port2 {
219 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
220 };
221 };
222};
223
224/include/ "fsl/t4240si-post.dtsi"
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-25 11:29:08 -0500