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authorJon Loeliger <jdl@jdl.com>2008-01-23 13:42:29 -0500
committerKumar Gala <galak@kernel.crashing.org>2008-01-23 20:54:33 -0500
commitb164b9032e5210dfc94b564344d61995785c9bd7 (patch)
tree878e25f42c08a2c9a81db84df0074a70709d29fa /arch/powerpc/boot
parent1d59483aecb5bc80bdd677a46e77515a733c1a6f (diff)
[POWERPC] Add StorCenter DTS first draft.
Based on the Kurobox DTS files. Signed-off-by: Jon Loeliger <jdl@freescale.com> Acked-by: Andy Wilcox <andy@protium.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/storcenter.dts138
1 files changed, 138 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/storcenter.dts b/arch/powerpc/boot/dts/storcenter.dts
new file mode 100644
index 000000000000..6aa1d695e644
--- /dev/null
+++ b/arch/powerpc/boot/dts/storcenter.dts
@@ -0,0 +1,138 @@
1/*
2 * Device Tree Source for IOMEGA StorCenter
3 *
4 * Copyright 2007 Oyvind Repvik
5 * Copyright 2007 Jon Loeliger
6 *
7 * Based on the Kurobox DTS by G. Liakhovetski <g.liakhovetski@gmx.de>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14/ {
15 model = "StorCenter";
16 compatible = "storcenter";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 serial0 = &serial0;
22 serial1 = &serial1;
23 pci0 = &pci0;
24 };
25
26 cpus {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 PowerPC,8241@0 {
31 device_type = "cpu";
32 reg = <0>;
33 clock-frequency = <d# 200000000>; /* Hz */
34 timebase-frequency = <d# 25000000>; /* Hz */
35 bus-frequency = <0>; /* from bootwrapper */
36 i-cache-line-size = <d# 32>; /* bytes */
37 d-cache-line-size = <d# 32>; /* bytes */
38 i-cache-size = <4000>;
39 d-cache-size = <4000>;
40 };
41 };
42
43 memory {
44 device_type = "memory";
45 reg = <00000000 04000000>; /* 64MB @ 0x0 */
46 };
47
48 soc@fc000000 {
49 #address-cells = <1>;
50 #size-cells = <1>;
51 device_type = "soc";
52 compatible = "fsl,mpc8241", "mpc10x";
53 store-gathering = <0>; /* 0 == off, !0 == on */
54 ranges = <0 fc000000 100000>;
55 reg = <fc000000 100000>; /* EUMB */
56 bus-frequency = <0>; /* fixed by loader */
57
58 i2c@3000 {
59 #address-cells = <1>;
60 #size-cells = <0>;
61 compatible = "fsl-i2c";
62 reg = <3000 100>;
63 interrupts = <5 2>;
64 interrupt-parent = <&mpic>;
65
66 rtc@68 {
67 compatible = "dallas,ds1337";
68 reg = <68>;
69 };
70 };
71
72 serial0: serial@4500 {
73 cell-index = <0>;
74 device_type = "serial";
75 compatible = "ns16550";
76 reg = <4500 20>;
77 clock-frequency = <d# 97553800>; /* Hz */
78 current-speed = <d# 115200>;
79 interrupts = <9 2>;
80 interrupt-parent = <&mpic>;
81 };
82
83 serial1: serial@4600 {
84 cell-index = <1>;
85 device_type = "serial";
86 compatible = "ns16550";
87 reg = <4600 20>;
88 clock-frequency = <d# 97553800>; /* Hz */
89 current-speed = <d# 9600>;
90 interrupts = <a 2>;
91 interrupt-parent = <&mpic>;
92 };
93
94 mpic: interrupt-controller@40000 {
95 #interrupt-cells = <2>;
96 device_type = "open-pic";
97 compatible = "chrp,open-pic";
98 interrupt-controller;
99 reg = <40000 40000>;
100 };
101
102 };
103
104 pci0: pci@fe800000 {
105 #address-cells = <3>;
106 #size-cells = <2>;
107 #interrupt-cells = <1>;
108 device_type = "pci";
109 compatible = "mpc10x-pci";
110 reg = <fe800000 1000>;
111 ranges = <01000000 0 0 fe000000 0 00c00000
112 02000000 0 80000000 80000000 0 70000000>;
113 bus-range = <0 ff>;
114 clock-frequency = <d# 97553800>; /* Hz */
115 interrupt-parent = <&mpic>;
116 interrupt-map-mask = <f800 0 0 7>;
117 interrupt-map = <
118 /* IDSEL 13 - IDE */
119 6800 0 0 1 &mpic 0 1
120 6800 0 0 2 &mpic 0 1
121 6800 0 0 3 &mpic 0 1
122 /* IDSEL 14 - USB */
123 7000 0 0 1 &mpic 0 1
124 7000 0 0 2 &mpic 0 1
125 7000 0 0 3 &mpic 0 1
126 7000 0 0 4 &mpic 0 1
127 /* IDSEL 15 - ETH */
128 7800 0 0 1 &mpic 0 1
129 7800 0 0 2 &mpic 0 1
130 7800 0 0 3 &mpic 0 1
131 7800 0 0 4 &mpic 0 1
132 >;
133 };
134
135 chosen {
136 linux,stdout-path = "/soc/serial@4500";
137 };
138};