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authorPaul Mackerras <paulus@samba.org>2006-08-31 01:45:48 -0400
committerPaul Mackerras <paulus@samba.org>2006-08-31 01:45:48 -0400
commitaa43f77939c97bf9d3580c6a5e71a5a40290e451 (patch)
tree095c0b8b3da4b6554a3f8ef4b39240a5d9216d4d /arch/powerpc/boot
parent2818c5dec5e28d65d52afbb7695bbbafe6377ee5 (diff)
parent4c15343167b5febe7bb0ba96aad5bef42ae94d3b (diff)
Merge branch 'merge'
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/dts/mpc7448hpc2.dts190
-rw-r--r--arch/powerpc/boot/dts/mpc8349emds.dts328
2 files changed, 518 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts
new file mode 100644
index 000000000000..d7b985e6bd2f
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts
@@ -0,0 +1,190 @@
1/*
2 * MPC7448HPC2 (Taiga) board Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 * 2006 Roy Zang <Roy Zang at freescale.com>.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13
14/ {
15 model = "mpc7448hpc2";
16 compatible = "mpc74xx";
17 #address-cells = <1>;
18 #size-cells = <1>;
19 linux,phandle = <100>;
20
21 cpus {
22 #cpus = <1>;
23 #address-cells = <1>;
24 #size-cells =<0>;
25 linux,phandle = <200>;
26
27 PowerPC,7448@0 {
28 device_type = "cpu";
29 reg = <0>;
30 d-cache-line-size = <20>; // 32 bytes
31 i-cache-line-size = <20>; // 32 bytes
32 d-cache-size = <8000>; // L1, 32K bytes
33 i-cache-size = <8000>; // L1, 32K bytes
34 timebase-frequency = <0>; // 33 MHz, from uboot
35 clock-frequency = <0>; // From U-Boot
36 bus-frequency = <0>; // From U-Boot
37 32-bit;
38 linux,phandle = <201>;
39 linux,boot-cpu;
40 };
41 };
42
43 memory {
44 device_type = "memory";
45 linux,phandle = <300>;
46 reg = <00000000 20000000 // DDR2 512M at 0
47 >;
48 };
49
50 tsi108@c0000000 {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 #interrupt-cells = <2>;
54 device_type = "tsi-bridge";
55 ranges = <00000000 c0000000 00010000>;
56 reg = <c0000000 00010000>;
57 bus-frequency = <0>;
58
59 i2c@7000 {
60 interrupt-parent = <7400>;
61 interrupts = <E 0>;
62 reg = <7000 400>;
63 device_type = "i2c";
64 compatible = "tsi-i2c";
65 };
66
67 mdio@6000 {
68 device_type = "mdio";
69 compatible = "tsi-ethernet";
70
71 ethernet-phy@6000 {
72 linux,phandle = <6000>;
73 interrupt-parent = <7400>;
74 interrupts = <2 1>;
75 reg = <6000 50>;
76 phy-id = <8>;
77 device_type = "ethernet-phy";
78 };
79
80 ethernet-phy@6400 {
81 linux,phandle = <6400>;
82 interrupt-parent = <7400>;
83 interrupts = <2 1>;
84 reg = <6000 50>;
85 phy-id = <9>;
86 device_type = "ethernet-phy";
87 };
88
89 };
90
91 ethernet@6200 {
92 #size-cells = <0>;
93 device_type = "network";
94 model = "TSI-ETH";
95 compatible = "tsi-ethernet";
96 reg = <6000 200>;
97 address = [ 00 06 D2 00 00 01 ];
98 interrupts = <10 2>;
99 interrupt-parent = <7400>;
100 phy-handle = <6000>;
101 };
102
103 ethernet@6600 {
104 #address-cells = <1>;
105 #size-cells = <0>;
106 device_type = "network";
107 model = "TSI-ETH";
108 compatible = "tsi-ethernet";
109 reg = <6400 200>;
110 address = [ 00 06 D2 00 00 02 ];
111 interrupts = <11 2>;
112 interrupt-parent = <7400>;
113 phy-handle = <6400>;
114 };
115
116 serial@7808 {
117 device_type = "serial";
118 compatible = "ns16550";
119 reg = <7808 200>;
120 clock-frequency = <3f6b5a00>;
121 interrupts = <c 0>;
122 interrupt-parent = <7400>;
123 };
124
125 serial@7c08 {
126 device_type = "serial";
127 compatible = "ns16550";
128 reg = <7c08 200>;
129 clock-frequency = <3f6b5a00>;
130 interrupts = <d 0>;
131 interrupt-parent = <7400>;
132 };
133
134 pic@7400 {
135 linux,phandle = <7400>;
136 clock-frequency = <0>;
137 interrupt-controller;
138 #address-cells = <0>;
139 #interrupt-cells = <2>;
140 reg = <7400 400>;
141 built-in;
142 compatible = "chrp,open-pic";
143 device_type = "open-pic";
144 big-endian;
145 };
146 pci@1000 {
147 compatible = "tsi10x";
148 device_type = "pci";
149 linux,phandle = <1000>;
150 #interrupt-cells = <1>;
151 #size-cells = <2>;
152 #address-cells = <3>;
153 reg = <1000 1000>;
154 bus-range = <0 0>;
155 ranges = <02000000 0 e0000000 e0000000 0 1A000000
156 01000000 0 00000000 fa000000 0 00010000>;
157 clock-frequency = <7f28154>;
158 interrupt-parent = <7400>;
159 interrupts = <17 2>;
160 interrupt-map-mask = <f800 0 0 7>;
161 interrupt-map = <
162
163 /* IDSEL 0x11 */
164 0800 0 0 1 7400 24 0
165 0800 0 0 2 7400 25 0
166 0800 0 0 3 7400 26 0
167 0800 0 0 4 7400 27 0
168
169 /* IDSEL 0x12 */
170 1000 0 0 1 7400 25 0
171 1000 0 0 2 7400 26 0
172 1000 0 0 3 7400 27 0
173 1000 0 0 4 7400 24 0
174
175 /* IDSEL 0x13 */
176 1800 0 0 1 7400 26 0
177 1800 0 0 2 7400 27 0
178 1800 0 0 3 7400 24 0
179 1800 0 0 4 7400 25 0
180
181 /* IDSEL 0x14 */
182 2000 0 0 1 7400 27 0
183 2000 0 0 2 7400 24 0
184 2000 0 0 3 7400 25 0
185 2000 0 0 4 7400 26 0
186 >;
187 };
188 };
189
190};
diff --git a/arch/powerpc/boot/dts/mpc8349emds.dts b/arch/powerpc/boot/dts/mpc8349emds.dts
new file mode 100644
index 000000000000..12f5dbf3055f
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8349emds.dts
@@ -0,0 +1,328 @@
1/*
2 * MPC8349E MDS Device Tree Source
3 *
4 * Copyright 2005, 2006 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/ {
13 model = "MPC8349EMDS";
14 compatible = "MPC834xMDS";
15 #address-cells = <1>;
16 #size-cells = <1>;
17
18 cpus {
19 #cpus = <1>;
20 #address-cells = <1>;
21 #size-cells = <0>;
22
23 PowerPC,8349@0 {
24 device_type = "cpu";
25 reg = <0>;
26 d-cache-line-size = <20>; // 32 bytes
27 i-cache-line-size = <20>; // 32 bytes
28 d-cache-size = <8000>; // L1, 32K
29 i-cache-size = <8000>; // L1, 32K
30 timebase-frequency = <0>; // from bootloader
31 bus-frequency = <0>; // from bootloader
32 clock-frequency = <0>; // from bootloader
33 32-bit;
34 };
35 };
36
37 memory {
38 device_type = "memory";
39 reg = <00000000 10000000>; // 256MB at 0
40 };
41
42 soc8349@e0000000 {
43 #address-cells = <1>;
44 #size-cells = <1>;
45 #interrupt-cells = <2>;
46 device_type = "soc";
47 ranges = <0 e0000000 00100000>;
48 reg = <e0000000 00000200>;
49 bus-frequency = <0>;
50
51 wdt@200 {
52 device_type = "watchdog";
53 compatible = "mpc83xx_wdt";
54 reg = <200 100>;
55 };
56
57 i2c@3000 {
58 device_type = "i2c";
59 compatible = "fsl-i2c";
60 reg = <3000 100>;
61 interrupts = <e 8>;
62 interrupt-parent = <700>;
63 dfsrr;
64 };
65
66 i2c@3100 {
67 device_type = "i2c";
68 compatible = "fsl-i2c";
69 reg = <3100 100>;
70 interrupts = <f 8>;
71 interrupt-parent = <700>;
72 dfsrr;
73 };
74
75 spi@7000 {
76 device_type = "spi";
77 compatible = "mpc83xx_spi";
78 reg = <7000 1000>;
79 interrupts = <10 8>;
80 interrupt-parent = <700>;
81 mode = <0>;
82 };
83
84 /* phy type (ULPI or SERIAL) are only types supportted for MPH */
85 /* port = 0 or 1 */
86 usb@22000 {
87 device_type = "usb";
88 compatible = "fsl-usb2-mph";
89 reg = <22000 1000>;
90 #address-cells = <1>;
91 #size-cells = <0>;
92 interrupt-parent = <700>;
93 interrupts = <27 2>;
94 phy_type = "ulpi";
95 port1;
96 };
97 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
98 usb@23000 {
99 device_type = "usb";
100 compatible = "fsl-usb2-dr";
101 reg = <23000 1000>;
102 #address-cells = <1>;
103 #size-cells = <0>;
104 interrupt-parent = <700>;
105 interrupts = <26 2>;
106 phy_type = "ulpi";
107 };
108
109 mdio@24520 {
110 device_type = "mdio";
111 compatible = "gianfar";
112 reg = <24520 20>;
113 #address-cells = <1>;
114 #size-cells = <0>;
115 linux,phandle = <24520>;
116 ethernet-phy@0 {
117 linux,phandle = <2452000>;
118 interrupt-parent = <700>;
119 interrupts = <11 2>;
120 reg = <0>;
121 device_type = "ethernet-phy";
122 };
123 ethernet-phy@1 {
124 linux,phandle = <2452001>;
125 interrupt-parent = <700>;
126 interrupts = <12 2>;
127 reg = <1>;
128 device_type = "ethernet-phy";
129 };
130 };
131
132 ethernet@24000 {
133 device_type = "network";
134 model = "TSEC";
135 compatible = "gianfar";
136 reg = <24000 1000>;
137 address = [ 00 00 00 00 00 00 ];
138 local-mac-address = [ 00 00 00 00 00 00 ];
139 interrupts = <20 8 21 8 22 8>;
140 interrupt-parent = <700>;
141 phy-handle = <2452000>;
142 };
143
144 ethernet@25000 {
145 #address-cells = <1>;
146 #size-cells = <0>;
147 device_type = "network";
148 model = "TSEC";
149 compatible = "gianfar";
150 reg = <25000 1000>;
151 address = [ 00 00 00 00 00 00 ];
152 local-mac-address = [ 00 00 00 00 00 00 ];
153 interrupts = <23 8 24 8 25 8>;
154 interrupt-parent = <700>;
155 phy-handle = <2452001>;
156 };
157
158 serial@4500 {
159 device_type = "serial";
160 compatible = "ns16550";
161 reg = <4500 100>;
162 clock-frequency = <0>;
163 interrupts = <9 8>;
164 interrupt-parent = <700>;
165 };
166
167 serial@4600 {
168 device_type = "serial";
169 compatible = "ns16550";
170 reg = <4600 100>;
171 clock-frequency = <0>;
172 interrupts = <a 8>;
173 interrupt-parent = <700>;
174 };
175
176 pci@8500 {
177 interrupt-map-mask = <f800 0 0 7>;
178 interrupt-map = <
179
180 /* IDSEL 0x11 */
181 8800 0 0 1 700 14 8
182 8800 0 0 2 700 15 8
183 8800 0 0 3 700 16 8
184 8800 0 0 4 700 17 8
185
186 /* IDSEL 0x12 */
187 9000 0 0 1 700 16 8
188 9000 0 0 2 700 17 8
189 9000 0 0 3 700 14 8
190 9000 0 0 4 700 15 8
191
192 /* IDSEL 0x13 */
193 9800 0 0 1 700 17 8
194 9800 0 0 2 700 14 8
195 9800 0 0 3 700 15 8
196 9800 0 0 4 700 16 8
197
198 /* IDSEL 0x15 */
199 a800 0 0 1 700 14 8
200 a800 0 0 2 700 15 8
201 a800 0 0 3 700 16 8
202 a800 0 0 4 700 17 8
203
204 /* IDSEL 0x16 */
205 b000 0 0 1 700 17 8
206 b000 0 0 2 700 14 8
207 b000 0 0 3 700 15 8
208 b000 0 0 4 700 16 8
209
210 /* IDSEL 0x17 */
211 b800 0 0 1 700 16 8
212 b800 0 0 2 700 17 8
213 b800 0 0 3 700 14 8
214 b800 0 0 4 700 15 8
215
216 /* IDSEL 0x18 */
217 b000 0 0 1 700 15 8
218 b000 0 0 2 700 16 8
219 b000 0 0 3 700 17 8
220 b000 0 0 4 700 14 8>;
221 interrupt-parent = <700>;
222 interrupts = <42 8>;
223 bus-range = <0 0>;
224 ranges = <02000000 0 a0000000 a0000000 0 10000000
225 42000000 0 80000000 80000000 0 10000000
226 01000000 0 00000000 e2000000 0 00100000>;
227 clock-frequency = <3f940aa>;
228 #interrupt-cells = <1>;
229 #size-cells = <2>;
230 #address-cells = <3>;
231 reg = <8500 100>;
232 compatible = "83xx";
233 device_type = "pci";
234 };
235
236 pci@8600 {
237 interrupt-map-mask = <f800 0 0 7>;
238 interrupt-map = <
239
240 /* IDSEL 0x11 */
241 8800 0 0 1 700 14 8
242 8800 0 0 2 700 15 8
243 8800 0 0 3 700 16 8
244 8800 0 0 4 700 17 8
245
246 /* IDSEL 0x12 */
247 9000 0 0 1 700 16 8
248 9000 0 0 2 700 17 8
249 9000 0 0 3 700 14 8
250 9000 0 0 4 700 15 8
251
252 /* IDSEL 0x13 */
253 9800 0 0 1 700 17 8
254 9800 0 0 2 700 14 8
255 9800 0 0 3 700 15 8
256 9800 0 0 4 700 16 8
257
258 /* IDSEL 0x15 */
259 a800 0 0 1 700 14 8
260 a800 0 0 2 700 15 8
261 a800 0 0 3 700 16 8
262 a800 0 0 4 700 17 8
263
264 /* IDSEL 0x16 */
265 b000 0 0 1 700 17 8
266 b000 0 0 2 700 14 8
267 b000 0 0 3 700 15 8
268 b000 0 0 4 700 16 8
269
270 /* IDSEL 0x17 */
271 b800 0 0 1 700 16 8
272 b800 0 0 2 700 17 8
273 b800 0 0 3 700 14 8
274 b800 0 0 4 700 15 8
275
276 /* IDSEL 0x18 */
277 b000 0 0 1 700 15 8
278 b000 0 0 2 700 16 8
279 b000 0 0 3 700 17 8
280 b000 0 0 4 700 14 8>;
281 interrupt-parent = <700>;
282 interrupts = <42 8>;
283 bus-range = <0 0>;
284 ranges = <02000000 0 b0000000 b0000000 0 10000000
285 42000000 0 90000000 90000000 0 10000000
286 01000000 0 00000000 e2100000 0 00100000>;
287 clock-frequency = <3f940aa>;
288 #interrupt-cells = <1>;
289 #size-cells = <2>;
290 #address-cells = <3>;
291 reg = <8600 100>;
292 compatible = "83xx";
293 device_type = "pci";
294 };
295
296 /* May need to remove if on a part without crypto engine */
297 crypto@30000 {
298 device_type = "crypto";
299 model = "SEC2";
300 compatible = "talitos";
301 reg = <30000 10000>;
302 interrupts = <b 8>;
303 interrupt-parent = <700>;
304 num-channels = <4>;
305 channel-fifo-len = <18>;
306 exec-units-mask = <0000007e>;
307 /* desc mask is for rev2.0,
308 * we need runtime fixup for >2.0 */
309 descriptor-types-mask = <01010ebf>;
310 };
311
312 /* IPIC
313 * interrupts cell = <intr #, sense>
314 * sense values match linux IORESOURCE_IRQ_* defines:
315 * sense == 8: Level, low assertion
316 * sense == 2: Edge, high-to-low change
317 */
318 pic@700 {
319 linux,phandle = <700>;
320 interrupt-controller;
321 #address-cells = <0>;
322 #interrupt-cells = <2>;
323 reg = <700 100>;
324 built-in;
325 device_type = "ipic";
326 };
327 };
328};
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-06 10:24:55 -0400