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authorLinus Torvalds <torvalds@linux-foundation.org>2008-01-30 21:37:27 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2008-01-30 21:37:27 -0500
commit8af03e782cae1e0a0f530ddd22301cdd12cf9dc0 (patch)
treec4af13a38bd3cc1a811a37f2358491f171052070 /arch/powerpc/boot
parent6232665040f9a23fafd9d94d4ae8d5a2dc850f65 (diff)
parent99e139126ab2e84be67969650f92eb37c12ab5cd (diff)
Merge branch 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (454 commits) [POWERPC] Cell IOMMU fixed mapping support [POWERPC] Split out the ioid fetching/checking logic [POWERPC] Add support to cell_iommu_setup_page_tables() for multiple windows [POWERPC] Split out the IOMMU logic from cell_dma_dev_setup() [POWERPC] Split cell_iommu_setup_hardware() into two parts [POWERPC] Split out the logic that allocates struct iommus [POWERPC] Allocate the hash table under 1G on cell [POWERPC] Add set_dma_ops() to match get_dma_ops() [POWERPC] 83xx: Clean up / convert mpc83xx board DTS files to v1 format. [POWERPC] 85xx: Only invalidate TLB0 and TLB1 [POWERPC] 83xx: Fix typo in mpc837x compatible entries [POWERPC] 85xx: convert sbc85* boards to use machine_device_initcall [POWERPC] 83xx: rework platform Kconfig [POWERPC] 85xx: rework platform Kconfig [POWERPC] 86xx: Remove unused IRQ defines [POWERPC] QE: Explicitly set address-cells and size cells for muram [POWERPC] Convert StorCenter DTS file to /dts-v1/ format. [POWERPC] 86xx: Convert all 86xx DTS files to /dts-v1/ format. [PPC] Remove 85xx from arch/ppc [PPC] Remove 83xx from arch/ppc ...
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r--arch/powerpc/boot/.gitignore2
-rw-r--r--arch/powerpc/boot/4xx.c476
-rw-r--r--arch/powerpc/boot/4xx.h14
-rw-r--r--arch/powerpc/boot/Makefile118
-rw-r--r--arch/powerpc/boot/bamboo.c6
-rw-r--r--arch/powerpc/boot/cuboot-52xx.c2
-rw-r--r--arch/powerpc/boot/cuboot-824x.c53
-rw-r--r--arch/powerpc/boot/cuboot-83xx.c5
-rw-r--r--arch/powerpc/boot/cuboot-85xx-cpm2.c66
-rw-r--r--arch/powerpc/boot/cuboot-85xx.c7
-rw-r--r--arch/powerpc/boot/cuboot-8xx.c2
-rw-r--r--arch/powerpc/boot/cuboot-hpc2.c2
-rw-r--r--arch/powerpc/boot/cuboot-katmai.c56
-rw-r--r--arch/powerpc/boot/cuboot-pq2.c2
-rw-r--r--arch/powerpc/boot/cuboot-rainier.c56
-rw-r--r--arch/powerpc/boot/cuboot-sequoia.c4
-rw-r--r--arch/powerpc/boot/cuboot-taishan.c54
-rw-r--r--arch/powerpc/boot/cuboot-warp.c39
-rw-r--r--arch/powerpc/boot/dcr.h59
-rw-r--r--arch/powerpc/boot/devtree.c14
-rw-r--r--arch/powerpc/boot/dtc-src/.gitignore3
-rw-r--r--arch/powerpc/boot/dtc-src/Makefile.dtc25
-rw-r--r--arch/powerpc/boot/dtc-src/checks.c750
-rw-r--r--arch/powerpc/boot/dtc-src/data.c321
-rw-r--r--arch/powerpc/boot/dtc-src/dtc-lexer.l328
-rw-r--r--arch/powerpc/boot/dtc-src/dtc-lexer.lex.c_shipped2174
-rw-r--r--arch/powerpc/boot/dtc-src/dtc-parser.tab.c_shipped1983
-rw-r--r--arch/powerpc/boot/dtc-src/dtc-parser.tab.h_shipped111
-rw-r--r--arch/powerpc/boot/dtc-src/dtc-parser.y336
-rw-r--r--arch/powerpc/boot/dtc-src/dtc.c231
-rw-r--r--arch/powerpc/boot/dtc-src/dtc.h269
-rw-r--r--arch/powerpc/boot/dtc-src/flattree.c968
-rw-r--r--arch/powerpc/boot/dtc-src/fstree.c94
-rw-r--r--arch/powerpc/boot/dtc-src/livetree.c305
-rw-r--r--arch/powerpc/boot/dtc-src/srcpos.c105
-rw-r--r--arch/powerpc/boot/dtc-src/srcpos.h75
-rw-r--r--arch/powerpc/boot/dtc-src/treesource.c275
-rw-r--r--arch/powerpc/boot/dtc-src/version_gen.h1
-rw-r--r--arch/powerpc/boot/dts/adder875-redboot.dts184
-rw-r--r--arch/powerpc/boot/dts/adder875-uboot.dts183
-rw-r--r--arch/powerpc/boot/dts/bamboo.dts62
-rw-r--r--arch/powerpc/boot/dts/cm5200.dts234
-rw-r--r--arch/powerpc/boot/dts/ebony.dts58
-rw-r--r--arch/powerpc/boot/dts/ep405.dts228
-rw-r--r--arch/powerpc/boot/dts/ep8248e.dts207
-rw-r--r--arch/powerpc/boot/dts/haleakala.dts274
-rw-r--r--arch/powerpc/boot/dts/katmai.dts400
-rw-r--r--arch/powerpc/boot/dts/kilauea.dts99
-rw-r--r--arch/powerpc/boot/dts/kuroboxHD.dts16
-rw-r--r--arch/powerpc/boot/dts/kuroboxHG.dts16
-rw-r--r--arch/powerpc/boot/dts/lite5200.dts104
-rw-r--r--arch/powerpc/boot/dts/lite5200b.dts101
-rw-r--r--arch/powerpc/boot/dts/makalu.dts347
-rw-r--r--arch/powerpc/boot/dts/motionpro.dts301
-rw-r--r--arch/powerpc/boot/dts/mpc8313erdb.dts217
-rw-r--r--arch/powerpc/boot/dts/mpc8315erdb.dts287
-rw-r--r--arch/powerpc/boot/dts/mpc832x_mds.dts352
-rw-r--r--arch/powerpc/boot/dts/mpc832x_rdb.dts224
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts231
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitxgp.dts144
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts311
-rw-r--r--arch/powerpc/boot/dts/mpc836x_mds.dts335
-rw-r--r--arch/powerpc/boot/dts/mpc8377_mds.dts280
-rw-r--r--arch/powerpc/boot/dts/mpc8377_rdb.dts296
-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts266
-rw-r--r--arch/powerpc/boot/dts/mpc8378_rdb.dts282
-rw-r--r--arch/powerpc/boot/dts/mpc8379_mds.dts294
-rw-r--r--arch/powerpc/boot/dts/mpc8379_rdb.dts310
-rw-r--r--arch/powerpc/boot/dts/mpc8540ads.dts59
-rw-r--r--arch/powerpc/boot/dts/mpc8541cds.dts41
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dts65
-rw-r--r--arch/powerpc/boot/dts/mpc8548cds.dts68
-rw-r--r--arch/powerpc/boot/dts/mpc8555cds.dts41
-rw-r--r--arch/powerpc/boot/dts/mpc8560ads.dts59
-rw-r--r--arch/powerpc/boot/dts/mpc8568mds.dts104
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds.dts66
-rw-r--r--arch/powerpc/boot/dts/mpc8610_hpcd.dts256
-rw-r--r--arch/powerpc/boot/dts/mpc8641_hpcn.dts433
-rw-r--r--arch/powerpc/boot/dts/mpc866ads.dts156
-rw-r--r--arch/powerpc/boot/dts/rainier.dts353
-rw-r--r--arch/powerpc/boot/dts/sbc8349.dts244
-rw-r--r--arch/powerpc/boot/dts/sbc8548.dts244
-rw-r--r--arch/powerpc/boot/dts/sbc8560.dts330
-rw-r--r--arch/powerpc/boot/dts/sequoia.dts49
-rw-r--r--arch/powerpc/boot/dts/storcenter.dts141
-rw-r--r--arch/powerpc/boot/dts/stx_gp3_8560.dts228
-rw-r--r--arch/powerpc/boot/dts/taishan.dts383
-rw-r--r--arch/powerpc/boot/dts/tqm5200.dts177
-rw-r--r--arch/powerpc/boot/dts/tqm8540.dts204
-rw-r--r--arch/powerpc/boot/dts/tqm8541.dts228
-rw-r--r--arch/powerpc/boot/dts/tqm8555.dts228
-rw-r--r--arch/powerpc/boot/dts/tqm8560.dts245
-rw-r--r--arch/powerpc/boot/dts/walnut.dts55
-rw-r--r--arch/powerpc/boot/dts/warp.dts239
-rw-r--r--arch/powerpc/boot/ebony.c64
-rw-r--r--arch/powerpc/boot/ep405.c74
-rw-r--r--arch/powerpc/boot/ep8248e.c55
-rw-r--r--arch/powerpc/boot/ep88xc.c2
-rw-r--r--arch/powerpc/boot/flatdevtree.c1036
-rw-r--r--arch/powerpc/boot/flatdevtree.h113
-rw-r--r--arch/powerpc/boot/flatdevtree_misc.c79
-rw-r--r--arch/powerpc/boot/holly.c2
-rw-r--r--arch/powerpc/boot/libfdt-wrapper.c193
-rw-r--r--arch/powerpc/boot/libfdt/Makefile.libfdt14
-rw-r--r--arch/powerpc/boot/libfdt/fdt.c156
-rw-r--r--arch/powerpc/boot/libfdt/fdt.h60
-rw-r--r--arch/powerpc/boot/libfdt/fdt_ro.c583
-rw-r--r--arch/powerpc/boot/libfdt/fdt_rw.c447
-rw-r--r--arch/powerpc/boot/libfdt/fdt_strerror.c96
-rw-r--r--arch/powerpc/boot/libfdt/fdt_sw.c258
-rw-r--r--arch/powerpc/boot/libfdt/fdt_wip.c144
-rw-r--r--arch/powerpc/boot/libfdt/libfdt.h721
-rw-r--r--arch/powerpc/boot/libfdt/libfdt_internal.h89
-rw-r--r--arch/powerpc/boot/libfdt_env.h17
-rw-r--r--arch/powerpc/boot/main.c1
-rw-r--r--arch/powerpc/boot/ops.h27
-rw-r--r--arch/powerpc/boot/prpmc2800.c3
-rw-r--r--arch/powerpc/boot/ps3.c2
-rw-r--r--arch/powerpc/boot/redboot-8xx.c58
-rw-r--r--arch/powerpc/boot/redboot.h56
-rw-r--r--arch/powerpc/boot/reg.h8
-rw-r--r--arch/powerpc/boot/serial.c5
-rw-r--r--arch/powerpc/boot/treeboot-walnut.c53
-rwxr-xr-xarch/powerpc/boot/wrapper21
124 files changed, 22190 insertions, 2977 deletions
diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore
index 65f4118cbe78..5ef2bdf8d189 100644
--- a/arch/powerpc/boot/.gitignore
+++ b/arch/powerpc/boot/.gitignore
@@ -1,4 +1,5 @@
1addnote 1addnote
2dtc
2empty.c 3empty.c
3hack-coff 4hack-coff
4infblock.c 5infblock.c
@@ -30,6 +31,7 @@ zImage.*lds
30zImage.miboot 31zImage.miboot
31zImage.pmac 32zImage.pmac
32zImage.pseries 33zImage.pseries
34zImage.redboot*
33zImage.sandpoint 35zImage.sandpoint
34zImage.vmode 36zImage.vmode
35zconf.h 37zconf.h
diff --git a/arch/powerpc/boot/4xx.c b/arch/powerpc/boot/4xx.c
index ebf9e217612d..758edf1c5815 100644
--- a/arch/powerpc/boot/4xx.c
+++ b/arch/powerpc/boot/4xx.c
@@ -22,16 +22,14 @@
22#include "dcr.h" 22#include "dcr.h"
23 23
24/* Read the 4xx SDRAM controller to get size of system memory. */ 24/* Read the 4xx SDRAM controller to get size of system memory. */
25void ibm4xx_fixup_memsize(void) 25void ibm4xx_sdram_fixup_memsize(void)
26{ 26{
27 int i; 27 int i;
28 unsigned long memsize, bank_config; 28 unsigned long memsize, bank_config;
29 29
30 memsize = 0; 30 memsize = 0;
31 for (i = 0; i < ARRAY_SIZE(sdram_bxcr); i++) { 31 for (i = 0; i < ARRAY_SIZE(sdram_bxcr); i++) {
32 mtdcr(DCRN_SDRAM0_CFGADDR, sdram_bxcr[i]); 32 bank_config = SDRAM0_READ(sdram_bxcr[i]);
33 bank_config = mfdcr(DCRN_SDRAM0_CFGDATA);
34
35 if (bank_config & SDRAM_CONFIG_BANK_ENABLE) 33 if (bank_config & SDRAM_CONFIG_BANK_ENABLE)
36 memsize += SDRAM_CONFIG_BANK_SIZE(bank_config); 34 memsize += SDRAM_CONFIG_BANK_SIZE(bank_config);
37 } 35 }
@@ -39,6 +37,69 @@ void ibm4xx_fixup_memsize(void)
39 dt_fixup_memory(0, memsize); 37 dt_fixup_memory(0, memsize);
40} 38}
41 39
40/* Read the 440SPe MQ controller to get size of system memory. */
41#define DCRN_MQ0_B0BAS 0x40
42#define DCRN_MQ0_B1BAS 0x41
43#define DCRN_MQ0_B2BAS 0x42
44#define DCRN_MQ0_B3BAS 0x43
45
46static u64 ibm440spe_decode_bas(u32 bas)
47{
48 u64 base = ((u64)(bas & 0xFFE00000u)) << 2;
49
50 /* open coded because I'm paranoid about invalid values */
51 switch ((bas >> 4) & 0xFFF) {
52 case 0:
53 return 0;
54 case 0xffc:
55 return base + 0x000800000ull;
56 case 0xff8:
57 return base + 0x001000000ull;
58 case 0xff0:
59 return base + 0x002000000ull;
60 case 0xfe0:
61 return base + 0x004000000ull;
62 case 0xfc0:
63 return base + 0x008000000ull;
64 case 0xf80:
65 return base + 0x010000000ull;
66 case 0xf00:
67 return base + 0x020000000ull;
68 case 0xe00:
69 return base + 0x040000000ull;
70 case 0xc00:
71 return base + 0x080000000ull;
72 case 0x800:
73 return base + 0x100000000ull;
74 }
75 printf("Memory BAS value 0x%08x unsupported !\n", bas);
76 return 0;
77}
78
79void ibm440spe_fixup_memsize(void)
80{
81 u64 banktop, memsize = 0;
82
83 /* Ultimately, we should directly construct the memory node
84 * so we are able to handle holes in the memory address space
85 */
86 banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B0BAS));
87 if (banktop > memsize)
88 memsize = banktop;
89 banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B1BAS));
90 if (banktop > memsize)
91 memsize = banktop;
92 banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B2BAS));
93 if (banktop > memsize)
94 memsize = banktop;
95 banktop = ibm440spe_decode_bas(mfdcr(DCRN_MQ0_B3BAS));
96 if (banktop > memsize)
97 memsize = banktop;
98
99 dt_fixup_memory(0, memsize);
100}
101
102
42/* 4xx DDR1/2 Denali memory controller support */ 103/* 4xx DDR1/2 Denali memory controller support */
43/* DDR0 registers */ 104/* DDR0 registers */
44#define DDR0_02 2 105#define DDR0_02 2
@@ -77,19 +138,13 @@ void ibm4xx_fixup_memsize(void)
77 138
78#define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask)) 139#define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask))
79 140
80static inline u32 mfdcr_sdram0(u32 reg)
81{
82 mtdcr(DCRN_SDRAM0_CFGADDR, reg);
83 return mfdcr(DCRN_SDRAM0_CFGDATA);
84}
85
86void ibm4xx_denali_fixup_memsize(void) 141void ibm4xx_denali_fixup_memsize(void)
87{ 142{
88 u32 val, max_cs, max_col, max_row; 143 u32 val, max_cs, max_col, max_row;
89 u32 cs, col, row, bank, dpath; 144 u32 cs, col, row, bank, dpath;
90 unsigned long memsize; 145 unsigned long memsize;
91 146
92 val = mfdcr_sdram0(DDR0_02); 147 val = SDRAM0_READ(DDR0_02);
93 if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT)) 148 if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT))
94 fatal("DDR controller is not initialized\n"); 149 fatal("DDR controller is not initialized\n");
95 150
@@ -99,12 +154,12 @@ void ibm4xx_denali_fixup_memsize(void)
99 max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT); 154 max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT);
100 155
101 /* get CS value */ 156 /* get CS value */
102 val = mfdcr_sdram0(DDR0_10); 157 val = SDRAM0_READ(DDR0_10);
103 158
104 val = DDR_GET_VAL(val, DDR_CS_MAP, DDR_CS_MAP_SHIFT); 159 val = DDR_GET_VAL(val, DDR_CS_MAP, DDR_CS_MAP_SHIFT);
105 cs = 0; 160 cs = 0;
106 while (val) { 161 while (val) {
107 if (val && 0x1) 162 if (val & 0x1)
108 cs++; 163 cs++;
109 val = val >> 1; 164 val = val >> 1;
110 } 165 }
@@ -115,15 +170,15 @@ void ibm4xx_denali_fixup_memsize(void)
115 fatal("DDR wrong CS configuration\n"); 170 fatal("DDR wrong CS configuration\n");
116 171
117 /* get data path bytes */ 172 /* get data path bytes */
118 val = mfdcr_sdram0(DDR0_14); 173 val = SDRAM0_READ(DDR0_14);
119 174
120 if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT)) 175 if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT))
121 dpath = 8; /* 64 bits */ 176 dpath = 8; /* 64 bits */
122 else 177 else
123 dpath = 4; /* 32 bits */ 178 dpath = 4; /* 32 bits */
124 179
125 /* get adress pins (rows) */ 180 /* get address pins (rows) */
126 val = mfdcr_sdram0(DDR0_42); 181 val = SDRAM0_READ(DDR0_42);
127 182
128 row = DDR_GET_VAL(val, DDR_APIN, DDR_APIN_SHIFT); 183 row = DDR_GET_VAL(val, DDR_APIN, DDR_APIN_SHIFT);
129 if (row > max_row) 184 if (row > max_row)
@@ -131,7 +186,7 @@ void ibm4xx_denali_fixup_memsize(void)
131 row = max_row - row; 186 row = max_row - row;
132 187
133 /* get collomn size and banks */ 188 /* get collomn size and banks */
134 val = mfdcr_sdram0(DDR0_43); 189 val = SDRAM0_READ(DDR0_43);
135 190
136 col = DDR_GET_VAL(val, DDR_COL_SZ, DDR_COL_SZ_SHIFT); 191 col = DDR_GET_VAL(val, DDR_COL_SZ, DDR_COL_SZ_SHIFT);
137 if (col > max_col) 192 if (col > max_col)
@@ -179,13 +234,17 @@ void ibm40x_dbcr_reset(void)
179#define EMAC_RESET 0x20000000 234#define EMAC_RESET 0x20000000
180void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1) 235void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1)
181{ 236{
182 /* Quiesce the MAL and EMAC(s) since PIBS/OpenBIOS don't do this for us */ 237 /* Quiesce the MAL and EMAC(s) since PIBS/OpenBIOS don't
238 * do this for us
239 */
183 if (emac0) 240 if (emac0)
184 *emac0 = EMAC_RESET; 241 *emac0 = EMAC_RESET;
185 if (emac1) 242 if (emac1)
186 *emac1 = EMAC_RESET; 243 *emac1 = EMAC_RESET;
187 244
188 mtdcr(DCRN_MAL0_CFG, MAL_RESET); 245 mtdcr(DCRN_MAL0_CFG, MAL_RESET);
246 while (mfdcr(DCRN_MAL0_CFG) & MAL_RESET)
247 ; /* loop until reset takes effect */
189} 248}
190 249
191/* Read 4xx EBC bus bridge registers to get mappings of the peripheral 250/* Read 4xx EBC bus bridge registers to get mappings of the peripheral
@@ -217,84 +276,335 @@ void ibm4xx_fixup_ebc_ranges(const char *ebc)
217 setprop(devp, "ranges", ranges, (p - ranges) * sizeof(u32)); 276 setprop(devp, "ranges", ranges, (p - ranges) * sizeof(u32));
218} 277}
219 278
220#define SPRN_CCR1 0x378 279/* Calculate 440GP clocks */
221void ibm440ep_fixup_clocks(unsigned int sysclk, unsigned int ser_clk) 280void ibm440gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk)
222{ 281{
223 u32 cpu, plb, opb, ebc, tb, uart0, m, vco; 282 u32 sys0 = mfdcr(DCRN_CPC0_SYS0);
224 u32 reg; 283 u32 cr0 = mfdcr(DCRN_CPC0_CR0);
225 u32 fwdva, fwdvb, fbdv, lfbdv, opbdv0, perdv0, spcid0, prbdv0, tmp; 284 u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
226 285 u32 opdv = CPC0_SYS0_OPDV(sys0);
227 mtdcr(DCRN_CPR0_ADDR, CPR0_PLLD0); 286 u32 epdv = CPC0_SYS0_EPDV(sys0);
228 reg = mfdcr(DCRN_CPR0_DATA); 287
229 tmp = (reg & 0x000F0000) >> 16; 288 if (sys0 & CPC0_SYS0_BYPASS) {
230 fwdva = tmp ? tmp : 16; 289 /* Bypass system PLL */
231 tmp = (reg & 0x00000700) >> 8; 290 cpu = plb = sys_clk;
232 fwdvb = tmp ? tmp : 8; 291 } else {
233 tmp = (reg & 0x1F000000) >> 24; 292 if (sys0 & CPC0_SYS0_EXTSL)
234 fbdv = tmp ? tmp : 32; 293 /* PerClk */
235 lfbdv = (reg & 0x0000007F); 294 m = CPC0_SYS0_FWDVB(sys0) * opdv * epdv;
236
237 mtdcr(DCRN_CPR0_ADDR, CPR0_OPBD0);
238 reg = mfdcr(DCRN_CPR0_DATA);
239 tmp = (reg & 0x03000000) >> 24;
240 opbdv0 = tmp ? tmp : 4;
241
242 mtdcr(DCRN_CPR0_ADDR, CPR0_PERD0);
243 reg = mfdcr(DCRN_CPR0_DATA);
244 tmp = (reg & 0x07000000) >> 24;
245 perdv0 = tmp ? tmp : 8;
246
247 mtdcr(DCRN_CPR0_ADDR, CPR0_PRIMBD0);
248 reg = mfdcr(DCRN_CPR0_DATA);
249 tmp = (reg & 0x07000000) >> 24;
250 prbdv0 = tmp ? tmp : 8;
251
252 mtdcr(DCRN_CPR0_ADDR, CPR0_SCPID);
253 reg = mfdcr(DCRN_CPR0_DATA);
254 tmp = (reg & 0x03000000) >> 24;
255 spcid0 = tmp ? tmp : 4;
256
257 /* Calculate M */
258 mtdcr(DCRN_CPR0_ADDR, CPR0_PLLC0);
259 reg = mfdcr(DCRN_CPR0_DATA);
260 tmp = (reg & 0x03000000) >> 24;
261 if (tmp == 0) { /* PLL output */
262 tmp = (reg & 0x20000000) >> 29;
263 if (!tmp) /* PLLOUTA */
264 m = fbdv * lfbdv * fwdva;
265 else 295 else
266 m = fbdv * lfbdv * fwdvb; 296 /* CPU clock */
297 m = CPC0_SYS0_FBDV(sys0) * CPC0_SYS0_FWDVA(sys0);
298 cpu = sys_clk * m / CPC0_SYS0_FWDVA(sys0);
299 plb = sys_clk * m / CPC0_SYS0_FWDVB(sys0);
267 } 300 }
268 else if (tmp == 1) /* CPU output */ 301
269 m = fbdv * fwdva; 302 opb = plb / opdv;
303 ebc = opb / epdv;
304
305 /* FIXME: Check if this is for all 440GP, or just Ebony */
306 if ((mfpvr() & 0xf0000fff) == 0x40000440)
307 /* Rev. B 440GP, use external system clock */
308 tb = sys_clk;
270 else 309 else
271 m = perdv0 * opbdv0 * fwdvb; 310 /* Rev. C 440GP, errata force us to use internal clock */
311 tb = cpu;
272 312
273 vco = (m * sysclk) + (m >> 1); 313 if (cr0 & CPC0_CR0_U0EC)
274 cpu = vco / fwdva; 314 /* External UART clock */
275 plb = vco / fwdvb / prbdv0; 315 uart0 = ser_clk;
276 opb = plb / opbdv0; 316 else
277 ebc = plb / perdv0; 317 /* Internal UART clock */
318 uart0 = plb / CPC0_CR0_UDIV(cr0);
319
320 if (cr0 & CPC0_CR0_U1EC)
321 /* External UART clock */
322 uart1 = ser_clk;
323 else
324 /* Internal UART clock */
325 uart1 = plb / CPC0_CR0_UDIV(cr0);
278 326
279 /* FIXME */ 327 printf("PPC440GP: SysClk = %dMHz (%x)\n\r",
280 uart0 = ser_clk; 328 (sys_clk + 500000) / 1000000, sys_clk);
329
330 dt_fixup_cpu_clocks(cpu, tb, 0);
331
332 dt_fixup_clock("/plb", plb);
333 dt_fixup_clock("/plb/opb", opb);
334 dt_fixup_clock("/plb/opb/ebc", ebc);
335 dt_fixup_clock("/plb/opb/serial@40000200", uart0);
336 dt_fixup_clock("/plb/opb/serial@40000300", uart1);
337}
338
339#define SPRN_CCR1 0x378
340
341static inline u32 __fix_zero(u32 v, u32 def)
342{
343 return v ? v : def;
344}
345
346static unsigned int __ibm440eplike_fixup_clocks(unsigned int sys_clk,
347 unsigned int tmr_clk,
348 int per_clk_from_opb)
349{
350 /* PLL config */
351 u32 pllc = CPR0_READ(DCRN_CPR0_PLLC);
352 u32 plld = CPR0_READ(DCRN_CPR0_PLLD);
353
354 /* Dividers */
355 u32 fbdv = __fix_zero((plld >> 24) & 0x1f, 32);
356 u32 fwdva = __fix_zero((plld >> 16) & 0xf, 16);
357 u32 fwdvb = __fix_zero((plld >> 8) & 7, 8);
358 u32 lfbdv = __fix_zero(plld & 0x3f, 64);
359 u32 pradv0 = __fix_zero((CPR0_READ(DCRN_CPR0_PRIMAD) >> 24) & 7, 8);
360 u32 prbdv0 = __fix_zero((CPR0_READ(DCRN_CPR0_PRIMBD) >> 24) & 7, 8);
361 u32 opbdv0 = __fix_zero((CPR0_READ(DCRN_CPR0_OPBD) >> 24) & 3, 4);
362 u32 perdv0 = __fix_zero((CPR0_READ(DCRN_CPR0_PERD) >> 24) & 3, 4);
363
364 /* Input clocks for primary dividers */
365 u32 clk_a, clk_b;
366
367 /* Resulting clocks */
368 u32 cpu, plb, opb, ebc, vco;
369
370 /* Timebase */
371 u32 ccr1, tb = tmr_clk;
372
373 if (pllc & 0x40000000) {
374 u32 m;
375
376 /* Feedback path */
377 switch ((pllc >> 24) & 7) {
378 case 0:
379 /* PLLOUTx */
380 m = ((pllc & 0x20000000) ? fwdvb : fwdva) * lfbdv;
381 break;
382 case 1:
383 /* CPU */
384 m = fwdva * pradv0;
385 break;
386 case 5:
387 /* PERClk */
388 m = fwdvb * prbdv0 * opbdv0 * perdv0;
389 break;
390 default:
391 printf("WARNING ! Invalid PLL feedback source !\n");
392 goto bypass;
393 }
394 m *= fbdv;
395 vco = sys_clk * m;
396 clk_a = vco / fwdva;
397 clk_b = vco / fwdvb;
398 } else {
399bypass:
400 /* Bypass system PLL */
401 vco = 0;
402 clk_a = clk_b = sys_clk;
403 }
404
405 cpu = clk_a / pradv0;
406 plb = clk_b / prbdv0;
407 opb = plb / opbdv0;
408 ebc = (per_clk_from_opb ? opb : plb) / perdv0;
281 409
282 /* Figure out timebase. Either CPU or default TmrClk */ 410 /* Figure out timebase. Either CPU or default TmrClk */
283 asm volatile ( 411 ccr1 = mfspr(SPRN_CCR1);
284 "mfspr %0,%1\n" 412
285 : 413 /* If passed a 0 tmr_clk, force CPU clock */
286 "=&r"(reg) : "i"(SPRN_CCR1)); 414 if (tb == 0) {
287 if (reg & 0x0080) 415 ccr1 &= ~0x80u;
288 tb = 25000000; /* TmrClk is 25MHz */ 416 mtspr(SPRN_CCR1, ccr1);
289 else 417 }
418 if ((ccr1 & 0x0080) == 0)
290 tb = cpu; 419 tb = cpu;
291 420
292 dt_fixup_cpu_clocks(cpu, tb, 0); 421 dt_fixup_cpu_clocks(cpu, tb, 0);
293 dt_fixup_clock("/plb", plb); 422 dt_fixup_clock("/plb", plb);
294 dt_fixup_clock("/plb/opb", opb); 423 dt_fixup_clock("/plb/opb", opb);
295 dt_fixup_clock("/plb/opb/ebc", ebc); 424 dt_fixup_clock("/plb/opb/ebc", ebc);
425
426 return plb;
427}
428
429static void eplike_fixup_uart_clk(int index, const char *path,
430 unsigned int ser_clk,
431 unsigned int plb_clk)
432{
433 unsigned int sdr;
434 unsigned int clock;
435
436 switch (index) {
437 case 0:
438 sdr = SDR0_READ(DCRN_SDR0_UART0);
439 break;
440 case 1:
441 sdr = SDR0_READ(DCRN_SDR0_UART1);
442 break;
443 case 2:
444 sdr = SDR0_READ(DCRN_SDR0_UART2);
445 break;
446 case 3:
447 sdr = SDR0_READ(DCRN_SDR0_UART3);
448 break;
449 default:
450 return;
451 }
452
453 if (sdr & 0x00800000u)
454 clock = ser_clk;
455 else
456 clock = plb_clk / __fix_zero(sdr & 0xff, 256);
457
458 dt_fixup_clock(path, clock);
459}
460
461void ibm440ep_fixup_clocks(unsigned int sys_clk,
462 unsigned int ser_clk,
463 unsigned int tmr_clk)
464{
465 unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 0);
466
467 /* serial clocks beed fixup based on int/ext */
468 eplike_fixup_uart_clk(0, "/plb/opb/serial@ef600300", ser_clk, plb_clk);
469 eplike_fixup_uart_clk(1, "/plb/opb/serial@ef600400", ser_clk, plb_clk);
470 eplike_fixup_uart_clk(2, "/plb/opb/serial@ef600500", ser_clk, plb_clk);
471 eplike_fixup_uart_clk(3, "/plb/opb/serial@ef600600", ser_clk, plb_clk);
472}
473
474void ibm440gx_fixup_clocks(unsigned int sys_clk,
475 unsigned int ser_clk,
476 unsigned int tmr_clk)
477{
478 unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 1);
479
480 /* serial clocks beed fixup based on int/ext */
481 eplike_fixup_uart_clk(0, "/plb/opb/serial@40000200", ser_clk, plb_clk);
482 eplike_fixup_uart_clk(1, "/plb/opb/serial@40000300", ser_clk, plb_clk);
483}
484
485void ibm440spe_fixup_clocks(unsigned int sys_clk,
486 unsigned int ser_clk,
487 unsigned int tmr_clk)
488{
489 unsigned int plb_clk = __ibm440eplike_fixup_clocks(sys_clk, tmr_clk, 1);
490
491 /* serial clocks beed fixup based on int/ext */
492 eplike_fixup_uart_clk(0, "/plb/opb/serial@10000200", ser_clk, plb_clk);
493 eplike_fixup_uart_clk(1, "/plb/opb/serial@10000300", ser_clk, plb_clk);
494 eplike_fixup_uart_clk(2, "/plb/opb/serial@10000600", ser_clk, plb_clk);
495}
496
497void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk)
498{
499 u32 pllmr = mfdcr(DCRN_CPC0_PLLMR);
500 u32 cpc0_cr0 = mfdcr(DCRN_405_CPC0_CR0);
501 u32 cpc0_cr1 = mfdcr(DCRN_405_CPC0_CR1);
502 u32 psr = mfdcr(DCRN_405_CPC0_PSR);
503 u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
504 u32 fwdv, fwdvb, fbdv, cbdv, opdv, epdv, ppdv, udiv;
505
506 fwdv = (8 - ((pllmr & 0xe0000000) >> 29));
507 fbdv = (pllmr & 0x1e000000) >> 25;
508 if (fbdv == 0)
509 fbdv = 16;
510 cbdv = ((pllmr & 0x00060000) >> 17) + 1; /* CPU:PLB */
511 opdv = ((pllmr & 0x00018000) >> 15) + 1; /* PLB:OPB */
512 ppdv = ((pllmr & 0x00001800) >> 13) + 1; /* PLB:PCI */
513 epdv = ((pllmr & 0x00001800) >> 11) + 2; /* PLB:EBC */
514 udiv = ((cpc0_cr0 & 0x3e) >> 1) + 1;
515
516 /* check for 405GPr */
517 if ((mfpvr() & 0xfffffff0) == (0x50910951 & 0xfffffff0)) {
518 fwdvb = 8 - (pllmr & 0x00000007);
519 if (!(psr & 0x00001000)) /* PCI async mode enable == 0 */
520 if (psr & 0x00000020) /* New mode enable */
521 m = fwdvb * 2 * ppdv;
522 else
523 m = fwdvb * cbdv * ppdv;
524 else if (psr & 0x00000020) /* New mode enable */
525 if (psr & 0x00000800) /* PerClk synch mode */
526 m = fwdvb * 2 * epdv;
527 else
528 m = fbdv * fwdv;
529 else if (epdv == fbdv)
530 m = fbdv * cbdv * epdv;
531 else
532 m = fbdv * fwdvb * cbdv;
533
534 cpu = sys_clk * m / fwdv;
535 plb = sys_clk * m / (fwdvb * cbdv);
536 } else {
537 m = fwdv * fbdv * cbdv;
538 cpu = sys_clk * m / fwdv;
539 plb = cpu / cbdv;
540 }
541 opb = plb / opdv;
542 ebc = plb / epdv;
543
544 if (cpc0_cr0 & 0x80)
545 /* uart0 uses the external clock */
546 uart0 = ser_clk;
547 else
548 uart0 = cpu / udiv;
549
550 if (cpc0_cr0 & 0x40)
551 /* uart1 uses the external clock */
552 uart1 = ser_clk;
553 else
554 uart1 = cpu / udiv;
555
556 /* setup the timebase clock to tick at the cpu frequency */
557 cpc0_cr1 = cpc0_cr1 & ~0x00800000;
558 mtdcr(DCRN_405_CPC0_CR1, cpc0_cr1);
559 tb = cpu;
560
561 dt_fixup_cpu_clocks(cpu, tb, 0);
562 dt_fixup_clock("/plb", plb);
563 dt_fixup_clock("/plb/opb", opb);
564 dt_fixup_clock("/plb/ebc", ebc);
565 dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
566 dt_fixup_clock("/plb/opb/serial@ef600400", uart1);
567}
568
569
570void ibm405ep_fixup_clocks(unsigned int sys_clk)
571{
572 u32 pllmr0 = mfdcr(DCRN_CPC0_PLLMR0);
573 u32 pllmr1 = mfdcr(DCRN_CPC0_PLLMR1);
574 u32 cpc0_ucr = mfdcr(DCRN_CPC0_UCR);
575 u32 cpu, plb, opb, ebc, uart0, uart1;
576 u32 fwdva, fwdvb, fbdv, cbdv, opdv, epdv;
577 u32 pllmr0_ccdv, tb, m;
578
579 fwdva = 8 - ((pllmr1 & 0x00070000) >> 16);
580 fwdvb = 8 - ((pllmr1 & 0x00007000) >> 12);
581 fbdv = (pllmr1 & 0x00f00000) >> 20;
582 if (fbdv == 0)
583 fbdv = 16;
584
585 cbdv = ((pllmr0 & 0x00030000) >> 16) + 1; /* CPU:PLB */
586 epdv = ((pllmr0 & 0x00000300) >> 8) + 2; /* PLB:EBC */
587 opdv = ((pllmr0 & 0x00003000) >> 12) + 1; /* PLB:OPB */
588
589 m = fbdv * fwdvb;
590
591 pllmr0_ccdv = ((pllmr0 & 0x00300000) >> 20) + 1;
592 if (pllmr1 & 0x80000000)
593 cpu = sys_clk * m / (fwdva * pllmr0_ccdv);
594 else
595 cpu = sys_clk / pllmr0_ccdv;
596
597 plb = cpu / cbdv;
598 opb = plb / opdv;
599 ebc = plb / epdv;
600 tb = cpu;
601 uart0 = cpu / (cpc0_ucr & 0x0000007f);
602 uart1 = cpu / ((cpc0_ucr & 0x00007f00) >> 8);
603
604 dt_fixup_cpu_clocks(cpu, tb, 0);
605 dt_fixup_clock("/plb", plb);
606 dt_fixup_clock("/plb/opb", opb);
607 dt_fixup_clock("/plb/ebc", ebc);
296 dt_fixup_clock("/plb/opb/serial@ef600300", uart0); 608 dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
297 dt_fixup_clock("/plb/opb/serial@ef600400", uart0); 609 dt_fixup_clock("/plb/opb/serial@ef600400", uart1);
298 dt_fixup_clock("/plb/opb/serial@ef600500", uart0);
299 dt_fixup_clock("/plb/opb/serial@ef600600", uart0);
300} 610}
diff --git a/arch/powerpc/boot/4xx.h b/arch/powerpc/boot/4xx.h
index adba6a599a93..2606e64f0c4b 100644
--- a/arch/powerpc/boot/4xx.h
+++ b/arch/powerpc/boot/4xx.h
@@ -11,12 +11,22 @@
11#ifndef _POWERPC_BOOT_4XX_H_ 11#ifndef _POWERPC_BOOT_4XX_H_
12#define _POWERPC_BOOT_4XX_H_ 12#define _POWERPC_BOOT_4XX_H_
13 13
14void ibm4xx_fixup_memsize(void); 14void ibm4xx_sdram_fixup_memsize(void);
15void ibm440spe_fixup_memsize(void);
15void ibm4xx_denali_fixup_memsize(void); 16void ibm4xx_denali_fixup_memsize(void);
16void ibm44x_dbcr_reset(void); 17void ibm44x_dbcr_reset(void);
17void ibm40x_dbcr_reset(void); 18void ibm40x_dbcr_reset(void);
18void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1); 19void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1);
19void ibm4xx_fixup_ebc_ranges(const char *ebc); 20void ibm4xx_fixup_ebc_ranges(const char *ebc);
20void ibm440ep_fixup_clocks(unsigned int sysclk, unsigned int ser_clk); 21
22void ibm405gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk);
23void ibm405ep_fixup_clocks(unsigned int sys_clk);
24void ibm440gp_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk);
25void ibm440ep_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk,
26 unsigned int tmr_clk);
27void ibm440gx_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk,
28 unsigned int tmr_clk);
29void ibm440spe_fixup_clocks(unsigned int sys_clk, unsigned int ser_clk,
30 unsigned int tmr_clk);
21 31
22#endif /* _POWERPC_BOOT_4XX_H_ */ 32#endif /* _POWERPC_BOOT_4XX_H_ */
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 4b1d98b8135e..122a27078998 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -33,12 +33,15 @@ ifeq ($(call cc-option-yn, -fstack-protector),y)
33BOOTCFLAGS += -fno-stack-protector 33BOOTCFLAGS += -fno-stack-protector
34endif 34endif
35 35
36BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) 36BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) -I$(srctree)/$(src)/libfdt
37 37
38$(obj)/4xx.o: BOOTCFLAGS += -mcpu=440 38$(obj)/4xx.o: BOOTCFLAGS += -mcpu=440
39$(obj)/ebony.o: BOOTCFLAGS += -mcpu=440 39$(obj)/ebony.o: BOOTCFLAGS += -mcpu=440
40$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=440
41$(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=440
40$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405 42$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
41 43
44
42zlib := inffast.c inflate.c inftrees.c 45zlib := inffast.c inflate.c inftrees.c
43zlibheader := inffast.h inffixed.h inflate.h inftrees.h infutil.h 46zlibheader := inffast.h inffixed.h inflate.h inftrees.h infutil.h
44zliblinuxheader := zlib.h zconf.h zutil.h 47zliblinuxheader := zlib.h zconf.h zutil.h
@@ -46,17 +49,21 @@ zliblinuxheader := zlib.h zconf.h zutil.h
46$(addprefix $(obj)/,$(zlib) gunzip_util.o main.o): \ 49$(addprefix $(obj)/,$(zlib) gunzip_util.o main.o): \
47 $(addprefix $(obj)/,$(zliblinuxheader)) $(addprefix $(obj)/,$(zlibheader)) 50 $(addprefix $(obj)/,$(zliblinuxheader)) $(addprefix $(obj)/,$(zlibheader))
48 51
49src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \ 52src-libfdt := fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c
53src-wlib := string.S crt0.S stdio.c main.c \
54 $(addprefix libfdt/,$(src-libfdt)) libfdt-wrapper.c \
50 ns16550.c serial.c simple_alloc.c div64.S util.S \ 55 ns16550.c serial.c simple_alloc.c div64.S util.S \
51 gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \ 56 gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \
52 4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c bamboo.c \ 57 4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c bamboo.c \
53 cpm-serial.c stdlib.c mpc52xx-psc.c planetcore.c uartlite.c \ 58 cpm-serial.c stdlib.c mpc52xx-psc.c planetcore.c uartlite.c \
54 fsl-soc.c mpc8xx.c pq2.c 59 fsl-soc.c mpc8xx.c pq2.c
55src-plat := of.c cuboot-52xx.c cuboot-83xx.c cuboot-85xx.c holly.c \ 60src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c \
56 cuboot-ebony.c treeboot-ebony.c prpmc2800.c \ 61 cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
57 ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \ 62 ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
58 cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \ 63 cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \
59 fixed-head.S ep88xc.c cuboot-hpc2.c 64 fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c cuboot-taishan.c \
65 cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
66 cuboot-warp.c cuboot-85xx-cpm2.c
60src-boot := $(src-wlib) $(src-plat) empty.c 67src-boot := $(src-wlib) $(src-plat) empty.c
61 68
62src-boot := $(addprefix $(obj)/, $(src-boot)) 69src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -101,24 +108,61 @@ quiet_cmd_bootar = BOOTAR $@
101 cmd_bootar = $(CROSS32AR) -cr $@.$$$$ $(filter-out FORCE,$^); mv $@.$$$$ $@ 108 cmd_bootar = $(CROSS32AR) -cr $@.$$$$ $(filter-out FORCE,$^); mv $@.$$$$ $@
102 109
103$(patsubst %.c,%.o, $(filter %.c, $(src-boot))): %.o: %.c FORCE 110$(patsubst %.c,%.o, $(filter %.c, $(src-boot))): %.o: %.c FORCE
111 $(Q)mkdir -p $(dir $@)
104 $(call if_changed_dep,bootcc) 112 $(call if_changed_dep,bootcc)
105$(patsubst %.S,%.o, $(filter %.S, $(src-boot))): %.o: %.S FORCE 113$(patsubst %.S,%.o, $(filter %.S, $(src-boot))): %.o: %.S FORCE
114 $(Q)mkdir -p $(dir $@)
106 $(call if_changed_dep,bootas) 115 $(call if_changed_dep,bootas)
107 116
108$(obj)/wrapper.a: $(obj-wlib) FORCE 117$(obj)/wrapper.a: $(obj-wlib) FORCE
109 $(call if_changed,bootar) 118 $(call if_changed,bootar)
110 119
111hostprogs-y := addnote addRamDisk hack-coff mktree 120hostprogs-y := addnote addRamDisk hack-coff mktree dtc
112 121
113targets += $(patsubst $(obj)/%,%,$(obj-boot) wrapper.a) 122targets += $(patsubst $(obj)/%,%,$(obj-boot) wrapper.a)
114extra-y := $(obj)/wrapper.a $(obj-plat) $(obj)/empty.o \ 123extra-y := $(obj)/wrapper.a $(obj-plat) $(obj)/empty.o \
115 $(obj)/zImage.lds $(obj)/zImage.coff.lds $(obj)/zImage.ps3.lds 124 $(obj)/zImage.lds $(obj)/zImage.coff.lds $(obj)/zImage.ps3.lds
116 125
117wrapper :=$(srctree)/$(src)/wrapper 126wrapper :=$(srctree)/$(src)/wrapper
118wrapperbits := $(extra-y) $(addprefix $(obj)/,addnote hack-coff mktree) \ 127wrapperbits := $(extra-y) $(addprefix $(obj)/,addnote hack-coff mktree dtc) \
119 $(wrapper) FORCE 128 $(wrapper) FORCE
120 129
121############# 130#############
131# Bits for building dtc
132# DTC_GENPARSER := 1 # Uncomment to rebuild flex/bison output
133
134dtc-objs := dtc.o flattree.o fstree.o data.o livetree.o treesource.o srcpos.o checks.o
135dtc-objs += dtc-lexer.lex.o dtc-parser.tab.o
136dtc-objs := $(addprefix dtc-src/, $(dtc-objs))
137
138# prerequisites on generated files needs to be explicit
139$(obj)/dtc-src/dtc-parser.tab.o: $(obj)/dtc-src/dtc-parser.tab.c $(obj)/dtc-src/dtc-parser.tab.h
140$(obj)/dtc-src/dtc-lexer.lex.o: $(obj)/dtc-src/dtc-lexer.lex.c $(obj)/dtc-src/dtc-parser.tab.h
141
142HOSTCFLAGS += -I$(src)/dtc-src/ -I$(src)/libfdt/
143
144targets += dtc-src/dtc-parser.tab.c
145targets += dtc-src/dtc-lexer.lex.c
146
147ifdef DTC_GENPARSER
148BISON = bison
149FLEX = flex
150
151quiet_cmd_bison = BISON $@
152 cmd_bison = $(BISON) -o$@ -d $<; cp $@ $@_shipped
153quiet_cmd_flex = FLEX $@
154 cmd_flex = $(FLEX) -o$@ $<; cp $@ $@_shipped
155
156$(obj)/dtc-src/dtc-parser.tab.c: $(src)/dtc-src/dtc-parser.y FORCE
157 $(call if_changed,bison)
158
159$(obj)/dtc-src/dtc-parser.tab.h: $(obj)/dtc-src/dtc-parser.tab.c
160
161$(obj)/dtc-src/dtc-lexer.lex.c: $(src)/dtc-src/dtc-lexer.l FORCE
162 $(call if_changed,flex)
163endif
164
165#############
122# Bits for building various flavours of zImage 166# Bits for building various flavours of zImage
123 167
124ifneq ($(CROSS32_COMPILE),) 168ifneq ($(CROSS32_COMPILE),)
@@ -150,15 +194,29 @@ image-$(CONFIG_DEFAULT_UIMAGE) += uImage
150ifneq ($(CONFIG_DEVICE_TREE),"") 194ifneq ($(CONFIG_DEVICE_TREE),"")
151image-$(CONFIG_PPC_8xx) += cuImage.8xx 195image-$(CONFIG_PPC_8xx) += cuImage.8xx
152image-$(CONFIG_PPC_EP88XC) += zImage.ep88xc 196image-$(CONFIG_PPC_EP88XC) += zImage.ep88xc
197image-$(CONFIG_EP405) += zImage.ep405
153image-$(CONFIG_8260) += cuImage.pq2 198image-$(CONFIG_8260) += cuImage.pq2
199image-$(CONFIG_EP8248E) += zImage.ep8248e
154image-$(CONFIG_PPC_MPC52xx) += cuImage.52xx 200image-$(CONFIG_PPC_MPC52xx) += cuImage.52xx
201image-$(CONFIG_STORCENTER) += cuImage.824x
155image-$(CONFIG_PPC_83xx) += cuImage.83xx 202image-$(CONFIG_PPC_83xx) += cuImage.83xx
156image-$(CONFIG_PPC_85xx) += cuImage.85xx 203image-$(CONFIG_PPC_85xx) += cuImage.85xx
204ifeq ($(CONFIG_CPM2),y)
205image-$(CONFIG_PPC_85xx) += cuImage.85xx-cpm2
206endif
157image-$(CONFIG_MPC7448HPC2) += cuImage.hpc2 207image-$(CONFIG_MPC7448HPC2) += cuImage.hpc2
158image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony 208image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
159image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo 209image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo
160image-$(CONFIG_SEQUOIA) += cuImage.sequoia 210image-$(CONFIG_SEQUOIA) += cuImage.sequoia
211image-$(CONFIG_RAINIER) += cuImage.rainier
161image-$(CONFIG_WALNUT) += treeImage.walnut 212image-$(CONFIG_WALNUT) += treeImage.walnut
213image-$(CONFIG_TAISHAN) += cuImage.taishan
214image-$(CONFIG_KATMAI) += cuImage.katmai
215image-$(CONFIG_WARP) += cuImage.warp
216endif
217
218ifneq ($(CONFIG_REDBOOT),"")
219image-$(CONFIG_PPC_8xx) += zImage.redboot-8xx
162endif 220endif
163 221
164# For 32-bit powermacs, build the COFF and miboot images 222# For 32-bit powermacs, build the COFF and miboot images
@@ -243,3 +301,51 @@ clean-kernel := vmlinux.strip vmlinux.bin
243clean-kernel += $(addsuffix .gz,$(clean-kernel)) 301clean-kernel += $(addsuffix .gz,$(clean-kernel))
244# If not absolute clean-files are relative to $(obj). 302# If not absolute clean-files are relative to $(obj).
245clean-files += $(addprefix $(objtree)/, $(clean-kernel)) 303clean-files += $(addprefix $(objtree)/, $(clean-kernel))
304
305WRAPPER_OBJDIR := /usr/lib/kernel-wrapper
306WRAPPER_DTSDIR := /usr/lib/kernel-wrapper/dts
307WRAPPER_BINDIR := /usr/sbin
308INSTALL := install
309
310extra-installed := $(patsubst $(obj)/%, $(DESTDIR)$(WRAPPER_OBJDIR)/%, $(extra-y))
311hostprogs-installed := $(patsubst %, $(DESTDIR)$(WRAPPER_BINDIR)/%, $(hostprogs-y))
312wrapper-installed := $(DESTDIR)$(WRAPPER_BINDIR)/wrapper
313dts-installed := $(patsubst $(obj)/dts/%, $(DESTDIR)$(WRAPPER_DTSDIR)/%, $(wildcard $(obj)/dts/*.dts))
314
315all-installed := $(extra-installed) $(hostprogs-installed) $(wrapper-installed) $(dts-installed)
316
317quiet_cmd_mkdir = MKDIR $(patsubst $(INSTALL_HDR_PATH)/%,%,$@)
318 cmd_mkdir = mkdir -p $@
319
320quiet_cmd_install = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_OBJDIR)/%,%,$@)
321 cmd_install = $(INSTALL) -m0644 $(patsubst $(DESTDIR)$(WRAPPER_OBJDIR)/%,$(obj)/%,$@) $@
322
323quiet_cmd_install_dts = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_DTSDIR)/%,dts/%,$@)
324 cmd_install_dts = $(INSTALL) -m0644 $(patsubst $(DESTDIR)$(WRAPPER_DTSDIR)/%,$(srctree)/$(obj)/dts/%,$@) $@
325
326quiet_cmd_install_exe = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,%,$@)
327 cmd_install_exe = $(INSTALL) -m0755 $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,$(obj)/%,$@) $@
328
329quiet_cmd_install_wrapper = INSTALL $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,%,$@)
330 cmd_install_wrapper = $(INSTALL) -m0755 $(patsubst $(DESTDIR)$(WRAPPER_BINDIR)/%,$(srctree)/$(obj)/%,$@) $@ ;\
331 sed -i $@ -e 's%^object=.*%object=$(WRAPPER_OBJDIR)%' \
332 -e 's%^objbin=.*%objbin=$(WRAPPER_BINDIR)%' \
333
334
335$(DESTDIR)$(WRAPPER_OBJDIR) $(DESTDIR)$(WRAPPER_DTSDIR) $(DESTDIR)$(WRAPPER_BINDIR):
336 $(call cmd,mkdir)
337
338$(extra-installed) : $(DESTDIR)$(WRAPPER_OBJDIR)/% : $(obj)/% | $(DESTDIR)$(WRAPPER_OBJDIR)
339 $(call cmd,install)
340
341$(hostprogs-installed) : $(DESTDIR)$(WRAPPER_BINDIR)/% : $(obj)/% | $(DESTDIR)$(WRAPPER_BINDIR)
342 $(call cmd,install_exe)
343
344$(dts-installed) : $(DESTDIR)$(WRAPPER_DTSDIR)/% : $(srctree)/$(obj)/dts/% | $(DESTDIR)$(WRAPPER_DTSDIR)
345 $(call cmd,install_dts)
346
347$(wrapper-installed): $(DESTDIR)$(WRAPPER_BINDIR) $(srctree)/$(obj)/wrapper | $(DESTDIR)$(WRAPPER_BINDIR)
348 $(call cmd,install_wrapper)
349
350$(obj)/bootwrapper_install: $(all-installed)
351
diff --git a/arch/powerpc/boot/bamboo.c b/arch/powerpc/boot/bamboo.c
index f61fcdab1c7c..54b33f1500e2 100644
--- a/arch/powerpc/boot/bamboo.c
+++ b/arch/powerpc/boot/bamboo.c
@@ -30,8 +30,8 @@ static void bamboo_fixups(void)
30{ 30{
31 unsigned long sysclk = 33333333; 31 unsigned long sysclk = 33333333;
32 32
33 ibm440ep_fixup_clocks(sysclk, 11059200); 33 ibm440ep_fixup_clocks(sysclk, 11059200, 25000000);
34 ibm4xx_fixup_memsize(); 34 ibm4xx_sdram_fixup_memsize();
35 ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00); 35 ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00);
36 dt_fixup_mac_addresses(bamboo_mac0, bamboo_mac1); 36 dt_fixup_mac_addresses(bamboo_mac0, bamboo_mac1);
37} 37}
@@ -42,6 +42,6 @@ void bamboo_init(void *mac0, void *mac1)
42 platform_ops.exit = ibm44x_dbcr_reset; 42 platform_ops.exit = ibm44x_dbcr_reset;
43 bamboo_mac0 = mac0; 43 bamboo_mac0 = mac0;
44 bamboo_mac1 = mac1; 44 bamboo_mac1 = mac1;
45 ft_init(_dtb_start, 0, 32); 45 fdt_init(_dtb_start);
46 serial_console_init(); 46 serial_console_init();
47} 47}
diff --git a/arch/powerpc/boot/cuboot-52xx.c b/arch/powerpc/boot/cuboot-52xx.c
index 9256a26d40e4..a8611546a656 100644
--- a/arch/powerpc/boot/cuboot-52xx.c
+++ b/arch/powerpc/boot/cuboot-52xx.c
@@ -53,7 +53,7 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
53 unsigned long r6, unsigned long r7) 53 unsigned long r6, unsigned long r7)
54{ 54{
55 CUBOOT_INIT(); 55 CUBOOT_INIT();
56 ft_init(_dtb_start, _dtb_end - _dtb_start, 32); 56 fdt_init(_dtb_start);
57 serial_console_init(); 57 serial_console_init();
58 platform_ops.fixups = platform_fixups; 58 platform_ops.fixups = platform_fixups;
59} 59}
diff --git a/arch/powerpc/boot/cuboot-824x.c b/arch/powerpc/boot/cuboot-824x.c
new file mode 100644
index 000000000000..ced90c53de48
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-824x.c
@@ -0,0 +1,53 @@
1/*
2 * Old U-boot compatibility for 824x
3 *
4 * Copyright (c) 2007 Freescale Semiconductor, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10
11#include "ops.h"
12#include "stdio.h"
13#include "cuboot.h"
14
15#define TARGET_824x
16#include "ppcboot.h"
17
18static bd_t bd;
19
20
21static void platform_fixups(void)
22{
23 void *soc;
24
25 dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
26 dt_fixup_mac_addresses(bd.bi_enetaddr);
27 dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq);
28
29 soc = find_node_by_devtype(NULL, "soc");
30 if (soc) {
31 void *serial = NULL;
32
33 setprop(soc, "bus-frequency", &bd.bi_busfreq,
34 sizeof(bd.bi_busfreq));
35
36 while ((serial = find_node_by_devtype(serial, "serial"))) {
37 if (get_parent(serial) != soc)
38 continue;
39
40 setprop(serial, "clock-frequency", &bd.bi_busfreq,
41 sizeof(bd.bi_busfreq));
42 }
43 }
44}
45
46void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
47 unsigned long r6, unsigned long r7)
48{
49 CUBOOT_INIT();
50 fdt_init(_dtb_start);
51 serial_console_init();
52 platform_ops.fixups = platform_fixups;
53}
diff --git a/arch/powerpc/boot/cuboot-83xx.c b/arch/powerpc/boot/cuboot-83xx.c
index a0505509abcc..61af1c1e8255 100644
--- a/arch/powerpc/boot/cuboot-83xx.c
+++ b/arch/powerpc/boot/cuboot-83xx.c
@@ -24,7 +24,8 @@ static void platform_fixups(void)
24 void *soc; 24 void *soc;
25 25
26 dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); 26 dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
27 dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr); 27 dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
28 dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
28 dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq); 29 dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq);
29 30
30 /* Unfortunately, the specific model number is encoded in the 31 /* Unfortunately, the specific model number is encoded in the
@@ -52,7 +53,7 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
52 unsigned long r6, unsigned long r7) 53 unsigned long r6, unsigned long r7)
53{ 54{
54 CUBOOT_INIT(); 55 CUBOOT_INIT();
55 ft_init(_dtb_start, _dtb_end - _dtb_start, 32); 56 fdt_init(_dtb_start);
56 serial_console_init(); 57 serial_console_init();
57 platform_ops.fixups = platform_fixups; 58 platform_ops.fixups = platform_fixups;
58} 59}
diff --git a/arch/powerpc/boot/cuboot-85xx-cpm2.c b/arch/powerpc/boot/cuboot-85xx-cpm2.c
new file mode 100644
index 000000000000..723872ddd447
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-85xx-cpm2.c
@@ -0,0 +1,66 @@
1/*
2 * Old U-boot compatibility for 85xx
3 *
4 * Author: Scott Wood <scottwood@freescale.com>
5 *
6 * Copyright (c) 2007 Freescale Semiconductor, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13#include "ops.h"
14#include "stdio.h"
15#include "cuboot.h"
16
17#define TARGET_85xx
18#define TARGET_CPM2
19#include "ppcboot.h"
20
21static bd_t bd;
22
23static void platform_fixups(void)
24{
25 void *devp;
26
27 dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
28 dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
29 dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
30 dt_fixup_mac_address_by_alias("ethernet2", bd.bi_enet2addr);
31 dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 8, bd.bi_busfreq);
32
33 /* Unfortunately, the specific model number is encoded in the
34 * soc node name in existing dts files -- once that is fixed,
35 * this can do a simple path lookup.
36 */
37 devp = find_node_by_devtype(NULL, "soc");
38 if (devp) {
39 void *serial = NULL;
40
41 setprop(devp, "bus-frequency", &bd.bi_busfreq,
42 sizeof(bd.bi_busfreq));
43
44 while ((serial = find_node_by_devtype(serial, "serial"))) {
45 if (get_parent(serial) != devp)
46 continue;
47
48 setprop(serial, "clock-frequency", &bd.bi_busfreq,
49 sizeof(bd.bi_busfreq));
50 }
51 }
52
53 devp = find_node_by_compatible(NULL, "fsl,cpm2-brg");
54 if (devp)
55 setprop(devp, "clock-frequency", &bd.bi_brgfreq,
56 sizeof(bd.bi_brgfreq));
57}
58
59void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
60 unsigned long r6, unsigned long r7)
61{
62 CUBOOT_INIT();
63 fdt_init(_dtb_start);
64 serial_console_init();
65 platform_ops.fixups = platform_fixups;
66}
diff --git a/arch/powerpc/boot/cuboot-85xx.c b/arch/powerpc/boot/cuboot-85xx.c
index 345dcbecef0f..6776a1a29f13 100644
--- a/arch/powerpc/boot/cuboot-85xx.c
+++ b/arch/powerpc/boot/cuboot-85xx.c
@@ -24,8 +24,9 @@ static void platform_fixups(void)
24 void *soc; 24 void *soc;
25 25
26 dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); 26 dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
27 dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr, 27 dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
28 bd.bi_enet2addr); 28 dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
29 dt_fixup_mac_address_by_alias("ethernet2", bd.bi_enet2addr);
29 dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 8, bd.bi_busfreq); 30 dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 8, bd.bi_busfreq);
30 31
31 /* Unfortunately, the specific model number is encoded in the 32 /* Unfortunately, the specific model number is encoded in the
@@ -53,7 +54,7 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
53 unsigned long r6, unsigned long r7) 54 unsigned long r6, unsigned long r7)
54{ 55{
55 CUBOOT_INIT(); 56 CUBOOT_INIT();
56 ft_init(_dtb_start, _dtb_end - _dtb_start, 32); 57 fdt_init(_dtb_start);
57 serial_console_init(); 58 serial_console_init();
58 platform_ops.fixups = platform_fixups; 59 platform_ops.fixups = platform_fixups;
59} 60}
diff --git a/arch/powerpc/boot/cuboot-8xx.c b/arch/powerpc/boot/cuboot-8xx.c
index 0e82015a5f95..c202c8868bd6 100644
--- a/arch/powerpc/boot/cuboot-8xx.c
+++ b/arch/powerpc/boot/cuboot-8xx.c
@@ -41,7 +41,7 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
41 unsigned long r6, unsigned long r7) 41 unsigned long r6, unsigned long r7)
42{ 42{
43 CUBOOT_INIT(); 43 CUBOOT_INIT();
44 ft_init(_dtb_start, _dtb_end - _dtb_start, 32); 44 fdt_init(_dtb_start);
45 serial_console_init(); 45 serial_console_init();
46 platform_ops.fixups = platform_fixups; 46 platform_ops.fixups = platform_fixups;
47} 47}
diff --git a/arch/powerpc/boot/cuboot-hpc2.c b/arch/powerpc/boot/cuboot-hpc2.c
index d333898bca30..1b8953259d75 100644
--- a/arch/powerpc/boot/cuboot-hpc2.c
+++ b/arch/powerpc/boot/cuboot-hpc2.c
@@ -42,7 +42,7 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
42 unsigned long r6, unsigned long r7) 42 unsigned long r6, unsigned long r7)
43{ 43{
44 CUBOOT_INIT(); 44 CUBOOT_INIT();
45 ft_init(_dtb_start, _dtb_end - _dtb_start, 32); 45 fdt_init(_dtb_start);
46 serial_console_init(); 46 serial_console_init();
47 platform_ops.fixups = platform_fixups; 47 platform_ops.fixups = platform_fixups;
48} 48}
diff --git a/arch/powerpc/boot/cuboot-katmai.c b/arch/powerpc/boot/cuboot-katmai.c
new file mode 100644
index 000000000000..c021167f9381
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-katmai.c
@@ -0,0 +1,56 @@
1/*
2 * Old U-boot compatibility for Katmai
3 *
4 * Author: Hugh Blemings <hugh@au.ibm.com>
5 *
6 * Copyright 2007 Hugh Blemings, IBM Corporation.
7 * Based on cuboot-ebony.c which is:
8 * Copyright 2007 David Gibson, IBM Corporation.
9 * Based on cuboot-83xx.c, which is:
10 * Copyright (c) 2007 Freescale Semiconductor, Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License version 2 as published
14 * by the Free Software Foundation.
15 */
16
17#include "ops.h"
18#include "stdio.h"
19#include "reg.h"
20#include "dcr.h"
21#include "4xx.h"
22#include "44x.h"
23#include "cuboot.h"
24
25#define TARGET_44x
26#include "ppcboot.h"
27
28static bd_t bd;
29
30BSS_STACK(4096);
31
32static void katmai_fixups(void)
33{
34 unsigned long sysclk = 33333000;
35
36 /* 440SP Clock logic is all but identical to 440GX
37 * so we just use that code for now at least
38 */
39 ibm440spe_fixup_clocks(sysclk, 6 * 1843200, 0);
40
41 ibm440spe_fixup_memsize();
42
43 dt_fixup_mac_address(0, bd.bi_enetaddr);
44
45 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
46}
47
48void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
49 unsigned long r6, unsigned long r7)
50{
51 CUBOOT_INIT();
52
53 platform_ops.fixups = katmai_fixups;
54 fdt_init(_dtb_start);
55 serial_console_init();
56}
diff --git a/arch/powerpc/boot/cuboot-pq2.c b/arch/powerpc/boot/cuboot-pq2.c
index 61574f3272dd..f56ac6cae9f3 100644
--- a/arch/powerpc/boot/cuboot-pq2.c
+++ b/arch/powerpc/boot/cuboot-pq2.c
@@ -255,7 +255,7 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
255 unsigned long r6, unsigned long r7) 255 unsigned long r6, unsigned long r7)
256{ 256{
257 CUBOOT_INIT(); 257 CUBOOT_INIT();
258 ft_init(_dtb_start, _dtb_end - _dtb_start, 32); 258 fdt_init(_dtb_start);
259 serial_console_init(); 259 serial_console_init();
260 platform_ops.fixups = pq2_platform_fixups; 260 platform_ops.fixups = pq2_platform_fixups;
261} 261}
diff --git a/arch/powerpc/boot/cuboot-rainier.c b/arch/powerpc/boot/cuboot-rainier.c
new file mode 100644
index 000000000000..cf452b66dce8
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-rainier.c
@@ -0,0 +1,56 @@
1/*
2 * Old U-boot compatibility for Rainier
3 *
4 * Valentine Barshak <vbarshak@ru.mvista.com>
5 * Copyright 2007 MontaVista Software, Inc
6 *
7 * Based on Ebony code by David Gibson <david@gibson.dropbear.id.au>
8 * Copyright IBM Corporation, 2007
9 *
10 * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
11 * Copyright IBM Corporation, 2007
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License
15 * as published by the Free Software Foundation; version 2 of the License
16 */
17
18#include <stdarg.h>
19#include <stddef.h>
20#include "types.h"
21#include "elf.h"
22#include "string.h"
23#include "stdio.h"
24#include "page.h"
25#include "ops.h"
26#include "dcr.h"
27#include "4xx.h"
28#include "44x.h"
29#include "cuboot.h"
30
31#define TARGET_4xx
32#define TARGET_44x
33#include "ppcboot.h"
34
35static bd_t bd;
36
37
38static void rainier_fixups(void)
39{
40 unsigned long sysclk = 33333333;
41
42 ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
43 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
44 ibm4xx_denali_fixup_memsize();
45 dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
46}
47
48void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
49 unsigned long r6, unsigned long r7)
50{
51 CUBOOT_INIT();
52 platform_ops.fixups = rainier_fixups;
53 platform_ops.exit = ibm44x_dbcr_reset;
54 fdt_init(_dtb_start);
55 serial_console_init();
56}
diff --git a/arch/powerpc/boot/cuboot-sequoia.c b/arch/powerpc/boot/cuboot-sequoia.c
index ec635e0bd4ec..f555575a44de 100644
--- a/arch/powerpc/boot/cuboot-sequoia.c
+++ b/arch/powerpc/boot/cuboot-sequoia.c
@@ -39,7 +39,7 @@ static void sequoia_fixups(void)
39{ 39{
40 unsigned long sysclk = 33333333; 40 unsigned long sysclk = 33333333;
41 41
42 ibm440ep_fixup_clocks(sysclk, 11059200); 42 ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
43 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); 43 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
44 ibm4xx_denali_fixup_memsize(); 44 ibm4xx_denali_fixup_memsize();
45 dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr); 45 dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
@@ -51,6 +51,6 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
51 CUBOOT_INIT(); 51 CUBOOT_INIT();
52 platform_ops.fixups = sequoia_fixups; 52 platform_ops.fixups = sequoia_fixups;
53 platform_ops.exit = ibm44x_dbcr_reset; 53 platform_ops.exit = ibm44x_dbcr_reset;
54 ft_init(_dtb_start, 0, 32); 54 fdt_init(_dtb_start);
55 serial_console_init(); 55 serial_console_init();
56} 56}
diff --git a/arch/powerpc/boot/cuboot-taishan.c b/arch/powerpc/boot/cuboot-taishan.c
new file mode 100644
index 000000000000..f66455a45ab1
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-taishan.c
@@ -0,0 +1,54 @@
1/*
2 * Old U-boot compatibility for Taishan
3 *
4 * Author: Hugh Blemings <hugh@au.ibm.com>
5 *
6 * Copyright 2007 Hugh Blemings, IBM Corporation.
7 * Based on cuboot-ebony.c which is:
8 * Copyright 2007 David Gibson, IBM Corporation.
9 * Based on cuboot-83xx.c, which is:
10 * Copyright (c) 2007 Freescale Semiconductor, Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License version 2 as published
14 * by the Free Software Foundation.
15 */
16
17#include "ops.h"
18#include "stdio.h"
19#include "cuboot.h"
20#include "reg.h"
21#include "dcr.h"
22#include "4xx.h"
23
24#define TARGET_44x
25#include "ppcboot.h"
26
27static bd_t bd;
28
29BSS_STACK(4096);
30
31static void taishan_fixups(void)
32{
33 /* FIXME: sysclk should be derived by reading the FPGA
34 registers */
35 unsigned long sysclk = 33000000;
36
37 ibm440gx_fixup_clocks(sysclk, 6 * 1843200, 25000000);
38
39 ibm4xx_sdram_fixup_memsize();
40
41 dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr);
42
43 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
44}
45
46void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
47 unsigned long r6, unsigned long r7)
48{
49 CUBOOT_INIT();
50
51 platform_ops.fixups = taishan_fixups;
52 fdt_init(_dtb_start);
53 serial_console_init();
54}
diff --git a/arch/powerpc/boot/cuboot-warp.c b/arch/powerpc/boot/cuboot-warp.c
new file mode 100644
index 000000000000..bdedebe1bc14
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-warp.c
@@ -0,0 +1,39 @@
1/*
2 * Copyright (c) 2008 PIKA Technologies
3 * Sean MacLennan <smaclennan@pikatech.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation.
8 */
9
10#include "ops.h"
11#include "4xx.h"
12#include "cuboot.h"
13
14#define TARGET_44x
15#include "ppcboot.h"
16
17static bd_t bd;
18
19static void warp_fixups(void)
20{
21 unsigned long sysclk = 66000000;
22
23 ibm440ep_fixup_clocks(sysclk, 11059200, 50000000);
24 ibm4xx_sdram_fixup_memsize();
25 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
26 dt_fixup_mac_addresses(&bd.bi_enetaddr);
27}
28
29
30void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
31 unsigned long r6, unsigned long r7)
32{
33 CUBOOT_INIT();
34
35 platform_ops.fixups = warp_fixups;
36 platform_ops.exit = ibm44x_dbcr_reset;
37 fdt_init(_dtb_start);
38 serial_console_init();
39}
diff --git a/arch/powerpc/boot/dcr.h b/arch/powerpc/boot/dcr.h
index 83b88aa92888..95b9f5344016 100644
--- a/arch/powerpc/boot/dcr.h
+++ b/arch/powerpc/boot/dcr.h
@@ -14,12 +14,20 @@
14#define DCRN_SDRAM0_CFGADDR 0x010 14#define DCRN_SDRAM0_CFGADDR 0x010
15#define DCRN_SDRAM0_CFGDATA 0x011 15#define DCRN_SDRAM0_CFGDATA 0x011
16 16
17#define SDRAM0_READ(offset) ({\
18 mtdcr(DCRN_SDRAM0_CFGADDR, offset); \
19 mfdcr(DCRN_SDRAM0_CFGDATA); })
20#define SDRAM0_WRITE(offset, data) ({\
21 mtdcr(DCRN_SDRAM0_CFGADDR, offset); \
22 mtdcr(DCRN_SDRAM0_CFGDATA, data); })
23
17#define SDRAM0_B0CR 0x40 24#define SDRAM0_B0CR 0x40
18#define SDRAM0_B1CR 0x44 25#define SDRAM0_B1CR 0x44
19#define SDRAM0_B2CR 0x48 26#define SDRAM0_B2CR 0x48
20#define SDRAM0_B3CR 0x4c 27#define SDRAM0_B3CR 0x4c
21 28
22static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR, SDRAM0_B2CR, SDRAM0_B3CR }; 29static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR,
30 SDRAM0_B2CR, SDRAM0_B3CR };
23 31
24#define SDRAM_CONFIG_BANK_ENABLE 0x00000001 32#define SDRAM_CONFIG_BANK_ENABLE 0x00000001
25#define SDRAM_CONFIG_SIZE_MASK 0x000e0000 33#define SDRAM_CONFIG_SIZE_MASK 0x000e0000
@@ -138,5 +146,54 @@ static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR, SDRAM0_B2C
138#define DCRN_CPC0_PLLMR 0xb0 146#define DCRN_CPC0_PLLMR 0xb0
139#define DCRN_405_CPC0_CR0 0xb1 147#define DCRN_405_CPC0_CR0 0xb1
140#define DCRN_405_CPC0_CR1 0xb2 148#define DCRN_405_CPC0_CR1 0xb2
149#define DCRN_405_CPC0_PSR 0xb4
150
151/* 405EP Clocking/Power Management/Chip Control regs */
152#define DCRN_CPC0_PLLMR0 0xf0
153#define DCRN_CPC0_PLLMR1 0xf4
154#define DCRN_CPC0_UCR 0xf5
155
156/* 440GX Clock control etc */
157
158
159#define DCRN_CPR0_CLKUPD 0x020
160#define DCRN_CPR0_PLLC 0x040
161#define DCRN_CPR0_PLLD 0x060
162#define DCRN_CPR0_PRIMAD 0x080
163#define DCRN_CPR0_PRIMBD 0x0a0
164#define DCRN_CPR0_OPBD 0x0c0
165#define DCRN_CPR0_PERD 0x0e0
166#define DCRN_CPR0_MALD 0x100
167
168#define DCRN_SDR0_CONFIG_ADDR 0xe
169#define DCRN_SDR0_CONFIG_DATA 0xf
170
171/* SDR read/write helper macros */
172#define SDR0_READ(offset) ({\
173 mtdcr(DCRN_SDR0_CONFIG_ADDR, offset); \
174 mfdcr(DCRN_SDR0_CONFIG_DATA); })
175#define SDR0_WRITE(offset, data) ({\
176 mtdcr(DCRN_SDR0_CONFIG_ADDR, offset); \
177 mtdcr(DCRN_SDR0_CONFIG_DATA, data); })
178
179#define DCRN_SDR0_UART0 0x0120
180#define DCRN_SDR0_UART1 0x0121
181#define DCRN_SDR0_UART2 0x0122
182#define DCRN_SDR0_UART3 0x0123
183
184
185/* CPRs read/write helper macros - based off include/asm-ppc/ibm44x.h */
186
187#define DCRN_CPR0_CFGADDR 0xc
188#define DCRN_CPR0_CFGDATA 0xd
189
190#define CPR0_READ(offset) ({\
191 mtdcr(DCRN_CPR0_CFGADDR, offset); \
192 mfdcr(DCRN_CPR0_CFGDATA); })
193#define CPR0_WRITE(offset, data) ({\
194 mtdcr(DCRN_CPR0_CFGADDR, offset); \
195 mtdcr(DCRN_CPR0_CFGDATA, data); })
196
197
141 198
142#endif /* _PPC_BOOT_DCR_H_ */ 199#endif /* _PPC_BOOT_DCR_H_ */
diff --git a/arch/powerpc/boot/devtree.c b/arch/powerpc/boot/devtree.c
index e5dfe4497313..60f561e307a9 100644
--- a/arch/powerpc/boot/devtree.c
+++ b/arch/powerpc/boot/devtree.c
@@ -88,6 +88,20 @@ void dt_fixup_clock(const char *path, u32 freq)
88 } 88 }
89} 89}
90 90
91void dt_fixup_mac_address_by_alias(const char *alias, const u8 *addr)
92{
93 void *devp = find_node_by_alias(alias);
94
95 if (devp) {
96 printf("%s: local-mac-address <-"
97 " %02x:%02x:%02x:%02x:%02x:%02x\n\r", alias,
98 addr[0], addr[1], addr[2],
99 addr[3], addr[4], addr[5]);
100
101 setprop(devp, "local-mac-address", addr, 6);
102 }
103}
104
91void dt_fixup_mac_address(u32 index, const u8 *addr) 105void dt_fixup_mac_address(u32 index, const u8 *addr)
92{ 106{
93 void *devp = find_node_by_prop_value(NULL, "linux,network-index", 107 void *devp = find_node_by_prop_value(NULL, "linux,network-index",
diff --git a/arch/powerpc/boot/dtc-src/.gitignore b/arch/powerpc/boot/dtc-src/.gitignore
new file mode 100644
index 000000000000..a7c3f94e5e75
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/.gitignore
@@ -0,0 +1,3 @@
1dtc-lexer.lex.c
2dtc-parser.tab.c
3dtc-parser.tab.h
diff --git a/arch/powerpc/boot/dtc-src/Makefile.dtc b/arch/powerpc/boot/dtc-src/Makefile.dtc
new file mode 100644
index 000000000000..d607fdb8df8d
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/Makefile.dtc
@@ -0,0 +1,25 @@
1# Makefile.dtc
2#
3# This is not a complete Makefile of itself. Instead, it is designed to
4# be easily embeddable into other systems of Makefiles.
5#
6DTC_SRCS = dtc.c flattree.c fstree.c data.c livetree.c treesource.c srcpos.c \
7 checks.c
8DTC_EXTRA = dtc.h srcpos.h
9DTC_LEXFILES = dtc-lexer.l
10DTC_BISONFILES = dtc-parser.y
11
12DTC_LEX_SRCS = $(DTC_LEXFILES:%.l=%.lex.c)
13DTC_BISON_SRCS = $(DTC_BISONFILES:%.y=%.tab.c)
14DTC_BISON_INCLUDES = $(DTC_BISONFILES:%.y=%.tab.h)
15
16DTC_GEN_SRCS = $(DTC_LEX_SRCS) $(DTC_BISON_SRCS)
17DTC_GEN_ALL = $(DTC_GEN_SRCS) $(DTC_BISON_INCLUDES)
18DTC_OBJS = $(DTC_SRCS:%.c=%.o) $(DTC_GEN_SRCS:%.c=%.o)
19
20DTC_CLEANFILES = $(DTC_GEN_ALL)
21
22# We assume the containing Makefile system can do auto-dependencies for most
23# things, but we supply the dependencies on generated header files explicitly
24
25$(addprefix $(DTC_objdir)/,$(DTC_GEN_SRCS:%.c=%.o)): $(addprefix $(DTC_objdir)/,$(DTC_BISON_INCLUDES))
diff --git a/arch/powerpc/boot/dtc-src/checks.c b/arch/powerpc/boot/dtc-src/checks.c
new file mode 100644
index 000000000000..2ce961cd414d
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/checks.c
@@ -0,0 +1,750 @@
1/*
2 * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2007.
3 *
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of the
8 * License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
18 * USA
19 */
20
21#include "dtc.h"
22
23#ifdef TRACE_CHECKS
24#define TRACE(c, ...) \
25 do { \
26 fprintf(stderr, "=== %s: ", (c)->name); \
27 fprintf(stderr, __VA_ARGS__); \
28 fprintf(stderr, "\n"); \
29 } while (0)
30#else
31#define TRACE(c, fmt, ...) do { } while (0)
32#endif
33
34enum checklevel {
35 IGNORE = 0,
36 WARN = 1,
37 ERROR = 2,
38};
39
40enum checkstatus {
41 UNCHECKED = 0,
42 PREREQ,
43 PASSED,
44 FAILED,
45};
46
47struct check;
48
49typedef void (*tree_check_fn)(struct check *c, struct node *dt);
50typedef void (*node_check_fn)(struct check *c, struct node *dt, struct node *node);
51typedef void (*prop_check_fn)(struct check *c, struct node *dt,
52 struct node *node, struct property *prop);
53
54struct check {
55 const char *name;
56 tree_check_fn tree_fn;
57 node_check_fn node_fn;
58 prop_check_fn prop_fn;
59 void *data;
60 enum checklevel level;
61 enum checkstatus status;
62 int inprogress;
63 int num_prereqs;
64 struct check **prereq;
65};
66
67#define CHECK(nm, tfn, nfn, pfn, d, lvl, ...) \
68 static struct check *nm##_prereqs[] = { __VA_ARGS__ }; \
69 static struct check nm = { \
70 .name = #nm, \
71 .tree_fn = (tfn), \
72 .node_fn = (nfn), \
73 .prop_fn = (pfn), \
74 .data = (d), \
75 .level = (lvl), \
76 .status = UNCHECKED, \
77 .num_prereqs = ARRAY_SIZE(nm##_prereqs), \
78 .prereq = nm##_prereqs, \
79 };
80
81#define TREE_CHECK(nm, d, lvl, ...) \
82 CHECK(nm, check_##nm, NULL, NULL, d, lvl, __VA_ARGS__)
83#define NODE_CHECK(nm, d, lvl, ...) \
84 CHECK(nm, NULL, check_##nm, NULL, d, lvl, __VA_ARGS__)
85#define PROP_CHECK(nm, d, lvl, ...) \
86 CHECK(nm, NULL, NULL, check_##nm, d, lvl, __VA_ARGS__)
87#define BATCH_CHECK(nm, lvl, ...) \
88 CHECK(nm, NULL, NULL, NULL, NULL, lvl, __VA_ARGS__)
89
90#ifdef __GNUC__
91static inline void check_msg(struct check *c, const char *fmt, ...) __attribute__((format (printf, 2, 3)));
92#endif
93static inline void check_msg(struct check *c, const char *fmt, ...)
94{
95 va_list ap;
96 va_start(ap, fmt);
97
98 if ((c->level < WARN) || (c->level <= quiet))
99 return; /* Suppress message */
100
101 fprintf(stderr, "%s (%s): ",
102 (c->level == ERROR) ? "ERROR" : "Warning", c->name);
103 vfprintf(stderr, fmt, ap);
104 fprintf(stderr, "\n");
105}
106
107#define FAIL(c, ...) \
108 do { \
109 TRACE((c), "\t\tFAILED at %s:%d", __FILE__, __LINE__); \
110 (c)->status = FAILED; \
111 check_msg((c), __VA_ARGS__); \
112 } while (0)
113
114static void check_nodes_props(struct check *c, struct node *dt, struct node *node)
115{
116 struct node *child;
117 struct property *prop;
118
119 TRACE(c, "%s", node->fullpath);
120 if (c->node_fn)
121 c->node_fn(c, dt, node);
122
123 if (c->prop_fn)
124 for_each_property(node, prop) {
125 TRACE(c, "%s\t'%s'", node->fullpath, prop->name);
126 c->prop_fn(c, dt, node, prop);
127 }
128
129 for_each_child(node, child)
130 check_nodes_props(c, dt, child);
131}
132
133static int run_check(struct check *c, struct node *dt)
134{
135 int error = 0;
136 int i;
137
138 assert(!c->inprogress);
139
140 if (c->status != UNCHECKED)
141 goto out;
142
143 c->inprogress = 1;
144
145 for (i = 0; i < c->num_prereqs; i++) {
146 struct check *prq = c->prereq[i];
147 error |= run_check(prq, dt);
148 if (prq->status != PASSED) {
149 c->status = PREREQ;
150 check_msg(c, "Failed prerequisite '%s'",
151 c->prereq[i]->name);
152 }
153 }
154
155 if (c->status != UNCHECKED)
156 goto out;
157
158 if (c->node_fn || c->prop_fn)
159 check_nodes_props(c, dt, dt);
160
161 if (c->tree_fn)
162 c->tree_fn(c, dt);
163 if (c->status == UNCHECKED)
164 c->status = PASSED;
165
166 TRACE(c, "\tCompleted, status %d", c->status);
167
168out:
169 c->inprogress = 0;
170 if ((c->status != PASSED) && (c->level == ERROR))
171 error = 1;
172 return error;
173}
174
175/*
176 * Utility check functions
177 */
178
179static void check_is_string(struct check *c, struct node *root,
180 struct node *node)
181{
182 struct property *prop;
183 char *propname = c->data;
184
185 prop = get_property(node, propname);
186 if (!prop)
187 return; /* Not present, assumed ok */
188
189 if (!data_is_one_string(prop->val))
190 FAIL(c, "\"%s\" property in %s is not a string",
191 propname, node->fullpath);
192}
193#define CHECK_IS_STRING(nm, propname, lvl) \
194 CHECK(nm, NULL, check_is_string, NULL, (propname), (lvl))
195
196static void check_is_cell(struct check *c, struct node *root,
197 struct node *node)
198{
199 struct property *prop;
200 char *propname = c->data;
201
202 prop = get_property(node, propname);
203 if (!prop)
204 return; /* Not present, assumed ok */
205
206 if (prop->val.len != sizeof(cell_t))
207 FAIL(c, "\"%s\" property in %s is not a single cell",
208 propname, node->fullpath);
209}
210#define CHECK_IS_CELL(nm, propname, lvl) \
211 CHECK(nm, NULL, check_is_cell, NULL, (propname), (lvl))
212
213/*
214 * Structural check functions
215 */
216
217static void check_duplicate_node_names(struct check *c, struct node *dt,
218 struct node *node)
219{
220 struct node *child, *child2;
221
222 for_each_child(node, child)
223 for (child2 = child->next_sibling;
224 child2;
225 child2 = child2->next_sibling)
226 if (streq(child->name, child2->name))
227 FAIL(c, "Duplicate node name %s",
228 child->fullpath);
229}
230NODE_CHECK(duplicate_node_names, NULL, ERROR);
231
232static void check_duplicate_property_names(struct check *c, struct node *dt,
233 struct node *node)
234{
235 struct property *prop, *prop2;
236
237 for_each_property(node, prop)
238 for (prop2 = prop->next; prop2; prop2 = prop2->next)
239 if (streq(prop->name, prop2->name))
240 FAIL(c, "Duplicate property name %s in %s",
241 prop->name, node->fullpath);
242}
243NODE_CHECK(duplicate_property_names, NULL, ERROR);
244
245static void check_explicit_phandles(struct check *c, struct node *root,
246 struct node *node)
247{
248 struct property *prop;
249 struct node *other;
250 cell_t phandle;
251
252 prop = get_property(node, "linux,phandle");
253 if (! prop)
254 return; /* No phandle, that's fine */
255
256 if (prop->val.len != sizeof(cell_t)) {
257 FAIL(c, "%s has bad length (%d) linux,phandle property",
258 node->fullpath, prop->val.len);
259 return;
260 }
261
262 phandle = propval_cell(prop);
263 if ((phandle == 0) || (phandle == -1)) {
264 FAIL(c, "%s has invalid linux,phandle value 0x%x",
265 node->fullpath, phandle);
266 return;
267 }
268
269 other = get_node_by_phandle(root, phandle);
270 if (other) {
271 FAIL(c, "%s has duplicated phandle 0x%x (seen before at %s)",
272 node->fullpath, phandle, other->fullpath);
273 return;
274 }
275
276 node->phandle = phandle;
277}
278NODE_CHECK(explicit_phandles, NULL, ERROR);
279
280static void check_name_properties(struct check *c, struct node *root,
281 struct node *node)
282{
283 struct property *prop;
284
285 prop = get_property(node, "name");
286 if (!prop)
287 return; /* No name property, that's fine */
288
289 if ((prop->val.len != node->basenamelen+1)
290 || (memcmp(prop->val.val, node->name, node->basenamelen) != 0))
291 FAIL(c, "\"name\" property in %s is incorrect (\"%s\" instead"
292 " of base node name)", node->fullpath, prop->val.val);
293}
294CHECK_IS_STRING(name_is_string, "name", ERROR);
295NODE_CHECK(name_properties, NULL, ERROR, &name_is_string);
296
297/*
298 * Reference fixup functions
299 */
300
301static void fixup_phandle_references(struct check *c, struct node *dt,
302 struct node *node, struct property *prop)
303{
304 struct marker *m = prop->val.markers;
305 struct node *refnode;
306 cell_t phandle;
307
308 for_each_marker_of_type(m, REF_PHANDLE) {
309 assert(m->offset + sizeof(cell_t) <= prop->val.len);
310
311 refnode = get_node_by_ref(dt, m->ref);
312 if (! refnode) {
313 FAIL(c, "Reference to non-existent node or label \"%s\"\n",
314 m->ref);
315 continue;
316 }
317
318 phandle = get_node_phandle(dt, refnode);
319 *((cell_t *)(prop->val.val + m->offset)) = cpu_to_be32(phandle);
320 }
321}
322CHECK(phandle_references, NULL, NULL, fixup_phandle_references, NULL, ERROR,
323 &duplicate_node_names, &explicit_phandles);
324
325static void fixup_path_references(struct check *c, struct node *dt,
326 struct node *node, struct property *prop)
327{
328 struct marker *m = prop->val.markers;
329 struct node *refnode;
330 char *path;
331
332 for_each_marker_of_type(m, REF_PATH) {
333 assert(m->offset <= prop->val.len);
334
335 refnode = get_node_by_ref(dt, m->ref);
336 if (!refnode) {
337 FAIL(c, "Reference to non-existent node or label \"%s\"\n",
338 m->ref);
339 continue;
340 }
341
342 path = refnode->fullpath;
343 prop->val = data_insert_at_marker(prop->val, m, path,
344 strlen(path) + 1);
345 }
346}
347CHECK(path_references, NULL, NULL, fixup_path_references, NULL, ERROR,
348 &duplicate_node_names);
349
350/*
351 * Semantic checks
352 */
353CHECK_IS_CELL(address_cells_is_cell, "#address-cells", WARN);
354CHECK_IS_CELL(size_cells_is_cell, "#size-cells", WARN);
355CHECK_IS_CELL(interrupt_cells_is_cell, "#interrupt-cells", WARN);
356
357CHECK_IS_STRING(device_type_is_string, "device_type", WARN);
358CHECK_IS_STRING(model_is_string, "model", WARN);
359CHECK_IS_STRING(status_is_string, "status", WARN);
360
361static void fixup_addr_size_cells(struct check *c, struct node *dt,
362 struct node *node)
363{
364 struct property *prop;
365
366 node->addr_cells = -1;
367 node->size_cells = -1;
368
369 prop = get_property(node, "#address-cells");
370 if (prop)
371 node->addr_cells = propval_cell(prop);
372
373 prop = get_property(node, "#size-cells");
374 if (prop)
375 node->size_cells = propval_cell(prop);
376}
377CHECK(addr_size_cells, NULL, fixup_addr_size_cells, NULL, NULL, WARN,
378 &address_cells_is_cell, &size_cells_is_cell);
379
380#define node_addr_cells(n) \
381 (((n)->addr_cells == -1) ? 2 : (n)->addr_cells)
382#define node_size_cells(n) \
383 (((n)->size_cells == -1) ? 1 : (n)->size_cells)
384
385static void check_reg_format(struct check *c, struct node *dt,
386 struct node *node)
387{
388 struct property *prop;
389 int addr_cells, size_cells, entrylen;
390
391 prop = get_property(node, "reg");
392 if (!prop)
393 return; /* No "reg", that's fine */
394
395 if (!node->parent) {
396 FAIL(c, "Root node has a \"reg\" property");
397 return;
398 }
399
400 if (prop->val.len == 0)
401 FAIL(c, "\"reg\" property in %s is empty", node->fullpath);
402
403 addr_cells = node_addr_cells(node->parent);
404 size_cells = node_size_cells(node->parent);
405 entrylen = (addr_cells + size_cells) * sizeof(cell_t);
406
407 if ((prop->val.len % entrylen) != 0)
408 FAIL(c, "\"reg\" property in %s has invalid length (%d bytes) "
409 "(#address-cells == %d, #size-cells == %d)",
410 node->fullpath, prop->val.len, addr_cells, size_cells);
411}
412NODE_CHECK(reg_format, NULL, WARN, &addr_size_cells);
413
414static void check_ranges_format(struct check *c, struct node *dt,
415 struct node *node)
416{
417 struct property *prop;
418 int c_addr_cells, p_addr_cells, c_size_cells, p_size_cells, entrylen;
419
420 prop = get_property(node, "ranges");
421 if (!prop)
422 return;
423
424 if (!node->parent) {
425 FAIL(c, "Root node has a \"ranges\" property");
426 return;
427 }
428
429 p_addr_cells = node_addr_cells(node->parent);
430 p_size_cells = node_size_cells(node->parent);
431 c_addr_cells = node_addr_cells(node);
432 c_size_cells = node_size_cells(node);
433 entrylen = (p_addr_cells + c_addr_cells + c_size_cells) * sizeof(cell_t);
434
435 if (prop->val.len == 0) {
436 if (p_addr_cells != c_addr_cells)
437 FAIL(c, "%s has empty \"ranges\" property but its "
438 "#address-cells (%d) differs from %s (%d)",
439 node->fullpath, c_addr_cells, node->parent->fullpath,
440 p_addr_cells);
441 if (p_size_cells != c_size_cells)
442 FAIL(c, "%s has empty \"ranges\" property but its "
443 "#size-cells (%d) differs from %s (%d)",
444 node->fullpath, c_size_cells, node->parent->fullpath,
445 p_size_cells);
446 } else if ((prop->val.len % entrylen) != 0) {
447 FAIL(c, "\"ranges\" property in %s has invalid length (%d bytes) "
448 "(parent #address-cells == %d, child #address-cells == %d, "
449 "#size-cells == %d)", node->fullpath, prop->val.len,
450 p_addr_cells, c_addr_cells, c_size_cells);
451 }
452}
453NODE_CHECK(ranges_format, NULL, WARN, &addr_size_cells);
454
455/*
456 * Style checks
457 */
458static void check_avoid_default_addr_size(struct check *c, struct node *dt,
459 struct node *node)
460{
461 struct property *reg, *ranges;
462
463 if (!node->parent)
464 return; /* Ignore root node */
465
466 reg = get_property(node, "reg");
467 ranges = get_property(node, "ranges");
468
469 if (!reg && !ranges)
470 return;
471
472 if ((node->parent->addr_cells == -1))
473 FAIL(c, "Relying on default #address-cells value for %s",
474 node->fullpath);
475
476 if ((node->parent->size_cells == -1))
477 FAIL(c, "Relying on default #size-cells value for %s",
478 node->fullpath);
479}
480NODE_CHECK(avoid_default_addr_size, NULL, WARN, &addr_size_cells);
481
482static void check_obsolete_chosen_interrupt_controller(struct check *c,
483 struct node *dt)
484{
485 struct node *chosen;
486 struct property *prop;
487
488 chosen = get_node_by_path(dt, "/chosen");
489 if (!chosen)
490 return;
491
492 prop = get_property(chosen, "interrupt-controller");
493 if (prop)
494 FAIL(c, "/chosen has obsolete \"interrupt-controller\" "
495 "property");
496}
497TREE_CHECK(obsolete_chosen_interrupt_controller, NULL, WARN);
498
499static struct check *check_table[] = {
500 &duplicate_node_names, &duplicate_property_names,
501 &name_is_string, &name_properties,
502 &explicit_phandles,
503 &phandle_references, &path_references,
504
505 &address_cells_is_cell, &size_cells_is_cell, &interrupt_cells_is_cell,
506 &device_type_is_string, &model_is_string, &status_is_string,
507
508 &addr_size_cells, &reg_format, &ranges_format,
509
510 &avoid_default_addr_size,
511 &obsolete_chosen_interrupt_controller,
512};
513
514int check_semantics(struct node *dt, int outversion, int boot_cpuid_phys);
515
516void process_checks(int force, struct boot_info *bi,
517 int checkflag, int outversion, int boot_cpuid_phys)
518{
519 struct node *dt = bi->dt;
520 int i;
521 int error = 0;
522
523 for (i = 0; i < ARRAY_SIZE(check_table); i++) {
524 struct check *c = check_table[i];
525
526 if (c->level != IGNORE)
527 error = error || run_check(c, dt);
528 }
529
530 if (error) {
531 if (!force) {
532 fprintf(stderr, "ERROR: Input tree has errors, aborting "
533 "(use -f to force output)\n");
534 exit(2);
535 } else if (quiet < 3) {
536 fprintf(stderr, "Warning: Input tree has errors, "
537 "output forced\n");
538 }
539 }
540
541 if (checkflag) {
542 if (error) {
543 fprintf(stderr, "Warning: Skipping semantic checks due to structural errors\n");
544 } else {
545 if (!check_semantics(bi->dt, outversion,
546 boot_cpuid_phys))
547 fprintf(stderr, "Warning: Input tree has semantic errors\n");
548 }
549 }
550}
551
552/*
553 * Semantic check functions
554 */
555
556#define ERRMSG(...) if (quiet < 2) fprintf(stderr, "ERROR: " __VA_ARGS__)
557#define WARNMSG(...) if (quiet < 1) fprintf(stderr, "Warning: " __VA_ARGS__)
558
559#define DO_ERR(...) do {ERRMSG(__VA_ARGS__); ok = 0; } while (0)
560
561#define CHECK_HAVE(node, propname) \
562 do { \
563 if (! (prop = get_property((node), (propname)))) \
564 DO_ERR("Missing \"%s\" property in %s\n", (propname), \
565 (node)->fullpath); \
566 } while (0);
567
568#define CHECK_HAVE_WARN(node, propname) \
569 do { \
570 if (! (prop = get_property((node), (propname)))) \
571 WARNMSG("%s has no \"%s\" property\n", \
572 (node)->fullpath, (propname)); \
573 } while (0)
574
575#define CHECK_HAVE_STRING(node, propname) \
576 do { \
577 CHECK_HAVE((node), (propname)); \
578 if (prop && !data_is_one_string(prop->val)) \
579 DO_ERR("\"%s\" property in %s is not a string\n", \
580 (propname), (node)->fullpath); \
581 } while (0)
582
583#define CHECK_HAVE_STREQ(node, propname, value) \
584 do { \
585 CHECK_HAVE_STRING((node), (propname)); \
586 if (prop && !streq(prop->val.val, (value))) \
587 DO_ERR("%s has wrong %s, %s (should be %s\n", \
588 (node)->fullpath, (propname), \
589 prop->val.val, (value)); \
590 } while (0)
591
592#define CHECK_HAVE_ONECELL(node, propname) \
593 do { \
594 CHECK_HAVE((node), (propname)); \
595 if (prop && (prop->val.len != sizeof(cell_t))) \
596 DO_ERR("\"%s\" property in %s has wrong size %d (should be 1 cell)\n", (propname), (node)->fullpath, prop->val.len); \
597 } while (0)
598
599#define CHECK_HAVE_WARN_ONECELL(node, propname) \
600 do { \
601 CHECK_HAVE_WARN((node), (propname)); \
602 if (prop && (prop->val.len != sizeof(cell_t))) \
603 DO_ERR("\"%s\" property in %s has wrong size %d (should be 1 cell)\n", (propname), (node)->fullpath, prop->val.len); \
604 } while (0)
605
606#define CHECK_HAVE_WARN_PHANDLE(xnode, propname, root) \
607 do { \
608 struct node *ref; \
609 CHECK_HAVE_WARN_ONECELL((xnode), (propname)); \
610 if (prop) {\
611 cell_t phandle = propval_cell(prop); \
612 if ((phandle == 0) || (phandle == -1)) { \
613 DO_ERR("\"%s\" property in %s contains an invalid phandle %x\n", (propname), (xnode)->fullpath, phandle); \
614 } else { \
615 ref = get_node_by_phandle((root), propval_cell(prop)); \
616 if (! ref) \
617 DO_ERR("\"%s\" property in %s refers to non-existant phandle %x\n", (propname), (xnode)->fullpath, propval_cell(prop)); \
618 } \
619 } \
620 } while (0)
621
622#define CHECK_HAVE_WARN_STRING(node, propname) \
623 do { \
624 CHECK_HAVE_WARN((node), (propname)); \
625 if (prop && !data_is_one_string(prop->val)) \
626 DO_ERR("\"%s\" property in %s is not a string\n", \
627 (propname), (node)->fullpath); \
628 } while (0)
629
630static int check_root(struct node *root)
631{
632 struct property *prop;
633 int ok = 1;
634
635 CHECK_HAVE_STRING(root, "model");
636 CHECK_HAVE_WARN(root, "compatible");
637
638 return ok;
639}
640
641static int check_cpus(struct node *root, int outversion, int boot_cpuid_phys)
642{
643 struct node *cpus, *cpu;
644 struct property *prop;
645 struct node *bootcpu = NULL;
646 int ok = 1;
647
648 cpus = get_subnode(root, "cpus");
649 if (! cpus) {
650 ERRMSG("Missing /cpus node\n");
651 return 0;
652 }
653
654 if (cpus->addr_cells != 1)
655 DO_ERR("%s has bad #address-cells value %d (should be 1)\n",
656 cpus->fullpath, cpus->addr_cells);
657 if (cpus->size_cells != 0)
658 DO_ERR("%s has bad #size-cells value %d (should be 0)\n",
659 cpus->fullpath, cpus->size_cells);
660
661 for_each_child(cpus, cpu) {
662 CHECK_HAVE_STREQ(cpu, "device_type", "cpu");
663
664 CHECK_HAVE_ONECELL(cpu, "reg");
665 if (prop) {
666 cell_t unitnum;
667 char *eptr;
668
669 unitnum = strtol(get_unitname(cpu), &eptr, 16);
670 if (*eptr) {
671 WARNMSG("%s has bad format unit name %s (should be CPU number\n",
672 cpu->fullpath, get_unitname(cpu));
673 } else if (unitnum != propval_cell(prop)) {
674 WARNMSG("%s unit name \"%s\" does not match \"reg\" property <%x>\n",
675 cpu->fullpath, get_unitname(cpu),
676 propval_cell(prop));
677 }
678 }
679
680/* CHECK_HAVE_ONECELL(cpu, "d-cache-line-size"); */
681/* CHECK_HAVE_ONECELL(cpu, "i-cache-line-size"); */
682 CHECK_HAVE_ONECELL(cpu, "d-cache-size");
683 CHECK_HAVE_ONECELL(cpu, "i-cache-size");
684
685 CHECK_HAVE_WARN_ONECELL(cpu, "clock-frequency");
686 CHECK_HAVE_WARN_ONECELL(cpu, "timebase-frequency");
687
688 prop = get_property(cpu, "linux,boot-cpu");
689 if (prop) {
690 if (prop->val.len)
691 WARNMSG("\"linux,boot-cpu\" property in %s is non-empty\n",
692 cpu->fullpath);
693 if (bootcpu)
694 DO_ERR("Multiple boot cpus (%s and %s)\n",
695 bootcpu->fullpath, cpu->fullpath);
696 else
697 bootcpu = cpu;
698 }
699 }
700
701 if (outversion < 2) {
702 if (! bootcpu)
703 WARNMSG("No cpu has \"linux,boot-cpu\" property\n");
704 } else {
705 if (bootcpu)
706 WARNMSG("\"linux,boot-cpu\" property is deprecated in blob version 2 or higher\n");
707 if (boot_cpuid_phys == 0xfeedbeef)
708 WARNMSG("physical boot CPU not set. Use -b option to set\n");
709 }
710
711 return ok;
712}
713
714static int check_memory(struct node *root)
715{
716 struct node *mem;
717 struct property *prop;
718 int nnodes = 0;
719 int ok = 1;
720
721 for_each_child(root, mem) {
722 if (! strneq(mem->name, "memory", mem->basenamelen))
723 continue;
724
725 nnodes++;
726
727 CHECK_HAVE_STREQ(mem, "device_type", "memory");
728 CHECK_HAVE(mem, "reg");
729 }
730
731 if (nnodes == 0) {
732 ERRMSG("No memory nodes\n");
733 return 0;
734 }
735
736 return ok;
737}
738
739int check_semantics(struct node *dt, int outversion, int boot_cpuid_phys)
740{
741 int ok = 1;
742
743 ok = ok && check_root(dt);
744 ok = ok && check_cpus(dt, outversion, boot_cpuid_phys);
745 ok = ok && check_memory(dt);
746 if (! ok)
747 return 0;
748
749 return 1;
750}
diff --git a/arch/powerpc/boot/dtc-src/data.c b/arch/powerpc/boot/dtc-src/data.c
new file mode 100644
index 000000000000..a94718c731a9
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/data.c
@@ -0,0 +1,321 @@
1/*
2 * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005.
3 *
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of the
8 * License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
18 * USA
19 */
20
21#include "dtc.h"
22
23void data_free(struct data d)
24{
25 struct marker *m, *nm;
26
27 m = d.markers;
28 while (m) {
29 nm = m->next;
30 free(m->ref);
31 free(m);
32 m = nm;
33 }
34
35 assert(!d.val || d.asize);
36
37 if (d.val)
38 free(d.val);
39}
40
41struct data data_grow_for(struct data d, int xlen)
42{
43 struct data nd;
44 int newsize;
45
46 /* we must start with an allocated datum */
47 assert(!d.val || d.asize);
48
49 if (xlen == 0)
50 return d;
51
52 nd = d;
53
54 newsize = xlen;
55
56 while ((d.len + xlen) > newsize)
57 newsize *= 2;
58
59 nd.asize = newsize;
60 nd.val = xrealloc(d.val, newsize);
61
62 assert(nd.asize >= (d.len + xlen));
63
64 return nd;
65}
66
67struct data data_copy_mem(const char *mem, int len)
68{
69 struct data d;
70
71 d = data_grow_for(empty_data, len);
72
73 d.len = len;
74 memcpy(d.val, mem, len);
75
76 return d;
77}
78
79static char get_oct_char(const char *s, int *i)
80{
81 char x[4];
82 char *endx;
83 long val;
84
85 x[3] = '\0';
86 x[0] = s[(*i)];
87 if (x[0]) {
88 x[1] = s[(*i)+1];
89 if (x[1])
90 x[2] = s[(*i)+2];
91 }
92
93 val = strtol(x, &endx, 8);
94 if ((endx - x) == 0)
95 fprintf(stderr, "Empty \\nnn escape\n");
96
97 (*i) += endx - x;
98 return val;
99}
100
101static char get_hex_char(const char *s, int *i)
102{
103 char x[3];
104 char *endx;
105 long val;
106
107 x[2] = '\0';
108 x[0] = s[(*i)];
109 if (x[0])
110 x[1] = s[(*i)+1];
111
112 val = strtol(x, &endx, 16);
113 if ((endx - x) == 0)
114 fprintf(stderr, "Empty \\x escape\n");
115
116 (*i) += endx - x;
117 return val;
118}
119
120struct data data_copy_escape_string(const char *s, int len)
121{
122 int i = 0;
123 struct data d;
124 char *q;
125
126 d = data_grow_for(empty_data, strlen(s)+1);
127
128 q = d.val;
129 while (i < len) {
130 char c = s[i++];
131
132 if (c != '\\') {
133 q[d.len++] = c;
134 continue;
135 }
136
137 c = s[i++];
138 assert(c);
139 switch (c) {
140 case 'a':
141 q[d.len++] = '\a';
142 break;
143 case 'b':
144 q[d.len++] = '\b';
145 break;
146 case 't':
147 q[d.len++] = '\t';
148 break;
149 case 'n':
150 q[d.len++] = '\n';
151 break;
152 case 'v':
153 q[d.len++] = '\v';
154 break;
155 case 'f':
156 q[d.len++] = '\f';
157 break;
158 case 'r':
159 q[d.len++] = '\r';
160 break;
161 case '0':
162 case '1':
163 case '2':
164 case '3':
165 case '4':
166 case '5':
167 case '6':
168 case '7':
169 i--; /* need to re-read the first digit as
170 * part of the octal value */
171 q[d.len++] = get_oct_char(s, &i);
172 break;
173 case 'x':
174 q[d.len++] = get_hex_char(s, &i);
175 break;
176 default:
177 q[d.len++] = c;
178 }
179 }
180
181 q[d.len++] = '\0';
182 return d;
183}
184
185struct data data_copy_file(FILE *f, size_t len)
186{
187 struct data d;
188
189 d = data_grow_for(empty_data, len);
190
191 d.len = len;
192 fread(d.val, len, 1, f);
193
194 return d;
195}
196
197struct data data_append_data(struct data d, const void *p, int len)
198{
199 d = data_grow_for(d, len);
200 memcpy(d.val + d.len, p, len);
201 d.len += len;
202 return d;
203}
204
205struct data data_insert_at_marker(struct data d, struct marker *m,
206 const void *p, int len)
207{
208 d = data_grow_for(d, len);
209 memmove(d.val + m->offset + len, d.val + m->offset, d.len - m->offset);
210 memcpy(d.val + m->offset, p, len);
211 d.len += len;
212
213 /* Adjust all markers after the one we're inserting at */
214 m = m->next;
215 for_each_marker(m)
216 m->offset += len;
217 return d;
218}
219
220struct data data_append_markers(struct data d, struct marker *m)
221{
222 struct marker **mp = &d.markers;
223
224 /* Find the end of the markerlist */
225 while (*mp)
226 mp = &((*mp)->next);
227 *mp = m;
228 return d;
229}
230
231struct data data_merge(struct data d1, struct data d2)
232{
233 struct data d;
234 struct marker *m2 = d2.markers;
235
236 d = data_append_markers(data_append_data(d1, d2.val, d2.len), m2);
237
238 /* Adjust for the length of d1 */
239 for_each_marker(m2)
240 m2->offset += d1.len;
241
242 d2.markers = NULL; /* So data_free() doesn't clobber them */
243 data_free(d2);
244
245 return d;
246}
247
248struct data data_append_cell(struct data d, cell_t word)
249{
250 cell_t beword = cpu_to_be32(word);
251
252 return data_append_data(d, &beword, sizeof(beword));
253}
254
255struct data data_append_re(struct data d, const struct fdt_reserve_entry *re)
256{
257 struct fdt_reserve_entry bere;
258
259 bere.address = cpu_to_be64(re->address);
260 bere.size = cpu_to_be64(re->size);
261
262 return data_append_data(d, &bere, sizeof(bere));
263}
264
265struct data data_append_addr(struct data d, u64 addr)
266{
267 u64 beaddr = cpu_to_be64(addr);
268
269 return data_append_data(d, &beaddr, sizeof(beaddr));
270}
271
272struct data data_append_byte(struct data d, uint8_t byte)
273{
274 return data_append_data(d, &byte, 1);
275}
276
277struct data data_append_zeroes(struct data d, int len)
278{
279 d = data_grow_for(d, len);
280
281 memset(d.val + d.len, 0, len);
282 d.len += len;
283 return d;
284}
285
286struct data data_append_align(struct data d, int align)
287{
288 int newlen = ALIGN(d.len, align);
289 return data_append_zeroes(d, newlen - d.len);
290}
291
292struct data data_add_marker(struct data d, enum markertype type, char *ref)
293{
294 struct marker *m;
295
296 m = xmalloc(sizeof(*m));
297 m->offset = d.len;
298 m->type = type;
299 m->ref = ref;
300 m->next = NULL;
301
302 return data_append_markers(d, m);
303}
304
305int data_is_one_string(struct data d)
306{
307 int i;
308 int len = d.len;
309
310 if (len == 0)
311 return 0;
312
313 for (i = 0; i < len-1; i++)
314 if (d.val[i] == '\0')
315 return 0;
316
317 if (d.val[len-1] != '\0')
318 return 0;
319
320 return 1;
321}
diff --git a/arch/powerpc/boot/dtc-src/dtc-lexer.l b/arch/powerpc/boot/dtc-src/dtc-lexer.l
new file mode 100644
index 000000000000..c811b221b31e
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/dtc-lexer.l
@@ -0,0 +1,328 @@
1/*
2 * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005.
3 *
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of the
8 * License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
18 * USA
19 */
20
21%option noyywrap nounput yylineno
22
23%x INCLUDE
24%x BYTESTRING
25%x PROPNODENAME
26%s V1
27
28PROPNODECHAR [a-zA-Z0-9,._+*#?@-]
29PATHCHAR ({PROPNODECHAR}|[/])
30LABEL [a-zA-Z_][a-zA-Z0-9_]*
31
32%{
33#include "dtc.h"
34#include "srcpos.h"
35#include "dtc-parser.tab.h"
36
37
38/*#define LEXDEBUG 1*/
39
40#ifdef LEXDEBUG
41#define DPRINT(fmt, ...) fprintf(stderr, fmt, ##__VA_ARGS__)
42#else
43#define DPRINT(fmt, ...) do { } while (0)
44#endif
45
46static int dts_version; /* = 0 */
47
48#define BEGIN_DEFAULT() if (dts_version == 0) { \
49 DPRINT("<INITIAL>\n"); \
50 BEGIN(INITIAL); \
51 } else { \
52 DPRINT("<V1>\n"); \
53 BEGIN(V1); \
54 }
55%}
56
57%%
58<*>"/include/" BEGIN(INCLUDE);
59
60<INCLUDE>\"[^"\n]*\" {
61 yytext[strlen(yytext) - 1] = 0;
62 if (!push_input_file(yytext + 1)) {
63 /* Some unrecoverable error.*/
64 exit(1);
65 }
66 BEGIN_DEFAULT();
67 }
68
69
70<*><<EOF>> {
71 if (!pop_input_file()) {
72 yyterminate();
73 }
74 }
75
76<*>\"([^\\"]|\\.)*\" {
77 yylloc.filenum = srcpos_filenum;
78 yylloc.first_line = yylineno;
79 DPRINT("String: %s\n", yytext);
80 yylval.data = data_copy_escape_string(yytext+1,
81 yyleng-2);
82 yylloc.first_line = yylineno;
83 return DT_STRING;
84 }
85
86<*>"/dts-v1/" {
87 yylloc.filenum = srcpos_filenum;
88 yylloc.first_line = yylineno;
89 DPRINT("Keyword: /dts-v1/\n");
90 dts_version = 1;
91 BEGIN_DEFAULT();
92 return DT_V1;
93 }
94
95<*>"/memreserve/" {
96 yylloc.filenum = srcpos_filenum;
97 yylloc.first_line = yylineno;
98 DPRINT("Keyword: /memreserve/\n");
99 BEGIN_DEFAULT();
100 return DT_MEMRESERVE;
101 }
102
103<*>{LABEL}: {
104 yylloc.filenum = srcpos_filenum;
105 yylloc.first_line = yylineno;
106 DPRINT("Label: %s\n", yytext);
107 yylval.labelref = strdup(yytext);
108 yylval.labelref[yyleng-1] = '\0';
109 return DT_LABEL;
110 }
111
112<INITIAL>[bodh]# {
113 yylloc.filenum = srcpos_filenum;
114 yylloc.first_line = yylineno;
115 if (*yytext == 'b')
116 yylval.cbase = 2;
117 else if (*yytext == 'o')
118 yylval.cbase = 8;
119 else if (*yytext == 'd')
120 yylval.cbase = 10;
121 else
122 yylval.cbase = 16;
123 DPRINT("Base: %d\n", yylval.cbase);
124 return DT_BASE;
125 }
126
127<INITIAL>[0-9a-fA-F]+ {
128 yylloc.filenum = srcpos_filenum;
129 yylloc.first_line = yylineno;
130 yylval.literal = strdup(yytext);
131 DPRINT("Literal: '%s'\n", yylval.literal);
132 return DT_LEGACYLITERAL;
133 }
134
135<V1>[0-9]+|0[xX][0-9a-fA-F]+ {
136 yylloc.filenum = srcpos_filenum;
137 yylloc.first_line = yylineno;
138 yylval.literal = strdup(yytext);
139 DPRINT("Literal: '%s'\n", yylval.literal);
140 return DT_LITERAL;
141 }
142
143\&{LABEL} { /* label reference */
144 yylloc.filenum = srcpos_filenum;
145 yylloc.first_line = yylineno;
146 DPRINT("Ref: %s\n", yytext+1);
147 yylval.labelref = strdup(yytext+1);
148 return DT_REF;
149 }
150
151"&{/"{PATHCHAR}+\} { /* new-style path reference */
152 yylloc.filenum = srcpos_filenum;
153 yylloc.first_line = yylineno;
154 yytext[yyleng-1] = '\0';
155 DPRINT("Ref: %s\n", yytext+2);
156 yylval.labelref = strdup(yytext+2);
157 return DT_REF;
158 }
159
160<INITIAL>"&/"{PATHCHAR}+ { /* old-style path reference */
161 yylloc.filenum = srcpos_filenum;
162 yylloc.first_line = yylineno;
163 DPRINT("Ref: %s\n", yytext+1);
164 yylval.labelref = strdup(yytext+1);
165 return DT_REF;
166 }
167
168<BYTESTRING>[0-9a-fA-F]{2} {
169 yylloc.filenum = srcpos_filenum;
170 yylloc.first_line = yylineno;
171 yylval.byte = strtol(yytext, NULL, 16);
172 DPRINT("Byte: %02x\n", (int)yylval.byte);
173 return DT_BYTE;
174 }
175
176<BYTESTRING>"]" {
177 yylloc.filenum = srcpos_filenum;
178 yylloc.first_line = yylineno;
179 DPRINT("/BYTESTRING\n");
180 BEGIN_DEFAULT();
181 return ']';
182 }
183
184<PROPNODENAME>{PROPNODECHAR}+ {
185 yylloc.filenum = srcpos_filenum;
186 yylloc.first_line = yylineno;
187 DPRINT("PropNodeName: %s\n", yytext);
188 yylval.propnodename = strdup(yytext);
189 BEGIN_DEFAULT();
190 return DT_PROPNODENAME;
191 }
192
193
194<*>[[:space:]]+ /* eat whitespace */
195
196<*>"/*"([^*]|\*+[^*/])*\*+"/" {
197 yylloc.filenum = srcpos_filenum;
198 yylloc.first_line = yylineno;
199 DPRINT("Comment: %s\n", yytext);
200 /* eat comments */
201 }
202
203<*>"//".*\n /* eat line comments */
204
205<*>. {
206 yylloc.filenum = srcpos_filenum;
207 yylloc.first_line = yylineno;
208 DPRINT("Char: %c (\\x%02x)\n", yytext[0],
209 (unsigned)yytext[0]);
210 if (yytext[0] == '[') {
211 DPRINT("<BYTESTRING>\n");
212 BEGIN(BYTESTRING);
213 }
214 if ((yytext[0] == '{')
215 || (yytext[0] == ';')) {
216 DPRINT("<PROPNODENAME>\n");
217 BEGIN(PROPNODENAME);
218 }
219 return yytext[0];
220 }
221
222%%
223
224
225/*
226 * Stack of nested include file contexts.
227 */
228
229struct incl_file {
230 int filenum;
231 FILE *file;
232 YY_BUFFER_STATE yy_prev_buf;
233 int yy_prev_lineno;
234 struct incl_file *prev;
235};
236
237struct incl_file *incl_file_stack;
238
239
240/*
241 * Detect infinite include recursion.
242 */
243#define MAX_INCLUDE_DEPTH (100)
244
245static int incl_depth = 0;
246
247
248int push_input_file(const char *filename)
249{
250 FILE *f;
251 struct incl_file *incl_file;
252
253 if (!filename) {
254 yyerror("No include file name given.");
255 return 0;
256 }
257
258 if (incl_depth++ >= MAX_INCLUDE_DEPTH) {
259 yyerror("Includes nested too deeply");
260 return 0;
261 }
262
263 f = dtc_open_file(filename);
264
265 incl_file = malloc(sizeof(struct incl_file));
266 if (!incl_file) {
267 yyerror("Can not allocate include file space.");
268 return 0;
269 }
270
271 /*
272 * Save current context.
273 */
274 incl_file->yy_prev_buf = YY_CURRENT_BUFFER;
275 incl_file->yy_prev_lineno = yylineno;
276 incl_file->filenum = srcpos_filenum;
277 incl_file->file = yyin;
278 incl_file->prev = incl_file_stack;
279
280 incl_file_stack = incl_file;
281
282 /*
283 * Establish new context.
284 */
285 srcpos_filenum = lookup_file_name(filename, 0);
286 yylineno = 1;
287 yyin = f;
288 yy_switch_to_buffer(yy_create_buffer(yyin, YY_BUF_SIZE));
289
290 return 1;
291}
292
293
294int pop_input_file(void)
295{
296 struct incl_file *incl_file;
297
298 if (incl_file_stack == 0)
299 return 0;
300
301 fclose(yyin);
302
303 /*
304 * Pop.
305 */
306 --incl_depth;
307 incl_file = incl_file_stack;
308 incl_file_stack = incl_file->prev;
309
310 /*
311 * Recover old context.
312 */
313 yy_delete_buffer(YY_CURRENT_BUFFER);
314 yy_switch_to_buffer(incl_file->yy_prev_buf);
315 yylineno = incl_file->yy_prev_lineno;
316 srcpos_filenum = incl_file->filenum;
317 yyin = incl_file->file;
318
319 /*
320 * Free old state.
321 */
322 free(incl_file);
323
324 if (YY_CURRENT_BUFFER == 0)
325 return 0;
326
327 return 1;
328}
diff --git a/arch/powerpc/boot/dtc-src/dtc-lexer.lex.c_shipped b/arch/powerpc/boot/dtc-src/dtc-lexer.lex.c_shipped
new file mode 100644
index 000000000000..d0f742460f92
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/dtc-lexer.lex.c_shipped
@@ -0,0 +1,2174 @@
1#line 2 "dtc-lexer.lex.c"
2
3#line 4 "dtc-lexer.lex.c"
4
5#define YY_INT_ALIGNED short int
6
7/* A lexical scanner generated by flex */
8
9#define FLEX_SCANNER
10#define YY_FLEX_MAJOR_VERSION 2
11#define YY_FLEX_MINOR_VERSION 5
12#define YY_FLEX_SUBMINOR_VERSION 33
13#if YY_FLEX_SUBMINOR_VERSION > 0
14#define FLEX_BETA
15#endif
16
17/* First, we deal with platform-specific or compiler-specific issues. */
18
19/* begin standard C headers. */
20#include <stdio.h>
21#include <string.h>
22#include <errno.h>
23#include <stdlib.h>
24
25/* end standard C headers. */
26
27/* flex integer type definitions */
28
29#ifndef FLEXINT_H
30#define FLEXINT_H
31
32/* C99 systems have <inttypes.h>. Non-C99 systems may or may not. */
33
34#if __STDC_VERSION__ >= 199901L
35
36/* C99 says to define __STDC_LIMIT_MACROS before including stdint.h,
37 * if you want the limit (max/min) macros for int types.
38 */
39#ifndef __STDC_LIMIT_MACROS
40#define __STDC_LIMIT_MACROS 1
41#endif
42
43#include <inttypes.h>
44typedef int8_t flex_int8_t;
45typedef uint8_t flex_uint8_t;
46typedef int16_t flex_int16_t;
47typedef uint16_t flex_uint16_t;
48typedef int32_t flex_int32_t;
49typedef uint32_t flex_uint32_t;
50#else
51typedef signed char flex_int8_t;
52typedef short int flex_int16_t;
53typedef int flex_int32_t;
54typedef unsigned char flex_uint8_t;
55typedef unsigned short int flex_uint16_t;
56typedef unsigned int flex_uint32_t;
57#endif /* ! C99 */
58
59/* Limits of integral types. */
60#ifndef INT8_MIN
61#define INT8_MIN (-128)
62#endif
63#ifndef INT16_MIN
64#define INT16_MIN (-32767-1)
65#endif
66#ifndef INT32_MIN
67#define INT32_MIN (-2147483647-1)
68#endif
69#ifndef INT8_MAX
70#define INT8_MAX (127)
71#endif
72#ifndef INT16_MAX
73#define INT16_MAX (32767)
74#endif
75#ifndef INT32_MAX
76#define INT32_MAX (2147483647)
77#endif
78#ifndef UINT8_MAX
79#define UINT8_MAX (255U)
80#endif
81#ifndef UINT16_MAX
82#define UINT16_MAX (65535U)
83#endif
84#ifndef UINT32_MAX
85#define UINT32_MAX (4294967295U)
86#endif
87
88#endif /* ! FLEXINT_H */
89
90#ifdef __cplusplus
91
92/* The "const" storage-class-modifier is valid. */
93#define YY_USE_CONST
94
95#else /* ! __cplusplus */
96
97#if __STDC__
98
99#define YY_USE_CONST
100
101#endif /* __STDC__ */
102#endif /* ! __cplusplus */
103
104#ifdef YY_USE_CONST
105#define yyconst const
106#else
107#define yyconst
108#endif
109
110/* Returned upon end-of-file. */
111#define YY_NULL 0
112
113/* Promotes a possibly negative, possibly signed char to an unsigned
114 * integer for use as an array index. If the signed char is negative,
115 * we want to instead treat it as an 8-bit unsigned char, hence the
116 * double cast.
117 */
118#define YY_SC_TO_UI(c) ((unsigned int) (unsigned char) c)
119
120/* Enter a start condition. This macro really ought to take a parameter,
121 * but we do it the disgusting crufty way forced on us by the ()-less
122 * definition of BEGIN.
123 */
124#define BEGIN (yy_start) = 1 + 2 *
125
126/* Translate the current start state into a value that can be later handed
127 * to BEGIN to return to the state. The YYSTATE alias is for lex
128 * compatibility.
129 */
130#define YY_START (((yy_start) - 1) / 2)
131#define YYSTATE YY_START
132
133/* Action number for EOF rule of a given start state. */
134#define YY_STATE_EOF(state) (YY_END_OF_BUFFER + state + 1)
135
136/* Special action meaning "start processing a new file". */
137#define YY_NEW_FILE yyrestart(yyin )
138
139#define YY_END_OF_BUFFER_CHAR 0
140
141/* Size of default input buffer. */
142#ifndef YY_BUF_SIZE
143#define YY_BUF_SIZE 16384
144#endif
145
146/* The state buf must be large enough to hold one state per character in the main buffer.
147 */
148#define YY_STATE_BUF_SIZE ((YY_BUF_SIZE + 2) * sizeof(yy_state_type))
149
150#ifndef YY_TYPEDEF_YY_BUFFER_STATE
151#define YY_TYPEDEF_YY_BUFFER_STATE
152typedef struct yy_buffer_state *YY_BUFFER_STATE;
153#endif
154
155extern int yyleng;
156
157extern FILE *yyin, *yyout;
158
159#define EOB_ACT_CONTINUE_SCAN 0
160#define EOB_ACT_END_OF_FILE 1
161#define EOB_ACT_LAST_MATCH 2
162
163 /* Note: We specifically omit the test for yy_rule_can_match_eol because it requires
164 * access to the local variable yy_act. Since yyless() is a macro, it would break
165 * existing scanners that call yyless() from OUTSIDE yylex.
166 * One obvious solution it to make yy_act a global. I tried that, and saw
167 * a 5% performance hit in a non-yylineno scanner, because yy_act is
168 * normally declared as a register variable-- so it is not worth it.
169 */
170 #define YY_LESS_LINENO(n) \
171 do { \
172 int yyl;\
173 for ( yyl = n; yyl < yyleng; ++yyl )\
174 if ( yytext[yyl] == '\n' )\
175 --yylineno;\
176 }while(0)
177
178/* Return all but the first "n" matched characters back to the input stream. */
179#define yyless(n) \
180 do \
181 { \
182 /* Undo effects of setting up yytext. */ \
183 int yyless_macro_arg = (n); \
184 YY_LESS_LINENO(yyless_macro_arg);\
185 *yy_cp = (yy_hold_char); \
186 YY_RESTORE_YY_MORE_OFFSET \
187 (yy_c_buf_p) = yy_cp = yy_bp + yyless_macro_arg - YY_MORE_ADJ; \
188 YY_DO_BEFORE_ACTION; /* set up yytext again */ \
189 } \
190 while ( 0 )
191
192#define unput(c) yyunput( c, (yytext_ptr) )
193
194/* The following is because we cannot portably get our hands on size_t
195 * (without autoconf's help, which isn't available because we want
196 * flex-generated scanners to compile on their own).
197 */
198
199#ifndef YY_TYPEDEF_YY_SIZE_T
200#define YY_TYPEDEF_YY_SIZE_T
201typedef unsigned int yy_size_t;
202#endif
203
204#ifndef YY_STRUCT_YY_BUFFER_STATE
205#define YY_STRUCT_YY_BUFFER_STATE
206struct yy_buffer_state
207 {
208 FILE *yy_input_file;
209
210 char *yy_ch_buf; /* input buffer */
211 char *yy_buf_pos; /* current position in input buffer */
212
213 /* Size of input buffer in bytes, not including room for EOB
214 * characters.
215 */
216 yy_size_t yy_buf_size;
217
218 /* Number of characters read into yy_ch_buf, not including EOB
219 * characters.
220 */
221 int yy_n_chars;
222
223 /* Whether we "own" the buffer - i.e., we know we created it,
224 * and can realloc() it to grow it, and should free() it to
225 * delete it.
226 */
227 int yy_is_our_buffer;
228
229 /* Whether this is an "interactive" input source; if so, and
230 * if we're using stdio for input, then we want to use getc()
231 * instead of fread(), to make sure we stop fetching input after
232 * each newline.
233 */
234 int yy_is_interactive;
235
236 /* Whether we're considered to be at the beginning of a line.
237 * If so, '^' rules will be active on the next match, otherwise
238 * not.
239 */
240 int yy_at_bol;
241
242 int yy_bs_lineno; /**< The line count. */
243 int yy_bs_column; /**< The column count. */
244
245 /* Whether to try to fill the input buffer when we reach the
246 * end of it.
247 */
248 int yy_fill_buffer;
249
250 int yy_buffer_status;
251
252#define YY_BUFFER_NEW 0
253#define YY_BUFFER_NORMAL 1
254 /* When an EOF's been seen but there's still some text to process
255 * then we mark the buffer as YY_EOF_PENDING, to indicate that we
256 * shouldn't try reading from the input source any more. We might
257 * still have a bunch of tokens to match, though, because of
258 * possible backing-up.
259 *
260 * When we actually see the EOF, we change the status to "new"
261 * (via yyrestart()), so that the user can continue scanning by
262 * just pointing yyin at a new input file.
263 */
264#define YY_BUFFER_EOF_PENDING 2
265
266 };
267#endif /* !YY_STRUCT_YY_BUFFER_STATE */
268
269/* Stack of input buffers. */
270static size_t yy_buffer_stack_top = 0; /**< index of top of stack. */
271static size_t yy_buffer_stack_max = 0; /**< capacity of stack. */
272static YY_BUFFER_STATE * yy_buffer_stack = 0; /**< Stack as an array. */
273
274/* We provide macros for accessing buffer states in case in the
275 * future we want to put the buffer states in a more general
276 * "scanner state".
277 *
278 * Returns the top of the stack, or NULL.
279 */
280#define YY_CURRENT_BUFFER ( (yy_buffer_stack) \
281 ? (yy_buffer_stack)[(yy_buffer_stack_top)] \
282 : NULL)
283
284/* Same as previous macro, but useful when we know that the buffer stack is not
285 * NULL or when we need an lvalue. For internal use only.
286 */
287#define YY_CURRENT_BUFFER_LVALUE (yy_buffer_stack)[(yy_buffer_stack_top)]
288
289/* yy_hold_char holds the character lost when yytext is formed. */
290static char yy_hold_char;
291static int yy_n_chars; /* number of characters read into yy_ch_buf */
292int yyleng;
293
294/* Points to current character in buffer. */
295static char *yy_c_buf_p = (char *) 0;
296static int yy_init = 0; /* whether we need to initialize */
297static int yy_start = 0; /* start state number */
298
299/* Flag which is used to allow yywrap()'s to do buffer switches
300 * instead of setting up a fresh yyin. A bit of a hack ...
301 */
302static int yy_did_buffer_switch_on_eof;
303
304void yyrestart (FILE *input_file );
305void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer );
306YY_BUFFER_STATE yy_create_buffer (FILE *file,int size );
307void yy_delete_buffer (YY_BUFFER_STATE b );
308void yy_flush_buffer (YY_BUFFER_STATE b );
309void yypush_buffer_state (YY_BUFFER_STATE new_buffer );
310void yypop_buffer_state (void );
311
312static void yyensure_buffer_stack (void );
313static void yy_load_buffer_state (void );
314static void yy_init_buffer (YY_BUFFER_STATE b,FILE *file );
315
316#define YY_FLUSH_BUFFER yy_flush_buffer(YY_CURRENT_BUFFER )
317
318YY_BUFFER_STATE yy_scan_buffer (char *base,yy_size_t size );
319YY_BUFFER_STATE yy_scan_string (yyconst char *yy_str );
320YY_BUFFER_STATE yy_scan_bytes (yyconst char *bytes,int len );
321
322void *yyalloc (yy_size_t );
323void *yyrealloc (void *,yy_size_t );
324void yyfree (void * );
325
326#define yy_new_buffer yy_create_buffer
327
328#define yy_set_interactive(is_interactive) \
329 { \
330 if ( ! YY_CURRENT_BUFFER ){ \
331 yyensure_buffer_stack (); \
332 YY_CURRENT_BUFFER_LVALUE = \
333 yy_create_buffer(yyin,YY_BUF_SIZE ); \
334 } \
335 YY_CURRENT_BUFFER_LVALUE->yy_is_interactive = is_interactive; \
336 }
337
338#define yy_set_bol(at_bol) \
339 { \
340 if ( ! YY_CURRENT_BUFFER ){\
341 yyensure_buffer_stack (); \
342 YY_CURRENT_BUFFER_LVALUE = \
343 yy_create_buffer(yyin,YY_BUF_SIZE ); \
344 } \
345 YY_CURRENT_BUFFER_LVALUE->yy_at_bol = at_bol; \
346 }
347
348#define YY_AT_BOL() (YY_CURRENT_BUFFER_LVALUE->yy_at_bol)
349
350/* Begin user sect3 */
351
352#define yywrap() 1
353#define YY_SKIP_YYWRAP
354
355typedef unsigned char YY_CHAR;
356
357FILE *yyin = (FILE *) 0, *yyout = (FILE *) 0;
358
359typedef int yy_state_type;
360
361extern int yylineno;
362
363int yylineno = 1;
364
365extern char *yytext;
366#define yytext_ptr yytext
367
368static yy_state_type yy_get_previous_state (void );
369static yy_state_type yy_try_NUL_trans (yy_state_type current_state );
370static int yy_get_next_buffer (void );
371static void yy_fatal_error (yyconst char msg[] );
372
373/* Done after the current pattern has been matched and before the
374 * corresponding action - sets up yytext.
375 */
376#define YY_DO_BEFORE_ACTION \
377 (yytext_ptr) = yy_bp; \
378 yyleng = (size_t) (yy_cp - yy_bp); \
379 (yy_hold_char) = *yy_cp; \
380 *yy_cp = '\0'; \
381 (yy_c_buf_p) = yy_cp;
382
383#define YY_NUM_RULES 20
384#define YY_END_OF_BUFFER 21
385/* This struct is not used in this scanner,
386 but its presence is necessary. */
387struct yy_trans_info
388 {
389 flex_int32_t yy_verify;
390 flex_int32_t yy_nxt;
391 };
392static yyconst flex_int16_t yy_accept[94] =
393 { 0,
394 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
395 21, 19, 16, 16, 19, 19, 19, 8, 8, 19,
396 8, 19, 19, 19, 19, 14, 15, 15, 19, 9,
397 9, 16, 0, 3, 0, 0, 10, 0, 0, 0,
398 0, 0, 0, 8, 8, 6, 0, 7, 0, 2,
399 0, 13, 13, 15, 15, 9, 0, 12, 10, 0,
400 0, 0, 0, 18, 0, 0, 0, 2, 9, 0,
401 17, 0, 0, 0, 11, 0, 0, 0, 0, 0,
402 0, 0, 0, 0, 4, 0, 0, 1, 0, 0,
403 0, 5, 0
404
405 } ;
406
407static yyconst flex_int32_t yy_ec[256] =
408 { 0,
409 1, 1, 1, 1, 1, 1, 1, 1, 2, 3,
410 2, 2, 2, 1, 1, 1, 1, 1, 1, 1,
411 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
412 1, 2, 1, 4, 5, 1, 1, 6, 1, 1,
413 1, 7, 8, 8, 9, 8, 10, 11, 12, 13,
414 13, 13, 13, 13, 13, 13, 13, 14, 1, 1,
415 1, 1, 8, 8, 15, 15, 15, 15, 15, 15,
416 16, 16, 16, 16, 16, 16, 16, 16, 16, 16,
417 16, 16, 16, 16, 16, 16, 16, 17, 16, 16,
418 1, 18, 19, 1, 16, 1, 15, 20, 21, 22,
419
420 23, 15, 16, 24, 25, 16, 16, 26, 27, 28,
421 24, 16, 16, 29, 30, 31, 32, 33, 16, 17,
422 16, 16, 34, 1, 35, 1, 1, 1, 1, 1,
423 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
424 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
425 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
426 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
427 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
428 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
429 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
430
431 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
432 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
433 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
434 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
435 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
436 1, 1, 1, 1, 1
437 } ;
438
439static yyconst flex_int32_t yy_meta[36] =
440 { 0,
441 1, 1, 1, 1, 2, 1, 2, 2, 2, 3,
442 4, 4, 4, 5, 6, 7, 7, 1, 1, 6,
443 6, 6, 6, 7, 7, 7, 7, 7, 7, 7,
444 7, 7, 7, 8, 1
445 } ;
446
447static yyconst flex_int16_t yy_base[107] =
448 { 0,
449 0, 0, 32, 0, 53, 0, 76, 0, 108, 111,
450 280, 288, 37, 39, 33, 36, 106, 0, 123, 146,
451 255, 251, 45, 0, 159, 288, 0, 53, 108, 172,
452 114, 127, 158, 288, 245, 0, 0, 234, 235, 236,
453 197, 195, 199, 0, 0, 288, 0, 288, 160, 288,
454 183, 288, 0, 0, 183, 182, 0, 0, 0, 0,
455 204, 189, 207, 288, 179, 187, 180, 194, 0, 171,
456 288, 196, 178, 174, 288, 169, 169, 177, 165, 153,
457 143, 155, 137, 118, 288, 122, 42, 288, 36, 36,
458 40, 288, 288, 212, 218, 223, 229, 234, 239, 245,
459
460 251, 255, 262, 270, 275, 280
461 } ;
462
463static yyconst flex_int16_t yy_def[107] =
464 { 0,
465 93, 1, 1, 3, 3, 5, 93, 7, 3, 3,
466 93, 93, 93, 93, 94, 95, 93, 96, 93, 19,
467 19, 20, 97, 98, 20, 93, 99, 100, 95, 93,
468 93, 93, 94, 93, 94, 101, 102, 93, 103, 104,
469 93, 93, 93, 96, 19, 93, 20, 93, 97, 93,
470 97, 93, 20, 99, 100, 93, 105, 101, 102, 106,
471 103, 103, 104, 93, 93, 93, 93, 94, 105, 106,
472 93, 93, 93, 93, 93, 93, 93, 93, 93, 93,
473 93, 93, 93, 93, 93, 93, 93, 93, 93, 93,
474 93, 93, 0, 93, 93, 93, 93, 93, 93, 93,
475
476 93, 93, 93, 93, 93, 93
477 } ;
478
479static yyconst flex_int16_t yy_nxt[324] =
480 { 0,
481 12, 13, 14, 15, 12, 16, 12, 12, 12, 17,
482 18, 18, 18, 12, 19, 20, 20, 12, 12, 21,
483 19, 21, 19, 22, 20, 20, 20, 20, 20, 20,
484 20, 20, 20, 12, 12, 23, 34, 12, 32, 32,
485 32, 32, 12, 12, 12, 36, 20, 33, 50, 92,
486 35, 20, 20, 20, 20, 20, 15, 54, 91, 54,
487 54, 54, 51, 24, 24, 24, 46, 25, 90, 38,
488 89, 26, 25, 25, 25, 25, 12, 13, 14, 15,
489 27, 12, 27, 27, 27, 17, 27, 27, 27, 12,
490 28, 28, 28, 12, 12, 28, 28, 28, 28, 28,
491
492 28, 28, 28, 28, 28, 28, 28, 28, 28, 12,
493 12, 15, 39, 29, 15, 40, 29, 93, 30, 31,
494 31, 30, 31, 31, 56, 56, 56, 41, 32, 32,
495 42, 88, 43, 45, 45, 45, 46, 45, 47, 47,
496 87, 38, 45, 45, 45, 45, 47, 47, 47, 47,
497 47, 47, 47, 47, 47, 47, 47, 47, 47, 86,
498 47, 34, 33, 50, 85, 47, 47, 47, 47, 53,
499 53, 53, 84, 53, 83, 35, 82, 51, 53, 53,
500 53, 53, 56, 56, 56, 93, 68, 54, 57, 54,
501 54, 54, 56, 56, 56, 62, 46, 34, 71, 81,
502
503 80, 79, 78, 77, 76, 75, 74, 73, 72, 64,
504 62, 35, 33, 33, 33, 33, 33, 33, 33, 33,
505 37, 67, 66, 37, 37, 37, 44, 65, 44, 49,
506 49, 49, 49, 49, 49, 49, 49, 52, 64, 52,
507 54, 62, 54, 60, 54, 54, 55, 93, 55, 55,
508 55, 55, 58, 58, 58, 48, 58, 58, 59, 48,
509 59, 59, 61, 61, 61, 61, 61, 61, 61, 61,
510 63, 63, 63, 63, 63, 63, 63, 63, 69, 93,
511 69, 70, 70, 70, 93, 70, 70, 11, 93, 93,
512 93, 93, 93, 93, 93, 93, 93, 93, 93, 93,
513
514 93, 93, 93, 93, 93, 93, 93, 93, 93, 93,
515 93, 93, 93, 93, 93, 93, 93, 93, 93, 93,
516 93, 93, 93
517 } ;
518
519static yyconst flex_int16_t yy_chk[324] =
520 { 0,
521 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
522 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
523 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
524 1, 1, 1, 1, 1, 3, 15, 3, 13, 13,
525 14, 14, 3, 3, 3, 16, 3, 23, 23, 91,
526 15, 3, 3, 3, 3, 3, 5, 28, 90, 28,
527 28, 28, 23, 5, 5, 5, 28, 5, 89, 16,
528 87, 5, 5, 5, 5, 5, 7, 7, 7, 7,
529 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
530 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
531
532 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
533 7, 9, 17, 9, 10, 17, 10, 29, 9, 9,
534 9, 10, 10, 10, 31, 31, 31, 17, 32, 32,
535 17, 86, 17, 19, 19, 19, 19, 19, 19, 19,
536 84, 29, 19, 19, 19, 19, 19, 19, 19, 19,
537 19, 19, 19, 19, 19, 19, 20, 20, 20, 83,
538 20, 33, 49, 49, 82, 20, 20, 20, 20, 25,
539 25, 25, 81, 25, 80, 33, 79, 49, 25, 25,
540 25, 25, 30, 30, 30, 51, 51, 55, 30, 55,
541 55, 55, 56, 56, 56, 62, 55, 68, 62, 78,
542
543 77, 76, 74, 73, 72, 70, 67, 66, 65, 63,
544 61, 68, 94, 94, 94, 94, 94, 94, 94, 94,
545 95, 43, 42, 95, 95, 95, 96, 41, 96, 97,
546 97, 97, 97, 97, 97, 97, 97, 98, 40, 98,
547 99, 39, 99, 38, 99, 99, 100, 35, 100, 100,
548 100, 100, 101, 101, 101, 22, 101, 101, 102, 21,
549 102, 102, 103, 103, 103, 103, 103, 103, 103, 103,
550 104, 104, 104, 104, 104, 104, 104, 104, 105, 11,
551 105, 106, 106, 106, 0, 106, 106, 93, 93, 93,
552 93, 93, 93, 93, 93, 93, 93, 93, 93, 93,
553
554 93, 93, 93, 93, 93, 93, 93, 93, 93, 93,
555 93, 93, 93, 93, 93, 93, 93, 93, 93, 93,
556 93, 93, 93
557 } ;
558
559/* Table of booleans, true if rule could match eol. */
560static yyconst flex_int32_t yy_rule_can_match_eol[21] =
561 { 0,
5620, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0,
563 0, };
564
565static yy_state_type yy_last_accepting_state;
566static char *yy_last_accepting_cpos;
567
568extern int yy_flex_debug;
569int yy_flex_debug = 0;
570
571/* The intent behind this definition is that it'll catch
572 * any uses of REJECT which flex missed.
573 */
574#define REJECT reject_used_but_not_detected
575#define yymore() yymore_used_but_not_detected
576#define YY_MORE_ADJ 0
577#define YY_RESTORE_YY_MORE_OFFSET
578char *yytext;
579#line 1 "dtc-lexer.l"
580/*
581 * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005.
582 *
583 *
584 * This program is free software; you can redistribute it and/or
585 * modify it under the terms of the GNU General Public License as
586 * published by the Free Software Foundation; either version 2 of the
587 * License, or (at your option) any later version.
588 *
589 * This program is distributed in the hope that it will be useful,
590 * but WITHOUT ANY WARRANTY; without even the implied warranty of
591 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
592 * General Public License for more details.
593 *
594 * You should have received a copy of the GNU General Public License
595 * along with this program; if not, write to the Free Software
596 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
597 * USA
598 */
599
600
601
602
603#line 33 "dtc-lexer.l"
604#include "dtc.h"
605#include "srcpos.h"
606#include "dtc-parser.tab.h"
607
608
609/*#define LEXDEBUG 1*/
610
611#ifdef LEXDEBUG
612#define DPRINT(fmt, ...) fprintf(stderr, fmt, ##__VA_ARGS__)
613#else
614#define DPRINT(fmt, ...) do { } while (0)
615#endif
616
617static int dts_version; /* = 0 */
618
619#define BEGIN_DEFAULT() if (dts_version == 0) { \
620 DPRINT("<INITIAL>\n"); \
621 BEGIN(INITIAL); \
622 } else { \
623 DPRINT("<V1>\n"); \
624 BEGIN(V1); \
625 }
626#line 627 "dtc-lexer.lex.c"
627
628#define INITIAL 0
629#define INCLUDE 1
630#define BYTESTRING 2
631#define PROPNODENAME 3
632#define V1 4
633
634#ifndef YY_NO_UNISTD_H
635/* Special case for "unistd.h", since it is non-ANSI. We include it way
636 * down here because we want the user's section 1 to have been scanned first.
637 * The user has a chance to override it with an option.
638 */
639#include <unistd.h>
640#endif
641
642#ifndef YY_EXTRA_TYPE
643#define YY_EXTRA_TYPE void *
644#endif
645
646static int yy_init_globals (void );
647
648/* Macros after this point can all be overridden by user definitions in
649 * section 1.
650 */
651
652#ifndef YY_SKIP_YYWRAP
653#ifdef __cplusplus
654extern "C" int yywrap (void );
655#else
656extern int yywrap (void );
657#endif
658#endif
659
660#ifndef yytext_ptr
661static void yy_flex_strncpy (char *,yyconst char *,int );
662#endif
663
664#ifdef YY_NEED_STRLEN
665static int yy_flex_strlen (yyconst char * );
666#endif
667
668#ifndef YY_NO_INPUT
669
670#ifdef __cplusplus
671static int yyinput (void );
672#else
673static int input (void );
674#endif
675
676#endif
677
678/* Amount of stuff to slurp up with each read. */
679#ifndef YY_READ_BUF_SIZE
680#define YY_READ_BUF_SIZE 8192
681#endif
682
683/* Copy whatever the last rule matched to the standard output. */
684#ifndef ECHO
685/* This used to be an fputs(), but since the string might contain NUL's,
686 * we now use fwrite().
687 */
688#define ECHO (void) fwrite( yytext, yyleng, 1, yyout )
689#endif
690
691/* Gets input and stuffs it into "buf". number of characters read, or YY_NULL,
692 * is returned in "result".
693 */
694#ifndef YY_INPUT
695#define YY_INPUT(buf,result,max_size) \
696 if ( YY_CURRENT_BUFFER_LVALUE->yy_is_interactive ) \
697 { \
698 int c = '*'; \
699 size_t n; \
700 for ( n = 0; n < max_size && \
701 (c = getc( yyin )) != EOF && c != '\n'; ++n ) \
702 buf[n] = (char) c; \
703 if ( c == '\n' ) \
704 buf[n++] = (char) c; \
705 if ( c == EOF && ferror( yyin ) ) \
706 YY_FATAL_ERROR( "input in flex scanner failed" ); \
707 result = n; \
708 } \
709 else \
710 { \
711 errno=0; \
712 while ( (result = fread(buf, 1, max_size, yyin))==0 && ferror(yyin)) \
713 { \
714 if( errno != EINTR) \
715 { \
716 YY_FATAL_ERROR( "input in flex scanner failed" ); \
717 break; \
718 } \
719 errno=0; \
720 clearerr(yyin); \
721 } \
722 }\
723\
724
725#endif
726
727/* No semi-colon after return; correct usage is to write "yyterminate();" -
728 * we don't want an extra ';' after the "return" because that will cause
729 * some compilers to complain about unreachable statements.
730 */
731#ifndef yyterminate
732#define yyterminate() return YY_NULL
733#endif
734
735/* Number of entries by which start-condition stack grows. */
736#ifndef YY_START_STACK_INCR
737#define YY_START_STACK_INCR 25
738#endif
739
740/* Report a fatal error. */
741#ifndef YY_FATAL_ERROR
742#define YY_FATAL_ERROR(msg) yy_fatal_error( msg )
743#endif
744
745/* end tables serialization structures and prototypes */
746
747/* Default declaration of generated scanner - a define so the user can
748 * easily add parameters.
749 */
750#ifndef YY_DECL
751#define YY_DECL_IS_OURS 1
752
753extern int yylex (void);
754
755#define YY_DECL int yylex (void)
756#endif /* !YY_DECL */
757
758/* Code executed at the beginning of each rule, after yytext and yyleng
759 * have been set up.
760 */
761#ifndef YY_USER_ACTION
762#define YY_USER_ACTION
763#endif
764
765/* Code executed at the end of each rule. */
766#ifndef YY_BREAK
767#define YY_BREAK break;
768#endif
769
770#define YY_RULE_SETUP \
771 YY_USER_ACTION
772
773/** The main scanner function which does all the work.
774 */
775YY_DECL
776{
777 register yy_state_type yy_current_state;
778 register char *yy_cp, *yy_bp;
779 register int yy_act;
780
781#line 57 "dtc-lexer.l"
782
783#line 784 "dtc-lexer.lex.c"
784
785 if ( !(yy_init) )
786 {
787 (yy_init) = 1;
788
789#ifdef YY_USER_INIT
790 YY_USER_INIT;
791#endif
792
793 if ( ! (yy_start) )
794 (yy_start) = 1; /* first start state */
795
796 if ( ! yyin )
797 yyin = stdin;
798
799 if ( ! yyout )
800 yyout = stdout;
801
802 if ( ! YY_CURRENT_BUFFER ) {
803 yyensure_buffer_stack ();
804 YY_CURRENT_BUFFER_LVALUE =
805 yy_create_buffer(yyin,YY_BUF_SIZE );
806 }
807
808 yy_load_buffer_state( );
809 }
810
811 while ( 1 ) /* loops until end-of-file is reached */
812 {
813 yy_cp = (yy_c_buf_p);
814
815 /* Support of yytext. */
816 *yy_cp = (yy_hold_char);
817
818 /* yy_bp points to the position in yy_ch_buf of the start of
819 * the current run.
820 */
821 yy_bp = yy_cp;
822
823 yy_current_state = (yy_start);
824yy_match:
825 do
826 {
827 register YY_CHAR yy_c = yy_ec[YY_SC_TO_UI(*yy_cp)];
828 if ( yy_accept[yy_current_state] )
829 {
830 (yy_last_accepting_state) = yy_current_state;
831 (yy_last_accepting_cpos) = yy_cp;
832 }
833 while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
834 {
835 yy_current_state = (int) yy_def[yy_current_state];
836 if ( yy_current_state >= 94 )
837 yy_c = yy_meta[(unsigned int) yy_c];
838 }
839 yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
840 ++yy_cp;
841 }
842 while ( yy_base[yy_current_state] != 288 );
843
844yy_find_action:
845 yy_act = yy_accept[yy_current_state];
846 if ( yy_act == 0 )
847 { /* have to back up */
848 yy_cp = (yy_last_accepting_cpos);
849 yy_current_state = (yy_last_accepting_state);
850 yy_act = yy_accept[yy_current_state];
851 }
852
853 YY_DO_BEFORE_ACTION;
854
855 if ( yy_act != YY_END_OF_BUFFER && yy_rule_can_match_eol[yy_act] )
856 {
857 int yyl;
858 for ( yyl = 0; yyl < yyleng; ++yyl )
859 if ( yytext[yyl] == '\n' )
860
861 yylineno++;
862;
863 }
864
865do_action: /* This label is used only to access EOF actions. */
866
867 switch ( yy_act )
868 { /* beginning of action switch */
869 case 0: /* must back up */
870 /* undo the effects of YY_DO_BEFORE_ACTION */
871 *yy_cp = (yy_hold_char);
872 yy_cp = (yy_last_accepting_cpos);
873 yy_current_state = (yy_last_accepting_state);
874 goto yy_find_action;
875
876case 1:
877YY_RULE_SETUP
878#line 58 "dtc-lexer.l"
879BEGIN(INCLUDE);
880 YY_BREAK
881case 2:
882YY_RULE_SETUP
883#line 60 "dtc-lexer.l"
884{
885 yytext[strlen(yytext) - 1] = 0;
886 if (!push_input_file(yytext + 1)) {
887 /* Some unrecoverable error.*/
888 exit(1);
889 }
890 BEGIN_DEFAULT();
891 }
892 YY_BREAK
893case YY_STATE_EOF(INITIAL):
894case YY_STATE_EOF(INCLUDE):
895case YY_STATE_EOF(BYTESTRING):
896case YY_STATE_EOF(PROPNODENAME):
897case YY_STATE_EOF(V1):
898#line 70 "dtc-lexer.l"
899{
900 if (!pop_input_file()) {
901 yyterminate();
902 }
903 }
904 YY_BREAK
905case 3:
906/* rule 3 can match eol */
907YY_RULE_SETUP
908#line 76 "dtc-lexer.l"
909{
910 yylloc.filenum = srcpos_filenum;
911 yylloc.first_line = yylineno;
912 DPRINT("String: %s\n", yytext);
913 yylval.data = data_copy_escape_string(yytext+1,
914 yyleng-2);
915 yylloc.first_line = yylineno;
916 return DT_STRING;
917 }
918 YY_BREAK
919case 4:
920YY_RULE_SETUP
921#line 86 "dtc-lexer.l"
922{
923 yylloc.filenum = srcpos_filenum;
924 yylloc.first_line = yylineno;
925 DPRINT("Keyword: /dts-v1/\n");
926 dts_version = 1;
927 BEGIN_DEFAULT();
928 return DT_V1;
929 }
930 YY_BREAK
931case 5:
932YY_RULE_SETUP
933#line 95 "dtc-lexer.l"
934{
935 yylloc.filenum = srcpos_filenum;
936 yylloc.first_line = yylineno;
937 DPRINT("Keyword: /memreserve/\n");
938 BEGIN_DEFAULT();
939 return DT_MEMRESERVE;
940 }
941 YY_BREAK
942case 6:
943YY_RULE_SETUP
944#line 103 "dtc-lexer.l"
945{
946 yylloc.filenum = srcpos_filenum;
947 yylloc.first_line = yylineno;
948 DPRINT("Label: %s\n", yytext);
949 yylval.labelref = strdup(yytext);
950 yylval.labelref[yyleng-1] = '\0';
951 return DT_LABEL;
952 }
953 YY_BREAK
954case 7:
955YY_RULE_SETUP
956#line 112 "dtc-lexer.l"
957{
958 yylloc.filenum = srcpos_filenum;
959 yylloc.first_line = yylineno;
960 if (*yytext == 'b')
961 yylval.cbase = 2;
962 else if (*yytext == 'o')
963 yylval.cbase = 8;
964 else if (*yytext == 'd')
965 yylval.cbase = 10;
966 else
967 yylval.cbase = 16;
968 DPRINT("Base: %d\n", yylval.cbase);
969 return DT_BASE;
970 }
971 YY_BREAK
972case 8:
973YY_RULE_SETUP
974#line 127 "dtc-lexer.l"
975{
976 yylloc.filenum = srcpos_filenum;
977 yylloc.first_line = yylineno;
978 yylval.literal = strdup(yytext);
979 DPRINT("Literal: '%s'\n", yylval.literal);
980 return DT_LEGACYLITERAL;
981 }
982 YY_BREAK
983case 9:
984YY_RULE_SETUP
985#line 135 "dtc-lexer.l"
986{
987 yylloc.filenum = srcpos_filenum;
988 yylloc.first_line = yylineno;
989 yylval.literal = strdup(yytext);
990 DPRINT("Literal: '%s'\n", yylval.literal);
991 return DT_LITERAL;
992 }
993 YY_BREAK
994case 10:
995YY_RULE_SETUP
996#line 143 "dtc-lexer.l"
997{ /* label reference */
998 yylloc.filenum = srcpos_filenum;
999 yylloc.first_line = yylineno;
1000 DPRINT("Ref: %s\n", yytext+1);
1001 yylval.labelref = strdup(yytext+1);
1002 return DT_REF;
1003 }
1004 YY_BREAK
1005case 11:
1006YY_RULE_SETUP
1007#line 151 "dtc-lexer.l"
1008{ /* new-style path reference */
1009 yylloc.filenum = srcpos_filenum;
1010 yylloc.first_line = yylineno;
1011 yytext[yyleng-1] = '\0';
1012 DPRINT("Ref: %s\n", yytext+2);
1013 yylval.labelref = strdup(yytext+2);
1014 return DT_REF;
1015 }
1016 YY_BREAK
1017case 12:
1018YY_RULE_SETUP
1019#line 160 "dtc-lexer.l"
1020{ /* old-style path reference */
1021 yylloc.filenum = srcpos_filenum;
1022 yylloc.first_line = yylineno;
1023 DPRINT("Ref: %s\n", yytext+1);
1024 yylval.labelref = strdup(yytext+1);
1025 return DT_REF;
1026 }
1027 YY_BREAK
1028case 13:
1029YY_RULE_SETUP
1030#line 168 "dtc-lexer.l"
1031{
1032 yylloc.filenum = srcpos_filenum;
1033 yylloc.first_line = yylineno;
1034 yylval.byte = strtol(yytext, NULL, 16);
1035 DPRINT("Byte: %02x\n", (int)yylval.byte);
1036 return DT_BYTE;
1037 }
1038 YY_BREAK
1039case 14:
1040YY_RULE_SETUP
1041#line 176 "dtc-lexer.l"
1042{
1043 yylloc.filenum = srcpos_filenum;
1044 yylloc.first_line = yylineno;
1045 DPRINT("/BYTESTRING\n");
1046 BEGIN_DEFAULT();
1047 return ']';
1048 }
1049 YY_BREAK
1050case 15:
1051YY_RULE_SETUP
1052#line 184 "dtc-lexer.l"
1053{
1054 yylloc.filenum = srcpos_filenum;
1055 yylloc.first_line = yylineno;
1056 DPRINT("PropNodeName: %s\n", yytext);
1057 yylval.propnodename = strdup(yytext);
1058 BEGIN_DEFAULT();
1059 return DT_PROPNODENAME;
1060 }
1061 YY_BREAK
1062case 16:
1063/* rule 16 can match eol */
1064YY_RULE_SETUP
1065#line 194 "dtc-lexer.l"
1066/* eat whitespace */
1067 YY_BREAK
1068case 17:
1069/* rule 17 can match eol */
1070YY_RULE_SETUP
1071#line 196 "dtc-lexer.l"
1072{
1073 yylloc.filenum = srcpos_filenum;
1074 yylloc.first_line = yylineno;
1075 DPRINT("Comment: %s\n", yytext);
1076 /* eat comments */
1077 }
1078 YY_BREAK
1079case 18:
1080/* rule 18 can match eol */
1081YY_RULE_SETUP
1082#line 203 "dtc-lexer.l"
1083/* eat line comments */
1084 YY_BREAK
1085case 19:
1086YY_RULE_SETUP
1087#line 205 "dtc-lexer.l"
1088{
1089 yylloc.filenum = srcpos_filenum;
1090 yylloc.first_line = yylineno;
1091 DPRINT("Char: %c (\\x%02x)\n", yytext[0],
1092 (unsigned)yytext[0]);
1093 if (yytext[0] == '[') {
1094 DPRINT("<BYTESTRING>\n");
1095 BEGIN(BYTESTRING);
1096 }
1097 if ((yytext[0] == '{')
1098 || (yytext[0] == ';')) {
1099 DPRINT("<PROPNODENAME>\n");
1100 BEGIN(PROPNODENAME);
1101 }
1102 return yytext[0];
1103 }
1104 YY_BREAK
1105case 20:
1106YY_RULE_SETUP
1107#line 222 "dtc-lexer.l"
1108ECHO;
1109 YY_BREAK
1110#line 1111 "dtc-lexer.lex.c"
1111
1112 case YY_END_OF_BUFFER:
1113 {
1114 /* Amount of text matched not including the EOB char. */
1115 int yy_amount_of_matched_text = (int) (yy_cp - (yytext_ptr)) - 1;
1116
1117 /* Undo the effects of YY_DO_BEFORE_ACTION. */
1118 *yy_cp = (yy_hold_char);
1119 YY_RESTORE_YY_MORE_OFFSET
1120
1121 if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_NEW )
1122 {
1123 /* We're scanning a new file or input source. It's
1124 * possible that this happened because the user
1125 * just pointed yyin at a new source and called
1126 * yylex(). If so, then we have to assure
1127 * consistency between YY_CURRENT_BUFFER and our
1128 * globals. Here is the right place to do so, because
1129 * this is the first action (other than possibly a
1130 * back-up) that will match for the new input source.
1131 */
1132 (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
1133 YY_CURRENT_BUFFER_LVALUE->yy_input_file = yyin;
1134 YY_CURRENT_BUFFER_LVALUE->yy_buffer_status = YY_BUFFER_NORMAL;
1135 }
1136
1137 /* Note that here we test for yy_c_buf_p "<=" to the position
1138 * of the first EOB in the buffer, since yy_c_buf_p will
1139 * already have been incremented past the NUL character
1140 * (since all states make transitions on EOB to the
1141 * end-of-buffer state). Contrast this with the test
1142 * in input().
1143 */
1144 if ( (yy_c_buf_p) <= &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
1145 { /* This was really a NUL. */
1146 yy_state_type yy_next_state;
1147
1148 (yy_c_buf_p) = (yytext_ptr) + yy_amount_of_matched_text;
1149
1150 yy_current_state = yy_get_previous_state( );
1151
1152 /* Okay, we're now positioned to make the NUL
1153 * transition. We couldn't have
1154 * yy_get_previous_state() go ahead and do it
1155 * for us because it doesn't know how to deal
1156 * with the possibility of jamming (and we don't
1157 * want to build jamming into it because then it
1158 * will run more slowly).
1159 */
1160
1161 yy_next_state = yy_try_NUL_trans( yy_current_state );
1162
1163 yy_bp = (yytext_ptr) + YY_MORE_ADJ;
1164
1165 if ( yy_next_state )
1166 {
1167 /* Consume the NUL. */
1168 yy_cp = ++(yy_c_buf_p);
1169 yy_current_state = yy_next_state;
1170 goto yy_match;
1171 }
1172
1173 else
1174 {
1175 yy_cp = (yy_c_buf_p);
1176 goto yy_find_action;
1177 }
1178 }
1179
1180 else switch ( yy_get_next_buffer( ) )
1181 {
1182 case EOB_ACT_END_OF_FILE:
1183 {
1184 (yy_did_buffer_switch_on_eof) = 0;
1185
1186 if ( yywrap( ) )
1187 {
1188 /* Note: because we've taken care in
1189 * yy_get_next_buffer() to have set up
1190 * yytext, we can now set up
1191 * yy_c_buf_p so that if some total
1192 * hoser (like flex itself) wants to
1193 * call the scanner after we return the
1194 * YY_NULL, it'll still work - another
1195 * YY_NULL will get returned.
1196 */
1197 (yy_c_buf_p) = (yytext_ptr) + YY_MORE_ADJ;
1198
1199 yy_act = YY_STATE_EOF(YY_START);
1200 goto do_action;
1201 }
1202
1203 else
1204 {
1205 if ( ! (yy_did_buffer_switch_on_eof) )
1206 YY_NEW_FILE;
1207 }
1208 break;
1209 }
1210
1211 case EOB_ACT_CONTINUE_SCAN:
1212 (yy_c_buf_p) =
1213 (yytext_ptr) + yy_amount_of_matched_text;
1214
1215 yy_current_state = yy_get_previous_state( );
1216
1217 yy_cp = (yy_c_buf_p);
1218 yy_bp = (yytext_ptr) + YY_MORE_ADJ;
1219 goto yy_match;
1220
1221 case EOB_ACT_LAST_MATCH:
1222 (yy_c_buf_p) =
1223 &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)];
1224
1225 yy_current_state = yy_get_previous_state( );
1226
1227 yy_cp = (yy_c_buf_p);
1228 yy_bp = (yytext_ptr) + YY_MORE_ADJ;
1229 goto yy_find_action;
1230 }
1231 break;
1232 }
1233
1234 default:
1235 YY_FATAL_ERROR(
1236 "fatal flex scanner internal error--no action found" );
1237 } /* end of action switch */
1238 } /* end of scanning one token */
1239} /* end of yylex */
1240
1241/* yy_get_next_buffer - try to read in a new buffer
1242 *
1243 * Returns a code representing an action:
1244 * EOB_ACT_LAST_MATCH -
1245 * EOB_ACT_CONTINUE_SCAN - continue scanning from current position
1246 * EOB_ACT_END_OF_FILE - end of file
1247 */
1248static int yy_get_next_buffer (void)
1249{
1250 register char *dest = YY_CURRENT_BUFFER_LVALUE->yy_ch_buf;
1251 register char *source = (yytext_ptr);
1252 register int number_to_move, i;
1253 int ret_val;
1254
1255 if ( (yy_c_buf_p) > &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] )
1256 YY_FATAL_ERROR(
1257 "fatal flex scanner internal error--end of buffer missed" );
1258
1259 if ( YY_CURRENT_BUFFER_LVALUE->yy_fill_buffer == 0 )
1260 { /* Don't try to fill the buffer, so this is an EOF. */
1261 if ( (yy_c_buf_p) - (yytext_ptr) - YY_MORE_ADJ == 1 )
1262 {
1263 /* We matched a single character, the EOB, so
1264 * treat this as a final EOF.
1265 */
1266 return EOB_ACT_END_OF_FILE;
1267 }
1268
1269 else
1270 {
1271 /* We matched some text prior to the EOB, first
1272 * process it.
1273 */
1274 return EOB_ACT_LAST_MATCH;
1275 }
1276 }
1277
1278 /* Try to read more data. */
1279
1280 /* First move last chars to start of buffer. */
1281 number_to_move = (int) ((yy_c_buf_p) - (yytext_ptr)) - 1;
1282
1283 for ( i = 0; i < number_to_move; ++i )
1284 *(dest++) = *(source++);
1285
1286 if ( YY_CURRENT_BUFFER_LVALUE->yy_buffer_status == YY_BUFFER_EOF_PENDING )
1287 /* don't do the read, it's not guaranteed to return an EOF,
1288 * just force an EOF
1289 */
1290 YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars) = 0;
1291
1292 else
1293 {
1294 int num_to_read =
1295 YY_CURRENT_BUFFER_LVALUE->yy_buf_size - number_to_move - 1;
1296
1297 while ( num_to_read <= 0 )
1298 { /* Not enough room in the buffer - grow it. */
1299
1300 /* just a shorter name for the current buffer */
1301 YY_BUFFER_STATE b = YY_CURRENT_BUFFER;
1302
1303 int yy_c_buf_p_offset =
1304 (int) ((yy_c_buf_p) - b->yy_ch_buf);
1305
1306 if ( b->yy_is_our_buffer )
1307 {
1308 int new_size = b->yy_buf_size * 2;
1309
1310 if ( new_size <= 0 )
1311 b->yy_buf_size += b->yy_buf_size / 8;
1312 else
1313 b->yy_buf_size *= 2;
1314
1315 b->yy_ch_buf = (char *)
1316 /* Include room in for 2 EOB chars. */
1317 yyrealloc((void *) b->yy_ch_buf,b->yy_buf_size + 2 );
1318 }
1319 else
1320 /* Can't grow it, we don't own it. */
1321 b->yy_ch_buf = 0;
1322
1323 if ( ! b->yy_ch_buf )
1324 YY_FATAL_ERROR(
1325 "fatal error - scanner input buffer overflow" );
1326
1327 (yy_c_buf_p) = &b->yy_ch_buf[yy_c_buf_p_offset];
1328
1329 num_to_read = YY_CURRENT_BUFFER_LVALUE->yy_buf_size -
1330 number_to_move - 1;
1331
1332 }
1333
1334 if ( num_to_read > YY_READ_BUF_SIZE )
1335 num_to_read = YY_READ_BUF_SIZE;
1336
1337 /* Read in more data. */
1338 YY_INPUT( (&YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[number_to_move]),
1339 (yy_n_chars), (size_t) num_to_read );
1340
1341 YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
1342 }
1343
1344 if ( (yy_n_chars) == 0 )
1345 {
1346 if ( number_to_move == YY_MORE_ADJ )
1347 {
1348 ret_val = EOB_ACT_END_OF_FILE;
1349 yyrestart(yyin );
1350 }
1351
1352 else
1353 {
1354 ret_val = EOB_ACT_LAST_MATCH;
1355 YY_CURRENT_BUFFER_LVALUE->yy_buffer_status =
1356 YY_BUFFER_EOF_PENDING;
1357 }
1358 }
1359
1360 else
1361 ret_val = EOB_ACT_CONTINUE_SCAN;
1362
1363 (yy_n_chars) += number_to_move;
1364 YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] = YY_END_OF_BUFFER_CHAR;
1365 YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars) + 1] = YY_END_OF_BUFFER_CHAR;
1366
1367 (yytext_ptr) = &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[0];
1368
1369 return ret_val;
1370}
1371
1372/* yy_get_previous_state - get the state just before the EOB char was reached */
1373
1374 static yy_state_type yy_get_previous_state (void)
1375{
1376 register yy_state_type yy_current_state;
1377 register char *yy_cp;
1378
1379 yy_current_state = (yy_start);
1380
1381 for ( yy_cp = (yytext_ptr) + YY_MORE_ADJ; yy_cp < (yy_c_buf_p); ++yy_cp )
1382 {
1383 register YY_CHAR yy_c = (*yy_cp ? yy_ec[YY_SC_TO_UI(*yy_cp)] : 1);
1384 if ( yy_accept[yy_current_state] )
1385 {
1386 (yy_last_accepting_state) = yy_current_state;
1387 (yy_last_accepting_cpos) = yy_cp;
1388 }
1389 while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
1390 {
1391 yy_current_state = (int) yy_def[yy_current_state];
1392 if ( yy_current_state >= 94 )
1393 yy_c = yy_meta[(unsigned int) yy_c];
1394 }
1395 yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
1396 }
1397
1398 return yy_current_state;
1399}
1400
1401/* yy_try_NUL_trans - try to make a transition on the NUL character
1402 *
1403 * synopsis
1404 * next_state = yy_try_NUL_trans( current_state );
1405 */
1406 static yy_state_type yy_try_NUL_trans (yy_state_type yy_current_state )
1407{
1408 register int yy_is_jam;
1409 register char *yy_cp = (yy_c_buf_p);
1410
1411 register YY_CHAR yy_c = 1;
1412 if ( yy_accept[yy_current_state] )
1413 {
1414 (yy_last_accepting_state) = yy_current_state;
1415 (yy_last_accepting_cpos) = yy_cp;
1416 }
1417 while ( yy_chk[yy_base[yy_current_state] + yy_c] != yy_current_state )
1418 {
1419 yy_current_state = (int) yy_def[yy_current_state];
1420 if ( yy_current_state >= 94 )
1421 yy_c = yy_meta[(unsigned int) yy_c];
1422 }
1423 yy_current_state = yy_nxt[yy_base[yy_current_state] + (unsigned int) yy_c];
1424 yy_is_jam = (yy_current_state == 93);
1425
1426 return yy_is_jam ? 0 : yy_current_state;
1427}
1428
1429#ifndef YY_NO_INPUT
1430#ifdef __cplusplus
1431 static int yyinput (void)
1432#else
1433 static int input (void)
1434#endif
1435
1436{
1437 int c;
1438
1439 *(yy_c_buf_p) = (yy_hold_char);
1440
1441 if ( *(yy_c_buf_p) == YY_END_OF_BUFFER_CHAR )
1442 {
1443 /* yy_c_buf_p now points to the character we want to return.
1444 * If this occurs *before* the EOB characters, then it's a
1445 * valid NUL; if not, then we've hit the end of the buffer.
1446 */
1447 if ( (yy_c_buf_p) < &YY_CURRENT_BUFFER_LVALUE->yy_ch_buf[(yy_n_chars)] )
1448 /* This was really a NUL. */
1449 *(yy_c_buf_p) = '\0';
1450
1451 else
1452 { /* need more input */
1453 int offset = (yy_c_buf_p) - (yytext_ptr);
1454 ++(yy_c_buf_p);
1455
1456 switch ( yy_get_next_buffer( ) )
1457 {
1458 case EOB_ACT_LAST_MATCH:
1459 /* This happens because yy_g_n_b()
1460 * sees that we've accumulated a
1461 * token and flags that we need to
1462 * try matching the token before
1463 * proceeding. But for input(),
1464 * there's no matching to consider.
1465 * So convert the EOB_ACT_LAST_MATCH
1466 * to EOB_ACT_END_OF_FILE.
1467 */
1468
1469 /* Reset buffer status. */
1470 yyrestart(yyin );
1471
1472 /*FALLTHROUGH*/
1473
1474 case EOB_ACT_END_OF_FILE:
1475 {
1476 if ( yywrap( ) )
1477 return EOF;
1478
1479 if ( ! (yy_did_buffer_switch_on_eof) )
1480 YY_NEW_FILE;
1481#ifdef __cplusplus
1482 return yyinput();
1483#else
1484 return input();
1485#endif
1486 }
1487
1488 case EOB_ACT_CONTINUE_SCAN:
1489 (yy_c_buf_p) = (yytext_ptr) + offset;
1490 break;
1491 }
1492 }
1493 }
1494
1495 c = *(unsigned char *) (yy_c_buf_p); /* cast for 8-bit char's */
1496 *(yy_c_buf_p) = '\0'; /* preserve yytext */
1497 (yy_hold_char) = *++(yy_c_buf_p);
1498
1499 if ( c == '\n' )
1500
1501 yylineno++;
1502;
1503
1504 return c;
1505}
1506#endif /* ifndef YY_NO_INPUT */
1507
1508/** Immediately switch to a different input stream.
1509 * @param input_file A readable stream.
1510 *
1511 * @note This function does not reset the start condition to @c INITIAL .
1512 */
1513 void yyrestart (FILE * input_file )
1514{
1515
1516 if ( ! YY_CURRENT_BUFFER ){
1517 yyensure_buffer_stack ();
1518 YY_CURRENT_BUFFER_LVALUE =
1519 yy_create_buffer(yyin,YY_BUF_SIZE );
1520 }
1521
1522 yy_init_buffer(YY_CURRENT_BUFFER,input_file );
1523 yy_load_buffer_state( );
1524}
1525
1526/** Switch to a different input buffer.
1527 * @param new_buffer The new input buffer.
1528 *
1529 */
1530 void yy_switch_to_buffer (YY_BUFFER_STATE new_buffer )
1531{
1532
1533 /* TODO. We should be able to replace this entire function body
1534 * with
1535 * yypop_buffer_state();
1536 * yypush_buffer_state(new_buffer);
1537 */
1538 yyensure_buffer_stack ();
1539 if ( YY_CURRENT_BUFFER == new_buffer )
1540 return;
1541
1542 if ( YY_CURRENT_BUFFER )
1543 {
1544 /* Flush out information for old buffer. */
1545 *(yy_c_buf_p) = (yy_hold_char);
1546 YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
1547 YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
1548 }
1549
1550 YY_CURRENT_BUFFER_LVALUE = new_buffer;
1551 yy_load_buffer_state( );
1552
1553 /* We don't actually know whether we did this switch during
1554 * EOF (yywrap()) processing, but the only time this flag
1555 * is looked at is after yywrap() is called, so it's safe
1556 * to go ahead and always set it.
1557 */
1558 (yy_did_buffer_switch_on_eof) = 1;
1559}
1560
1561static void yy_load_buffer_state (void)
1562{
1563 (yy_n_chars) = YY_CURRENT_BUFFER_LVALUE->yy_n_chars;
1564 (yytext_ptr) = (yy_c_buf_p) = YY_CURRENT_BUFFER_LVALUE->yy_buf_pos;
1565 yyin = YY_CURRENT_BUFFER_LVALUE->yy_input_file;
1566 (yy_hold_char) = *(yy_c_buf_p);
1567}
1568
1569/** Allocate and initialize an input buffer state.
1570 * @param file A readable stream.
1571 * @param size The character buffer size in bytes. When in doubt, use @c YY_BUF_SIZE.
1572 *
1573 * @return the allocated buffer state.
1574 */
1575 YY_BUFFER_STATE yy_create_buffer (FILE * file, int size )
1576{
1577 YY_BUFFER_STATE b;
1578
1579 b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) );
1580 if ( ! b )
1581 YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
1582
1583 b->yy_buf_size = size;
1584
1585 /* yy_ch_buf has to be 2 characters longer than the size given because
1586 * we need to put in 2 end-of-buffer characters.
1587 */
1588 b->yy_ch_buf = (char *) yyalloc(b->yy_buf_size + 2 );
1589 if ( ! b->yy_ch_buf )
1590 YY_FATAL_ERROR( "out of dynamic memory in yy_create_buffer()" );
1591
1592 b->yy_is_our_buffer = 1;
1593
1594 yy_init_buffer(b,file );
1595
1596 return b;
1597}
1598
1599/** Destroy the buffer.
1600 * @param b a buffer created with yy_create_buffer()
1601 *
1602 */
1603 void yy_delete_buffer (YY_BUFFER_STATE b )
1604{
1605
1606 if ( ! b )
1607 return;
1608
1609 if ( b == YY_CURRENT_BUFFER ) /* Not sure if we should pop here. */
1610 YY_CURRENT_BUFFER_LVALUE = (YY_BUFFER_STATE) 0;
1611
1612 if ( b->yy_is_our_buffer )
1613 yyfree((void *) b->yy_ch_buf );
1614
1615 yyfree((void *) b );
1616}
1617
1618#ifndef __cplusplus
1619extern int isatty (int );
1620#endif /* __cplusplus */
1621
1622/* Initializes or reinitializes a buffer.
1623 * This function is sometimes called more than once on the same buffer,
1624 * such as during a yyrestart() or at EOF.
1625 */
1626 static void yy_init_buffer (YY_BUFFER_STATE b, FILE * file )
1627
1628{
1629 int oerrno = errno;
1630
1631 yy_flush_buffer(b );
1632
1633 b->yy_input_file = file;
1634 b->yy_fill_buffer = 1;
1635
1636 /* If b is the current buffer, then yy_init_buffer was _probably_
1637 * called from yyrestart() or through yy_get_next_buffer.
1638 * In that case, we don't want to reset the lineno or column.
1639 */
1640 if (b != YY_CURRENT_BUFFER){
1641 b->yy_bs_lineno = 1;
1642 b->yy_bs_column = 0;
1643 }
1644
1645 b->yy_is_interactive = file ? (isatty( fileno(file) ) > 0) : 0;
1646
1647 errno = oerrno;
1648}
1649
1650/** Discard all buffered characters. On the next scan, YY_INPUT will be called.
1651 * @param b the buffer state to be flushed, usually @c YY_CURRENT_BUFFER.
1652 *
1653 */
1654 void yy_flush_buffer (YY_BUFFER_STATE b )
1655{
1656 if ( ! b )
1657 return;
1658
1659 b->yy_n_chars = 0;
1660
1661 /* We always need two end-of-buffer characters. The first causes
1662 * a transition to the end-of-buffer state. The second causes
1663 * a jam in that state.
1664 */
1665 b->yy_ch_buf[0] = YY_END_OF_BUFFER_CHAR;
1666 b->yy_ch_buf[1] = YY_END_OF_BUFFER_CHAR;
1667
1668 b->yy_buf_pos = &b->yy_ch_buf[0];
1669
1670 b->yy_at_bol = 1;
1671 b->yy_buffer_status = YY_BUFFER_NEW;
1672
1673 if ( b == YY_CURRENT_BUFFER )
1674 yy_load_buffer_state( );
1675}
1676
1677/** Pushes the new state onto the stack. The new state becomes
1678 * the current state. This function will allocate the stack
1679 * if necessary.
1680 * @param new_buffer The new state.
1681 *
1682 */
1683void yypush_buffer_state (YY_BUFFER_STATE new_buffer )
1684{
1685 if (new_buffer == NULL)
1686 return;
1687
1688 yyensure_buffer_stack();
1689
1690 /* This block is copied from yy_switch_to_buffer. */
1691 if ( YY_CURRENT_BUFFER )
1692 {
1693 /* Flush out information for old buffer. */
1694 *(yy_c_buf_p) = (yy_hold_char);
1695 YY_CURRENT_BUFFER_LVALUE->yy_buf_pos = (yy_c_buf_p);
1696 YY_CURRENT_BUFFER_LVALUE->yy_n_chars = (yy_n_chars);
1697 }
1698
1699 /* Only push if top exists. Otherwise, replace top. */
1700 if (YY_CURRENT_BUFFER)
1701 (yy_buffer_stack_top)++;
1702 YY_CURRENT_BUFFER_LVALUE = new_buffer;
1703
1704 /* copied from yy_switch_to_buffer. */
1705 yy_load_buffer_state( );
1706 (yy_did_buffer_switch_on_eof) = 1;
1707}
1708
1709/** Removes and deletes the top of the stack, if present.
1710 * The next element becomes the new top.
1711 *
1712 */
1713void yypop_buffer_state (void)
1714{
1715 if (!YY_CURRENT_BUFFER)
1716 return;
1717
1718 yy_delete_buffer(YY_CURRENT_BUFFER );
1719 YY_CURRENT_BUFFER_LVALUE = NULL;
1720 if ((yy_buffer_stack_top) > 0)
1721 --(yy_buffer_stack_top);
1722
1723 if (YY_CURRENT_BUFFER) {
1724 yy_load_buffer_state( );
1725 (yy_did_buffer_switch_on_eof) = 1;
1726 }
1727}
1728
1729/* Allocates the stack if it does not exist.
1730 * Guarantees space for at least one push.
1731 */
1732static void yyensure_buffer_stack (void)
1733{
1734 int num_to_alloc;
1735
1736 if (!(yy_buffer_stack)) {
1737
1738 /* First allocation is just for 2 elements, since we don't know if this
1739 * scanner will even need a stack. We use 2 instead of 1 to avoid an
1740 * immediate realloc on the next call.
1741 */
1742 num_to_alloc = 1;
1743 (yy_buffer_stack) = (struct yy_buffer_state**)yyalloc
1744 (num_to_alloc * sizeof(struct yy_buffer_state*)
1745 );
1746
1747 memset((yy_buffer_stack), 0, num_to_alloc * sizeof(struct yy_buffer_state*));
1748
1749 (yy_buffer_stack_max) = num_to_alloc;
1750 (yy_buffer_stack_top) = 0;
1751 return;
1752 }
1753
1754 if ((yy_buffer_stack_top) >= ((yy_buffer_stack_max)) - 1){
1755
1756 /* Increase the buffer to prepare for a possible push. */
1757 int grow_size = 8 /* arbitrary grow size */;
1758
1759 num_to_alloc = (yy_buffer_stack_max) + grow_size;
1760 (yy_buffer_stack) = (struct yy_buffer_state**)yyrealloc
1761 ((yy_buffer_stack),
1762 num_to_alloc * sizeof(struct yy_buffer_state*)
1763 );
1764
1765 /* zero only the new slots.*/
1766 memset((yy_buffer_stack) + (yy_buffer_stack_max), 0, grow_size * sizeof(struct yy_buffer_state*));
1767 (yy_buffer_stack_max) = num_to_alloc;
1768 }
1769}
1770
1771/** Setup the input buffer state to scan directly from a user-specified character buffer.
1772 * @param base the character buffer
1773 * @param size the size in bytes of the character buffer
1774 *
1775 * @return the newly allocated buffer state object.
1776 */
1777YY_BUFFER_STATE yy_scan_buffer (char * base, yy_size_t size )
1778{
1779 YY_BUFFER_STATE b;
1780
1781 if ( size < 2 ||
1782 base[size-2] != YY_END_OF_BUFFER_CHAR ||
1783 base[size-1] != YY_END_OF_BUFFER_CHAR )
1784 /* They forgot to leave room for the EOB's. */
1785 return 0;
1786
1787 b = (YY_BUFFER_STATE) yyalloc(sizeof( struct yy_buffer_state ) );
1788 if ( ! b )
1789 YY_FATAL_ERROR( "out of dynamic memory in yy_scan_buffer()" );
1790
1791 b->yy_buf_size = size - 2; /* "- 2" to take care of EOB's */
1792 b->yy_buf_pos = b->yy_ch_buf = base;
1793 b->yy_is_our_buffer = 0;
1794 b->yy_input_file = 0;
1795 b->yy_n_chars = b->yy_buf_size;
1796 b->yy_is_interactive = 0;
1797 b->yy_at_bol = 1;
1798 b->yy_fill_buffer = 0;
1799 b->yy_buffer_status = YY_BUFFER_NEW;
1800
1801 yy_switch_to_buffer(b );
1802
1803 return b;
1804}
1805
1806/** Setup the input buffer state to scan a string. The next call to yylex() will
1807 * scan from a @e copy of @a str.
1808 * @param yystr a NUL-terminated string to scan
1809 *
1810 * @return the newly allocated buffer state object.
1811 * @note If you want to scan bytes that may contain NUL values, then use
1812 * yy_scan_bytes() instead.
1813 */
1814YY_BUFFER_STATE yy_scan_string (yyconst char * yystr )
1815{
1816
1817 return yy_scan_bytes(yystr,strlen(yystr) );
1818}
1819
1820/** Setup the input buffer state to scan the given bytes. The next call to yylex() will
1821 * scan from a @e copy of @a bytes.
1822 * @param bytes the byte buffer to scan
1823 * @param len the number of bytes in the buffer pointed to by @a bytes.
1824 *
1825 * @return the newly allocated buffer state object.
1826 */
1827YY_BUFFER_STATE yy_scan_bytes (yyconst char * yybytes, int _yybytes_len )
1828{
1829 YY_BUFFER_STATE b;
1830 char *buf;
1831 yy_size_t n;
1832 int i;
1833
1834 /* Get memory for full buffer, including space for trailing EOB's. */
1835 n = _yybytes_len + 2;
1836 buf = (char *) yyalloc(n );
1837 if ( ! buf )
1838 YY_FATAL_ERROR( "out of dynamic memory in yy_scan_bytes()" );
1839
1840 for ( i = 0; i < _yybytes_len; ++i )
1841 buf[i] = yybytes[i];
1842
1843 buf[_yybytes_len] = buf[_yybytes_len+1] = YY_END_OF_BUFFER_CHAR;
1844
1845 b = yy_scan_buffer(buf,n );
1846 if ( ! b )
1847 YY_FATAL_ERROR( "bad buffer in yy_scan_bytes()" );
1848
1849 /* It's okay to grow etc. this buffer, and we should throw it
1850 * away when we're done.
1851 */
1852 b->yy_is_our_buffer = 1;
1853
1854 return b;
1855}
1856
1857#ifndef YY_EXIT_FAILURE
1858#define YY_EXIT_FAILURE 2
1859#endif
1860
1861static void yy_fatal_error (yyconst char* msg )
1862{
1863 (void) fprintf( stderr, "%s\n", msg );
1864 exit( YY_EXIT_FAILURE );
1865}
1866
1867/* Redefine yyless() so it works in section 3 code. */
1868
1869#undef yyless
1870#define yyless(n) \
1871 do \
1872 { \
1873 /* Undo effects of setting up yytext. */ \
1874 int yyless_macro_arg = (n); \
1875 YY_LESS_LINENO(yyless_macro_arg);\
1876 yytext[yyleng] = (yy_hold_char); \
1877 (yy_c_buf_p) = yytext + yyless_macro_arg; \
1878 (yy_hold_char) = *(yy_c_buf_p); \
1879 *(yy_c_buf_p) = '\0'; \
1880 yyleng = yyless_macro_arg; \
1881 } \
1882 while ( 0 )
1883
1884/* Accessor methods (get/set functions) to struct members. */
1885
1886/** Get the current line number.
1887 *
1888 */
1889int yyget_lineno (void)
1890{
1891
1892 return yylineno;
1893}
1894
1895/** Get the input stream.
1896 *
1897 */
1898FILE *yyget_in (void)
1899{
1900 return yyin;
1901}
1902
1903/** Get the output stream.
1904 *
1905 */
1906FILE *yyget_out (void)
1907{
1908 return yyout;
1909}
1910
1911/** Get the length of the current token.
1912 *
1913 */
1914int yyget_leng (void)
1915{
1916 return yyleng;
1917}
1918
1919/** Get the current token.
1920 *
1921 */
1922
1923char *yyget_text (void)
1924{
1925 return yytext;
1926}
1927
1928/** Set the current line number.
1929 * @param line_number
1930 *
1931 */
1932void yyset_lineno (int line_number )
1933{
1934
1935 yylineno = line_number;
1936}
1937
1938/** Set the input stream. This does not discard the current
1939 * input buffer.
1940 * @param in_str A readable stream.
1941 *
1942 * @see yy_switch_to_buffer
1943 */
1944void yyset_in (FILE * in_str )
1945{
1946 yyin = in_str ;
1947}
1948
1949void yyset_out (FILE * out_str )
1950{
1951 yyout = out_str ;
1952}
1953
1954int yyget_debug (void)
1955{
1956 return yy_flex_debug;
1957}
1958
1959void yyset_debug (int bdebug )
1960{
1961 yy_flex_debug = bdebug ;
1962}
1963
1964static int yy_init_globals (void)
1965{
1966 /* Initialization is the same as for the non-reentrant scanner.
1967 * This function is called from yylex_destroy(), so don't allocate here.
1968 */
1969
1970 /* We do not touch yylineno unless the option is enabled. */
1971 yylineno = 1;
1972
1973 (yy_buffer_stack) = 0;
1974 (yy_buffer_stack_top) = 0;
1975 (yy_buffer_stack_max) = 0;
1976 (yy_c_buf_p) = (char *) 0;
1977 (yy_init) = 0;
1978 (yy_start) = 0;
1979
1980/* Defined in main.c */
1981#ifdef YY_STDINIT
1982 yyin = stdin;
1983 yyout = stdout;
1984#else
1985 yyin = (FILE *) 0;
1986 yyout = (FILE *) 0;
1987#endif
1988
1989 /* For future reference: Set errno on error, since we are called by
1990 * yylex_init()
1991 */
1992 return 0;
1993}
1994
1995/* yylex_destroy is for both reentrant and non-reentrant scanners. */
1996int yylex_destroy (void)
1997{
1998
1999 /* Pop the buffer stack, destroying each element. */
2000 while(YY_CURRENT_BUFFER){
2001 yy_delete_buffer(YY_CURRENT_BUFFER );
2002 YY_CURRENT_BUFFER_LVALUE = NULL;
2003 yypop_buffer_state();
2004 }
2005
2006 /* Destroy the stack itself. */
2007 yyfree((yy_buffer_stack) );
2008 (yy_buffer_stack) = NULL;
2009
2010 /* Reset the globals. This is important in a non-reentrant scanner so the next time
2011 * yylex() is called, initialization will occur. */
2012 yy_init_globals( );
2013
2014 return 0;
2015}
2016
2017/*
2018 * Internal utility routines.
2019 */
2020
2021#ifndef yytext_ptr
2022static void yy_flex_strncpy (char* s1, yyconst char * s2, int n )
2023{
2024 register int i;
2025 for ( i = 0; i < n; ++i )
2026 s1[i] = s2[i];
2027}
2028#endif
2029
2030#ifdef YY_NEED_STRLEN
2031static int yy_flex_strlen (yyconst char * s )
2032{
2033 register int n;
2034 for ( n = 0; s[n]; ++n )
2035 ;
2036
2037 return n;
2038}
2039#endif
2040
2041void *yyalloc (yy_size_t size )
2042{
2043 return (void *) malloc( size );
2044}
2045
2046void *yyrealloc (void * ptr, yy_size_t size )
2047{
2048 /* The cast to (char *) in the following accommodates both
2049 * implementations that use char* generic pointers, and those
2050 * that use void* generic pointers. It works with the latter
2051 * because both ANSI C and C++ allow castless assignment from
2052 * any pointer type to void*, and deal with argument conversions
2053 * as though doing an assignment.
2054 */
2055 return (void *) realloc( (char *) ptr, size );
2056}
2057
2058void yyfree (void * ptr )
2059{
2060 free( (char *) ptr ); /* see yyrealloc() for (char *) cast */
2061}
2062
2063#define YYTABLES_NAME "yytables"
2064
2065#line 222 "dtc-lexer.l"
2066
2067
2068
2069
2070/*
2071 * Stack of nested include file contexts.
2072 */
2073
2074struct incl_file {
2075 int filenum;
2076 FILE *file;
2077 YY_BUFFER_STATE yy_prev_buf;
2078 int yy_prev_lineno;
2079 struct incl_file *prev;
2080};
2081
2082struct incl_file *incl_file_stack;
2083
2084
2085/*
2086 * Detect infinite include recursion.
2087 */
2088#define MAX_INCLUDE_DEPTH (100)
2089
2090static int incl_depth = 0;
2091
2092
2093int push_input_file(const char *filename)
2094{
2095 FILE *f;
2096 struct incl_file *incl_file;
2097
2098 if (!filename) {
2099 yyerror("No include file name given.");
2100 return 0;
2101 }
2102
2103 if (incl_depth++ >= MAX_INCLUDE_DEPTH) {
2104 yyerror("Includes nested too deeply");
2105 return 0;
2106 }
2107
2108 f = dtc_open_file(filename);
2109
2110 incl_file = malloc(sizeof(struct incl_file));
2111 if (!incl_file) {
2112 yyerror("Can not allocate include file space.");
2113 return 0;
2114 }
2115
2116 /*
2117 * Save current context.
2118 */
2119 incl_file->yy_prev_buf = YY_CURRENT_BUFFER;
2120 incl_file->yy_prev_lineno = yylineno;
2121 incl_file->filenum = srcpos_filenum;
2122 incl_file->file = yyin;
2123 incl_file->prev = incl_file_stack;
2124
2125 incl_file_stack = incl_file;
2126
2127 /*
2128 * Establish new context.
2129 */
2130 srcpos_filenum = lookup_file_name(filename, 0);
2131 yylineno = 1;
2132 yyin = f;
2133 yy_switch_to_buffer(yy_create_buffer(yyin,YY_BUF_SIZE));
2134
2135 return 1;
2136}
2137
2138
2139int pop_input_file(void)
2140{
2141 struct incl_file *incl_file;
2142
2143 if (incl_file_stack == 0)
2144 return 0;
2145
2146 fclose(yyin);
2147
2148 /*
2149 * Pop.
2150 */
2151 --incl_depth;
2152 incl_file = incl_file_stack;
2153 incl_file_stack = incl_file->prev;
2154
2155 /*
2156 * Recover old context.
2157 */
2158 yy_delete_buffer(YY_CURRENT_BUFFER);
2159 yy_switch_to_buffer(incl_file->yy_prev_buf);
2160 yylineno = incl_file->yy_prev_lineno;
2161 srcpos_filenum = incl_file->filenum;
2162 yyin = incl_file->file;
2163
2164 /*
2165 * Free old state.
2166 */
2167 free(incl_file);
2168
2169 if (YY_CURRENT_BUFFER == 0)
2170 return 0;
2171
2172 return 1;
2173}
2174
diff --git a/arch/powerpc/boot/dtc-src/dtc-parser.tab.c_shipped b/arch/powerpc/boot/dtc-src/dtc-parser.tab.c_shipped
new file mode 100644
index 000000000000..28e6ec0296a1
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/dtc-parser.tab.c_shipped
@@ -0,0 +1,1983 @@
1/* A Bison parser, made by GNU Bison 2.3. */
2
3/* Skeleton implementation for Bison's Yacc-like parsers in C
4
5 Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
6 Free Software Foundation, Inc.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
22
23/* As a special exception, you may create a larger work that contains
24 part or all of the Bison parser skeleton and distribute that work
25 under terms of your choice, so long as that work isn't itself a
26 parser generator using the skeleton or a modified version thereof
27 as a parser skeleton. Alternatively, if you modify or redistribute
28 the parser skeleton itself, you may (at your option) remove this
29 special exception, which will cause the skeleton and the resulting
30 Bison output files to be licensed under the GNU General Public
31 License without this special exception.
32
33 This special exception was added by the Free Software Foundation in
34 version 2.2 of Bison. */
35
36/* C LALR(1) parser skeleton written by Richard Stallman, by
37 simplifying the original so-called "semantic" parser. */
38
39/* All symbols defined below should begin with yy or YY, to avoid
40 infringing on user name space. This should be done even for local
41 variables, as they might otherwise be expanded by user macros.
42 There are some unavoidable exceptions within include files to
43 define necessary library symbols; they are noted "INFRINGES ON
44 USER NAME SPACE" below. */
45
46/* Identify Bison output. */
47#define YYBISON 1
48
49/* Bison version. */
50#define YYBISON_VERSION "2.3"
51
52/* Skeleton name. */
53#define YYSKELETON_NAME "yacc.c"
54
55/* Pure parsers. */
56#define YYPURE 0
57
58/* Using locations. */
59#define YYLSP_NEEDED 1
60
61
62
63/* Tokens. */
64#ifndef YYTOKENTYPE
65# define YYTOKENTYPE
66 /* Put the tokens into the symbol table, so that GDB and other debuggers
67 know about them. */
68 enum yytokentype {
69 DT_V1 = 258,
70 DT_MEMRESERVE = 259,
71 DT_PROPNODENAME = 260,
72 DT_LITERAL = 261,
73 DT_LEGACYLITERAL = 262,
74 DT_BASE = 263,
75 DT_BYTE = 264,
76 DT_STRING = 265,
77 DT_LABEL = 266,
78 DT_REF = 267
79 };
80#endif
81/* Tokens. */
82#define DT_V1 258
83#define DT_MEMRESERVE 259
84#define DT_PROPNODENAME 260
85#define DT_LITERAL 261
86#define DT_LEGACYLITERAL 262
87#define DT_BASE 263
88#define DT_BYTE 264
89#define DT_STRING 265
90#define DT_LABEL 266
91#define DT_REF 267
92
93
94
95
96/* Copy the first part of user declarations. */
97#line 23 "dtc-parser.y"
98
99#include "dtc.h"
100#include "srcpos.h"
101
102int yylex(void);
103unsigned long long eval_literal(const char *s, int base, int bits);
104
105extern struct boot_info *the_boot_info;
106
107
108
109/* Enabling traces. */
110#ifndef YYDEBUG
111# define YYDEBUG 0
112#endif
113
114/* Enabling verbose error messages. */
115#ifdef YYERROR_VERBOSE
116# undef YYERROR_VERBOSE
117# define YYERROR_VERBOSE 1
118#else
119# define YYERROR_VERBOSE 0
120#endif
121
122/* Enabling the token table. */
123#ifndef YYTOKEN_TABLE
124# define YYTOKEN_TABLE 0
125#endif
126
127#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
128typedef union YYSTYPE
129#line 34 "dtc-parser.y"
130{
131 char *propnodename;
132 char *literal;
133 char *labelref;
134 unsigned int cbase;
135 u8 byte;
136 struct data data;
137
138 u64 addr;
139 cell_t cell;
140 struct property *prop;
141 struct property *proplist;
142 struct node *node;
143 struct node *nodelist;
144 struct reserve_info *re;
145}
146/* Line 187 of yacc.c. */
147#line 148 "dtc-parser.tab.c"
148 YYSTYPE;
149# define yystype YYSTYPE /* obsolescent; will be withdrawn */
150# define YYSTYPE_IS_DECLARED 1
151# define YYSTYPE_IS_TRIVIAL 1
152#endif
153
154#if ! defined YYLTYPE && ! defined YYLTYPE_IS_DECLARED
155typedef struct YYLTYPE
156{
157 int first_line;
158 int first_column;
159 int last_line;
160 int last_column;
161} YYLTYPE;
162# define yyltype YYLTYPE /* obsolescent; will be withdrawn */
163# define YYLTYPE_IS_DECLARED 1
164# define YYLTYPE_IS_TRIVIAL 1
165#endif
166
167
168/* Copy the second part of user declarations. */
169
170
171/* Line 216 of yacc.c. */
172#line 173 "dtc-parser.tab.c"
173
174#ifdef short
175# undef short
176#endif
177
178#ifdef YYTYPE_UINT8
179typedef YYTYPE_UINT8 yytype_uint8;
180#else
181typedef unsigned char yytype_uint8;
182#endif
183
184#ifdef YYTYPE_INT8
185typedef YYTYPE_INT8 yytype_int8;
186#elif (defined __STDC__ || defined __C99__FUNC__ \
187 || defined __cplusplus || defined _MSC_VER)
188typedef signed char yytype_int8;
189#else
190typedef short int yytype_int8;
191#endif
192
193#ifdef YYTYPE_UINT16
194typedef YYTYPE_UINT16 yytype_uint16;
195#else
196typedef unsigned short int yytype_uint16;
197#endif
198
199#ifdef YYTYPE_INT16
200typedef YYTYPE_INT16 yytype_int16;
201#else
202typedef short int yytype_int16;
203#endif
204
205#ifndef YYSIZE_T
206# ifdef __SIZE_TYPE__
207# define YYSIZE_T __SIZE_TYPE__
208# elif defined size_t
209# define YYSIZE_T size_t
210# elif ! defined YYSIZE_T && (defined __STDC__ || defined __C99__FUNC__ \
211 || defined __cplusplus || defined _MSC_VER)
212# include <stddef.h> /* INFRINGES ON USER NAME SPACE */
213# define YYSIZE_T size_t
214# else
215# define YYSIZE_T unsigned int
216# endif
217#endif
218
219#define YYSIZE_MAXIMUM ((YYSIZE_T) -1)
220
221#ifndef YY_
222# if YYENABLE_NLS
223# if ENABLE_NLS
224# include <libintl.h> /* INFRINGES ON USER NAME SPACE */
225# define YY_(msgid) dgettext ("bison-runtime", msgid)
226# endif
227# endif
228# ifndef YY_
229# define YY_(msgid) msgid
230# endif
231#endif
232
233/* Suppress unused-variable warnings by "using" E. */
234#if ! defined lint || defined __GNUC__
235# define YYUSE(e) ((void) (e))
236#else
237# define YYUSE(e) /* empty */
238#endif
239
240/* Identity function, used to suppress warnings about constant conditions. */
241#ifndef lint
242# define YYID(n) (n)
243#else
244#if (defined __STDC__ || defined __C99__FUNC__ \
245 || defined __cplusplus || defined _MSC_VER)
246static int
247YYID (int i)
248#else
249static int
250YYID (i)
251 int i;
252#endif
253{
254 return i;
255}
256#endif
257
258#if ! defined yyoverflow || YYERROR_VERBOSE
259
260/* The parser invokes alloca or malloc; define the necessary symbols. */
261
262# ifdef YYSTACK_USE_ALLOCA
263# if YYSTACK_USE_ALLOCA
264# ifdef __GNUC__
265# define YYSTACK_ALLOC __builtin_alloca
266# elif defined __BUILTIN_VA_ARG_INCR
267# include <alloca.h> /* INFRINGES ON USER NAME SPACE */
268# elif defined _AIX
269# define YYSTACK_ALLOC __alloca
270# elif defined _MSC_VER
271# include <malloc.h> /* INFRINGES ON USER NAME SPACE */
272# define alloca _alloca
273# else
274# define YYSTACK_ALLOC alloca
275# if ! defined _ALLOCA_H && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
276 || defined __cplusplus || defined _MSC_VER)
277# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
278# ifndef _STDLIB_H
279# define _STDLIB_H 1
280# endif
281# endif
282# endif
283# endif
284# endif
285
286# ifdef YYSTACK_ALLOC
287 /* Pacify GCC's `empty if-body' warning. */
288# define YYSTACK_FREE(Ptr) do { /* empty */; } while (YYID (0))
289# ifndef YYSTACK_ALLOC_MAXIMUM
290 /* The OS might guarantee only one guard page at the bottom of the stack,
291 and a page size can be as small as 4096 bytes. So we cannot safely
292 invoke alloca (N) if N exceeds 4096. Use a slightly smaller number
293 to allow for a few compiler-allocated temporary stack slots. */
294# define YYSTACK_ALLOC_MAXIMUM 4032 /* reasonable circa 2006 */
295# endif
296# else
297# define YYSTACK_ALLOC YYMALLOC
298# define YYSTACK_FREE YYFREE
299# ifndef YYSTACK_ALLOC_MAXIMUM
300# define YYSTACK_ALLOC_MAXIMUM YYSIZE_MAXIMUM
301# endif
302# if (defined __cplusplus && ! defined _STDLIB_H \
303 && ! ((defined YYMALLOC || defined malloc) \
304 && (defined YYFREE || defined free)))
305# include <stdlib.h> /* INFRINGES ON USER NAME SPACE */
306# ifndef _STDLIB_H
307# define _STDLIB_H 1
308# endif
309# endif
310# ifndef YYMALLOC
311# define YYMALLOC malloc
312# if ! defined malloc && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
313 || defined __cplusplus || defined _MSC_VER)
314void *malloc (YYSIZE_T); /* INFRINGES ON USER NAME SPACE */
315# endif
316# endif
317# ifndef YYFREE
318# define YYFREE free
319# if ! defined free && ! defined _STDLIB_H && (defined __STDC__ || defined __C99__FUNC__ \
320 || defined __cplusplus || defined _MSC_VER)
321void free (void *); /* INFRINGES ON USER NAME SPACE */
322# endif
323# endif
324# endif
325#endif /* ! defined yyoverflow || YYERROR_VERBOSE */
326
327
328#if (! defined yyoverflow \
329 && (! defined __cplusplus \
330 || (defined YYLTYPE_IS_TRIVIAL && YYLTYPE_IS_TRIVIAL \
331 && defined YYSTYPE_IS_TRIVIAL && YYSTYPE_IS_TRIVIAL)))
332
333/* A type that is properly aligned for any stack member. */
334union yyalloc
335{
336 yytype_int16 yyss;
337 YYSTYPE yyvs;
338 YYLTYPE yyls;
339};
340
341/* The size of the maximum gap between one aligned stack and the next. */
342# define YYSTACK_GAP_MAXIMUM (sizeof (union yyalloc) - 1)
343
344/* The size of an array large to enough to hold all stacks, each with
345 N elements. */
346# define YYSTACK_BYTES(N) \
347 ((N) * (sizeof (yytype_int16) + sizeof (YYSTYPE) + sizeof (YYLTYPE)) \
348 + 2 * YYSTACK_GAP_MAXIMUM)
349
350/* Copy COUNT objects from FROM to TO. The source and destination do
351 not overlap. */
352# ifndef YYCOPY
353# if defined __GNUC__ && 1 < __GNUC__
354# define YYCOPY(To, From, Count) \
355 __builtin_memcpy (To, From, (Count) * sizeof (*(From)))
356# else
357# define YYCOPY(To, From, Count) \
358 do \
359 { \
360 YYSIZE_T yyi; \
361 for (yyi = 0; yyi < (Count); yyi++) \
362 (To)[yyi] = (From)[yyi]; \
363 } \
364 while (YYID (0))
365# endif
366# endif
367
368/* Relocate STACK from its old location to the new one. The
369 local variables YYSIZE and YYSTACKSIZE give the old and new number of
370 elements in the stack, and YYPTR gives the new location of the
371 stack. Advance YYPTR to a properly aligned location for the next
372 stack. */
373# define YYSTACK_RELOCATE(Stack) \
374 do \
375 { \
376 YYSIZE_T yynewbytes; \
377 YYCOPY (&yyptr->Stack, Stack, yysize); \
378 Stack = &yyptr->Stack; \
379 yynewbytes = yystacksize * sizeof (*Stack) + YYSTACK_GAP_MAXIMUM; \
380 yyptr += yynewbytes / sizeof (*yyptr); \
381 } \
382 while (YYID (0))
383
384#endif
385
386/* YYFINAL -- State number of the termination state. */
387#define YYFINAL 9
388/* YYLAST -- Last index in YYTABLE. */
389#define YYLAST 60
390
391/* YYNTOKENS -- Number of terminals. */
392#define YYNTOKENS 24
393/* YYNNTS -- Number of nonterminals. */
394#define YYNNTS 20
395/* YYNRULES -- Number of rules. */
396#define YYNRULES 43
397/* YYNRULES -- Number of states. */
398#define YYNSTATES 67
399
400/* YYTRANSLATE(YYLEX) -- Bison symbol number corresponding to YYLEX. */
401#define YYUNDEFTOK 2
402#define YYMAXUTOK 267
403
404#define YYTRANSLATE(YYX) \
405 ((unsigned int) (YYX) <= YYMAXUTOK ? yytranslate[YYX] : YYUNDEFTOK)
406
407/* YYTRANSLATE[YYLEX] -- Bison symbol number corresponding to YYLEX. */
408static const yytype_uint8 yytranslate[] =
409{
410 0, 2, 2, 2, 2, 2, 2, 2, 2, 2,
411 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
412 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
413 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
414 2, 2, 2, 2, 23, 14, 2, 15, 2, 2,
415 2, 2, 2, 2, 2, 2, 2, 2, 2, 13,
416 19, 18, 20, 2, 2, 2, 2, 2, 2, 2,
417 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
418 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
419 2, 21, 2, 22, 2, 2, 2, 2, 2, 2,
420 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
421 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
422 2, 2, 2, 16, 2, 17, 2, 2, 2, 2,
423 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
424 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
425 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
426 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
427 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
428 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
429 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
430 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
431 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
432 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
433 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
434 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
435 2, 2, 2, 2, 2, 2, 1, 2, 3, 4,
436 5, 6, 7, 8, 9, 10, 11, 12
437};
438
439#if YYDEBUG
440/* YYPRHS[YYN] -- Index of the first RHS symbol of rule number YYN in
441 YYRHS. */
442static const yytype_uint8 yyprhs[] =
443{
444 0, 0, 3, 8, 11, 12, 15, 21, 22, 25,
445 27, 34, 36, 38, 41, 47, 48, 51, 57, 61,
446 64, 69, 74, 77, 80, 81, 84, 87, 88, 91,
447 94, 97, 98, 100, 102, 105, 106, 109, 112, 113,
448 116, 119, 123, 124
449};
450
451/* YYRHS -- A `-1'-separated list of the rules' RHS. */
452static const yytype_int8 yyrhs[] =
453{
454 25, 0, -1, 3, 13, 26, 31, -1, 28, 31,
455 -1, -1, 27, 26, -1, 43, 4, 30, 30, 13,
456 -1, -1, 29, 28, -1, 27, -1, 43, 4, 30,
457 14, 30, 13, -1, 6, -1, 7, -1, 15, 32,
458 -1, 16, 33, 41, 17, 13, -1, -1, 33, 34,
459 -1, 43, 5, 18, 35, 13, -1, 43, 5, 13,
460 -1, 36, 10, -1, 36, 19, 37, 20, -1, 36,
461 21, 40, 22, -1, 36, 12, -1, 35, 11, -1,
462 -1, 35, 23, -1, 36, 11, -1, -1, 37, 39,
463 -1, 37, 12, -1, 37, 11, -1, -1, 8, -1,
464 6, -1, 38, 7, -1, -1, 40, 9, -1, 40,
465 11, -1, -1, 42, 41, -1, 42, 34, -1, 43,
466 5, 32, -1, -1, 11, -1
467};
468
469/* YYRLINE[YYN] -- source line where rule number YYN was defined. */
470static const yytype_uint16 yyrline[] =
471{
472 0, 85, 85, 89, 97, 100, 107, 115, 118, 125,
473 129, 136, 140, 147, 154, 162, 165, 172, 176, 183,
474 187, 191, 195, 199, 207, 210, 214, 222, 225, 229,
475 234, 242, 245, 249, 253, 261, 264, 268, 276, 279,
476 283, 291, 299, 302
477};
478#endif
479
480#if YYDEBUG || YYERROR_VERBOSE || YYTOKEN_TABLE
481/* YYTNAME[SYMBOL-NUM] -- String name of the symbol SYMBOL-NUM.
482 First, the terminals, then, starting at YYNTOKENS, nonterminals. */
483static const char *const yytname[] =
484{
485 "$end", "error", "$undefined", "DT_V1", "DT_MEMRESERVE",
486 "DT_PROPNODENAME", "DT_LITERAL", "DT_LEGACYLITERAL", "DT_BASE",
487 "DT_BYTE", "DT_STRING", "DT_LABEL", "DT_REF", "';'", "'-'", "'/'", "'{'",
488 "'}'", "'='", "'<'", "'>'", "'['", "']'", "','", "$accept", "sourcefile",
489 "memreserves", "memreserve", "v0_memreserves", "v0_memreserve", "addr",
490 "devicetree", "nodedef", "proplist", "propdef", "propdata",
491 "propdataprefix", "celllist", "cellbase", "cellval", "bytestring",
492 "subnodes", "subnode", "label", 0
493};
494#endif
495
496# ifdef YYPRINT
497/* YYTOKNUM[YYLEX-NUM] -- Internal token number corresponding to
498 token YYLEX-NUM. */
499static const yytype_uint16 yytoknum[] =
500{
501 0, 256, 257, 258, 259, 260, 261, 262, 263, 264,
502 265, 266, 267, 59, 45, 47, 123, 125, 61, 60,
503 62, 91, 93, 44
504};
505# endif
506
507/* YYR1[YYN] -- Symbol number of symbol that rule YYN derives. */
508static const yytype_uint8 yyr1[] =
509{
510 0, 24, 25, 25, 26, 26, 27, 28, 28, 29,
511 29, 30, 30, 31, 32, 33, 33, 34, 34, 35,
512 35, 35, 35, 35, 36, 36, 36, 37, 37, 37,
513 37, 38, 38, 39, 39, 40, 40, 40, 41, 41,
514 41, 42, 43, 43
515};
516
517/* YYR2[YYN] -- Number of symbols composing right hand side of rule YYN. */
518static const yytype_uint8 yyr2[] =
519{
520 0, 2, 4, 2, 0, 2, 5, 0, 2, 1,
521 6, 1, 1, 2, 5, 0, 2, 5, 3, 2,
522 4, 4, 2, 2, 0, 2, 2, 0, 2, 2,
523 2, 0, 1, 1, 2, 0, 2, 2, 0, 2,
524 2, 3, 0, 1
525};
526
527/* YYDEFACT[STATE-NAME] -- Default rule to reduce with in state
528 STATE-NUM when YYTABLE doesn't specify something else to do. Zero
529 means the default is an error. */
530static const yytype_uint8 yydefact[] =
531{
532 7, 0, 43, 0, 9, 0, 7, 0, 4, 1,
533 0, 3, 8, 0, 0, 4, 0, 15, 13, 11,
534 12, 0, 2, 5, 0, 38, 0, 0, 0, 16,
535 0, 38, 0, 0, 6, 0, 40, 39, 0, 10,
536 14, 18, 24, 41, 0, 0, 23, 17, 25, 19,
537 26, 22, 27, 35, 31, 0, 33, 32, 30, 29,
538 20, 0, 28, 36, 37, 21, 34
539};
540
541/* YYDEFGOTO[NTERM-NUM]. */
542static const yytype_int8 yydefgoto[] =
543{
544 -1, 3, 14, 4, 5, 6, 27, 11, 18, 25,
545 29, 44, 45, 54, 61, 62, 55, 30, 31, 7
546};
547
548/* YYPACT[STATE-NUM] -- Index in YYTABLE of the portion describing
549 STATE-NUM. */
550#define YYPACT_NINF -13
551static const yytype_int8 yypact[] =
552{
553 23, 11, -13, 37, -13, -4, 18, 39, 18, -13,
554 28, -13, -13, 34, -4, 18, 41, -13, -13, -13,
555 -13, 25, -13, -13, 34, -3, 34, 33, 34, -13,
556 30, -3, 43, 36, -13, 38, -13, -13, 20, -13,
557 -13, -13, -13, -13, 2, 9, -13, -13, -13, -13,
558 -13, -13, -13, -13, -2, -6, -13, -13, -13, -13,
559 -13, 45, -13, -13, -13, -13, -13
560};
561
562/* YYPGOTO[NTERM-NUM]. */
563static const yytype_int8 yypgoto[] =
564{
565 -13, -13, 35, 27, 47, -13, -12, 40, 17, -13,
566 26, -13, -13, -13, -13, -13, -13, 29, -13, -8
567};
568
569/* YYTABLE[YYPACT[STATE-NUM]]. What to do in state STATE-NUM. If
570 positive, shift that token. If negative, reduce the rule which
571 number is the opposite. If zero, do what YYDEFACT says.
572 If YYTABLE_NINF, syntax error. */
573#define YYTABLE_NINF -43
574static const yytype_int8 yytable[] =
575{
576 16, 21, -42, 63, 56, 64, 57, 16, 2, 58,
577 59, 10, 28, 46, 33, 47, 65, 32, 60, 49,
578 50, 51, -42, 32, 8, 48, 1, -42, 52, 2,
579 53, 19, 20, 41, 2, 15, 17, 9, 42, 26,
580 19, 20, 15, 13, 17, 24, 34, 35, 38, 39,
581 23, 40, 66, 12, 22, 43, 0, 36, 0, 0,
582 37
583};
584
585static const yytype_int8 yycheck[] =
586{
587 8, 13, 5, 9, 6, 11, 8, 15, 11, 11,
588 12, 15, 24, 11, 26, 13, 22, 25, 20, 10,
589 11, 12, 4, 31, 13, 23, 3, 4, 19, 11,
590 21, 6, 7, 13, 11, 8, 16, 0, 18, 14,
591 6, 7, 15, 4, 16, 4, 13, 17, 5, 13,
592 15, 13, 7, 6, 14, 38, -1, 31, -1, -1,
593 31
594};
595
596/* YYSTOS[STATE-NUM] -- The (internal number of the) accessing
597 symbol of state STATE-NUM. */
598static const yytype_uint8 yystos[] =
599{
600 0, 3, 11, 25, 27, 28, 29, 43, 13, 0,
601 15, 31, 28, 4, 26, 27, 43, 16, 32, 6,
602 7, 30, 31, 26, 4, 33, 14, 30, 30, 34,
603 41, 42, 43, 30, 13, 17, 34, 41, 5, 13,
604 13, 13, 18, 32, 35, 36, 11, 13, 23, 10,
605 11, 12, 19, 21, 37, 40, 6, 8, 11, 12,
606 20, 38, 39, 9, 11, 22, 7
607};
608
609#define yyerrok (yyerrstatus = 0)
610#define yyclearin (yychar = YYEMPTY)
611#define YYEMPTY (-2)
612#define YYEOF 0
613
614#define YYACCEPT goto yyacceptlab
615#define YYABORT goto yyabortlab
616#define YYERROR goto yyerrorlab
617
618
619/* Like YYERROR except do call yyerror. This remains here temporarily
620 to ease the transition to the new meaning of YYERROR, for GCC.
621 Once GCC version 2 has supplanted version 1, this can go. */
622
623#define YYFAIL goto yyerrlab
624
625#define YYRECOVERING() (!!yyerrstatus)
626
627#define YYBACKUP(Token, Value) \
628do \
629 if (yychar == YYEMPTY && yylen == 1) \
630 { \
631 yychar = (Token); \
632 yylval = (Value); \
633 yytoken = YYTRANSLATE (yychar); \
634 YYPOPSTACK (1); \
635 goto yybackup; \
636 } \
637 else \
638 { \
639 yyerror (YY_("syntax error: cannot back up")); \
640 YYERROR; \
641 } \
642while (YYID (0))
643
644
645#define YYTERROR 1
646#define YYERRCODE 256
647
648
649/* YYLLOC_DEFAULT -- Set CURRENT to span from RHS[1] to RHS[N].
650 If N is 0, then set CURRENT to the empty location which ends
651 the previous symbol: RHS[0] (always defined). */
652
653#define YYRHSLOC(Rhs, K) ((Rhs)[K])
654#ifndef YYLLOC_DEFAULT
655# define YYLLOC_DEFAULT(Current, Rhs, N) \
656 do \
657 if (YYID (N)) \
658 { \
659 (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
660 (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
661 (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
662 (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
663 } \
664 else \
665 { \
666 (Current).first_line = (Current).last_line = \
667 YYRHSLOC (Rhs, 0).last_line; \
668 (Current).first_column = (Current).last_column = \
669 YYRHSLOC (Rhs, 0).last_column; \
670 } \
671 while (YYID (0))
672#endif
673
674
675/* YY_LOCATION_PRINT -- Print the location on the stream.
676 This macro was not mandated originally: define only if we know
677 we won't break user code: when these are the locations we know. */
678
679#ifndef YY_LOCATION_PRINT
680# if YYLTYPE_IS_TRIVIAL
681# define YY_LOCATION_PRINT(File, Loc) \
682 fprintf (File, "%d.%d-%d.%d", \
683 (Loc).first_line, (Loc).first_column, \
684 (Loc).last_line, (Loc).last_column)
685# else
686# define YY_LOCATION_PRINT(File, Loc) ((void) 0)
687# endif
688#endif
689
690
691/* YYLEX -- calling `yylex' with the right arguments. */
692
693#ifdef YYLEX_PARAM
694# define YYLEX yylex (YYLEX_PARAM)
695#else
696# define YYLEX yylex ()
697#endif
698
699/* Enable debugging if requested. */
700#if YYDEBUG
701
702# ifndef YYFPRINTF
703# include <stdio.h> /* INFRINGES ON USER NAME SPACE */
704# define YYFPRINTF fprintf
705# endif
706
707# define YYDPRINTF(Args) \
708do { \
709 if (yydebug) \
710 YYFPRINTF Args; \
711} while (YYID (0))
712
713# define YY_SYMBOL_PRINT(Title, Type, Value, Location) \
714do { \
715 if (yydebug) \
716 { \
717 YYFPRINTF (stderr, "%s ", Title); \
718 yy_symbol_print (stderr, \
719 Type, Value, Location); \
720 YYFPRINTF (stderr, "\n"); \
721 } \
722} while (YYID (0))
723
724
725/*--------------------------------.
726| Print this symbol on YYOUTPUT. |
727`--------------------------------*/
728
729/*ARGSUSED*/
730#if (defined __STDC__ || defined __C99__FUNC__ \
731 || defined __cplusplus || defined _MSC_VER)
732static void
733yy_symbol_value_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep, YYLTYPE const * const yylocationp)
734#else
735static void
736yy_symbol_value_print (yyoutput, yytype, yyvaluep, yylocationp)
737 FILE *yyoutput;
738 int yytype;
739 YYSTYPE const * const yyvaluep;
740 YYLTYPE const * const yylocationp;
741#endif
742{
743 if (!yyvaluep)
744 return;
745 YYUSE (yylocationp);
746# ifdef YYPRINT
747 if (yytype < YYNTOKENS)
748 YYPRINT (yyoutput, yytoknum[yytype], *yyvaluep);
749# else
750 YYUSE (yyoutput);
751# endif
752 switch (yytype)
753 {
754 default:
755 break;
756 }
757}
758
759
760/*--------------------------------.
761| Print this symbol on YYOUTPUT. |
762`--------------------------------*/
763
764#if (defined __STDC__ || defined __C99__FUNC__ \
765 || defined __cplusplus || defined _MSC_VER)
766static void
767yy_symbol_print (FILE *yyoutput, int yytype, YYSTYPE const * const yyvaluep, YYLTYPE const * const yylocationp)
768#else
769static void
770yy_symbol_print (yyoutput, yytype, yyvaluep, yylocationp)
771 FILE *yyoutput;
772 int yytype;
773 YYSTYPE const * const yyvaluep;
774 YYLTYPE const * const yylocationp;
775#endif
776{
777 if (yytype < YYNTOKENS)
778 YYFPRINTF (yyoutput, "token %s (", yytname[yytype]);
779 else
780 YYFPRINTF (yyoutput, "nterm %s (", yytname[yytype]);
781
782 YY_LOCATION_PRINT (yyoutput, *yylocationp);
783 YYFPRINTF (yyoutput, ": ");
784 yy_symbol_value_print (yyoutput, yytype, yyvaluep, yylocationp);
785 YYFPRINTF (yyoutput, ")");
786}
787
788/*------------------------------------------------------------------.
789| yy_stack_print -- Print the state stack from its BOTTOM up to its |
790| TOP (included). |
791`------------------------------------------------------------------*/
792
793#if (defined __STDC__ || defined __C99__FUNC__ \
794 || defined __cplusplus || defined _MSC_VER)
795static void
796yy_stack_print (yytype_int16 *bottom, yytype_int16 *top)
797#else
798static void
799yy_stack_print (bottom, top)
800 yytype_int16 *bottom;
801 yytype_int16 *top;
802#endif
803{
804 YYFPRINTF (stderr, "Stack now");
805 for (; bottom <= top; ++bottom)
806 YYFPRINTF (stderr, " %d", *bottom);
807 YYFPRINTF (stderr, "\n");
808}
809
810# define YY_STACK_PRINT(Bottom, Top) \
811do { \
812 if (yydebug) \
813 yy_stack_print ((Bottom), (Top)); \
814} while (YYID (0))
815
816
817/*------------------------------------------------.
818| Report that the YYRULE is going to be reduced. |
819`------------------------------------------------*/
820
821#if (defined __STDC__ || defined __C99__FUNC__ \
822 || defined __cplusplus || defined _MSC_VER)
823static void
824yy_reduce_print (YYSTYPE *yyvsp, YYLTYPE *yylsp, int yyrule)
825#else
826static void
827yy_reduce_print (yyvsp, yylsp, yyrule)
828 YYSTYPE *yyvsp;
829 YYLTYPE *yylsp;
830 int yyrule;
831#endif
832{
833 int yynrhs = yyr2[yyrule];
834 int yyi;
835 unsigned long int yylno = yyrline[yyrule];
836 YYFPRINTF (stderr, "Reducing stack by rule %d (line %lu):\n",
837 yyrule - 1, yylno);
838 /* The symbols being reduced. */
839 for (yyi = 0; yyi < yynrhs; yyi++)
840 {
841 fprintf (stderr, " $%d = ", yyi + 1);
842 yy_symbol_print (stderr, yyrhs[yyprhs[yyrule] + yyi],
843 &(yyvsp[(yyi + 1) - (yynrhs)])
844 , &(yylsp[(yyi + 1) - (yynrhs)]) );
845 fprintf (stderr, "\n");
846 }
847}
848
849# define YY_REDUCE_PRINT(Rule) \
850do { \
851 if (yydebug) \
852 yy_reduce_print (yyvsp, yylsp, Rule); \
853} while (YYID (0))
854
855/* Nonzero means print parse trace. It is left uninitialized so that
856 multiple parsers can coexist. */
857int yydebug;
858#else /* !YYDEBUG */
859# define YYDPRINTF(Args)
860# define YY_SYMBOL_PRINT(Title, Type, Value, Location)
861# define YY_STACK_PRINT(Bottom, Top)
862# define YY_REDUCE_PRINT(Rule)
863#endif /* !YYDEBUG */
864
865
866/* YYINITDEPTH -- initial size of the parser's stacks. */
867#ifndef YYINITDEPTH
868# define YYINITDEPTH 200
869#endif
870
871/* YYMAXDEPTH -- maximum size the stacks can grow to (effective only
872 if the built-in stack extension method is used).
873
874 Do not make this value too large; the results are undefined if
875 YYSTACK_ALLOC_MAXIMUM < YYSTACK_BYTES (YYMAXDEPTH)
876 evaluated with infinite-precision integer arithmetic. */
877
878#ifndef YYMAXDEPTH
879# define YYMAXDEPTH 10000
880#endif
881
882
883
884#if YYERROR_VERBOSE
885
886# ifndef yystrlen
887# if defined __GLIBC__ && defined _STRING_H
888# define yystrlen strlen
889# else
890/* Return the length of YYSTR. */
891#if (defined __STDC__ || defined __C99__FUNC__ \
892 || defined __cplusplus || defined _MSC_VER)
893static YYSIZE_T
894yystrlen (const char *yystr)
895#else
896static YYSIZE_T
897yystrlen (yystr)
898 const char *yystr;
899#endif
900{
901 YYSIZE_T yylen;
902 for (yylen = 0; yystr[yylen]; yylen++)
903 continue;
904 return yylen;
905}
906# endif
907# endif
908
909# ifndef yystpcpy
910# if defined __GLIBC__ && defined _STRING_H && defined _GNU_SOURCE
911# define yystpcpy stpcpy
912# else
913/* Copy YYSRC to YYDEST, returning the address of the terminating '\0' in
914 YYDEST. */
915#if (defined __STDC__ || defined __C99__FUNC__ \
916 || defined __cplusplus || defined _MSC_VER)
917static char *
918yystpcpy (char *yydest, const char *yysrc)
919#else
920static char *
921yystpcpy (yydest, yysrc)
922 char *yydest;
923 const char *yysrc;
924#endif
925{
926 char *yyd = yydest;
927 const char *yys = yysrc;
928
929 while ((*yyd++ = *yys++) != '\0')
930 continue;
931
932 return yyd - 1;
933}
934# endif
935# endif
936
937# ifndef yytnamerr
938/* Copy to YYRES the contents of YYSTR after stripping away unnecessary
939 quotes and backslashes, so that it's suitable for yyerror. The
940 heuristic is that double-quoting is unnecessary unless the string
941 contains an apostrophe, a comma, or backslash (other than
942 backslash-backslash). YYSTR is taken from yytname. If YYRES is
943 null, do not copy; instead, return the length of what the result
944 would have been. */
945static YYSIZE_T
946yytnamerr (char *yyres, const char *yystr)
947{
948 if (*yystr == '"')
949 {
950 YYSIZE_T yyn = 0;
951 char const *yyp = yystr;
952
953 for (;;)
954 switch (*++yyp)
955 {
956 case '\'':
957 case ',':
958 goto do_not_strip_quotes;
959
960 case '\\':
961 if (*++yyp != '\\')
962 goto do_not_strip_quotes;
963 /* Fall through. */
964 default:
965 if (yyres)
966 yyres[yyn] = *yyp;
967 yyn++;
968 break;
969
970 case '"':
971 if (yyres)
972 yyres[yyn] = '\0';
973 return yyn;
974 }
975 do_not_strip_quotes: ;
976 }
977
978 if (! yyres)
979 return yystrlen (yystr);
980
981 return yystpcpy (yyres, yystr) - yyres;
982}
983# endif
984
985/* Copy into YYRESULT an error message about the unexpected token
986 YYCHAR while in state YYSTATE. Return the number of bytes copied,
987 including the terminating null byte. If YYRESULT is null, do not
988 copy anything; just return the number of bytes that would be
989 copied. As a special case, return 0 if an ordinary "syntax error"
990 message will do. Return YYSIZE_MAXIMUM if overflow occurs during
991 size calculation. */
992static YYSIZE_T
993yysyntax_error (char *yyresult, int yystate, int yychar)
994{
995 int yyn = yypact[yystate];
996
997 if (! (YYPACT_NINF < yyn && yyn <= YYLAST))
998 return 0;
999 else
1000 {
1001 int yytype = YYTRANSLATE (yychar);
1002 YYSIZE_T yysize0 = yytnamerr (0, yytname[yytype]);
1003 YYSIZE_T yysize = yysize0;
1004 YYSIZE_T yysize1;
1005 int yysize_overflow = 0;
1006 enum { YYERROR_VERBOSE_ARGS_MAXIMUM = 5 };
1007 char const *yyarg[YYERROR_VERBOSE_ARGS_MAXIMUM];
1008 int yyx;
1009
1010# if 0
1011 /* This is so xgettext sees the translatable formats that are
1012 constructed on the fly. */
1013 YY_("syntax error, unexpected %s");
1014 YY_("syntax error, unexpected %s, expecting %s");
1015 YY_("syntax error, unexpected %s, expecting %s or %s");
1016 YY_("syntax error, unexpected %s, expecting %s or %s or %s");
1017 YY_("syntax error, unexpected %s, expecting %s or %s or %s or %s");
1018# endif
1019 char *yyfmt;
1020 char const *yyf;
1021 static char const yyunexpected[] = "syntax error, unexpected %s";
1022 static char const yyexpecting[] = ", expecting %s";
1023 static char const yyor[] = " or %s";
1024 char yyformat[sizeof yyunexpected
1025 + sizeof yyexpecting - 1
1026 + ((YYERROR_VERBOSE_ARGS_MAXIMUM - 2)
1027 * (sizeof yyor - 1))];
1028 char const *yyprefix = yyexpecting;
1029
1030 /* Start YYX at -YYN if negative to avoid negative indexes in
1031 YYCHECK. */
1032 int yyxbegin = yyn < 0 ? -yyn : 0;
1033
1034 /* Stay within bounds of both yycheck and yytname. */
1035 int yychecklim = YYLAST - yyn + 1;
1036 int yyxend = yychecklim < YYNTOKENS ? yychecklim : YYNTOKENS;
1037 int yycount = 1;
1038
1039 yyarg[0] = yytname[yytype];
1040 yyfmt = yystpcpy (yyformat, yyunexpected);
1041
1042 for (yyx = yyxbegin; yyx < yyxend; ++yyx)
1043 if (yycheck[yyx + yyn] == yyx && yyx != YYTERROR)
1044 {
1045 if (yycount == YYERROR_VERBOSE_ARGS_MAXIMUM)
1046 {
1047 yycount = 1;
1048 yysize = yysize0;
1049 yyformat[sizeof yyunexpected - 1] = '\0';
1050 break;
1051 }
1052 yyarg[yycount++] = yytname[yyx];
1053 yysize1 = yysize + yytnamerr (0, yytname[yyx]);
1054 yysize_overflow |= (yysize1 < yysize);
1055 yysize = yysize1;
1056 yyfmt = yystpcpy (yyfmt, yyprefix);
1057 yyprefix = yyor;
1058 }
1059
1060 yyf = YY_(yyformat);
1061 yysize1 = yysize + yystrlen (yyf);
1062 yysize_overflow |= (yysize1 < yysize);
1063 yysize = yysize1;
1064
1065 if (yysize_overflow)
1066 return YYSIZE_MAXIMUM;
1067
1068 if (yyresult)
1069 {
1070 /* Avoid sprintf, as that infringes on the user's name space.
1071 Don't have undefined behavior even if the translation
1072 produced a string with the wrong number of "%s"s. */
1073 char *yyp = yyresult;
1074 int yyi = 0;
1075 while ((*yyp = *yyf) != '\0')
1076 {
1077 if (*yyp == '%' && yyf[1] == 's' && yyi < yycount)
1078 {
1079 yyp += yytnamerr (yyp, yyarg[yyi++]);
1080 yyf += 2;
1081 }
1082 else
1083 {
1084 yyp++;
1085 yyf++;
1086 }
1087 }
1088 }
1089 return yysize;
1090 }
1091}
1092#endif /* YYERROR_VERBOSE */
1093
1094
1095/*-----------------------------------------------.
1096| Release the memory associated to this symbol. |
1097`-----------------------------------------------*/
1098
1099/*ARGSUSED*/
1100#if (defined __STDC__ || defined __C99__FUNC__ \
1101 || defined __cplusplus || defined _MSC_VER)
1102static void
1103yydestruct (const char *yymsg, int yytype, YYSTYPE *yyvaluep, YYLTYPE *yylocationp)
1104#else
1105static void
1106yydestruct (yymsg, yytype, yyvaluep, yylocationp)
1107 const char *yymsg;
1108 int yytype;
1109 YYSTYPE *yyvaluep;
1110 YYLTYPE *yylocationp;
1111#endif
1112{
1113 YYUSE (yyvaluep);
1114 YYUSE (yylocationp);
1115
1116 if (!yymsg)
1117 yymsg = "Deleting";
1118 YY_SYMBOL_PRINT (yymsg, yytype, yyvaluep, yylocationp);
1119
1120 switch (yytype)
1121 {
1122
1123 default:
1124 break;
1125 }
1126}
1127
1128
1129/* Prevent warnings from -Wmissing-prototypes. */
1130
1131#ifdef YYPARSE_PARAM
1132#if defined __STDC__ || defined __cplusplus
1133int yyparse (void *YYPARSE_PARAM);
1134#else
1135int yyparse ();
1136#endif
1137#else /* ! YYPARSE_PARAM */
1138#if defined __STDC__ || defined __cplusplus
1139int yyparse (void);
1140#else
1141int yyparse ();
1142#endif
1143#endif /* ! YYPARSE_PARAM */
1144
1145
1146
1147/* The look-ahead symbol. */
1148int yychar;
1149
1150/* The semantic value of the look-ahead symbol. */
1151YYSTYPE yylval;
1152
1153/* Number of syntax errors so far. */
1154int yynerrs;
1155/* Location data for the look-ahead symbol. */
1156YYLTYPE yylloc;
1157
1158
1159
1160/*----------.
1161| yyparse. |
1162`----------*/
1163
1164#ifdef YYPARSE_PARAM
1165#if (defined __STDC__ || defined __C99__FUNC__ \
1166 || defined __cplusplus || defined _MSC_VER)
1167int
1168yyparse (void *YYPARSE_PARAM)
1169#else
1170int
1171yyparse (YYPARSE_PARAM)
1172 void *YYPARSE_PARAM;
1173#endif
1174#else /* ! YYPARSE_PARAM */
1175#if (defined __STDC__ || defined __C99__FUNC__ \
1176 || defined __cplusplus || defined _MSC_VER)
1177int
1178yyparse (void)
1179#else
1180int
1181yyparse ()
1182
1183#endif
1184#endif
1185{
1186
1187 int yystate;
1188 int yyn;
1189 int yyresult;
1190 /* Number of tokens to shift before error messages enabled. */
1191 int yyerrstatus;
1192 /* Look-ahead token as an internal (translated) token number. */
1193 int yytoken = 0;
1194#if YYERROR_VERBOSE
1195 /* Buffer for error messages, and its allocated size. */
1196 char yymsgbuf[128];
1197 char *yymsg = yymsgbuf;
1198 YYSIZE_T yymsg_alloc = sizeof yymsgbuf;
1199#endif
1200
1201 /* Three stacks and their tools:
1202 `yyss': related to states,
1203 `yyvs': related to semantic values,
1204 `yyls': related to locations.
1205
1206 Refer to the stacks thru separate pointers, to allow yyoverflow
1207 to reallocate them elsewhere. */
1208
1209 /* The state stack. */
1210 yytype_int16 yyssa[YYINITDEPTH];
1211 yytype_int16 *yyss = yyssa;
1212 yytype_int16 *yyssp;
1213
1214 /* The semantic value stack. */
1215 YYSTYPE yyvsa[YYINITDEPTH];
1216 YYSTYPE *yyvs = yyvsa;
1217 YYSTYPE *yyvsp;
1218
1219 /* The location stack. */
1220 YYLTYPE yylsa[YYINITDEPTH];
1221 YYLTYPE *yyls = yylsa;
1222 YYLTYPE *yylsp;
1223 /* The locations where the error started and ended. */
1224 YYLTYPE yyerror_range[2];
1225
1226#define YYPOPSTACK(N) (yyvsp -= (N), yyssp -= (N), yylsp -= (N))
1227
1228 YYSIZE_T yystacksize = YYINITDEPTH;
1229
1230 /* The variables used to return semantic value and location from the
1231 action routines. */
1232 YYSTYPE yyval;
1233 YYLTYPE yyloc;
1234
1235 /* The number of symbols on the RHS of the reduced rule.
1236 Keep to zero when no symbol should be popped. */
1237 int yylen = 0;
1238
1239 YYDPRINTF ((stderr, "Starting parse\n"));
1240
1241 yystate = 0;
1242 yyerrstatus = 0;
1243 yynerrs = 0;
1244 yychar = YYEMPTY; /* Cause a token to be read. */
1245
1246 /* Initialize stack pointers.
1247 Waste one element of value and location stack
1248 so that they stay on the same level as the state stack.
1249 The wasted elements are never initialized. */
1250
1251 yyssp = yyss;
1252 yyvsp = yyvs;
1253 yylsp = yyls;
1254#if YYLTYPE_IS_TRIVIAL
1255 /* Initialize the default location before parsing starts. */
1256 yylloc.first_line = yylloc.last_line = 1;
1257 yylloc.first_column = yylloc.last_column = 0;
1258#endif
1259
1260 goto yysetstate;
1261
1262/*------------------------------------------------------------.
1263| yynewstate -- Push a new state, which is found in yystate. |
1264`------------------------------------------------------------*/
1265 yynewstate:
1266 /* In all cases, when you get here, the value and location stacks
1267 have just been pushed. So pushing a state here evens the stacks. */
1268 yyssp++;
1269
1270 yysetstate:
1271 *yyssp = yystate;
1272
1273 if (yyss + yystacksize - 1 <= yyssp)
1274 {
1275 /* Get the current used size of the three stacks, in elements. */
1276 YYSIZE_T yysize = yyssp - yyss + 1;
1277
1278#ifdef yyoverflow
1279 {
1280 /* Give user a chance to reallocate the stack. Use copies of
1281 these so that the &'s don't force the real ones into
1282 memory. */
1283 YYSTYPE *yyvs1 = yyvs;
1284 yytype_int16 *yyss1 = yyss;
1285 YYLTYPE *yyls1 = yyls;
1286
1287 /* Each stack pointer address is followed by the size of the
1288 data in use in that stack, in bytes. This used to be a
1289 conditional around just the two extra args, but that might
1290 be undefined if yyoverflow is a macro. */
1291 yyoverflow (YY_("memory exhausted"),
1292 &yyss1, yysize * sizeof (*yyssp),
1293 &yyvs1, yysize * sizeof (*yyvsp),
1294 &yyls1, yysize * sizeof (*yylsp),
1295 &yystacksize);
1296 yyls = yyls1;
1297 yyss = yyss1;
1298 yyvs = yyvs1;
1299 }
1300#else /* no yyoverflow */
1301# ifndef YYSTACK_RELOCATE
1302 goto yyexhaustedlab;
1303# else
1304 /* Extend the stack our own way. */
1305 if (YYMAXDEPTH <= yystacksize)
1306 goto yyexhaustedlab;
1307 yystacksize *= 2;
1308 if (YYMAXDEPTH < yystacksize)
1309 yystacksize = YYMAXDEPTH;
1310
1311 {
1312 yytype_int16 *yyss1 = yyss;
1313 union yyalloc *yyptr =
1314 (union yyalloc *) YYSTACK_ALLOC (YYSTACK_BYTES (yystacksize));
1315 if (! yyptr)
1316 goto yyexhaustedlab;
1317 YYSTACK_RELOCATE (yyss);
1318 YYSTACK_RELOCATE (yyvs);
1319 YYSTACK_RELOCATE (yyls);
1320# undef YYSTACK_RELOCATE
1321 if (yyss1 != yyssa)
1322 YYSTACK_FREE (yyss1);
1323 }
1324# endif
1325#endif /* no yyoverflow */
1326
1327 yyssp = yyss + yysize - 1;
1328 yyvsp = yyvs + yysize - 1;
1329 yylsp = yyls + yysize - 1;
1330
1331 YYDPRINTF ((stderr, "Stack size increased to %lu\n",
1332 (unsigned long int) yystacksize));
1333
1334 if (yyss + yystacksize - 1 <= yyssp)
1335 YYABORT;
1336 }
1337
1338 YYDPRINTF ((stderr, "Entering state %d\n", yystate));
1339
1340 goto yybackup;
1341
1342/*-----------.
1343| yybackup. |
1344`-----------*/
1345yybackup:
1346
1347 /* Do appropriate processing given the current state. Read a
1348 look-ahead token if we need one and don't already have one. */
1349
1350 /* First try to decide what to do without reference to look-ahead token. */
1351 yyn = yypact[yystate];
1352 if (yyn == YYPACT_NINF)
1353 goto yydefault;
1354
1355 /* Not known => get a look-ahead token if don't already have one. */
1356
1357 /* YYCHAR is either YYEMPTY or YYEOF or a valid look-ahead symbol. */
1358 if (yychar == YYEMPTY)
1359 {
1360 YYDPRINTF ((stderr, "Reading a token: "));
1361 yychar = YYLEX;
1362 }
1363
1364 if (yychar <= YYEOF)
1365 {
1366 yychar = yytoken = YYEOF;
1367 YYDPRINTF ((stderr, "Now at end of input.\n"));
1368 }
1369 else
1370 {
1371 yytoken = YYTRANSLATE (yychar);
1372 YY_SYMBOL_PRINT ("Next token is", yytoken, &yylval, &yylloc);
1373 }
1374
1375 /* If the proper action on seeing token YYTOKEN is to reduce or to
1376 detect an error, take that action. */
1377 yyn += yytoken;
1378 if (yyn < 0 || YYLAST < yyn || yycheck[yyn] != yytoken)
1379 goto yydefault;
1380 yyn = yytable[yyn];
1381 if (yyn <= 0)
1382 {
1383 if (yyn == 0 || yyn == YYTABLE_NINF)
1384 goto yyerrlab;
1385 yyn = -yyn;
1386 goto yyreduce;
1387 }
1388
1389 if (yyn == YYFINAL)
1390 YYACCEPT;
1391
1392 /* Count tokens shifted since error; after three, turn off error
1393 status. */
1394 if (yyerrstatus)
1395 yyerrstatus--;
1396
1397 /* Shift the look-ahead token. */
1398 YY_SYMBOL_PRINT ("Shifting", yytoken, &yylval, &yylloc);
1399
1400 /* Discard the shifted token unless it is eof. */
1401 if (yychar != YYEOF)
1402 yychar = YYEMPTY;
1403
1404 yystate = yyn;
1405 *++yyvsp = yylval;
1406 *++yylsp = yylloc;
1407 goto yynewstate;
1408
1409
1410/*-----------------------------------------------------------.
1411| yydefault -- do the default action for the current state. |
1412`-----------------------------------------------------------*/
1413yydefault:
1414 yyn = yydefact[yystate];
1415 if (yyn == 0)
1416 goto yyerrlab;
1417 goto yyreduce;
1418
1419
1420/*-----------------------------.
1421| yyreduce -- Do a reduction. |
1422`-----------------------------*/
1423yyreduce:
1424 /* yyn is the number of a rule to reduce with. */
1425 yylen = yyr2[yyn];
1426
1427 /* If YYLEN is nonzero, implement the default value of the action:
1428 `$$ = $1'.
1429
1430 Otherwise, the following line sets YYVAL to garbage.
1431 This behavior is undocumented and Bison
1432 users should not rely upon it. Assigning to YYVAL
1433 unconditionally makes the parser a bit smaller, and it avoids a
1434 GCC warning that YYVAL may be used uninitialized. */
1435 yyval = yyvsp[1-yylen];
1436
1437 /* Default location. */
1438 YYLLOC_DEFAULT (yyloc, (yylsp - yylen), yylen);
1439 YY_REDUCE_PRINT (yyn);
1440 switch (yyn)
1441 {
1442 case 2:
1443#line 86 "dtc-parser.y"
1444 {
1445 the_boot_info = build_boot_info((yyvsp[(3) - (4)].re), (yyvsp[(4) - (4)].node));
1446 ;}
1447 break;
1448
1449 case 3:
1450#line 90 "dtc-parser.y"
1451 {
1452 the_boot_info = build_boot_info((yyvsp[(1) - (2)].re), (yyvsp[(2) - (2)].node));
1453 ;}
1454 break;
1455
1456 case 4:
1457#line 97 "dtc-parser.y"
1458 {
1459 (yyval.re) = NULL;
1460 ;}
1461 break;
1462
1463 case 5:
1464#line 101 "dtc-parser.y"
1465 {
1466 (yyval.re) = chain_reserve_entry((yyvsp[(1) - (2)].re), (yyvsp[(2) - (2)].re));
1467 ;}
1468 break;
1469
1470 case 6:
1471#line 108 "dtc-parser.y"
1472 {
1473 (yyval.re) = build_reserve_entry((yyvsp[(3) - (5)].addr), (yyvsp[(4) - (5)].addr), (yyvsp[(1) - (5)].labelref));
1474 ;}
1475 break;
1476
1477 case 7:
1478#line 115 "dtc-parser.y"
1479 {
1480 (yyval.re) = NULL;
1481 ;}
1482 break;
1483
1484 case 8:
1485#line 119 "dtc-parser.y"
1486 {
1487 (yyval.re) = chain_reserve_entry((yyvsp[(1) - (2)].re), (yyvsp[(2) - (2)].re));
1488 ;}
1489 break;
1490
1491 case 9:
1492#line 126 "dtc-parser.y"
1493 {
1494 (yyval.re) = (yyvsp[(1) - (1)].re);
1495 ;}
1496 break;
1497
1498 case 10:
1499#line 130 "dtc-parser.y"
1500 {
1501 (yyval.re) = build_reserve_entry((yyvsp[(3) - (6)].addr), (yyvsp[(5) - (6)].addr) - (yyvsp[(3) - (6)].addr) + 1, (yyvsp[(1) - (6)].labelref));
1502 ;}
1503 break;
1504
1505 case 11:
1506#line 137 "dtc-parser.y"
1507 {
1508 (yyval.addr) = eval_literal((yyvsp[(1) - (1)].literal), 0, 64);
1509 ;}
1510 break;
1511
1512 case 12:
1513#line 141 "dtc-parser.y"
1514 {
1515 (yyval.addr) = eval_literal((yyvsp[(1) - (1)].literal), 16, 64);
1516 ;}
1517 break;
1518
1519 case 13:
1520#line 148 "dtc-parser.y"
1521 {
1522 (yyval.node) = name_node((yyvsp[(2) - (2)].node), "", NULL);
1523 ;}
1524 break;
1525
1526 case 14:
1527#line 155 "dtc-parser.y"
1528 {
1529 (yyval.node) = build_node((yyvsp[(2) - (5)].proplist), (yyvsp[(3) - (5)].nodelist));
1530 ;}
1531 break;
1532
1533 case 15:
1534#line 162 "dtc-parser.y"
1535 {
1536 (yyval.proplist) = NULL;
1537 ;}
1538 break;
1539
1540 case 16:
1541#line 166 "dtc-parser.y"
1542 {
1543 (yyval.proplist) = chain_property((yyvsp[(2) - (2)].prop), (yyvsp[(1) - (2)].proplist));
1544 ;}
1545 break;
1546
1547 case 17:
1548#line 173 "dtc-parser.y"
1549 {
1550 (yyval.prop) = build_property((yyvsp[(2) - (5)].propnodename), (yyvsp[(4) - (5)].data), (yyvsp[(1) - (5)].labelref));
1551 ;}
1552 break;
1553
1554 case 18:
1555#line 177 "dtc-parser.y"
1556 {
1557 (yyval.prop) = build_property((yyvsp[(2) - (3)].propnodename), empty_data, (yyvsp[(1) - (3)].labelref));
1558 ;}
1559 break;
1560
1561 case 19:
1562#line 184 "dtc-parser.y"
1563 {
1564 (yyval.data) = data_merge((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].data));
1565 ;}
1566 break;
1567
1568 case 20:
1569#line 188 "dtc-parser.y"
1570 {
1571 (yyval.data) = data_merge((yyvsp[(1) - (4)].data), (yyvsp[(3) - (4)].data));
1572 ;}
1573 break;
1574
1575 case 21:
1576#line 192 "dtc-parser.y"
1577 {
1578 (yyval.data) = data_merge((yyvsp[(1) - (4)].data), (yyvsp[(3) - (4)].data));
1579 ;}
1580 break;
1581
1582 case 22:
1583#line 196 "dtc-parser.y"
1584 {
1585 (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), REF_PATH, (yyvsp[(2) - (2)].labelref));
1586 ;}
1587 break;
1588
1589 case 23:
1590#line 200 "dtc-parser.y"
1591 {
1592 (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref));
1593 ;}
1594 break;
1595
1596 case 24:
1597#line 207 "dtc-parser.y"
1598 {
1599 (yyval.data) = empty_data;
1600 ;}
1601 break;
1602
1603 case 25:
1604#line 211 "dtc-parser.y"
1605 {
1606 (yyval.data) = (yyvsp[(1) - (2)].data);
1607 ;}
1608 break;
1609
1610 case 26:
1611#line 215 "dtc-parser.y"
1612 {
1613 (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref));
1614 ;}
1615 break;
1616
1617 case 27:
1618#line 222 "dtc-parser.y"
1619 {
1620 (yyval.data) = empty_data;
1621 ;}
1622 break;
1623
1624 case 28:
1625#line 226 "dtc-parser.y"
1626 {
1627 (yyval.data) = data_append_cell((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].cell));
1628 ;}
1629 break;
1630
1631 case 29:
1632#line 230 "dtc-parser.y"
1633 {
1634 (yyval.data) = data_append_cell(data_add_marker((yyvsp[(1) - (2)].data), REF_PHANDLE,
1635 (yyvsp[(2) - (2)].labelref)), -1);
1636 ;}
1637 break;
1638
1639 case 30:
1640#line 235 "dtc-parser.y"
1641 {
1642 (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref));
1643 ;}
1644 break;
1645
1646 case 31:
1647#line 242 "dtc-parser.y"
1648 {
1649 (yyval.cbase) = 16;
1650 ;}
1651 break;
1652
1653 case 33:
1654#line 250 "dtc-parser.y"
1655 {
1656 (yyval.cell) = eval_literal((yyvsp[(1) - (1)].literal), 0, 32);
1657 ;}
1658 break;
1659
1660 case 34:
1661#line 254 "dtc-parser.y"
1662 {
1663 (yyval.cell) = eval_literal((yyvsp[(2) - (2)].literal), (yyvsp[(1) - (2)].cbase), 32);
1664 ;}
1665 break;
1666
1667 case 35:
1668#line 261 "dtc-parser.y"
1669 {
1670 (yyval.data) = empty_data;
1671 ;}
1672 break;
1673
1674 case 36:
1675#line 265 "dtc-parser.y"
1676 {
1677 (yyval.data) = data_append_byte((yyvsp[(1) - (2)].data), (yyvsp[(2) - (2)].byte));
1678 ;}
1679 break;
1680
1681 case 37:
1682#line 269 "dtc-parser.y"
1683 {
1684 (yyval.data) = data_add_marker((yyvsp[(1) - (2)].data), LABEL, (yyvsp[(2) - (2)].labelref));
1685 ;}
1686 break;
1687
1688 case 38:
1689#line 276 "dtc-parser.y"
1690 {
1691 (yyval.nodelist) = NULL;
1692 ;}
1693 break;
1694
1695 case 39:
1696#line 280 "dtc-parser.y"
1697 {
1698 (yyval.nodelist) = chain_node((yyvsp[(1) - (2)].node), (yyvsp[(2) - (2)].nodelist));
1699 ;}
1700 break;
1701
1702 case 40:
1703#line 284 "dtc-parser.y"
1704 {
1705 yyerror("syntax error: properties must precede subnodes\n");
1706 YYERROR;
1707 ;}
1708 break;
1709
1710 case 41:
1711#line 292 "dtc-parser.y"
1712 {
1713 (yyval.node) = name_node((yyvsp[(3) - (3)].node), (yyvsp[(2) - (3)].propnodename), (yyvsp[(1) - (3)].labelref));
1714 ;}
1715 break;
1716
1717 case 42:
1718#line 299 "dtc-parser.y"
1719 {
1720 (yyval.labelref) = NULL;
1721 ;}
1722 break;
1723
1724 case 43:
1725#line 303 "dtc-parser.y"
1726 {
1727 (yyval.labelref) = (yyvsp[(1) - (1)].labelref);
1728 ;}
1729 break;
1730
1731
1732/* Line 1267 of yacc.c. */
1733#line 1734 "dtc-parser.tab.c"
1734 default: break;
1735 }
1736 YY_SYMBOL_PRINT ("-> $$ =", yyr1[yyn], &yyval, &yyloc);
1737
1738 YYPOPSTACK (yylen);
1739 yylen = 0;
1740 YY_STACK_PRINT (yyss, yyssp);
1741
1742 *++yyvsp = yyval;
1743 *++yylsp = yyloc;
1744
1745 /* Now `shift' the result of the reduction. Determine what state
1746 that goes to, based on the state we popped back to and the rule
1747 number reduced by. */
1748
1749 yyn = yyr1[yyn];
1750
1751 yystate = yypgoto[yyn - YYNTOKENS] + *yyssp;
1752 if (0 <= yystate && yystate <= YYLAST && yycheck[yystate] == *yyssp)
1753 yystate = yytable[yystate];
1754 else
1755 yystate = yydefgoto[yyn - YYNTOKENS];
1756
1757 goto yynewstate;
1758
1759
1760/*------------------------------------.
1761| yyerrlab -- here on detecting error |
1762`------------------------------------*/
1763yyerrlab:
1764 /* If not already recovering from an error, report this error. */
1765 if (!yyerrstatus)
1766 {
1767 ++yynerrs;
1768#if ! YYERROR_VERBOSE
1769 yyerror (YY_("syntax error"));
1770#else
1771 {
1772 YYSIZE_T yysize = yysyntax_error (0, yystate, yychar);
1773 if (yymsg_alloc < yysize && yymsg_alloc < YYSTACK_ALLOC_MAXIMUM)
1774 {
1775 YYSIZE_T yyalloc = 2 * yysize;
1776 if (! (yysize <= yyalloc && yyalloc <= YYSTACK_ALLOC_MAXIMUM))
1777 yyalloc = YYSTACK_ALLOC_MAXIMUM;
1778 if (yymsg != yymsgbuf)
1779 YYSTACK_FREE (yymsg);
1780 yymsg = (char *) YYSTACK_ALLOC (yyalloc);
1781 if (yymsg)
1782 yymsg_alloc = yyalloc;
1783 else
1784 {
1785 yymsg = yymsgbuf;
1786 yymsg_alloc = sizeof yymsgbuf;
1787 }
1788 }
1789
1790 if (0 < yysize && yysize <= yymsg_alloc)
1791 {
1792 (void) yysyntax_error (yymsg, yystate, yychar);
1793 yyerror (yymsg);
1794 }
1795 else
1796 {
1797 yyerror (YY_("syntax error"));
1798 if (yysize != 0)
1799 goto yyexhaustedlab;
1800 }
1801 }
1802#endif
1803 }
1804
1805 yyerror_range[0] = yylloc;
1806
1807 if (yyerrstatus == 3)
1808 {
1809 /* If just tried and failed to reuse look-ahead token after an
1810 error, discard it. */
1811
1812 if (yychar <= YYEOF)
1813 {
1814 /* Return failure if at end of input. */
1815 if (yychar == YYEOF)
1816 YYABORT;
1817 }
1818 else
1819 {
1820 yydestruct ("Error: discarding",
1821 yytoken, &yylval, &yylloc);
1822 yychar = YYEMPTY;
1823 }
1824 }
1825
1826 /* Else will try to reuse look-ahead token after shifting the error
1827 token. */
1828 goto yyerrlab1;
1829
1830
1831/*---------------------------------------------------.
1832| yyerrorlab -- error raised explicitly by YYERROR. |
1833`---------------------------------------------------*/
1834yyerrorlab:
1835
1836 /* Pacify compilers like GCC when the user code never invokes
1837 YYERROR and the label yyerrorlab therefore never appears in user
1838 code. */
1839 if (/*CONSTCOND*/ 0)
1840 goto yyerrorlab;
1841
1842 yyerror_range[0] = yylsp[1-yylen];
1843 /* Do not reclaim the symbols of the rule which action triggered
1844 this YYERROR. */
1845 YYPOPSTACK (yylen);
1846 yylen = 0;
1847 YY_STACK_PRINT (yyss, yyssp);
1848 yystate = *yyssp;
1849 goto yyerrlab1;
1850
1851
1852/*-------------------------------------------------------------.
1853| yyerrlab1 -- common code for both syntax error and YYERROR. |
1854`-------------------------------------------------------------*/
1855yyerrlab1:
1856 yyerrstatus = 3; /* Each real token shifted decrements this. */
1857
1858 for (;;)
1859 {
1860 yyn = yypact[yystate];
1861 if (yyn != YYPACT_NINF)
1862 {
1863 yyn += YYTERROR;
1864 if (0 <= yyn && yyn <= YYLAST && yycheck[yyn] == YYTERROR)
1865 {
1866 yyn = yytable[yyn];
1867 if (0 < yyn)
1868 break;
1869 }
1870 }
1871
1872 /* Pop the current state because it cannot handle the error token. */
1873 if (yyssp == yyss)
1874 YYABORT;
1875
1876 yyerror_range[0] = *yylsp;
1877 yydestruct ("Error: popping",
1878 yystos[yystate], yyvsp, yylsp);
1879 YYPOPSTACK (1);
1880 yystate = *yyssp;
1881 YY_STACK_PRINT (yyss, yyssp);
1882 }
1883
1884 if (yyn == YYFINAL)
1885 YYACCEPT;
1886
1887 *++yyvsp = yylval;
1888
1889 yyerror_range[1] = yylloc;
1890 /* Using YYLLOC is tempting, but would change the location of
1891 the look-ahead. YYLOC is available though. */
1892 YYLLOC_DEFAULT (yyloc, (yyerror_range - 1), 2);
1893 *++yylsp = yyloc;
1894
1895 /* Shift the error token. */
1896 YY_SYMBOL_PRINT ("Shifting", yystos[yyn], yyvsp, yylsp);
1897
1898 yystate = yyn;
1899 goto yynewstate;
1900
1901
1902/*-------------------------------------.
1903| yyacceptlab -- YYACCEPT comes here. |
1904`-------------------------------------*/
1905yyacceptlab:
1906 yyresult = 0;
1907 goto yyreturn;
1908
1909/*-----------------------------------.
1910| yyabortlab -- YYABORT comes here. |
1911`-----------------------------------*/
1912yyabortlab:
1913 yyresult = 1;
1914 goto yyreturn;
1915
1916#ifndef yyoverflow
1917/*-------------------------------------------------.
1918| yyexhaustedlab -- memory exhaustion comes here. |
1919`-------------------------------------------------*/
1920yyexhaustedlab:
1921 yyerror (YY_("memory exhausted"));
1922 yyresult = 2;
1923 /* Fall through. */
1924#endif
1925
1926yyreturn:
1927 if (yychar != YYEOF && yychar != YYEMPTY)
1928 yydestruct ("Cleanup: discarding lookahead",
1929 yytoken, &yylval, &yylloc);
1930 /* Do not reclaim the symbols of the rule which action triggered
1931 this YYABORT or YYACCEPT. */
1932 YYPOPSTACK (yylen);
1933 YY_STACK_PRINT (yyss, yyssp);
1934 while (yyssp != yyss)
1935 {
1936 yydestruct ("Cleanup: popping",
1937 yystos[*yyssp], yyvsp, yylsp);
1938 YYPOPSTACK (1);
1939 }
1940#ifndef yyoverflow
1941 if (yyss != yyssa)
1942 YYSTACK_FREE (yyss);
1943#endif
1944#if YYERROR_VERBOSE
1945 if (yymsg != yymsgbuf)
1946 YYSTACK_FREE (yymsg);
1947#endif
1948 /* Make sure YYID is used. */
1949 return YYID (yyresult);
1950}
1951
1952
1953#line 308 "dtc-parser.y"
1954
1955
1956void yyerror (char const *s)
1957{
1958 const char *fname = srcpos_filename_for_num(yylloc.filenum);
1959
1960 if (strcmp(fname, "-") == 0)
1961 fname = "stdin";
1962
1963 fprintf(stderr, "%s:%d %s\n",
1964 fname, yylloc.first_line, s);
1965}
1966
1967unsigned long long eval_literal(const char *s, int base, int bits)
1968{
1969 unsigned long long val;
1970 char *e;
1971
1972 errno = 0;
1973 val = strtoull(s, &e, base);
1974 if (*e)
1975 yyerror("bad characters in literal");
1976 else if ((errno == ERANGE)
1977 || ((bits < 64) && (val >= (1ULL << bits))))
1978 yyerror("literal out of range");
1979 else if (errno != 0)
1980 yyerror("bad literal");
1981 return val;
1982}
1983
diff --git a/arch/powerpc/boot/dtc-src/dtc-parser.tab.h_shipped b/arch/powerpc/boot/dtc-src/dtc-parser.tab.h_shipped
new file mode 100644
index 000000000000..4707b029ed25
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/dtc-parser.tab.h_shipped
@@ -0,0 +1,111 @@
1/* A Bison parser, made by GNU Bison 2.3. */
2
3/* Skeleton interface for Bison's Yacc-like parsers in C
4
5 Copyright (C) 1984, 1989, 1990, 2000, 2001, 2002, 2003, 2004, 2005, 2006
6 Free Software Foundation, Inc.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 51 Franklin Street, Fifth Floor,
21 Boston, MA 02110-1301, USA. */
22
23/* As a special exception, you may create a larger work that contains
24 part or all of the Bison parser skeleton and distribute that work
25 under terms of your choice, so long as that work isn't itself a
26 parser generator using the skeleton or a modified version thereof
27 as a parser skeleton. Alternatively, if you modify or redistribute
28 the parser skeleton itself, you may (at your option) remove this
29 special exception, which will cause the skeleton and the resulting
30 Bison output files to be licensed under the GNU General Public
31 License without this special exception.
32
33 This special exception was added by the Free Software Foundation in
34 version 2.2 of Bison. */
35
36/* Tokens. */
37#ifndef YYTOKENTYPE
38# define YYTOKENTYPE
39 /* Put the tokens into the symbol table, so that GDB and other debuggers
40 know about them. */
41 enum yytokentype {
42 DT_V1 = 258,
43 DT_MEMRESERVE = 259,
44 DT_PROPNODENAME = 260,
45 DT_LITERAL = 261,
46 DT_LEGACYLITERAL = 262,
47 DT_BASE = 263,
48 DT_BYTE = 264,
49 DT_STRING = 265,
50 DT_LABEL = 266,
51 DT_REF = 267
52 };
53#endif
54/* Tokens. */
55#define DT_V1 258
56#define DT_MEMRESERVE 259
57#define DT_PROPNODENAME 260
58#define DT_LITERAL 261
59#define DT_LEGACYLITERAL 262
60#define DT_BASE 263
61#define DT_BYTE 264
62#define DT_STRING 265
63#define DT_LABEL 266
64#define DT_REF 267
65
66
67
68
69#if ! defined YYSTYPE && ! defined YYSTYPE_IS_DECLARED
70typedef union YYSTYPE
71#line 34 "dtc-parser.y"
72{
73 char *propnodename;
74 char *literal;
75 char *labelref;
76 unsigned int cbase;
77 u8 byte;
78 struct data data;
79
80 u64 addr;
81 cell_t cell;
82 struct property *prop;
83 struct property *proplist;
84 struct node *node;
85 struct node *nodelist;
86 struct reserve_info *re;
87}
88/* Line 1489 of yacc.c. */
89#line 90 "dtc-parser.tab.h"
90 YYSTYPE;
91# define yystype YYSTYPE /* obsolescent; will be withdrawn */
92# define YYSTYPE_IS_DECLARED 1
93# define YYSTYPE_IS_TRIVIAL 1
94#endif
95
96extern YYSTYPE yylval;
97
98#if ! defined YYLTYPE && ! defined YYLTYPE_IS_DECLARED
99typedef struct YYLTYPE
100{
101 int first_line;
102 int first_column;
103 int last_line;
104 int last_column;
105} YYLTYPE;
106# define yyltype YYLTYPE /* obsolescent; will be withdrawn */
107# define YYLTYPE_IS_DECLARED 1
108# define YYLTYPE_IS_TRIVIAL 1
109#endif
110
111extern YYLTYPE yylloc;
diff --git a/arch/powerpc/boot/dtc-src/dtc-parser.y b/arch/powerpc/boot/dtc-src/dtc-parser.y
new file mode 100644
index 000000000000..002ea7fef184
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/dtc-parser.y
@@ -0,0 +1,336 @@
1/*
2 * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005.
3 *
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of the
8 * License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
18 * USA
19 */
20
21%locations
22
23%{
24#include "dtc.h"
25#include "srcpos.h"
26
27int yylex(void);
28unsigned long long eval_literal(const char *s, int base, int bits);
29
30extern struct boot_info *the_boot_info;
31
32%}
33
34%union {
35 char *propnodename;
36 char *literal;
37 char *labelref;
38 unsigned int cbase;
39 u8 byte;
40 struct data data;
41
42 u64 addr;
43 cell_t cell;
44 struct property *prop;
45 struct property *proplist;
46 struct node *node;
47 struct node *nodelist;
48 struct reserve_info *re;
49}
50
51%token DT_V1
52%token DT_MEMRESERVE
53%token <propnodename> DT_PROPNODENAME
54%token <literal> DT_LITERAL
55%token <literal> DT_LEGACYLITERAL
56%token <cbase> DT_BASE
57%token <byte> DT_BYTE
58%token <data> DT_STRING
59%token <labelref> DT_LABEL
60%token <labelref> DT_REF
61
62%type <data> propdata
63%type <data> propdataprefix
64%type <re> memreserve
65%type <re> memreserves
66%type <re> v0_memreserve
67%type <re> v0_memreserves
68%type <addr> addr
69%type <data> celllist
70%type <cbase> cellbase
71%type <cell> cellval
72%type <data> bytestring
73%type <prop> propdef
74%type <proplist> proplist
75
76%type <node> devicetree
77%type <node> nodedef
78%type <node> subnode
79%type <nodelist> subnodes
80%type <labelref> label
81
82%%
83
84sourcefile:
85 DT_V1 ';' memreserves devicetree
86 {
87 the_boot_info = build_boot_info($3, $4);
88 }
89 | v0_memreserves devicetree
90 {
91 the_boot_info = build_boot_info($1, $2);
92 }
93 ;
94
95memreserves:
96 /* empty */
97 {
98 $$ = NULL;
99 }
100 | memreserve memreserves
101 {
102 $$ = chain_reserve_entry($1, $2);
103 }
104 ;
105
106memreserve:
107 label DT_MEMRESERVE addr addr ';'
108 {
109 $$ = build_reserve_entry($3, $4, $1);
110 }
111 ;
112
113v0_memreserves:
114 /* empty */
115 {
116 $$ = NULL;
117 }
118 | v0_memreserve v0_memreserves
119 {
120 $$ = chain_reserve_entry($1, $2);
121 };
122 ;
123
124v0_memreserve:
125 memreserve
126 {
127 $$ = $1;
128 }
129 | label DT_MEMRESERVE addr '-' addr ';'
130 {
131 $$ = build_reserve_entry($3, $5 - $3 + 1, $1);
132 }
133 ;
134
135addr:
136 DT_LITERAL
137 {
138 $$ = eval_literal($1, 0, 64);
139 }
140 | DT_LEGACYLITERAL
141 {
142 $$ = eval_literal($1, 16, 64);
143 }
144 ;
145
146devicetree:
147 '/' nodedef
148 {
149 $$ = name_node($2, "", NULL);
150 }
151 ;
152
153nodedef:
154 '{' proplist subnodes '}' ';'
155 {
156 $$ = build_node($2, $3);
157 }
158 ;
159
160proplist:
161 /* empty */
162 {
163 $$ = NULL;
164 }
165 | proplist propdef
166 {
167 $$ = chain_property($2, $1);
168 }
169 ;
170
171propdef:
172 label DT_PROPNODENAME '=' propdata ';'
173 {
174 $$ = build_property($2, $4, $1);
175 }
176 | label DT_PROPNODENAME ';'
177 {
178 $$ = build_property($2, empty_data, $1);
179 }
180 ;
181
182propdata:
183 propdataprefix DT_STRING
184 {
185 $$ = data_merge($1, $2);
186 }
187 | propdataprefix '<' celllist '>'
188 {
189 $$ = data_merge($1, $3);
190 }
191 | propdataprefix '[' bytestring ']'
192 {
193 $$ = data_merge($1, $3);
194 }
195 | propdataprefix DT_REF
196 {
197 $$ = data_add_marker($1, REF_PATH, $2);
198 }
199 | propdata DT_LABEL
200 {
201 $$ = data_add_marker($1, LABEL, $2);
202 }
203 ;
204
205propdataprefix:
206 /* empty */
207 {
208 $$ = empty_data;
209 }
210 | propdata ','
211 {
212 $$ = $1;
213 }
214 | propdataprefix DT_LABEL
215 {
216 $$ = data_add_marker($1, LABEL, $2);
217 }
218 ;
219
220celllist:
221 /* empty */
222 {
223 $$ = empty_data;
224 }
225 | celllist cellval
226 {
227 $$ = data_append_cell($1, $2);
228 }
229 | celllist DT_REF
230 {
231 $$ = data_append_cell(data_add_marker($1, REF_PHANDLE,
232 $2), -1);
233 }
234 | celllist DT_LABEL
235 {
236 $$ = data_add_marker($1, LABEL, $2);
237 }
238 ;
239
240cellbase:
241 /* empty */
242 {
243 $$ = 16;
244 }
245 | DT_BASE
246 ;
247
248cellval:
249 DT_LITERAL
250 {
251 $$ = eval_literal($1, 0, 32);
252 }
253 | cellbase DT_LEGACYLITERAL
254 {
255 $$ = eval_literal($2, $1, 32);
256 }
257 ;
258
259bytestring:
260 /* empty */
261 {
262 $$ = empty_data;
263 }
264 | bytestring DT_BYTE
265 {
266 $$ = data_append_byte($1, $2);
267 }
268 | bytestring DT_LABEL
269 {
270 $$ = data_add_marker($1, LABEL, $2);
271 }
272 ;
273
274subnodes:
275 /* empty */
276 {
277 $$ = NULL;
278 }
279 | subnode subnodes
280 {
281 $$ = chain_node($1, $2);
282 }
283 | subnode propdef
284 {
285 yyerror("syntax error: properties must precede subnodes\n");
286 YYERROR;
287 }
288 ;
289
290subnode:
291 label DT_PROPNODENAME nodedef
292 {
293 $$ = name_node($3, $2, $1);
294 }
295 ;
296
297label:
298 /* empty */
299 {
300 $$ = NULL;
301 }
302 | DT_LABEL
303 {
304 $$ = $1;
305 }
306 ;
307
308%%
309
310void yyerror (char const *s)
311{
312 const char *fname = srcpos_filename_for_num(yylloc.filenum);
313
314 if (strcmp(fname, "-") == 0)
315 fname = "stdin";
316
317 fprintf(stderr, "%s:%d %s\n",
318 fname, yylloc.first_line, s);
319}
320
321unsigned long long eval_literal(const char *s, int base, int bits)
322{
323 unsigned long long val;
324 char *e;
325
326 errno = 0;
327 val = strtoull(s, &e, base);
328 if (*e)
329 yyerror("bad characters in literal");
330 else if ((errno == ERANGE)
331 || ((bits < 64) && (val >= (1ULL << bits))))
332 yyerror("literal out of range");
333 else if (errno != 0)
334 yyerror("bad literal");
335 return val;
336}
diff --git a/arch/powerpc/boot/dtc-src/dtc.c b/arch/powerpc/boot/dtc-src/dtc.c
new file mode 100644
index 000000000000..01131d7c2d5e
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/dtc.c
@@ -0,0 +1,231 @@
1/*
2 * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005.
3 *
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of the
8 * License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
18 * USA
19 */
20
21#include "dtc.h"
22#include "srcpos.h"
23
24#include "version_gen.h"
25
26/*
27 * Command line options
28 */
29int quiet; /* Level of quietness */
30int reservenum; /* Number of memory reservation slots */
31int minsize; /* Minimum blob size */
32int padsize; /* Additional padding to blob */
33
34char *join_path(const char *path, const char *name)
35{
36 int lenp = strlen(path);
37 int lenn = strlen(name);
38 int len;
39 int needslash = 1;
40 char *str;
41
42 len = lenp + lenn + 2;
43 if ((lenp > 0) && (path[lenp-1] == '/')) {
44 needslash = 0;
45 len--;
46 }
47
48 str = xmalloc(len);
49 memcpy(str, path, lenp);
50 if (needslash) {
51 str[lenp] = '/';
52 lenp++;
53 }
54 memcpy(str+lenp, name, lenn+1);
55 return str;
56}
57
58void fill_fullpaths(struct node *tree, const char *prefix)
59{
60 struct node *child;
61 const char *unit;
62
63 tree->fullpath = join_path(prefix, tree->name);
64
65 unit = strchr(tree->name, '@');
66 if (unit)
67 tree->basenamelen = unit - tree->name;
68 else
69 tree->basenamelen = strlen(tree->name);
70
71 for_each_child(tree, child)
72 fill_fullpaths(child, tree->fullpath);
73}
74
75static void __attribute__ ((noreturn)) usage(void)
76{
77 fprintf(stderr, "Usage:\n");
78 fprintf(stderr, "\tdtc [options] <input file>\n");
79 fprintf(stderr, "\nOptions:\n");
80 fprintf(stderr, "\t-h\n");
81 fprintf(stderr, "\t\tThis help text\n");
82 fprintf(stderr, "\t-q\n");
83 fprintf(stderr, "\t\tQuiet: -q suppress warnings, -qq errors, -qqq all\n");
84 fprintf(stderr, "\t-I <input format>\n");
85 fprintf(stderr, "\t\tInput formats are:\n");
86 fprintf(stderr, "\t\t\tdts - device tree source text\n");
87 fprintf(stderr, "\t\t\tdtb - device tree blob\n");
88 fprintf(stderr, "\t\t\tfs - /proc/device-tree style directory\n");
89 fprintf(stderr, "\t-o <output file>\n");
90 fprintf(stderr, "\t-O <output format>\n");
91 fprintf(stderr, "\t\tOutput formats are:\n");
92 fprintf(stderr, "\t\t\tdts - device tree source text\n");
93 fprintf(stderr, "\t\t\tdtb - device tree blob\n");
94 fprintf(stderr, "\t\t\tasm - assembler source\n");
95 fprintf(stderr, "\t-V <output version>\n");
96 fprintf(stderr, "\t\tBlob version to produce, defaults to %d (relevant for dtb\n\t\tand asm output only)\n", DEFAULT_FDT_VERSION);
97 fprintf(stderr, "\t-R <number>\n");
98 fprintf(stderr, "\t\tMake space for <number> reserve map entries (relevant for \n\t\tdtb and asm output only)\n");
99 fprintf(stderr, "\t-S <bytes>\n");
100 fprintf(stderr, "\t\tMake the blob at least <bytes> long (extra space)\n");
101 fprintf(stderr, "\t-p <bytes>\n");
102 fprintf(stderr, "\t\tAdd padding to the blob of <bytes> long (extra space)\n");
103 fprintf(stderr, "\t-b <number>\n");
104 fprintf(stderr, "\t\tSet the physical boot cpu\n");
105 fprintf(stderr, "\t-f\n");
106 fprintf(stderr, "\t\tForce - try to produce output even if the input tree has errors\n");
107 fprintf(stderr, "\t-v\n");
108 fprintf(stderr, "\t\tPrint DTC version and exit\n");
109 exit(2);
110}
111
112int main(int argc, char *argv[])
113{
114 struct boot_info *bi;
115 const char *inform = "dts";
116 const char *outform = "dts";
117 const char *outname = "-";
118 int force = 0, check = 0;
119 const char *arg;
120 int opt;
121 FILE *inf = NULL;
122 FILE *outf = NULL;
123 int outversion = DEFAULT_FDT_VERSION;
124 int boot_cpuid_phys = 0xfeedbeef;
125
126 quiet = 0;
127 reservenum = 0;
128 minsize = 0;
129 padsize = 0;
130
131 while ((opt = getopt(argc, argv, "hI:O:o:V:R:S:p:fcqb:v")) != EOF) {
132 switch (opt) {
133 case 'I':
134 inform = optarg;
135 break;
136 case 'O':
137 outform = optarg;
138 break;
139 case 'o':
140 outname = optarg;
141 break;
142 case 'V':
143 outversion = strtol(optarg, NULL, 0);
144 break;
145 case 'R':
146 reservenum = strtol(optarg, NULL, 0);
147 break;
148 case 'S':
149 minsize = strtol(optarg, NULL, 0);
150 break;
151 case 'p':
152 padsize = strtol(optarg, NULL, 0);
153 break;
154 case 'f':
155 force = 1;
156 break;
157 case 'c':
158 check = 1;
159 break;
160 case 'q':
161 quiet++;
162 break;
163 case 'b':
164 boot_cpuid_phys = strtol(optarg, NULL, 0);
165 break;
166 case 'v':
167 printf("Version: %s\n", DTC_VERSION);
168 exit(0);
169 case 'h':
170 default:
171 usage();
172 }
173 }
174
175 if (argc > (optind+1))
176 usage();
177 else if (argc < (optind+1))
178 arg = "-";
179 else
180 arg = argv[optind];
181
182 /* minsize and padsize are mutually exclusive */
183 if ((minsize) && (padsize)) {
184 die("Can't set both -p and -S\n");
185 }
186
187 fprintf(stderr, "DTC: %s->%s on file \"%s\"\n",
188 inform, outform, arg);
189
190 if (streq(inform, "dts")) {
191 bi = dt_from_source(arg);
192 } else if (streq(inform, "fs")) {
193 bi = dt_from_fs(arg);
194 } else if(streq(inform, "dtb")) {
195 inf = dtc_open_file(arg);
196 bi = dt_from_blob(inf);
197 } else {
198 die("Unknown input format \"%s\"\n", inform);
199 }
200
201 if (inf && (inf != stdin))
202 fclose(inf);
203
204 if (! bi || ! bi->dt)
205 die("Couldn't read input tree\n");
206
207 process_checks(force, bi, check, outversion, boot_cpuid_phys);
208
209 if (streq(outname, "-")) {
210 outf = stdout;
211 } else {
212 outf = fopen(outname, "w");
213 if (! outf)
214 die("Couldn't open output file %s: %s\n",
215 outname, strerror(errno));
216 }
217
218 if (streq(outform, "dts")) {
219 dt_to_source(outf, bi);
220 } else if (streq(outform, "dtb")) {
221 dt_to_blob(outf, bi, outversion, boot_cpuid_phys);
222 } else if (streq(outform, "asm")) {
223 dt_to_asm(outf, bi, outversion, boot_cpuid_phys);
224 } else if (streq(outform, "null")) {
225 /* do nothing */
226 } else {
227 die("Unknown output format \"%s\"\n", outform);
228 }
229
230 exit(0);
231}
diff --git a/arch/powerpc/boot/dtc-src/dtc.h b/arch/powerpc/boot/dtc-src/dtc.h
new file mode 100644
index 000000000000..65281777a167
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/dtc.h
@@ -0,0 +1,269 @@
1#ifndef _DTC_H
2#define _DTC_H
3
4/*
5 * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005.
6 *
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of the
11 * License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
21 * USA
22 */
23
24#include <stdio.h>
25#include <string.h>
26#include <stdlib.h>
27#include <stdint.h>
28#include <stdarg.h>
29#include <assert.h>
30#include <ctype.h>
31#include <errno.h>
32#include <unistd.h>
33#include <netinet/in.h>
34#include <endian.h>
35#include <byteswap.h>
36
37#include <fdt.h>
38
39#define DEFAULT_FDT_VERSION 17
40/*
41 * Command line options
42 */
43extern int quiet; /* Level of quietness */
44extern int reservenum; /* Number of memory reservation slots */
45extern int minsize; /* Minimum blob size */
46extern int padsize; /* Additional padding to blob */
47
48static inline void __attribute__((noreturn)) die(char * str, ...)
49{
50 va_list ap;
51
52 va_start(ap, str);
53 fprintf(stderr, "FATAL ERROR: ");
54 vfprintf(stderr, str, ap);
55 exit(1);
56}
57
58static inline void *xmalloc(size_t len)
59{
60 void *new = malloc(len);
61
62 if (! new)
63 die("malloc() failed\n");
64
65 return new;
66}
67
68static inline void *xrealloc(void *p, size_t len)
69{
70 void *new = realloc(p, len);
71
72 if (! new)
73 die("realloc() failed (len=%d)\n", len);
74
75 return new;
76}
77
78typedef uint8_t u8;
79typedef uint16_t u16;
80typedef uint32_t u32;
81typedef uint64_t u64;
82typedef u32 cell_t;
83
84#define cpu_to_be16(x) htons(x)
85#define be16_to_cpu(x) ntohs(x)
86
87#define cpu_to_be32(x) htonl(x)
88#define be32_to_cpu(x) ntohl(x)
89
90#if __BYTE_ORDER == __BIG_ENDIAN
91#define cpu_to_be64(x) (x)
92#define be64_to_cpu(x) (x)
93#else
94#define cpu_to_be64(x) bswap_64(x)
95#define be64_to_cpu(x) bswap_64(x)
96#endif
97
98#define streq(a, b) (strcmp((a), (b)) == 0)
99#define strneq(a, b, n) (strncmp((a), (b), (n)) == 0)
100
101#define ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1))
102#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
103
104/* Data blobs */
105enum markertype {
106 REF_PHANDLE,
107 REF_PATH,
108 LABEL,
109};
110
111struct marker {
112 enum markertype type;
113 int offset;
114 char *ref;
115 struct marker *next;
116};
117
118struct data {
119 int len;
120 char *val;
121 int asize;
122 struct marker *markers;
123};
124
125
126#define empty_data ((struct data){ /* all .members = 0 or NULL */ })
127
128#define for_each_marker(m) \
129 for (; (m); (m) = (m)->next)
130#define for_each_marker_of_type(m, t) \
131 for_each_marker(m) \
132 if ((m)->type == (t))
133
134void data_free(struct data d);
135
136struct data data_grow_for(struct data d, int xlen);
137
138struct data data_copy_mem(const char *mem, int len);
139struct data data_copy_escape_string(const char *s, int len);
140struct data data_copy_file(FILE *f, size_t len);
141
142struct data data_append_data(struct data d, const void *p, int len);
143struct data data_insert_at_marker(struct data d, struct marker *m,
144 const void *p, int len);
145struct data data_merge(struct data d1, struct data d2);
146struct data data_append_cell(struct data d, cell_t word);
147struct data data_append_re(struct data d, const struct fdt_reserve_entry *re);
148struct data data_append_addr(struct data d, u64 addr);
149struct data data_append_byte(struct data d, uint8_t byte);
150struct data data_append_zeroes(struct data d, int len);
151struct data data_append_align(struct data d, int align);
152
153struct data data_add_marker(struct data d, enum markertype type, char *ref);
154
155int data_is_one_string(struct data d);
156
157/* DT constraints */
158
159#define MAX_PROPNAME_LEN 31
160#define MAX_NODENAME_LEN 31
161
162/* Live trees */
163struct property {
164 char *name;
165 struct data val;
166
167 struct property *next;
168
169 char *label;
170};
171
172struct node {
173 char *name;
174 struct property *proplist;
175 struct node *children;
176
177 struct node *parent;
178 struct node *next_sibling;
179
180 char *fullpath;
181 int basenamelen;
182
183 cell_t phandle;
184 int addr_cells, size_cells;
185
186 char *label;
187};
188
189#define for_each_property(n, p) \
190 for ((p) = (n)->proplist; (p); (p) = (p)->next)
191
192#define for_each_child(n, c) \
193 for ((c) = (n)->children; (c); (c) = (c)->next_sibling)
194
195struct property *build_property(char *name, struct data val, char *label);
196struct property *chain_property(struct property *first, struct property *list);
197struct property *reverse_properties(struct property *first);
198
199struct node *build_node(struct property *proplist, struct node *children);
200struct node *name_node(struct node *node, char *name, char *label);
201struct node *chain_node(struct node *first, struct node *list);
202
203void add_property(struct node *node, struct property *prop);
204void add_child(struct node *parent, struct node *child);
205
206const char *get_unitname(struct node *node);
207struct property *get_property(struct node *node, const char *propname);
208cell_t propval_cell(struct property *prop);
209struct node *get_subnode(struct node *node, const char *nodename);
210struct node *get_node_by_path(struct node *tree, const char *path);
211struct node *get_node_by_label(struct node *tree, const char *label);
212struct node *get_node_by_phandle(struct node *tree, cell_t phandle);
213struct node *get_node_by_ref(struct node *tree, const char *ref);
214cell_t get_node_phandle(struct node *root, struct node *node);
215
216/* Boot info (tree plus memreserve information */
217
218struct reserve_info {
219 struct fdt_reserve_entry re;
220
221 struct reserve_info *next;
222
223 char *label;
224};
225
226struct reserve_info *build_reserve_entry(u64 start, u64 len, char *label);
227struct reserve_info *chain_reserve_entry(struct reserve_info *first,
228 struct reserve_info *list);
229struct reserve_info *add_reserve_entry(struct reserve_info *list,
230 struct reserve_info *new);
231
232
233struct boot_info {
234 struct reserve_info *reservelist;
235 struct node *dt; /* the device tree */
236};
237
238struct boot_info *build_boot_info(struct reserve_info *reservelist,
239 struct node *tree);
240
241/* Checks */
242
243void process_checks(int force, struct boot_info *bi,
244 int checkflag, int outversion, int boot_cpuid_phys);
245
246/* Flattened trees */
247
248void dt_to_blob(FILE *f, struct boot_info *bi, int version,
249 int boot_cpuid_phys);
250void dt_to_asm(FILE *f, struct boot_info *bi, int version,
251 int boot_cpuid_phys);
252
253struct boot_info *dt_from_blob(FILE *f);
254
255/* Tree source */
256
257void dt_to_source(FILE *f, struct boot_info *bi);
258struct boot_info *dt_from_source(const char *f);
259
260/* FS trees */
261
262struct boot_info *dt_from_fs(const char *dirname);
263
264/* misc */
265
266char *join_path(const char *path, const char *name);
267void fill_fullpaths(struct node *tree, const char *prefix);
268
269#endif /* _DTC_H */
diff --git a/arch/powerpc/boot/dtc-src/flattree.c b/arch/powerpc/boot/dtc-src/flattree.c
new file mode 100644
index 000000000000..a7cfb843d334
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/flattree.c
@@ -0,0 +1,968 @@
1/*
2 * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005.
3 *
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of the
8 * License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
18 * USA
19 */
20
21#include "dtc.h"
22
23#define FTF_FULLPATH 0x1
24#define FTF_VARALIGN 0x2
25#define FTF_NAMEPROPS 0x4
26#define FTF_BOOTCPUID 0x8
27#define FTF_STRTABSIZE 0x10
28#define FTF_STRUCTSIZE 0x20
29#define FTF_NOPS 0x40
30
31static struct version_info {
32 int version;
33 int last_comp_version;
34 int hdr_size;
35 int flags;
36} version_table[] = {
37 {1, 1, FDT_V1_SIZE,
38 FTF_FULLPATH|FTF_VARALIGN|FTF_NAMEPROPS},
39 {2, 1, FDT_V2_SIZE,
40 FTF_FULLPATH|FTF_VARALIGN|FTF_NAMEPROPS|FTF_BOOTCPUID},
41 {3, 1, FDT_V3_SIZE,
42 FTF_FULLPATH|FTF_VARALIGN|FTF_NAMEPROPS|FTF_BOOTCPUID|FTF_STRTABSIZE},
43 {16, 16, FDT_V3_SIZE,
44 FTF_BOOTCPUID|FTF_STRTABSIZE|FTF_NOPS},
45 {17, 16, FDT_V17_SIZE,
46 FTF_BOOTCPUID|FTF_STRTABSIZE|FTF_STRUCTSIZE|FTF_NOPS},
47};
48
49struct emitter {
50 void (*cell)(void *, cell_t);
51 void (*string)(void *, char *, int);
52 void (*align)(void *, int);
53 void (*data)(void *, struct data);
54 void (*beginnode)(void *, const char *);
55 void (*endnode)(void *, const char *);
56 void (*property)(void *, const char *);
57};
58
59static void bin_emit_cell(void *e, cell_t val)
60{
61 struct data *dtbuf = e;
62
63 *dtbuf = data_append_cell(*dtbuf, val);
64}
65
66static void bin_emit_string(void *e, char *str, int len)
67{
68 struct data *dtbuf = e;
69
70 if (len == 0)
71 len = strlen(str);
72
73 *dtbuf = data_append_data(*dtbuf, str, len);
74 *dtbuf = data_append_byte(*dtbuf, '\0');
75}
76
77static void bin_emit_align(void *e, int a)
78{
79 struct data *dtbuf = e;
80
81 *dtbuf = data_append_align(*dtbuf, a);
82}
83
84static void bin_emit_data(void *e, struct data d)
85{
86 struct data *dtbuf = e;
87
88 *dtbuf = data_append_data(*dtbuf, d.val, d.len);
89}
90
91static void bin_emit_beginnode(void *e, const char *label)
92{
93 bin_emit_cell(e, FDT_BEGIN_NODE);
94}
95
96static void bin_emit_endnode(void *e, const char *label)
97{
98 bin_emit_cell(e, FDT_END_NODE);
99}
100
101static void bin_emit_property(void *e, const char *label)
102{
103 bin_emit_cell(e, FDT_PROP);
104}
105
106static struct emitter bin_emitter = {
107 .cell = bin_emit_cell,
108 .string = bin_emit_string,
109 .align = bin_emit_align,
110 .data = bin_emit_data,
111 .beginnode = bin_emit_beginnode,
112 .endnode = bin_emit_endnode,
113 .property = bin_emit_property,
114};
115
116static void emit_label(FILE *f, const char *prefix, const char *label)
117{
118 fprintf(f, "\t.globl\t%s_%s\n", prefix, label);
119 fprintf(f, "%s_%s:\n", prefix, label);
120 fprintf(f, "_%s_%s:\n", prefix, label);
121}
122
123static void emit_offset_label(FILE *f, const char *label, int offset)
124{
125 fprintf(f, "\t.globl\t%s\n", label);
126 fprintf(f, "%s\t= . + %d\n", label, offset);
127}
128
129static void asm_emit_cell(void *e, cell_t val)
130{
131 FILE *f = e;
132
133 fprintf(f, "\t.long\t0x%x\n", val);
134}
135
136static void asm_emit_string(void *e, char *str, int len)
137{
138 FILE *f = e;
139 char c = 0;
140
141 if (len != 0) {
142 /* XXX: ewww */
143 c = str[len];
144 str[len] = '\0';
145 }
146
147 fprintf(f, "\t.string\t\"%s\"\n", str);
148
149 if (len != 0) {
150 str[len] = c;
151 }
152}
153
154static void asm_emit_align(void *e, int a)
155{
156 FILE *f = e;
157
158 fprintf(f, "\t.balign\t%d\n", a);
159}
160
161static void asm_emit_data(void *e, struct data d)
162{
163 FILE *f = e;
164 int off = 0;
165 struct marker *m;
166
167 m = d.markers;
168 while (m) {
169 if (m->type == LABEL)
170 emit_offset_label(f, m->ref, m->offset);
171 m = m->next;
172 }
173
174 while ((d.len - off) >= sizeof(u32)) {
175 fprintf(f, "\t.long\t0x%x\n",
176 be32_to_cpu(*((u32 *)(d.val+off))));
177 off += sizeof(u32);
178 }
179
180 if ((d.len - off) >= sizeof(u16)) {
181 fprintf(f, "\t.short\t0x%hx\n",
182 be16_to_cpu(*((u16 *)(d.val+off))));
183 off += sizeof(u16);
184 }
185
186 if ((d.len - off) >= 1) {
187 fprintf(f, "\t.byte\t0x%hhx\n", d.val[off]);
188 off += 1;
189 }
190
191 assert(off == d.len);
192}
193
194static void asm_emit_beginnode(void *e, const char *label)
195{
196 FILE *f = e;
197
198 if (label) {
199 fprintf(f, "\t.globl\t%s\n", label);
200 fprintf(f, "%s:\n", label);
201 }
202 fprintf(f, "\t.long\tFDT_BEGIN_NODE\n");
203}
204
205static void asm_emit_endnode(void *e, const char *label)
206{
207 FILE *f = e;
208
209 fprintf(f, "\t.long\tFDT_END_NODE\n");
210 if (label) {
211 fprintf(f, "\t.globl\t%s_end\n", label);
212 fprintf(f, "%s_end:\n", label);
213 }
214}
215
216static void asm_emit_property(void *e, const char *label)
217{
218 FILE *f = e;
219
220 if (label) {
221 fprintf(f, "\t.globl\t%s\n", label);
222 fprintf(f, "%s:\n", label);
223 }
224 fprintf(f, "\t.long\tFDT_PROP\n");
225}
226
227static struct emitter asm_emitter = {
228 .cell = asm_emit_cell,
229 .string = asm_emit_string,
230 .align = asm_emit_align,
231 .data = asm_emit_data,
232 .beginnode = asm_emit_beginnode,
233 .endnode = asm_emit_endnode,
234 .property = asm_emit_property,
235};
236
237static int stringtable_insert(struct data *d, const char *str)
238{
239 int i;
240
241 /* FIXME: do this more efficiently? */
242
243 for (i = 0; i < d->len; i++) {
244 if (streq(str, d->val + i))
245 return i;
246 }
247
248 *d = data_append_data(*d, str, strlen(str)+1);
249 return i;
250}
251
252static void flatten_tree(struct node *tree, struct emitter *emit,
253 void *etarget, struct data *strbuf,
254 struct version_info *vi)
255{
256 struct property *prop;
257 struct node *child;
258 int seen_name_prop = 0;
259
260 emit->beginnode(etarget, tree->label);
261
262 if (vi->flags & FTF_FULLPATH)
263 emit->string(etarget, tree->fullpath, 0);
264 else
265 emit->string(etarget, tree->name, 0);
266
267 emit->align(etarget, sizeof(cell_t));
268
269 for_each_property(tree, prop) {
270 int nameoff;
271
272 if (streq(prop->name, "name"))
273 seen_name_prop = 1;
274
275 nameoff = stringtable_insert(strbuf, prop->name);
276
277 emit->property(etarget, prop->label);
278 emit->cell(etarget, prop->val.len);
279 emit->cell(etarget, nameoff);
280
281 if ((vi->flags & FTF_VARALIGN) && (prop->val.len >= 8))
282 emit->align(etarget, 8);
283
284 emit->data(etarget, prop->val);
285 emit->align(etarget, sizeof(cell_t));
286 }
287
288 if ((vi->flags & FTF_NAMEPROPS) && !seen_name_prop) {
289 emit->property(etarget, NULL);
290 emit->cell(etarget, tree->basenamelen+1);
291 emit->cell(etarget, stringtable_insert(strbuf, "name"));
292
293 if ((vi->flags & FTF_VARALIGN) && ((tree->basenamelen+1) >= 8))
294 emit->align(etarget, 8);
295
296 emit->string(etarget, tree->name, tree->basenamelen);
297 emit->align(etarget, sizeof(cell_t));
298 }
299
300 for_each_child(tree, child) {
301 flatten_tree(child, emit, etarget, strbuf, vi);
302 }
303
304 emit->endnode(etarget, tree->label);
305}
306
307static struct data flatten_reserve_list(struct reserve_info *reservelist,
308 struct version_info *vi)
309{
310 struct reserve_info *re;
311 struct data d = empty_data;
312 static struct fdt_reserve_entry null_re = {0,0};
313 int j;
314
315 for (re = reservelist; re; re = re->next) {
316 d = data_append_re(d, &re->re);
317 }
318 /*
319 * Add additional reserved slots if the user asked for them.
320 */
321 for (j = 0; j < reservenum; j++) {
322 d = data_append_re(d, &null_re);
323 }
324
325 return d;
326}
327
328static void make_fdt_header(struct fdt_header *fdt,
329 struct version_info *vi,
330 int reservesize, int dtsize, int strsize,
331 int boot_cpuid_phys)
332{
333 int reserve_off;
334
335 reservesize += sizeof(struct fdt_reserve_entry);
336
337 memset(fdt, 0xff, sizeof(*fdt));
338
339 fdt->magic = cpu_to_be32(FDT_MAGIC);
340 fdt->version = cpu_to_be32(vi->version);
341 fdt->last_comp_version = cpu_to_be32(vi->last_comp_version);
342
343 /* Reserve map should be doubleword aligned */
344 reserve_off = ALIGN(vi->hdr_size, 8);
345
346 fdt->off_mem_rsvmap = cpu_to_be32(reserve_off);
347 fdt->off_dt_struct = cpu_to_be32(reserve_off + reservesize);
348 fdt->off_dt_strings = cpu_to_be32(reserve_off + reservesize
349 + dtsize);
350 fdt->totalsize = cpu_to_be32(reserve_off + reservesize + dtsize + strsize);
351
352 if (vi->flags & FTF_BOOTCPUID)
353 fdt->boot_cpuid_phys = cpu_to_be32(boot_cpuid_phys);
354 if (vi->flags & FTF_STRTABSIZE)
355 fdt->size_dt_strings = cpu_to_be32(strsize);
356 if (vi->flags & FTF_STRUCTSIZE)
357 fdt->size_dt_struct = cpu_to_be32(dtsize);
358}
359
360void dt_to_blob(FILE *f, struct boot_info *bi, int version,
361 int boot_cpuid_phys)
362{
363 struct version_info *vi = NULL;
364 int i;
365 struct data blob = empty_data;
366 struct data reservebuf = empty_data;
367 struct data dtbuf = empty_data;
368 struct data strbuf = empty_data;
369 struct fdt_header fdt;
370 int padlen = 0;
371
372 for (i = 0; i < ARRAY_SIZE(version_table); i++) {
373 if (version_table[i].version == version)
374 vi = &version_table[i];
375 }
376 if (!vi)
377 die("Unknown device tree blob version %d\n", version);
378
379 flatten_tree(bi->dt, &bin_emitter, &dtbuf, &strbuf, vi);
380 bin_emit_cell(&dtbuf, FDT_END);
381
382 reservebuf = flatten_reserve_list(bi->reservelist, vi);
383
384 /* Make header */
385 make_fdt_header(&fdt, vi, reservebuf.len, dtbuf.len, strbuf.len,
386 boot_cpuid_phys);
387
388 /*
389 * If the user asked for more space than is used, adjust the totalsize.
390 */
391 if (minsize > 0) {
392 padlen = minsize - be32_to_cpu(fdt.totalsize);
393 if ((padlen < 0) && (quiet < 1))
394 fprintf(stderr,
395 "Warning: blob size %d >= minimum size %d\n",
396 be32_to_cpu(fdt.totalsize), minsize);
397 }
398
399 if (padsize > 0)
400 padlen = padsize;
401
402 if (padlen > 0) {
403 int tsize = be32_to_cpu(fdt.totalsize);
404 tsize += padlen;
405 fdt.totalsize = cpu_to_be32(tsize);
406 }
407
408 /*
409 * Assemble the blob: start with the header, add with alignment
410 * the reserve buffer, add the reserve map terminating zeroes,
411 * the device tree itself, and finally the strings.
412 */
413 blob = data_append_data(blob, &fdt, sizeof(fdt));
414 blob = data_append_align(blob, 8);
415 blob = data_merge(blob, reservebuf);
416 blob = data_append_zeroes(blob, sizeof(struct fdt_reserve_entry));
417 blob = data_merge(blob, dtbuf);
418 blob = data_merge(blob, strbuf);
419
420 /*
421 * If the user asked for more space than is used, pad out the blob.
422 */
423 if (padlen > 0)
424 blob = data_append_zeroes(blob, padlen);
425
426 fwrite(blob.val, blob.len, 1, f);
427
428 if (ferror(f))
429 die("Error writing device tree blob: %s\n", strerror(errno));
430
431 /*
432 * data_merge() frees the right-hand element so only the blob
433 * remains to be freed.
434 */
435 data_free(blob);
436}
437
438static void dump_stringtable_asm(FILE *f, struct data strbuf)
439{
440 const char *p;
441 int len;
442
443 p = strbuf.val;
444
445 while (p < (strbuf.val + strbuf.len)) {
446 len = strlen(p);
447 fprintf(f, "\t.string \"%s\"\n", p);
448 p += len+1;
449 }
450}
451
452void dt_to_asm(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys)
453{
454 struct version_info *vi = NULL;
455 int i;
456 struct data strbuf = empty_data;
457 struct reserve_info *re;
458 const char *symprefix = "dt";
459
460 for (i = 0; i < ARRAY_SIZE(version_table); i++) {
461 if (version_table[i].version == version)
462 vi = &version_table[i];
463 }
464 if (!vi)
465 die("Unknown device tree blob version %d\n", version);
466
467 fprintf(f, "/* autogenerated by dtc, do not edit */\n\n");
468 fprintf(f, "#define FDT_MAGIC 0x%x\n", FDT_MAGIC);
469 fprintf(f, "#define FDT_BEGIN_NODE 0x%x\n", FDT_BEGIN_NODE);
470 fprintf(f, "#define FDT_END_NODE 0x%x\n", FDT_END_NODE);
471 fprintf(f, "#define FDT_PROP 0x%x\n", FDT_PROP);
472 fprintf(f, "#define FDT_END 0x%x\n", FDT_END);
473 fprintf(f, "\n");
474
475 emit_label(f, symprefix, "blob_start");
476 emit_label(f, symprefix, "header");
477 fprintf(f, "\t.long\tFDT_MAGIC\t\t\t\t/* magic */\n");
478 fprintf(f, "\t.long\t_%s_blob_abs_end - _%s_blob_start\t/* totalsize */\n",
479 symprefix, symprefix);
480 fprintf(f, "\t.long\t_%s_struct_start - _%s_blob_start\t/* off_dt_struct */\n",
481 symprefix, symprefix);
482 fprintf(f, "\t.long\t_%s_strings_start - _%s_blob_start\t/* off_dt_strings */\n",
483 symprefix, symprefix);
484 fprintf(f, "\t.long\t_%s_reserve_map - _%s_blob_start\t/* off_dt_strings */\n",
485 symprefix, symprefix);
486 fprintf(f, "\t.long\t%d\t\t\t\t\t/* version */\n", vi->version);
487 fprintf(f, "\t.long\t%d\t\t\t\t\t/* last_comp_version */\n",
488 vi->last_comp_version);
489
490 if (vi->flags & FTF_BOOTCPUID)
491 fprintf(f, "\t.long\t%i\t\t\t\t\t/* boot_cpuid_phys */\n",
492 boot_cpuid_phys);
493
494 if (vi->flags & FTF_STRTABSIZE)
495 fprintf(f, "\t.long\t_%s_strings_end - _%s_strings_start\t/* size_dt_strings */\n",
496 symprefix, symprefix);
497
498 if (vi->flags & FTF_STRUCTSIZE)
499 fprintf(f, "\t.long\t_%s_struct_end - _%s_struct_start\t/* size_dt_struct */\n",
500 symprefix, symprefix);
501
502 /*
503 * Reserve map entries.
504 * Align the reserve map to a doubleword boundary.
505 * Each entry is an (address, size) pair of u64 values.
506 * Always supply a zero-sized temination entry.
507 */
508 asm_emit_align(f, 8);
509 emit_label(f, symprefix, "reserve_map");
510
511 fprintf(f, "/* Memory reserve map from source file */\n");
512
513 /*
514 * Use .long on high and low halfs of u64s to avoid .quad
515 * as it appears .quad isn't available in some assemblers.
516 */
517 for (re = bi->reservelist; re; re = re->next) {
518 if (re->label) {
519 fprintf(f, "\t.globl\t%s\n", re->label);
520 fprintf(f, "%s:\n", re->label);
521 }
522 fprintf(f, "\t.long\t0x%08x, 0x%08x\n",
523 (unsigned int)(re->re.address >> 32),
524 (unsigned int)(re->re.address & 0xffffffff));
525 fprintf(f, "\t.long\t0x%08x, 0x%08x\n",
526 (unsigned int)(re->re.size >> 32),
527 (unsigned int)(re->re.size & 0xffffffff));
528 }
529 for (i = 0; i < reservenum; i++) {
530 fprintf(f, "\t.long\t0, 0\n\t.long\t0, 0\n");
531 }
532
533 fprintf(f, "\t.long\t0, 0\n\t.long\t0, 0\n");
534
535 emit_label(f, symprefix, "struct_start");
536 flatten_tree(bi->dt, &asm_emitter, f, &strbuf, vi);
537 fprintf(f, "\t.long\tFDT_END\n");
538 emit_label(f, symprefix, "struct_end");
539
540 emit_label(f, symprefix, "strings_start");
541 dump_stringtable_asm(f, strbuf);
542 emit_label(f, symprefix, "strings_end");
543
544 emit_label(f, symprefix, "blob_end");
545
546 /*
547 * If the user asked for more space than is used, pad it out.
548 */
549 if (minsize > 0) {
550 fprintf(f, "\t.space\t%d - (_%s_blob_end - _%s_blob_start), 0\n",
551 minsize, symprefix, symprefix);
552 }
553 if (padsize > 0) {
554 fprintf(f, "\t.space\t%d, 0\n", padsize);
555 }
556 emit_label(f, symprefix, "blob_abs_end");
557
558 data_free(strbuf);
559}
560
561struct inbuf {
562 char *base, *limit, *ptr;
563};
564
565static void inbuf_init(struct inbuf *inb, void *base, void *limit)
566{
567 inb->base = base;
568 inb->limit = limit;
569 inb->ptr = inb->base;
570}
571
572static void flat_read_chunk(struct inbuf *inb, void *p, int len)
573{
574 if ((inb->ptr + len) > inb->limit)
575 die("Premature end of data parsing flat device tree\n");
576
577 memcpy(p, inb->ptr, len);
578
579 inb->ptr += len;
580}
581
582static u32 flat_read_word(struct inbuf *inb)
583{
584 u32 val;
585
586 assert(((inb->ptr - inb->base) % sizeof(val)) == 0);
587
588 flat_read_chunk(inb, &val, sizeof(val));
589
590 return be32_to_cpu(val);
591}
592
593static void flat_realign(struct inbuf *inb, int align)
594{
595 int off = inb->ptr - inb->base;
596
597 inb->ptr = inb->base + ALIGN(off, align);
598 if (inb->ptr > inb->limit)
599 die("Premature end of data parsing flat device tree\n");
600}
601
602static char *flat_read_string(struct inbuf *inb)
603{
604 int len = 0;
605 const char *p = inb->ptr;
606 char *str;
607
608 do {
609 if (p >= inb->limit)
610 die("Premature end of data parsing flat device tree\n");
611 len++;
612 } while ((*p++) != '\0');
613
614 str = strdup(inb->ptr);
615
616 inb->ptr += len;
617
618 flat_realign(inb, sizeof(u32));
619
620 return str;
621}
622
623static struct data flat_read_data(struct inbuf *inb, int len)
624{
625 struct data d = empty_data;
626
627 if (len == 0)
628 return empty_data;
629
630 d = data_grow_for(d, len);
631 d.len = len;
632
633 flat_read_chunk(inb, d.val, len);
634
635 flat_realign(inb, sizeof(u32));
636
637 return d;
638}
639
640static char *flat_read_stringtable(struct inbuf *inb, int offset)
641{
642 const char *p;
643
644 p = inb->base + offset;
645 while (1) {
646 if (p >= inb->limit || p < inb->base)
647 die("String offset %d overruns string table\n",
648 offset);
649
650 if (*p == '\0')
651 break;
652
653 p++;
654 }
655
656 return strdup(inb->base + offset);
657}
658
659static struct property *flat_read_property(struct inbuf *dtbuf,
660 struct inbuf *strbuf, int flags)
661{
662 u32 proplen, stroff;
663 char *name;
664 struct data val;
665
666 proplen = flat_read_word(dtbuf);
667 stroff = flat_read_word(dtbuf);
668
669 name = flat_read_stringtable(strbuf, stroff);
670
671 if ((flags & FTF_VARALIGN) && (proplen >= 8))
672 flat_realign(dtbuf, 8);
673
674 val = flat_read_data(dtbuf, proplen);
675
676 return build_property(name, val, NULL);
677}
678
679
680static struct reserve_info *flat_read_mem_reserve(struct inbuf *inb)
681{
682 struct reserve_info *reservelist = NULL;
683 struct reserve_info *new;
684 const char *p;
685 struct fdt_reserve_entry re;
686
687 /*
688 * Each entry is a pair of u64 (addr, size) values for 4 cell_t's.
689 * List terminates at an entry with size equal to zero.
690 *
691 * First pass, count entries.
692 */
693 p = inb->ptr;
694 while (1) {
695 flat_read_chunk(inb, &re, sizeof(re));
696 re.address = be64_to_cpu(re.address);
697 re.size = be64_to_cpu(re.size);
698 if (re.size == 0)
699 break;
700
701 new = build_reserve_entry(re.address, re.size, NULL);
702 reservelist = add_reserve_entry(reservelist, new);
703 }
704
705 return reservelist;
706}
707
708
709static char *nodename_from_path(const char *ppath, const char *cpath)
710{
711 const char *lslash;
712 int plen;
713
714 lslash = strrchr(cpath, '/');
715 if (! lslash)
716 return NULL;
717
718 plen = lslash - cpath;
719
720 if (streq(cpath, "/") && streq(ppath, ""))
721 return "";
722
723 if ((plen == 0) && streq(ppath, "/"))
724 return strdup(lslash+1);
725
726 if (! strneq(ppath, cpath, plen))
727 return NULL;
728
729 return strdup(lslash+1);
730}
731
732static const char PROPCHAR[] = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789,._+*#?-";
733static const char UNITCHAR[] = "0123456789abcdef,";
734
735static int check_node_name(const char *name)
736{
737 const char *atpos;
738 int basenamelen;
739
740 atpos = strrchr(name, '@');
741
742 if (atpos)
743 basenamelen = atpos - name;
744 else
745 basenamelen = strlen(name);
746
747 if (strspn(name, PROPCHAR) < basenamelen)
748 return -1;
749
750 if (atpos
751 && ((basenamelen + 1 + strspn(atpos+1, UNITCHAR)) < strlen(name)))
752 return -1;
753
754 return basenamelen;
755}
756
757static struct node *unflatten_tree(struct inbuf *dtbuf,
758 struct inbuf *strbuf,
759 const char *parent_path, int flags)
760{
761 struct node *node;
762 u32 val;
763
764 node = build_node(NULL, NULL);
765
766 if (flags & FTF_FULLPATH) {
767 node->fullpath = flat_read_string(dtbuf);
768 node->name = nodename_from_path(parent_path, node->fullpath);
769
770 if (! node->name)
771 die("Path \"%s\" is not valid as a child of \"%s\"\n",
772 node->fullpath, parent_path);
773 } else {
774 node->name = flat_read_string(dtbuf);
775 node->fullpath = join_path(parent_path, node->name);
776 }
777
778 node->basenamelen = check_node_name(node->name);
779 if (node->basenamelen < 0) {
780 fprintf(stderr, "Warning \"%s\" has incorrect format\n", node->name);
781 }
782
783 do {
784 struct property *prop;
785 struct node *child;
786
787 val = flat_read_word(dtbuf);
788 switch (val) {
789 case FDT_PROP:
790 if (node->children)
791 fprintf(stderr, "Warning: Flat tree input has "
792 "subnodes preceding a property.\n");
793 prop = flat_read_property(dtbuf, strbuf, flags);
794 add_property(node, prop);
795 break;
796
797 case FDT_BEGIN_NODE:
798 child = unflatten_tree(dtbuf,strbuf, node->fullpath,
799 flags);
800 add_child(node, child);
801 break;
802
803 case FDT_END_NODE:
804 break;
805
806 case FDT_END:
807 die("Premature FDT_END in device tree blob\n");
808 break;
809
810 case FDT_NOP:
811 if (!(flags & FTF_NOPS))
812 fprintf(stderr, "Warning: NOP tag found in flat tree"
813 " version <16\n");
814
815 /* Ignore */
816 break;
817
818 default:
819 die("Invalid opcode word %08x in device tree blob\n",
820 val);
821 }
822 } while (val != FDT_END_NODE);
823
824 return node;
825}
826
827
828struct boot_info *dt_from_blob(FILE *f)
829{
830 u32 magic, totalsize, version, size_str, size_dt;
831 u32 off_dt, off_str, off_mem_rsvmap;
832 int rc;
833 char *blob;
834 struct fdt_header *fdt;
835 char *p;
836 struct inbuf dtbuf, strbuf;
837 struct inbuf memresvbuf;
838 int sizeleft;
839 struct reserve_info *reservelist;
840 struct node *tree;
841 u32 val;
842 int flags = 0;
843
844 rc = fread(&magic, sizeof(magic), 1, f);
845 if (ferror(f))
846 die("Error reading DT blob magic number: %s\n",
847 strerror(errno));
848 if (rc < 1) {
849 if (feof(f))
850 die("EOF reading DT blob magic number\n");
851 else
852 die("Mysterious short read reading magic number\n");
853 }
854
855 magic = be32_to_cpu(magic);
856 if (magic != FDT_MAGIC)
857 die("Blob has incorrect magic number\n");
858
859 rc = fread(&totalsize, sizeof(totalsize), 1, f);
860 if (ferror(f))
861 die("Error reading DT blob size: %s\n", strerror(errno));
862 if (rc < 1) {
863 if (feof(f))
864 die("EOF reading DT blob size\n");
865 else
866 die("Mysterious short read reading blob size\n");
867 }
868
869 totalsize = be32_to_cpu(totalsize);
870 if (totalsize < FDT_V1_SIZE)
871 die("DT blob size (%d) is too small\n", totalsize);
872
873 blob = xmalloc(totalsize);
874
875 fdt = (struct fdt_header *)blob;
876 fdt->magic = cpu_to_be32(magic);
877 fdt->totalsize = cpu_to_be32(totalsize);
878
879 sizeleft = totalsize - sizeof(magic) - sizeof(totalsize);
880 p = blob + sizeof(magic) + sizeof(totalsize);
881
882 while (sizeleft) {
883 if (feof(f))
884 die("EOF before reading %d bytes of DT blob\n",
885 totalsize);
886
887 rc = fread(p, 1, sizeleft, f);
888 if (ferror(f))
889 die("Error reading DT blob: %s\n",
890 strerror(errno));
891
892 sizeleft -= rc;
893 p += rc;
894 }
895
896 off_dt = be32_to_cpu(fdt->off_dt_struct);
897 off_str = be32_to_cpu(fdt->off_dt_strings);
898 off_mem_rsvmap = be32_to_cpu(fdt->off_mem_rsvmap);
899 version = be32_to_cpu(fdt->version);
900
901 fprintf(stderr, "\tmagic:\t\t\t0x%x\n", magic);
902 fprintf(stderr, "\ttotalsize:\t\t%d\n", totalsize);
903 fprintf(stderr, "\toff_dt_struct:\t\t0x%x\n", off_dt);
904 fprintf(stderr, "\toff_dt_strings:\t\t0x%x\n", off_str);
905 fprintf(stderr, "\toff_mem_rsvmap:\t\t0x%x\n", off_mem_rsvmap);
906 fprintf(stderr, "\tversion:\t\t0x%x\n", version );
907 fprintf(stderr, "\tlast_comp_version:\t0x%x\n",
908 be32_to_cpu(fdt->last_comp_version));
909
910 if (off_mem_rsvmap >= totalsize)
911 die("Mem Reserve structure offset exceeds total size\n");
912
913 if (off_dt >= totalsize)
914 die("DT structure offset exceeds total size\n");
915
916 if (off_str > totalsize)
917 die("String table offset exceeds total size\n");
918
919 if (version >= 2)
920 fprintf(stderr, "\tboot_cpuid_phys:\t0x%x\n",
921 be32_to_cpu(fdt->boot_cpuid_phys));
922
923 size_str = -1;
924 if (version >= 3) {
925 size_str = be32_to_cpu(fdt->size_dt_strings);
926 fprintf(stderr, "\tsize_dt_strings:\t%d\n", size_str);
927 if (off_str+size_str > totalsize)
928 die("String table extends past total size\n");
929 }
930
931 if (version >= 17) {
932 size_dt = be32_to_cpu(fdt->size_dt_struct);
933 fprintf(stderr, "\tsize_dt_struct:\t\t%d\n", size_dt);
934 if (off_dt+size_dt > totalsize)
935 die("Structure block extends past total size\n");
936 }
937
938 if (version < 16) {
939 flags |= FTF_FULLPATH | FTF_NAMEPROPS | FTF_VARALIGN;
940 } else {
941 flags |= FTF_NOPS;
942 }
943
944 inbuf_init(&memresvbuf,
945 blob + off_mem_rsvmap, blob + totalsize);
946 inbuf_init(&dtbuf, blob + off_dt, blob + totalsize);
947 if (size_str >= 0)
948 inbuf_init(&strbuf, blob + off_str, blob + off_str + size_str);
949 else
950 inbuf_init(&strbuf, blob + off_str, blob + totalsize);
951
952 reservelist = flat_read_mem_reserve(&memresvbuf);
953
954 val = flat_read_word(&dtbuf);
955
956 if (val != FDT_BEGIN_NODE)
957 die("Device tree blob doesn't begin with FDT_BEGIN_NODE (begins with 0x%08x)\n", val);
958
959 tree = unflatten_tree(&dtbuf, &strbuf, "", flags);
960
961 val = flat_read_word(&dtbuf);
962 if (val != FDT_END)
963 die("Device tree blob doesn't end with FDT_END\n");
964
965 free(blob);
966
967 return build_boot_info(reservelist, tree);
968}
diff --git a/arch/powerpc/boot/dtc-src/fstree.c b/arch/powerpc/boot/dtc-src/fstree.c
new file mode 100644
index 000000000000..2a160a46998e
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/fstree.c
@@ -0,0 +1,94 @@
1/*
2 * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005.
3 *
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of the
8 * License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
18 * USA
19 */
20
21#include "dtc.h"
22
23#include <dirent.h>
24#include <sys/stat.h>
25
26static struct node *read_fstree(const char *dirname)
27{
28 DIR *d;
29 struct dirent *de;
30 struct stat st;
31 struct node *tree;
32
33 d = opendir(dirname);
34 if (! d)
35 die("opendir(): %s\n", strerror(errno));
36
37 tree = build_node(NULL, NULL);
38
39 while ((de = readdir(d)) != NULL) {
40 char *tmpnam;
41
42 if (streq(de->d_name, ".")
43 || streq(de->d_name, ".."))
44 continue;
45
46 tmpnam = join_path(dirname, de->d_name);
47
48 if (lstat(tmpnam, &st) < 0)
49 die("stat(%s): %s\n", tmpnam, strerror(errno));
50
51 if (S_ISREG(st.st_mode)) {
52 struct property *prop;
53 FILE *pfile;
54
55 pfile = fopen(tmpnam, "r");
56 if (! pfile) {
57 fprintf(stderr,
58 "WARNING: Cannot open %s: %s\n",
59 tmpnam, strerror(errno));
60 } else {
61 prop = build_property(strdup(de->d_name),
62 data_copy_file(pfile,
63 st.st_size),
64 NULL);
65 add_property(tree, prop);
66 fclose(pfile);
67 }
68 } else if (S_ISDIR(st.st_mode)) {
69 struct node *newchild;
70
71 newchild = read_fstree(tmpnam);
72 newchild = name_node(newchild, strdup(de->d_name),
73 NULL);
74 add_child(tree, newchild);
75 }
76
77 free(tmpnam);
78 }
79
80 return tree;
81}
82
83struct boot_info *dt_from_fs(const char *dirname)
84{
85 struct node *tree;
86
87 tree = read_fstree(dirname);
88 tree = name_node(tree, "", NULL);
89
90 fill_fullpaths(tree, "");
91
92 return build_boot_info(NULL, tree);
93}
94
diff --git a/arch/powerpc/boot/dtc-src/livetree.c b/arch/powerpc/boot/dtc-src/livetree.c
new file mode 100644
index 000000000000..6ba0846b4310
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/livetree.c
@@ -0,0 +1,305 @@
1/*
2 * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005.
3 *
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of the
8 * License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
18 * USA
19 */
20
21#include "dtc.h"
22
23/*
24 * Tree building functions
25 */
26
27struct property *build_property(char *name, struct data val, char *label)
28{
29 struct property *new = xmalloc(sizeof(*new));
30
31 new->name = name;
32 new->val = val;
33
34 new->next = NULL;
35
36 new->label = label;
37
38 return new;
39}
40
41struct property *chain_property(struct property *first, struct property *list)
42{
43 assert(first->next == NULL);
44
45 first->next = list;
46 return first;
47}
48
49struct property *reverse_properties(struct property *first)
50{
51 struct property *p = first;
52 struct property *head = NULL;
53 struct property *next;
54
55 while (p) {
56 next = p->next;
57 p->next = head;
58 head = p;
59 p = next;
60 }
61 return head;
62}
63
64struct node *build_node(struct property *proplist, struct node *children)
65{
66 struct node *new = xmalloc(sizeof(*new));
67 struct node *child;
68
69 memset(new, 0, sizeof(*new));
70
71 new->proplist = reverse_properties(proplist);
72 new->children = children;
73
74 for_each_child(new, child) {
75 child->parent = new;
76 }
77
78 return new;
79}
80
81struct node *name_node(struct node *node, char *name, char * label)
82{
83 assert(node->name == NULL);
84
85 node->name = name;
86
87 node->label = label;
88
89 return node;
90}
91
92struct node *chain_node(struct node *first, struct node *list)
93{
94 assert(first->next_sibling == NULL);
95
96 first->next_sibling = list;
97 return first;
98}
99
100void add_property(struct node *node, struct property *prop)
101{
102 struct property **p;
103
104 prop->next = NULL;
105
106 p = &node->proplist;
107 while (*p)
108 p = &((*p)->next);
109
110 *p = prop;
111}
112
113void add_child(struct node *parent, struct node *child)
114{
115 struct node **p;
116
117 child->next_sibling = NULL;
118
119 p = &parent->children;
120 while (*p)
121 p = &((*p)->next_sibling);
122
123 *p = child;
124}
125
126struct reserve_info *build_reserve_entry(u64 address, u64 size, char *label)
127{
128 struct reserve_info *new = xmalloc(sizeof(*new));
129
130 new->re.address = address;
131 new->re.size = size;
132
133 new->next = NULL;
134
135 new->label = label;
136
137 return new;
138}
139
140struct reserve_info *chain_reserve_entry(struct reserve_info *first,
141 struct reserve_info *list)
142{
143 assert(first->next == NULL);
144
145 first->next = list;
146 return first;
147}
148
149struct reserve_info *add_reserve_entry(struct reserve_info *list,
150 struct reserve_info *new)
151{
152 struct reserve_info *last;
153
154 new->next = NULL;
155
156 if (! list)
157 return new;
158
159 for (last = list; last->next; last = last->next)
160 ;
161
162 last->next = new;
163
164 return list;
165}
166
167struct boot_info *build_boot_info(struct reserve_info *reservelist,
168 struct node *tree)
169{
170 struct boot_info *bi;
171
172 bi = xmalloc(sizeof(*bi));
173 bi->reservelist = reservelist;
174 bi->dt = tree;
175
176 return bi;
177}
178
179/*
180 * Tree accessor functions
181 */
182
183const char *get_unitname(struct node *node)
184{
185 if (node->name[node->basenamelen] == '\0')
186 return "";
187 else
188 return node->name + node->basenamelen + 1;
189}
190
191struct property *get_property(struct node *node, const char *propname)
192{
193 struct property *prop;
194
195 for_each_property(node, prop)
196 if (streq(prop->name, propname))
197 return prop;
198
199 return NULL;
200}
201
202cell_t propval_cell(struct property *prop)
203{
204 assert(prop->val.len == sizeof(cell_t));
205 return be32_to_cpu(*((cell_t *)prop->val.val));
206}
207
208struct node *get_subnode(struct node *node, const char *nodename)
209{
210 struct node *child;
211
212 for_each_child(node, child)
213 if (streq(child->name, nodename))
214 return child;
215
216 return NULL;
217}
218
219struct node *get_node_by_path(struct node *tree, const char *path)
220{
221 const char *p;
222 struct node *child;
223
224 if (!path || ! (*path))
225 return tree;
226
227 while (path[0] == '/')
228 path++;
229
230 p = strchr(path, '/');
231
232 for_each_child(tree, child) {
233 if (p && strneq(path, child->name, p-path))
234 return get_node_by_path(child, p+1);
235 else if (!p && streq(path, child->name))
236 return child;
237 }
238
239 return NULL;
240}
241
242struct node *get_node_by_label(struct node *tree, const char *label)
243{
244 struct node *child, *node;
245
246 assert(label && (strlen(label) > 0));
247
248 if (tree->label && streq(tree->label, label))
249 return tree;
250
251 for_each_child(tree, child) {
252 node = get_node_by_label(child, label);
253 if (node)
254 return node;
255 }
256
257 return NULL;
258}
259
260struct node *get_node_by_phandle(struct node *tree, cell_t phandle)
261{
262 struct node *child, *node;
263
264 assert((phandle != 0) && (phandle != -1));
265
266 if (tree->phandle == phandle)
267 return tree;
268
269 for_each_child(tree, child) {
270 node = get_node_by_phandle(child, phandle);
271 if (node)
272 return node;
273 }
274
275 return NULL;
276}
277
278struct node *get_node_by_ref(struct node *tree, const char *ref)
279{
280 if (ref[0] == '/')
281 return get_node_by_path(tree, ref);
282 else
283 return get_node_by_label(tree, ref);
284}
285
286cell_t get_node_phandle(struct node *root, struct node *node)
287{
288 static cell_t phandle = 1; /* FIXME: ick, static local */
289
290 if ((node->phandle != 0) && (node->phandle != -1))
291 return node->phandle;
292
293 assert(! get_property(node, "linux,phandle"));
294
295 while (get_node_by_phandle(root, phandle))
296 phandle++;
297
298 node->phandle = phandle;
299 add_property(node,
300 build_property("linux,phandle",
301 data_append_cell(empty_data, phandle),
302 NULL));
303
304 return node->phandle;
305}
diff --git a/arch/powerpc/boot/dtc-src/srcpos.c b/arch/powerpc/boot/dtc-src/srcpos.c
new file mode 100644
index 000000000000..352b0fe06fde
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/srcpos.c
@@ -0,0 +1,105 @@
1/*
2 * Copyright 2007 Jon Loeliger, Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of the
7 * License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
17 * USA
18 */
19
20#include "dtc.h"
21#include "srcpos.h"
22
23
24/*
25 * Record the complete unique set of opened file names.
26 * Primarily used to cache source position file names.
27 */
28#define MAX_N_FILE_NAMES (100)
29
30const char *file_names[MAX_N_FILE_NAMES];
31static int n_file_names = 0;
32
33/*
34 * Like yylineno, this is the current open file pos.
35 */
36
37int srcpos_filenum = -1;
38
39
40
41FILE *dtc_open_file(const char *fname)
42{
43 FILE *f;
44
45 if (lookup_file_name(fname, 1) < 0)
46 die("Too many files opened\n");
47
48 if (streq(fname, "-"))
49 f = stdin;
50 else
51 f = fopen(fname, "r");
52
53 if (! f)
54 die("Couldn't open \"%s\": %s\n", fname, strerror(errno));
55
56 return f;
57}
58
59
60
61/*
62 * Locate and optionally add filename fname in the file_names[] array.
63 *
64 * If the filename is currently not in the array and the boolean
65 * add_it is non-zero, an attempt to add the filename will be made.
66 *
67 * Returns;
68 * Index [0..MAX_N_FILE_NAMES) where the filename is kept
69 * -1 if the name can not be recorded
70 */
71
72int lookup_file_name(const char *fname, int add_it)
73{
74 int i;
75
76 for (i = 0; i < n_file_names; i++) {
77 if (strcmp(file_names[i], fname) == 0)
78 return i;
79 }
80
81 if (add_it) {
82 if (n_file_names < MAX_N_FILE_NAMES) {
83 file_names[n_file_names] = strdup(fname);
84 return n_file_names++;
85 }
86 }
87
88 return -1;
89}
90
91
92const char *srcpos_filename_for_num(int filenum)
93{
94 if (0 <= filenum && filenum < n_file_names) {
95 return file_names[filenum];
96 }
97
98 return 0;
99}
100
101
102const char *srcpos_get_filename(void)
103{
104 return srcpos_filename_for_num(srcpos_filenum);
105}
diff --git a/arch/powerpc/boot/dtc-src/srcpos.h b/arch/powerpc/boot/dtc-src/srcpos.h
new file mode 100644
index 000000000000..ce7ab5ba5b46
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/srcpos.h
@@ -0,0 +1,75 @@
1/*
2 * Copyright 2007 Jon Loeliger, Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of the
7 * License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
17 * USA
18 */
19
20/*
21 * Augment the standard YYLTYPE with a filenum index into an
22 * array of all opened filenames.
23 */
24
25#if ! defined(YYLTYPE) && ! defined(YYLTYPE_IS_DECLARED)
26typedef struct YYLTYPE {
27 int first_line;
28 int first_column;
29 int last_line;
30 int last_column;
31 int filenum;
32} YYLTYPE;
33
34#define YYLTYPE_IS_DECLARED 1
35#define YYLTYPE_IS_TRIVIAL 1
36#endif
37
38/* Cater to old parser templates. */
39#ifndef YYID
40#define YYID(n) (n)
41#endif
42
43#define YYLLOC_DEFAULT(Current, Rhs, N) \
44 do \
45 if (YYID (N)) \
46 { \
47 (Current).first_line = YYRHSLOC (Rhs, 1).first_line; \
48 (Current).first_column = YYRHSLOC (Rhs, 1).first_column; \
49 (Current).last_line = YYRHSLOC (Rhs, N).last_line; \
50 (Current).last_column = YYRHSLOC (Rhs, N).last_column; \
51 (Current).filenum = YYRHSLOC (Rhs, N).filenum; \
52 } \
53 else \
54 { \
55 (Current).first_line = (Current).last_line = \
56 YYRHSLOC (Rhs, 0).last_line; \
57 (Current).first_column = (Current).last_column = \
58 YYRHSLOC (Rhs, 0).last_column; \
59 (Current).filenum = YYRHSLOC (Rhs, 0).filenum; \
60 } \
61 while (YYID (0))
62
63
64
65extern void yyerror(char const *);
66
67extern int srcpos_filenum;
68
69extern int push_input_file(const char *filename);
70extern int pop_input_file(void);
71
72extern FILE *dtc_open_file(const char *fname);
73extern int lookup_file_name(const char *fname, int add_it);
74extern const char *srcpos_filename_for_num(int filenum);
75const char *srcpos_get_filename(void);
diff --git a/arch/powerpc/boot/dtc-src/treesource.c b/arch/powerpc/boot/dtc-src/treesource.c
new file mode 100644
index 000000000000..a6a776797636
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/treesource.c
@@ -0,0 +1,275 @@
1/*
2 * (C) Copyright David Gibson <dwg@au1.ibm.com>, IBM Corporation. 2005.
3 *
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of the
8 * License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
18 * USA
19 */
20
21#include "dtc.h"
22#include "srcpos.h"
23
24extern FILE *yyin;
25extern int yyparse(void);
26extern void yyerror(char const *);
27
28struct boot_info *the_boot_info;
29
30struct boot_info *dt_from_source(const char *fname)
31{
32 the_boot_info = NULL;
33
34 push_input_file(fname);
35
36 if (yyparse() != 0)
37 return NULL;
38
39 fill_fullpaths(the_boot_info->dt, "");
40
41 return the_boot_info;
42}
43
44static void write_prefix(FILE *f, int level)
45{
46 int i;
47
48 for (i = 0; i < level; i++)
49 fputc('\t', f);
50}
51
52int isstring(char c)
53{
54 return (isprint(c)
55 || (c == '\0')
56 || strchr("\a\b\t\n\v\f\r", c));
57}
58
59static void write_propval_string(FILE *f, struct data val)
60{
61 const char *str = val.val;
62 int i;
63 int newchunk = 1;
64 struct marker *m = val.markers;
65
66 assert(str[val.len-1] == '\0');
67
68 for (i = 0; i < (val.len-1); i++) {
69 char c = str[i];
70
71 if (newchunk) {
72 while (m && (m->offset <= i)) {
73 if (m->type == LABEL) {
74 assert(m->offset == i);
75 fprintf(f, "%s: ", m->ref);
76 }
77 m = m->next;
78 }
79 fprintf(f, "\"");
80 newchunk = 0;
81 }
82
83 switch (c) {
84 case '\a':
85 fprintf(f, "\\a");
86 break;
87 case '\b':
88 fprintf(f, "\\b");
89 break;
90 case '\t':
91 fprintf(f, "\\t");
92 break;
93 case '\n':
94 fprintf(f, "\\n");
95 break;
96 case '\v':
97 fprintf(f, "\\v");
98 break;
99 case '\f':
100 fprintf(f, "\\f");
101 break;
102 case '\r':
103 fprintf(f, "\\r");
104 break;
105 case '\\':
106 fprintf(f, "\\\\");
107 break;
108 case '\"':
109 fprintf(f, "\\\"");
110 break;
111 case '\0':
112 fprintf(f, "\", ");
113 newchunk = 1;
114 break;
115 default:
116 if (isprint(c))
117 fprintf(f, "%c", c);
118 else
119 fprintf(f, "\\x%02hhx", c);
120 }
121 }
122 fprintf(f, "\"");
123
124 /* Wrap up any labels at the end of the value */
125 for_each_marker_of_type(m, LABEL) {
126 assert (m->offset == val.len);
127 fprintf(f, " %s:", m->ref);
128 }
129}
130
131static void write_propval_cells(FILE *f, struct data val)
132{
133 void *propend = val.val + val.len;
134 cell_t *cp = (cell_t *)val.val;
135 struct marker *m = val.markers;
136
137 fprintf(f, "<");
138 for (;;) {
139 while (m && (m->offset <= ((char *)cp - val.val))) {
140 if (m->type == LABEL) {
141 assert(m->offset == ((char *)cp - val.val));
142 fprintf(f, "%s: ", m->ref);
143 }
144 m = m->next;
145 }
146
147 fprintf(f, "0x%x", be32_to_cpu(*cp++));
148 if ((void *)cp >= propend)
149 break;
150 fprintf(f, " ");
151 }
152
153 /* Wrap up any labels at the end of the value */
154 for_each_marker_of_type(m, LABEL) {
155 assert (m->offset == val.len);
156 fprintf(f, " %s:", m->ref);
157 }
158 fprintf(f, ">");
159}
160
161static void write_propval_bytes(FILE *f, struct data val)
162{
163 void *propend = val.val + val.len;
164 const char *bp = val.val;
165 struct marker *m = val.markers;
166
167 fprintf(f, "[");
168 for (;;) {
169 while (m && (m->offset == (bp-val.val))) {
170 if (m->type == LABEL)
171 fprintf(f, "%s: ", m->ref);
172 m = m->next;
173 }
174
175 fprintf(f, "%02hhx", *bp++);
176 if ((void *)bp >= propend)
177 break;
178 fprintf(f, " ");
179 }
180
181 /* Wrap up any labels at the end of the value */
182 for_each_marker_of_type(m, LABEL) {
183 assert (m->offset == val.len);
184 fprintf(f, " %s:", m->ref);
185 }
186 fprintf(f, "]");
187}
188
189static void write_propval(FILE *f, struct property *prop)
190{
191 int len = prop->val.len;
192 const char *p = prop->val.val;
193 struct marker *m = prop->val.markers;
194 int nnotstring = 0, nnul = 0;
195 int nnotstringlbl = 0, nnotcelllbl = 0;
196 int i;
197
198 if (len == 0) {
199 fprintf(f, ";\n");
200 return;
201 }
202
203 for (i = 0; i < len; i++) {
204 if (! isstring(p[i]))
205 nnotstring++;
206 if (p[i] == '\0')
207 nnul++;
208 }
209
210 for_each_marker_of_type(m, LABEL) {
211 if ((m->offset > 0) && (prop->val.val[m->offset - 1] != '\0'))
212 nnotstringlbl++;
213 if ((m->offset % sizeof(cell_t)) != 0)
214 nnotcelllbl++;
215 }
216
217 fprintf(f, " = ");
218 if ((p[len-1] == '\0') && (nnotstring == 0) && (nnul < (len-nnul))
219 && (nnotstringlbl == 0)) {
220 write_propval_string(f, prop->val);
221 } else if (((len % sizeof(cell_t)) == 0) && (nnotcelllbl == 0)) {
222 write_propval_cells(f, prop->val);
223 } else {
224 write_propval_bytes(f, prop->val);
225 }
226
227 fprintf(f, ";\n");
228}
229
230static void write_tree_source_node(FILE *f, struct node *tree, int level)
231{
232 struct property *prop;
233 struct node *child;
234
235 write_prefix(f, level);
236 if (tree->label)
237 fprintf(f, "%s: ", tree->label);
238 if (tree->name && (*tree->name))
239 fprintf(f, "%s {\n", tree->name);
240 else
241 fprintf(f, "/ {\n");
242
243 for_each_property(tree, prop) {
244 write_prefix(f, level+1);
245 if (prop->label)
246 fprintf(f, "%s: ", prop->label);
247 fprintf(f, "%s", prop->name);
248 write_propval(f, prop);
249 }
250 for_each_child(tree, child) {
251 fprintf(f, "\n");
252 write_tree_source_node(f, child, level+1);
253 }
254 write_prefix(f, level);
255 fprintf(f, "};\n");
256}
257
258
259void dt_to_source(FILE *f, struct boot_info *bi)
260{
261 struct reserve_info *re;
262
263 fprintf(f, "/dts-v1/;\n\n");
264
265 for (re = bi->reservelist; re; re = re->next) {
266 if (re->label)
267 fprintf(f, "%s: ", re->label);
268 fprintf(f, "/memreserve/\t0x%016llx 0x%016llx;\n",
269 (unsigned long long)re->re.address,
270 (unsigned long long)re->re.size);
271 }
272
273 write_tree_source_node(f, bi->dt, 0);
274}
275
diff --git a/arch/powerpc/boot/dtc-src/version_gen.h b/arch/powerpc/boot/dtc-src/version_gen.h
new file mode 100644
index 000000000000..6c343031538e
--- /dev/null
+++ b/arch/powerpc/boot/dtc-src/version_gen.h
@@ -0,0 +1 @@
#define DTC_VERSION "DTC 1.0.0-gd6f9b62f"
diff --git a/arch/powerpc/boot/dts/adder875-redboot.dts b/arch/powerpc/boot/dts/adder875-redboot.dts
new file mode 100644
index 000000000000..930bfb3894eb
--- /dev/null
+++ b/arch/powerpc/boot/dts/adder875-redboot.dts
@@ -0,0 +1,184 @@
1/*
2 * Device Tree Source for MPC885 ADS running RedBoot
3 *
4 * Copyright 2006 MontaVista Software, Inc.
5 * Copyright 2007 Freescale Semiconductor, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/dts-v1/;
14/ {
15 model = "Analogue & Micro Adder MPC875";
16 compatible = "analogue-and-micro,adder875";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 console = &console;
22 ethernet0 = &eth0;
23 ethernet1 = &eth1;
24 };
25
26 cpus {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 PowerPC,875@0 {
31 device_type = "cpu";
32 reg = <0>;
33 d-cache-line-size = <16>;
34 i-cache-line-size = <16>;
35 d-cache-size = <8192>;
36 i-cache-size = <8192>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
40 interrupts = <15 2>; // decrementer interrupt
41 interrupt-parent = <&PIC>;
42 };
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0 0x01000000>;
48 };
49
50 localbus@fa200100 {
51 compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus",
52 "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
55 reg = <0xfa200100 0x40>;
56
57 ranges = <
58 0 0 0xfe000000 0x00800000
59 2 0 0xfa100000 0x00008000
60 >;
61
62 flash@0,0 {
63 compatible = "cfi-flash";
64 reg = <0 0 0x800000>;
65 bank-width = <2>;
66 device-width = <2>;
67 };
68 };
69
70 soc@fa200000 {
71 compatible = "fsl,mpc875-immr", "fsl,pq1-soc", "simple-bus";
72 #address-cells = <1>;
73 #size-cells = <1>;
74 ranges = <0 0xfa200000 0x00004000>;
75
76 // Temporary until code stops depending on it.
77 device_type = "soc";
78
79 // Temporary until get_immrbase() is fixed.
80 reg = <0xfa200000 0x4000>;
81
82 mdio@e00 {
83 compatible = "fsl,mpc875-fec-mdio", "fsl,pq1-fec-mdio";
84 reg = <0xe00 0x188>;
85 #address-cells = <1>;
86 #size-cells = <0>;
87
88 PHY0: ethernet-phy@0 {
89 reg = <0>;
90 device_type = "ethernet-phy";
91 };
92
93 PHY1: ethernet-phy@1 {
94 reg = <1>;
95 device_type = "ethernet-phy";
96 };
97 };
98
99 eth0: ethernet@e00 {
100 device_type = "network";
101 compatible = "fsl,mpc875-fec-enet",
102 "fsl,pq1-fec-enet";
103 reg = <0xe00 0x188>;
104 local-mac-address = [ 00 00 00 00 00 00 ];
105 interrupts = <3 1>;
106 interrupt-parent = <&PIC>;
107 phy-handle = <&PHY0>;
108 linux,network-index = <0>;
109 };
110
111 eth1: ethernet@1e00 {
112 device_type = "network";
113 compatible = "fsl,mpc875-fec-enet",
114 "fsl,pq1-fec-enet";
115 reg = <0x1e00 0x188>;
116 local-mac-address = [ 00 00 00 00 00 00 ];
117 interrupts = <7 1>;
118 interrupt-parent = <&PIC>;
119 phy-handle = <&PHY1>;
120 linux,network-index = <1>;
121 };
122
123 PIC: interrupt-controller@0 {
124 interrupt-controller;
125 #interrupt-cells = <2>;
126 reg = <0 0x24>;
127 compatible = "fsl,mpc875-pic", "fsl,pq1-pic";
128 };
129
130 cpm@9c0 {
131 #address-cells = <1>;
132 #size-cells = <1>;
133 compatible = "fsl,mpc875-cpm", "fsl,cpm1", "simple-bus";
134 interrupts = <0>; // cpm error interrupt
135 interrupt-parent = <&CPM_PIC>;
136 reg = <0x9c0 0x40>;
137 ranges;
138
139 muram {
140 #address-cells = <1>;
141 #size-cells = <1>;
142 ranges = <0 0x2000 0x2000>;
143
144 data@0 {
145 compatible = "fsl,cpm-muram-data";
146 reg = <0 0x1c00>;
147 };
148 };
149
150 brg@9f0 {
151 compatible = "fsl,mpc875-brg",
152 "fsl,cpm1-brg",
153 "fsl,cpm-brg";
154 reg = <0x9f0 0x10>;
155 };
156
157 CPM_PIC: interrupt-controller@930 {
158 interrupt-controller;
159 #interrupt-cells = <1>;
160 interrupts = <5 2 0 2>;
161 interrupt-parent = <&PIC>;
162 reg = <0x930 0x20>;
163 compatible = "fsl,mpc875-cpm-pic",
164 "fsl,cpm1-pic";
165 };
166
167 console: serial@a80 {
168 device_type = "serial";
169 compatible = "fsl,mpc875-smc-uart",
170 "fsl,cpm1-smc-uart";
171 reg = <0xa80 0x10 0x3e80 0x40>;
172 interrupts = <4>;
173 interrupt-parent = <&CPM_PIC>;
174 fsl,cpm-brg = <1>;
175 fsl,cpm-command = <0x0090>;
176 current-speed = <115200>;
177 };
178 };
179 };
180
181 chosen {
182 linux,stdout-path = &console;
183 };
184};
diff --git a/arch/powerpc/boot/dts/adder875-uboot.dts b/arch/powerpc/boot/dts/adder875-uboot.dts
new file mode 100644
index 000000000000..0197242dacfb
--- /dev/null
+++ b/arch/powerpc/boot/dts/adder875-uboot.dts
@@ -0,0 +1,183 @@
1/*
2 * Device Tree Source for MPC885 ADS running U-Boot
3 *
4 * Copyright 2006 MontaVista Software, Inc.
5 * Copyright 2007 Freescale Semiconductor, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/dts-v1/;
14/ {
15 model = "Analogue & Micro Adder MPC875";
16 compatible = "analogue-and-micro,adder875";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 console = &console;
22 ethernet0 = &eth0;
23 ethernet1 = &eth1;
24 };
25
26 cpus {
27 #address-cells = <1>;
28 #size-cells = <0>;
29
30 PowerPC,875@0 {
31 device_type = "cpu";
32 reg = <0>;
33 d-cache-line-size = <16>;
34 i-cache-line-size = <16>;
35 d-cache-size = <8192>;
36 i-cache-size = <8192>;
37 timebase-frequency = <0>;
38 bus-frequency = <0>;
39 clock-frequency = <0>;
40 interrupts = <15 2>; // decrementer interrupt
41 interrupt-parent = <&PIC>;
42 };
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0 0x01000000>;
48 };
49
50 localbus@ff000100 {
51 compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus",
52 "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
55 reg = <0xff000100 0x40>;
56
57 ranges = <
58 0 0 0xfe000000 0x01000000
59 >;
60
61 flash@0,0 {
62 compatible = "cfi-flash";
63 reg = <0 0 0x800000>;
64 bank-width = <2>;
65 device-width = <2>;
66 };
67 };
68
69 soc@ff000000 {
70 compatible = "fsl,mpc875-immr", "fsl,pq1-soc", "simple-bus";
71 #address-cells = <1>;
72 #size-cells = <1>;
73 ranges = <0 0xff000000 0x00004000>;
74
75 // Temporary until code stops depending on it.
76 device_type = "soc";
77
78 // Temporary until get_immrbase() is fixed.
79 reg = <0xff000000 0x4000>;
80
81 mdio@e00 {
82 compatible = "fsl,mpc875-fec-mdio", "fsl,pq1-fec-mdio";
83 reg = <0xe00 0x188>;
84 #address-cells = <1>;
85 #size-cells = <0>;
86
87 PHY0: ethernet-phy@0 {
88 reg = <0>;
89 device_type = "ethernet-phy";
90 };
91
92 PHY1: ethernet-phy@1 {
93 reg = <1>;
94 device_type = "ethernet-phy";
95 };
96 };
97
98 eth0: ethernet@e00 {
99 device_type = "network";
100 compatible = "fsl,mpc875-fec-enet",
101 "fsl,pq1-fec-enet";
102 reg = <0xe00 0x188>;
103 local-mac-address = [ 00 00 00 00 00 00 ];
104 interrupts = <3 1>;
105 interrupt-parent = <&PIC>;
106 phy-handle = <&PHY0>;
107 linux,network-index = <0>;
108 };
109
110 eth1: ethernet@1e00 {
111 device_type = "network";
112 compatible = "fsl,mpc875-fec-enet",
113 "fsl,pq1-fec-enet";
114 reg = <0x1e00 0x188>;
115 local-mac-address = [ 00 00 00 00 00 00 ];
116 interrupts = <7 1>;
117 interrupt-parent = <&PIC>;
118 phy-handle = <&PHY1>;
119 linux,network-index = <1>;
120 };
121
122 PIC: interrupt-controller@0 {
123 interrupt-controller;
124 #interrupt-cells = <2>;
125 reg = <0 0x24>;
126 compatible = "fsl,mpc875-pic", "fsl,pq1-pic";
127 };
128
129 cpm@9c0 {
130 #address-cells = <1>;
131 #size-cells = <1>;
132 compatible = "fsl,mpc875-cpm", "fsl,cpm1", "simple-bus";
133 interrupts = <0>; // cpm error interrupt
134 interrupt-parent = <&CPM_PIC>;
135 reg = <0x9c0 0x40>;
136 ranges;
137
138 muram {
139 #address-cells = <1>;
140 #size-cells = <1>;
141 ranges = <0 0x2000 0x2000>;
142
143 data@0 {
144 compatible = "fsl,cpm-muram-data";
145 reg = <0 0x1c00>;
146 };
147 };
148
149 brg@9f0 {
150 compatible = "fsl,mpc875-brg",
151 "fsl,cpm1-brg",
152 "fsl,cpm-brg";
153 reg = <0x9f0 0x10>;
154 };
155
156 CPM_PIC: interrupt-controller@930 {
157 interrupt-controller;
158 #interrupt-cells = <1>;
159 interrupts = <5 2 0 2>;
160 interrupt-parent = <&PIC>;
161 reg = <0x930 0x20>;
162 compatible = "fsl,mpc875-cpm-pic",
163 "fsl,cpm1-pic";
164 };
165
166 console: serial@a80 {
167 device_type = "serial";
168 compatible = "fsl,mpc875-smc-uart",
169 "fsl,cpm1-smc-uart";
170 reg = <0xa80 0x10 0x3e80 0x40>;
171 interrupts = <4>;
172 interrupt-parent = <&CPM_PIC>;
173 fsl,cpm-brg = <1>;
174 fsl,cpm-command = <0x0090>;
175 current-speed = <115200>;
176 };
177 };
178 };
179
180 chosen {
181 linux,stdout-path = &console;
182 };
183};
diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts
index cb2fb50a281c..29f1a6f3e373 100644
--- a/arch/powerpc/boot/dts/bamboo.dts
+++ b/arch/powerpc/boot/dts/bamboo.dts
@@ -16,14 +16,24 @@
16 #size-cells = <1>; 16 #size-cells = <1>;
17 model = "amcc,bamboo"; 17 model = "amcc,bamboo";
18 compatible = "amcc,bamboo"; 18 compatible = "amcc,bamboo";
19 dcr-parent = <&/cpus/PowerPC,440EP@0>; 19 dcr-parent = <&/cpus/cpu@0>;
20
21 aliases {
22 ethernet0 = &EMAC0;
23 ethernet1 = &EMAC1;
24 serial0 = &UART0;
25 serial1 = &UART1;
26 serial2 = &UART2;
27 serial3 = &UART3;
28 };
20 29
21 cpus { 30 cpus {
22 #address-cells = <1>; 31 #address-cells = <1>;
23 #size-cells = <0>; 32 #size-cells = <0>;
24 33
25 PowerPC,440EP@0 { 34 cpu@0 {
26 device_type = "cpu"; 35 device_type = "cpu";
36 model = "PowerPC,440EP";
27 reg = <0>; 37 reg = <0>;
28 clock-frequency = <0>; /* Filled in by zImage */ 38 clock-frequency = <0>; /* Filled in by zImage */
29 timebase-frequency = <0>; /* Filled in by zImage */ 39 timebase-frequency = <0>; /* Filled in by zImage */
@@ -126,7 +136,6 @@
126 #address-cells = <2>; 136 #address-cells = <2>;
127 #size-cells = <1>; 137 #size-cells = <1>;
128 clock-frequency = <0>; /* Filled in by zImage */ 138 clock-frequency = <0>; /* Filled in by zImage */
129 ranges;
130 interrupts = <5 1>; 139 interrupts = <5 1>;
131 interrupt-parent = <&UIC1>; 140 interrupt-parent = <&UIC1>;
132 }; 141 };
@@ -238,11 +247,56 @@
238 zmii-device = <&ZMII0>; 247 zmii-device = <&ZMII0>;
239 zmii-channel = <1>; 248 zmii-channel = <1>;
240 }; 249 };
250
251 usb@ef601000 {
252 compatible = "ohci-be";
253 reg = <ef601000 80>;
254 interrupts = <8 1 9 1>;
255 interrupt-parent = < &UIC1 >;
256 };
257 };
258
259 PCI0: pci@ec000000 {
260 device_type = "pci";
261 #interrupt-cells = <1>;
262 #size-cells = <2>;
263 #address-cells = <3>;
264 compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
265 primary;
266 reg = <0 eec00000 8 /* Config space access */
267 0 eed00000 4 /* IACK */
268 0 eed00000 4 /* Special cycle */
269 0 ef400000 40>; /* Internal registers */
270
271 /* Outbound ranges, one memory and one IO,
272 * later cannot be changed. Chip supports a second
273 * IO range but we don't use it for now
274 */
275 ranges = <02000000 0 a0000000 0 a0000000 0 20000000
276 01000000 0 00000000 0 e8000000 0 00010000>;
277
278 /* Inbound 2GB range starting at 0 */
279 dma-ranges = <42000000 0 0 0 0 0 80000000>;
280
281 /* Bamboo has all 4 IRQ pins tied together per slot */
282 interrupt-map-mask = <f800 0 0 0>;
283 interrupt-map = <
284 /* IDSEL 1 */
285 0800 0 0 0 &UIC0 1c 8
286
287 /* IDSEL 2 */
288 1000 0 0 0 &UIC0 1b 8
289
290 /* IDSEL 3 */
291 1800 0 0 0 &UIC0 1a 8
292
293 /* IDSEL 4 */
294 2000 0 0 0 &UIC0 19 8
295 >;
241 }; 296 };
242 }; 297 };
243 298
244 chosen { 299 chosen {
245 linux,stdout-path = "/plb/opb/serial@ef600300"; 300 linux,stdout-path = "/plb/opb/serial@ef600300";
246 bootargs = "console=ttyS0,115200";
247 }; 301 };
248}; 302};
diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/cm5200.dts
new file mode 100644
index 000000000000..30737eafe68e
--- /dev/null
+++ b/arch/powerpc/boot/dts/cm5200.dts
@@ -0,0 +1,234 @@
1/*
2 * CM5200 board Device Tree Source
3 *
4 * Copyright (C) 2007 Semihalf
5 * Marian Balakowicz <m8@semihalf.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/*
14 * WARNING: Do not depend on this tree layout remaining static just yet.
15 * The MPC5200 device tree conventions are still in flux
16 * Keep an eye on the linuxppc-dev mailing list for more details
17 */
18
19/ {
20 model = "schindler,cm5200";
21 compatible = "schindler,cm5200";
22 #address-cells = <1>;
23 #size-cells = <1>;
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 PowerPC,5200@0 {
30 device_type = "cpu";
31 reg = <0>;
32 d-cache-line-size = <20>;
33 i-cache-line-size = <20>;
34 d-cache-size = <4000>; // L1, 16K
35 i-cache-size = <4000>; // L1, 16K
36 timebase-frequency = <0>; // from bootloader
37 bus-frequency = <0>; // from bootloader
38 clock-frequency = <0>; // from bootloader
39 };
40 };
41
42 memory {
43 device_type = "memory";
44 reg = <00000000 04000000>; // 64MB
45 };
46
47 soc5200@f0000000 {
48 #address-cells = <1>;
49 #size-cells = <1>;
50 compatible = "fsl,mpc5200b-immr";
51 ranges = <0 f0000000 0000c000>;
52 reg = <f0000000 00000100>;
53 bus-frequency = <0>; // from bootloader
54 system-frequency = <0>; // from bootloader
55
56 cdm@200 {
57 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
58 reg = <200 38>;
59 };
60
61 mpc5200_pic: pic@500 {
62 // 5200 interrupts are encoded into two levels;
63 interrupt-controller;
64 #interrupt-cells = <3>;
65 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
66 reg = <500 80>;
67 };
68
69 timer@600 { // General Purpose Timer
70 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
71 reg = <600 10>;
72 interrupts = <1 9 0>;
73 interrupt-parent = <&mpc5200_pic>;
74 fsl,has-wdt;
75 };
76
77 timer@610 { // General Purpose Timer
78 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
79 reg = <610 10>;
80 interrupts = <1 a 0>;
81 interrupt-parent = <&mpc5200_pic>;
82 };
83
84 timer@620 { // General Purpose Timer
85 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
86 reg = <620 10>;
87 interrupts = <1 b 0>;
88 interrupt-parent = <&mpc5200_pic>;
89 };
90
91 timer@630 { // General Purpose Timer
92 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
93 reg = <630 10>;
94 interrupts = <1 c 0>;
95 interrupt-parent = <&mpc5200_pic>;
96 };
97
98 timer@640 { // General Purpose Timer
99 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
100 reg = <640 10>;
101 interrupts = <1 d 0>;
102 interrupt-parent = <&mpc5200_pic>;
103 };
104
105 timer@650 { // General Purpose Timer
106 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
107 reg = <650 10>;
108 interrupts = <1 e 0>;
109 interrupt-parent = <&mpc5200_pic>;
110 };
111
112 timer@660 { // General Purpose Timer
113 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
114 reg = <660 10>;
115 interrupts = <1 f 0>;
116 interrupt-parent = <&mpc5200_pic>;
117 };
118
119 timer@670 { // General Purpose Timer
120 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
121 reg = <670 10>;
122 interrupts = <1 10 0>;
123 interrupt-parent = <&mpc5200_pic>;
124 };
125
126 rtc@800 { // Real time clock
127 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
128 reg = <800 100>;
129 interrupts = <1 5 0 1 6 0>;
130 interrupt-parent = <&mpc5200_pic>;
131 };
132
133 gpio@b00 {
134 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
135 reg = <b00 40>;
136 interrupts = <1 7 0>;
137 interrupt-parent = <&mpc5200_pic>;
138 };
139
140 gpio@c00 {
141 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
142 reg = <c00 40>;
143 interrupts = <1 8 0 0 3 0>;
144 interrupt-parent = <&mpc5200_pic>;
145 };
146
147 spi@f00 {
148 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
149 reg = <f00 20>;
150 interrupts = <2 d 0 2 e 0>;
151 interrupt-parent = <&mpc5200_pic>;
152 };
153
154 usb@1000 {
155 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
156 reg = <1000 ff>;
157 interrupts = <2 6 0>;
158 interrupt-parent = <&mpc5200_pic>;
159 };
160
161 dma-controller@1200 {
162 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
163 reg = <1200 80>;
164 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
165 3 4 0 3 5 0 3 6 0 3 7 0
166 3 8 0 3 9 0 3 a 0 3 b 0
167 3 c 0 3 d 0 3 e 0 3 f 0>;
168 interrupt-parent = <&mpc5200_pic>;
169 };
170
171 xlb@1f00 {
172 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
173 reg = <1f00 100>;
174 };
175
176 serial@2000 { // PSC1
177 device_type = "serial";
178 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
179 port-number = <0>; // Logical port assignment
180 reg = <2000 100>;
181 interrupts = <2 1 0>;
182 interrupt-parent = <&mpc5200_pic>;
183 };
184
185 serial@2200 { // PSC2
186 device_type = "serial";
187 compatible = "fsl,mpc5200-psc-uart";
188 port-number = <1>; // Logical port assignment
189 reg = <2200 100>;
190 interrupts = <2 2 0>;
191 interrupt-parent = <&mpc5200_pic>;
192 };
193
194 serial@2400 { // PSC3
195 device_type = "serial";
196 compatible = "fsl,mpc5200-psc-uart";
197 port-number = <2>; // Logical port assignment
198 reg = <2400 100>;
199 interrupts = <2 3 0>;
200 interrupt-parent = <&mpc5200_pic>;
201 };
202
203 serial@2c00 { // PSC6
204 device_type = "serial";
205 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
206 port-number = <5>; // Logical port assignment
207 reg = <2c00 100>;
208 interrupts = <2 4 0>;
209 interrupt-parent = <&mpc5200_pic>;
210 };
211
212 ethernet@3000 {
213 device_type = "network";
214 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
215 reg = <3000 800>;
216 local-mac-address = [ 00 00 00 00 00 00 ];
217 interrupts = <2 5 0>;
218 interrupt-parent = <&mpc5200_pic>;
219 };
220
221 i2c@3d40 {
222 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
223 reg = <3d40 40>;
224 interrupts = <2 10 0>;
225 interrupt-parent = <&mpc5200_pic>;
226 fsl5200-clocking;
227 };
228
229 sram@8000 {
230 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
231 reg = <8000 4000>;
232 };
233 };
234};
diff --git a/arch/powerpc/boot/dts/ebony.dts b/arch/powerpc/boot/dts/ebony.dts
index bc259972aaa0..7aad135a44b0 100644
--- a/arch/powerpc/boot/dts/ebony.dts
+++ b/arch/powerpc/boot/dts/ebony.dts
@@ -16,14 +16,22 @@
16 #size-cells = <1>; 16 #size-cells = <1>;
17 model = "ibm,ebony"; 17 model = "ibm,ebony";
18 compatible = "ibm,ebony"; 18 compatible = "ibm,ebony";
19 dcr-parent = <&/cpus/PowerPC,440GP@0>; 19 dcr-parent = <&/cpus/cpu@0>;
20
21 aliases {
22 ethernet0 = &EMAC0;
23 ethernet1 = &EMAC1;
24 serial0 = &UART0;
25 serial1 = &UART1;
26 };
20 27
21 cpus { 28 cpus {
22 #address-cells = <1>; 29 #address-cells = <1>;
23 #size-cells = <0>; 30 #size-cells = <0>;
24 31
25 PowerPC,440GP@0 { 32 cpu@0 {
26 device_type = "cpu"; 33 device_type = "cpu";
34 model = "PowerPC,440GP";
27 reg = <0>; 35 reg = <0>;
28 clock-frequency = <0>; // Filled in by zImage 36 clock-frequency = <0>; // Filled in by zImage
29 timebase-frequency = <0>; // Filled in by zImage 37 timebase-frequency = <0>; // Filled in by zImage
@@ -150,9 +158,10 @@
150 }; 158 };
151 }; 159 };
152 160
153 ds1743@1,0 { 161 nvram@1,0 {
154 /* NVRAM & RTC */ 162 /* NVRAM & RTC */
155 compatible = "ds1743"; 163 compatible = "ds1743-nvram";
164 #bytes = <2000>;
156 reg = <1 0 2000>; 165 reg = <1 0 2000>;
157 }; 166 };
158 167
@@ -284,12 +293,43 @@
284 293
285 }; 294 };
286 295
287 PCIX0: pci@1234 { 296 PCIX0: pci@20ec00000 {
288 device_type = "pci"; 297 device_type = "pci";
289 /* FIXME */ 298 #interrupt-cells = <1>;
290 reg = <2 0ec00000 8 299 #size-cells = <2>;
291 2 0ec80000 f0 300 #address-cells = <3>;
292 2 0ec80100 fc>; 301 compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
302 primary;
303 reg = <2 0ec00000 8 /* Config space access */
304 0 0 0 /* no IACK cycles */
305 2 0ed00000 4 /* Special cycles */
306 2 0ec80000 f0 /* Internal registers */
307 2 0ec80100 fc>; /* Internal messaging registers */
308
309 /* Outbound ranges, one memory and one IO,
310 * later cannot be changed
311 */
312 ranges = <02000000 0 80000000 00000003 80000000 0 80000000
313 01000000 0 00000000 00000002 08000000 0 00010000>;
314
315 /* Inbound 2GB range starting at 0 */
316 dma-ranges = <42000000 0 0 0 0 0 80000000>;
317
318 /* Ebony has all 4 IRQ pins tied together per slot */
319 interrupt-map-mask = <f800 0 0 0>;
320 interrupt-map = <
321 /* IDSEL 1 */
322 0800 0 0 0 &UIC0 17 8
323
324 /* IDSEL 2 */
325 1000 0 0 0 &UIC0 18 8
326
327 /* IDSEL 3 */
328 1800 0 0 0 &UIC0 19 8
329
330 /* IDSEL 4 */
331 2000 0 0 0 &UIC0 1a 8
332 >;
293 }; 333 };
294 }; 334 };
295 335
diff --git a/arch/powerpc/boot/dts/ep405.dts b/arch/powerpc/boot/dts/ep405.dts
new file mode 100644
index 000000000000..92938557ac8a
--- /dev/null
+++ b/arch/powerpc/boot/dts/ep405.dts
@@ -0,0 +1,228 @@
1/*
2 * Device Tree Source for EP405
3 *
4 * Copyright 2007 IBM Corp.
5 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without
9 * any warranty of any kind, whether express or implied.
10 */
11
12/ {
13 #address-cells = <1>;
14 #size-cells = <1>;
15 model = "ep405";
16 compatible = "ep405";
17 dcr-parent = <&/cpus/cpu@0>;
18
19 aliases {
20 ethernet0 = &EMAC;
21 serial0 = &UART0;
22 serial1 = &UART1;
23 };
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 cpu@0 {
30 device_type = "cpu";
31 model = "PowerPC,405GP";
32 reg = <0>;
33 clock-frequency = <bebc200>; /* Filled in by zImage */
34 timebase-frequency = <0>; /* Filled in by zImage */
35 i-cache-line-size = <20>;
36 d-cache-line-size = <20>;
37 i-cache-size = <4000>;
38 d-cache-size = <4000>;
39 dcr-controller;
40 dcr-access-method = "native";
41 };
42 };
43
44 memory {
45 device_type = "memory";
46 reg = <0 0>; /* Filled in by zImage */
47 };
48
49 UIC0: interrupt-controller {
50 compatible = "ibm,uic";
51 interrupt-controller;
52 cell-index = <0>;
53 dcr-reg = <0c0 9>;
54 #address-cells = <0>;
55 #size-cells = <0>;
56 #interrupt-cells = <2>;
57 };
58
59 plb {
60 compatible = "ibm,plb3";
61 #address-cells = <1>;
62 #size-cells = <1>;
63 ranges;
64 clock-frequency = <0>; /* Filled in by zImage */
65
66 SDRAM0: memory-controller {
67 compatible = "ibm,sdram-405gp";
68 dcr-reg = <010 2>;
69 };
70
71 MAL: mcmal {
72 compatible = "ibm,mcmal-405gp", "ibm,mcmal";
73 dcr-reg = <180 62>;
74 num-tx-chans = <1>;
75 num-rx-chans = <1>;
76 interrupt-parent = <&UIC0>;
77 interrupts = <
78 b 4 /* TXEOB */
79 c 4 /* RXEOB */
80 a 4 /* SERR */
81 d 4 /* TXDE */
82 e 4 /* RXDE */>;
83 };
84
85 POB0: opb {
86 compatible = "ibm,opb-405gp", "ibm,opb";
87 #address-cells = <1>;
88 #size-cells = <1>;
89 ranges = <ef600000 ef600000 a00000>;
90 dcr-reg = <0a0 5>;
91 clock-frequency = <0>; /* Filled in by zImage */
92
93 UART0: serial@ef600300 {
94 device_type = "serial";
95 compatible = "ns16550";
96 reg = <ef600300 8>;
97 virtual-reg = <ef600300>;
98 clock-frequency = <0>; /* Filled in by zImage */
99 current-speed = <2580>;
100 interrupt-parent = <&UIC0>;
101 interrupts = <0 4>;
102 };
103
104 UART1: serial@ef600400 {
105 device_type = "serial";
106 compatible = "ns16550";
107 reg = <ef600400 8>;
108 virtual-reg = <ef600400>;
109 clock-frequency = <0>; /* Filled in by zImage */
110 current-speed = <2580>;
111 interrupt-parent = <&UIC0>;
112 interrupts = <1 4>;
113 };
114
115 IIC: i2c@ef600500 {
116 compatible = "ibm,iic-405gp", "ibm,iic";
117 reg = <ef600500 11>;
118 interrupt-parent = <&UIC0>;
119 interrupts = <2 4>;
120 };
121
122 GPIO: gpio@ef600700 {
123 compatible = "ibm,gpio-405gp";
124 reg = <ef600700 20>;
125 };
126
127 EMAC: ethernet@ef600800 {
128 linux,network-index = <0>;
129 device_type = "network";
130 compatible = "ibm,emac-405gp", "ibm,emac";
131 interrupt-parent = <&UIC0>;
132 interrupts = <
133 f 4 /* Ethernet */
134 9 4 /* Ethernet Wake Up */>;
135 local-mac-address = [000000000000]; /* Filled in by zImage */
136 reg = <ef600800 70>;
137 mal-device = <&MAL>;
138 mal-tx-channel = <0>;
139 mal-rx-channel = <0>;
140 cell-index = <0>;
141 max-frame-size = <5dc>;
142 rx-fifo-size = <1000>;
143 tx-fifo-size = <800>;
144 phy-mode = "rmii";
145 phy-map = <00000000>;
146 };
147
148 };
149
150 EBC0: ebc {
151 compatible = "ibm,ebc-405gp", "ibm,ebc";
152 dcr-reg = <012 2>;
153 #address-cells = <2>;
154 #size-cells = <1>;
155
156
157 /* The ranges property is supplied by the bootwrapper
158 * and is based on the firmware's configuration of the
159 * EBC bridge
160 */
161 clock-frequency = <0>; /* Filled in by zImage */
162
163 /* NVRAM and RTC */
164 nvrtc@4,200000 {
165 compatible = "ds1742";
166 reg = <4 200000 0>; /* size fixed up by zImage */
167 };
168
169 /* "BCSR" CPLD contains a PCI irq controller */
170 bcsr@4,0 {
171 compatible = "ep405-bcsr";
172 reg = <4 0 10>;
173 interrupt-controller;
174 /* Routing table */
175 irq-routing = [ 00 /* SYSERR */
176 01 /* STTM */
177 01 /* RTC */
178 01 /* FENET */
179 02 /* NB PCIIRQ mux ? */
180 03 /* SB Winbond 8259 ? */
181 04 /* Serial Ring */
182 05 /* USB (ep405pc) */
183 06 /* XIRQ 0 */
184 06 /* XIRQ 1 */
185 06 /* XIRQ 2 */
186 06 /* XIRQ 3 */
187 06 /* XIRQ 4 */
188 06 /* XIRQ 5 */
189 06 /* XIRQ 6 */
190 07]; /* Reserved */
191 };
192 };
193
194 PCI0: pci@ec000000 {
195 device_type = "pci";
196 #interrupt-cells = <1>;
197 #size-cells = <2>;
198 #address-cells = <3>;
199 compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
200 primary;
201 reg = <eec00000 8 /* Config space access */
202 eed80000 4 /* IACK */
203 eed80000 4 /* Special cycle */
204 ef480000 40>; /* Internal registers */
205
206 /* Outbound ranges, one memory and one IO,
207 * later cannot be changed. Chip supports a second
208 * IO range but we don't use it for now
209 */
210 ranges = <02000000 0 80000000 80000000 0 20000000
211 01000000 0 00000000 e8000000 0 00010000>;
212
213 /* Inbound 2GB range starting at 0 */
214 dma-ranges = <42000000 0 0 0 0 80000000>;
215
216 /* That's all I know about IRQs on that thing ... */
217 interrupt-map-mask = <f800 0 0 0>;
218 interrupt-map = <
219 /* USB */
220 7000 0 0 0 &UIC0 1e 8 /* IRQ5 */
221 >;
222 };
223 };
224
225 chosen {
226 linux,stdout-path = "/plb/opb/serial@ef600300";
227 };
228};
diff --git a/arch/powerpc/boot/dts/ep8248e.dts b/arch/powerpc/boot/dts/ep8248e.dts
new file mode 100644
index 000000000000..5d2fb76a72c1
--- /dev/null
+++ b/arch/powerpc/boot/dts/ep8248e.dts
@@ -0,0 +1,207 @@
1/*
2 * Device Tree for the Embedded Planet EP8248E board running PlanetCore.
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13/ {
14 model = "EP8248E";
15 compatible = "fsl,ep8248e";
16 #address-cells = <1>;
17 #size-cells = <1>;
18
19 aliases {
20 planetcore-SMC1 = &smc1;
21 planetcore-SCC1 = &scc1;
22 ethernet0 = &eth0;
23 ethernet1 = &eth1;
24 serial0 = &smc1;
25 serial1 = &scc1;
26 };
27
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 PowerPC,8248@0 {
33 device_type = "cpu";
34 reg = <0>;
35 d-cache-line-size = <32>;
36 i-cache-line-size = <32>;
37 d-cache-size = <16384>;
38 i-cache-size = <16384>;
39 timebase-frequency = <0>;
40 clock-frequency = <0>;
41 };
42 };
43
44 localbus@f0010100 {
45 compatible = "fsl,mpc8248-localbus",
46 "fsl,pq2-localbus",
47 "simple-bus";
48 #address-cells = <2>;
49 #size-cells = <1>;
50 reg = <0xf0010100 0x40>;
51
52 ranges = <0 0 0xfc000000 0x04000000
53 1 0 0xfa000000 0x00008000>;
54
55 flash@0,3800000 {
56 compatible = "cfi-flash";
57 reg = <0 0x3800000 0x800000>;
58 bank-width = <4>;
59 device-width = <2>;
60 };
61
62 bcsr@1,0 {
63 #address-cells = <2>;
64 #size-cells = <1>;
65 reg = <1 0 0x10>;
66 compatible = "fsl,ep8248e-bcsr";
67 ranges;
68
69 mdio {
70 device_type = "mdio";
71 compatible = "fsl,ep8248e-mdio-bitbang";
72 #address-cells = <1>;
73 #size-cells = <0>;
74 reg = <1 8 1>;
75
76 PHY0: ethernet-phy@0 {
77 interrupt-parent = <&PIC>;
78 reg = <0>;
79 device_type = "ethernet-phy";
80 };
81
82 PHY1: ethernet-phy@1 {
83 interrupt-parent = <&PIC>;
84 reg = <1>;
85 device_type = "ethernet-phy";
86 };
87 };
88 };
89 };
90
91 memory {
92 device_type = "memory";
93 reg = <0 0>;
94 };
95
96 soc@f0000000 {
97 #address-cells = <1>;
98 #size-cells = <1>;
99 compatible = "fsl,mpc8248-immr", "fsl,pq2-soc", "simple-bus";
100 ranges = <0x00000000 0xf0000000 0x00053000>;
101
102 // Temporary until code stops depending on it.
103 device_type = "soc";
104
105 // Temporary -- will go away once kernel uses ranges for get_immrbase().
106 reg = <0xf0000000 0x00053000>;
107
108 cpm@119c0 {
109 #address-cells = <1>;
110 #size-cells = <1>;
111 #interrupt-cells = <2>;
112 compatible = "fsl,mpc8248-cpm", "fsl,cpm2",
113 "simple-bus";
114 reg = <0x119c0 0x30>;
115 ranges;
116
117 muram {
118 #address-cells = <1>;
119 #size-cells = <1>;
120 ranges = <0 0 0x10000>;
121
122 data@0 {
123 compatible = "fsl,cpm-muram-data";
124 reg = <0 0x1100 0x1140
125 0xec0 0x9800 0x800>;
126 };
127 };
128
129 brg@119f0 {
130 compatible = "fsl,mpc8248-brg",
131 "fsl,cpm2-brg",
132 "fsl,cpm-brg";
133 reg = <0x119f0 0x10 0x115f0 0x10>;
134 };
135
136 /* Monitor port/SMC1 */
137 smc1: serial@11a80 {
138 device_type = "serial";
139 compatible = "fsl,mpc8248-smc-uart",
140 "fsl,cpm2-smc-uart";
141 reg = <0x11a80 0x20 0x1100 0x40>;
142 interrupts = <4 8>;
143 interrupt-parent = <&PIC>;
144 fsl,cpm-brg = <7>;
145 fsl,cpm-command = <0x1d000000>;
146 linux,planetcore-label = "SMC1";
147 };
148
149 /* "Serial" port/SCC1 */
150 scc1: serial@11a00 {
151 device_type = "serial";
152 compatible = "fsl,mpc8248-scc-uart",
153 "fsl,cpm2-scc-uart";
154 reg = <0x11a00 0x20 0x8000 0x100>;
155 interrupts = <40 8>;
156 interrupt-parent = <&PIC>;
157 fsl,cpm-brg = <1>;
158 fsl,cpm-command = <0x00800000>;
159 linux,planetcore-label = "SCC1";
160 };
161
162 eth0: ethernet@11300 {
163 device_type = "network";
164 compatible = "fsl,mpc8248-fcc-enet",
165 "fsl,cpm2-fcc-enet";
166 reg = <0x11300 0x20 0x8400 0x100 0x11390 1>;
167 local-mac-address = [ 00 00 00 00 00 00 ];
168 interrupts = <32 8>;
169 interrupt-parent = <&PIC>;
170 phy-handle = <&PHY0>;
171 linux,network-index = <0>;
172 fsl,cpm-command = <0x12000300>;
173 };
174
175 eth1: ethernet@11320 {
176 device_type = "network";
177 compatible = "fsl,mpc8248-fcc-enet",
178 "fsl,cpm2-fcc-enet";
179 reg = <0x11320 0x20 0x8500 0x100 0x113b0 1>;
180 local-mac-address = [ 00 00 00 00 00 00 ];
181 interrupts = <33 8>;
182 interrupt-parent = <&PIC>;
183 phy-handle = <&PHY1>;
184 linux,network-index = <1>;
185 fsl,cpm-command = <0x16200300>;
186 };
187
188 usb@11b60 {
189 #address-cells = <1>;
190 #size-cells = <0>;
191 compatible = "fsl,mpc8248-usb",
192 "fsl,cpm2-usb";
193 reg = <0x11b60 0x18 0x8b00 0x100>;
194 interrupt-parent = <&PIC>;
195 interrupts = <11 8>;
196 fsl,cpm-command = <0x2e600000>;
197 };
198 };
199
200 PIC: interrupt-controller@10c00 {
201 #interrupt-cells = <2>;
202 interrupt-controller;
203 reg = <0x10c00 0x80>;
204 compatible = "fsl,mpc8248-pic", "fsl,pq2-pic";
205 };
206 };
207};
diff --git a/arch/powerpc/boot/dts/haleakala.dts b/arch/powerpc/boot/dts/haleakala.dts
new file mode 100644
index 000000000000..5dd3d15f0feb
--- /dev/null
+++ b/arch/powerpc/boot/dts/haleakala.dts
@@ -0,0 +1,274 @@
1/*
2 * Device Tree Source for AMCC Haleakala (405EXr)
3 *
4 * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
9 */
10
11/ {
12 #address-cells = <1>;
13 #size-cells = <1>;
14 model = "amcc,haleakala";
15 compatible = "amcc,kilauea";
16 dcr-parent = <&/cpus/cpu@0>;
17
18 aliases {
19 ethernet0 = &EMAC0;
20 serial0 = &UART0;
21 serial1 = &UART1;
22 };
23
24 cpus {
25 #address-cells = <1>;
26 #size-cells = <0>;
27
28 cpu@0 {
29 device_type = "cpu";
30 model = "PowerPC,405EXr";
31 reg = <0>;
32 clock-frequency = <0>; /* Filled in by U-Boot */
33 timebase-frequency = <0>; /* Filled in by U-Boot */
34 i-cache-line-size = <20>;
35 d-cache-line-size = <20>;
36 i-cache-size = <4000>; /* 16 kB */
37 d-cache-size = <4000>; /* 16 kB */
38 dcr-controller;
39 dcr-access-method = "native";
40 };
41 };
42
43 memory {
44 device_type = "memory";
45 reg = <0 0>; /* Filled in by U-Boot */
46 };
47
48 UIC0: interrupt-controller {
49 compatible = "ibm,uic-405exr", "ibm,uic";
50 interrupt-controller;
51 cell-index = <0>;
52 dcr-reg = <0c0 009>;
53 #address-cells = <0>;
54 #size-cells = <0>;
55 #interrupt-cells = <2>;
56 };
57
58 UIC1: interrupt-controller1 {
59 compatible = "ibm,uic-405exr","ibm,uic";
60 interrupt-controller;
61 cell-index = <1>;
62 dcr-reg = <0d0 009>;
63 #address-cells = <0>;
64 #size-cells = <0>;
65 #interrupt-cells = <2>;
66 interrupts = <1e 4 1f 4>; /* cascade */
67 interrupt-parent = <&UIC0>;
68 };
69
70 UIC2: interrupt-controller2 {
71 compatible = "ibm,uic-405exr","ibm,uic";
72 interrupt-controller;
73 cell-index = <2>;
74 dcr-reg = <0e0 009>;
75 #address-cells = <0>;
76 #size-cells = <0>;
77 #interrupt-cells = <2>;
78 interrupts = <1c 4 1d 4>; /* cascade */
79 interrupt-parent = <&UIC0>;
80 };
81
82 plb {
83 compatible = "ibm,plb-405exr", "ibm,plb4";
84 #address-cells = <1>;
85 #size-cells = <1>;
86 ranges;
87 clock-frequency = <0>; /* Filled in by U-Boot */
88
89 SDRAM0: memory-controller {
90 compatible = "ibm,sdram-405exr";
91 dcr-reg = <010 2>;
92 };
93
94 MAL0: mcmal {
95 compatible = "ibm,mcmal-405exr", "ibm,mcmal2";
96 dcr-reg = <180 62>;
97 num-tx-chans = <2>;
98 num-rx-chans = <2>;
99 interrupt-parent = <&MAL0>;
100 interrupts = <0 1 2 3 4>;
101 #interrupt-cells = <1>;
102 #address-cells = <0>;
103 #size-cells = <0>;
104 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
105 /*RXEOB*/ 1 &UIC0 b 4
106 /*SERR*/ 2 &UIC1 0 4
107 /*TXDE*/ 3 &UIC1 1 4
108 /*RXDE*/ 4 &UIC1 2 4>;
109 interrupt-map-mask = <ffffffff>;
110 };
111
112 POB0: opb {
113 compatible = "ibm,opb-405exr", "ibm,opb";
114 #address-cells = <1>;
115 #size-cells = <1>;
116 ranges = <80000000 80000000 10000000
117 ef600000 ef600000 a00000
118 f0000000 f0000000 10000000>;
119 dcr-reg = <0a0 5>;
120 clock-frequency = <0>; /* Filled in by U-Boot */
121
122 EBC0: ebc {
123 compatible = "ibm,ebc-405exr", "ibm,ebc";
124 dcr-reg = <012 2>;
125 #address-cells = <2>;
126 #size-cells = <1>;
127 clock-frequency = <0>; /* Filled in by U-Boot */
128 /* ranges property is supplied by U-Boot */
129 interrupts = <5 1>;
130 interrupt-parent = <&UIC1>;
131
132 nor_flash@0,0 {
133 compatible = "amd,s29gl512n", "cfi-flash";
134 bank-width = <2>;
135 reg = <0 000000 4000000>;
136 #address-cells = <1>;
137 #size-cells = <1>;
138 partition@0 {
139 label = "kernel";
140 reg = <0 200000>;
141 };
142 partition@200000 {
143 label = "root";
144 reg = <200000 200000>;
145 };
146 partition@400000 {
147 label = "user";
148 reg = <400000 3b60000>;
149 };
150 partition@3f60000 {
151 label = "env";
152 reg = <3f60000 40000>;
153 };
154 partition@3fa0000 {
155 label = "u-boot";
156 reg = <3fa0000 60000>;
157 };
158 };
159 };
160
161 UART0: serial@ef600200 {
162 device_type = "serial";
163 compatible = "ns16550";
164 reg = <ef600200 8>;
165 virtual-reg = <ef600200>;
166 clock-frequency = <0>; /* Filled in by U-Boot */
167 current-speed = <0>;
168 interrupt-parent = <&UIC0>;
169 interrupts = <1a 4>;
170 };
171
172 UART1: serial@ef600300 {
173 device_type = "serial";
174 compatible = "ns16550";
175 reg = <ef600300 8>;
176 virtual-reg = <ef600300>;
177 clock-frequency = <0>; /* Filled in by U-Boot */
178 current-speed = <0>;
179 interrupt-parent = <&UIC0>;
180 interrupts = <1 4>;
181 };
182
183 IIC0: i2c@ef600400 {
184 compatible = "ibm,iic-405exr", "ibm,iic";
185 reg = <ef600400 14>;
186 interrupt-parent = <&UIC0>;
187 interrupts = <2 4>;
188 };
189
190 IIC1: i2c@ef600500 {
191 compatible = "ibm,iic-405exr", "ibm,iic";
192 reg = <ef600500 14>;
193 interrupt-parent = <&UIC0>;
194 interrupts = <7 4>;
195 };
196
197
198 RGMII0: emac-rgmii@ef600b00 {
199 compatible = "ibm,rgmii-405exr", "ibm,rgmii";
200 reg = <ef600b00 104>;
201 has-mdio;
202 };
203
204 EMAC0: ethernet@ef600900 {
205 linux,network-index = <0>;
206 device_type = "network";
207 compatible = "ibm,emac-405exr", "ibm,emac4";
208 interrupt-parent = <&EMAC0>;
209 interrupts = <0 1>;
210 #interrupt-cells = <1>;
211 #address-cells = <0>;
212 #size-cells = <0>;
213 interrupt-map = </*Status*/ 0 &UIC0 18 4
214 /*Wake*/ 1 &UIC1 1d 4>;
215 reg = <ef600900 70>;
216 local-mac-address = [000000000000]; /* Filled in by U-Boot */
217 mal-device = <&MAL0>;
218 mal-tx-channel = <0>;
219 mal-rx-channel = <0>;
220 cell-index = <0>;
221 max-frame-size = <5dc>;
222 rx-fifo-size = <1000>;
223 tx-fifo-size = <800>;
224 phy-mode = "rgmii";
225 phy-map = <00000000>;
226 rgmii-device = <&RGMII0>;
227 rgmii-channel = <0>;
228 has-inverted-stacr-oc;
229 has-new-stacr-staopc;
230 };
231 };
232
233 PCIE0: pciex@0a0000000 {
234 device_type = "pci";
235 #interrupt-cells = <1>;
236 #size-cells = <2>;
237 #address-cells = <3>;
238 compatible = "ibm,plb-pciex-405exr", "ibm,plb-pciex";
239 primary;
240 port = <0>; /* port number */
241 reg = <a0000000 20000000 /* Config space access */
242 ef000000 00001000>; /* Registers */
243 dcr-reg = <040 020>;
244 sdr-base = <400>;
245
246 /* Outbound ranges, one memory and one IO,
247 * later cannot be changed
248 */
249 ranges = <02000000 0 80000000 90000000 0 08000000
250 01000000 0 00000000 e0000000 0 00010000>;
251
252 /* Inbound 2GB range starting at 0 */
253 dma-ranges = <42000000 0 0 0 0 80000000>;
254
255 /* This drives busses 0x00 to 0x3f */
256 bus-range = <00 3f>;
257
258 /* Legacy interrupts (note the weird polarity, the bridge seems
259 * to invert PCIe legacy interrupts).
260 * We are de-swizzling here because the numbers are actually for
261 * port of the root complex virtual P2P bridge. But I want
262 * to avoid putting a node for it in the tree, so the numbers
263 * below are basically de-swizzled numbers.
264 * The real slot is on idsel 0, so the swizzling is 1:1
265 */
266 interrupt-map-mask = <0000 0 0 7>;
267 interrupt-map = <
268 0000 0 0 1 &UIC2 0 4 /* swizzled int A */
269 0000 0 0 2 &UIC2 1 4 /* swizzled int B */
270 0000 0 0 3 &UIC2 2 4 /* swizzled int C */
271 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>;
272 };
273 };
274};
diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts
new file mode 100644
index 000000000000..9bdfc0ff3c24
--- /dev/null
+++ b/arch/powerpc/boot/dts/katmai.dts
@@ -0,0 +1,400 @@
1/*
2 * Device Tree Source for AMCC Katmai eval board
3 *
4 * Copyright (c) 2006, 2007 IBM Corp.
5 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
6 *
7 * Copyright (c) 2006, 2007 IBM Corp.
8 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without
12 * any warranty of any kind, whether express or implied.
13 */
14
15/ {
16 #address-cells = <2>;
17 #size-cells = <1>;
18 model = "amcc,katmai";
19 compatible = "amcc,katmai";
20 dcr-parent = <&/cpus/cpu@0>;
21
22 aliases {
23 ethernet0 = &EMAC0;
24 serial0 = &UART0;
25 serial1 = &UART1;
26 serial2 = &UART2;
27 };
28
29 cpus {
30 #address-cells = <1>;
31 #size-cells = <0>;
32
33 cpu@0 {
34 device_type = "cpu";
35 model = "PowerPC,440SPe";
36 reg = <0>;
37 clock-frequency = <0>; /* Filled in by zImage */
38 timebase-frequency = <0>; /* Filled in by zImage */
39 i-cache-line-size = <20>;
40 d-cache-line-size = <20>;
41 i-cache-size = <20000>;
42 d-cache-size = <20000>;
43 dcr-controller;
44 dcr-access-method = "native";
45 };
46 };
47
48 memory {
49 device_type = "memory";
50 reg = <0 0 0>; /* Filled in by zImage */
51 };
52
53 UIC0: interrupt-controller0 {
54 compatible = "ibm,uic-440spe","ibm,uic";
55 interrupt-controller;
56 cell-index = <0>;
57 dcr-reg = <0c0 009>;
58 #address-cells = <0>;
59 #size-cells = <0>;
60 #interrupt-cells = <2>;
61 };
62
63 UIC1: interrupt-controller1 {
64 compatible = "ibm,uic-440spe","ibm,uic";
65 interrupt-controller;
66 cell-index = <1>;
67 dcr-reg = <0d0 009>;
68 #address-cells = <0>;
69 #size-cells = <0>;
70 #interrupt-cells = <2>;
71 interrupts = <1e 4 1f 4>; /* cascade */
72 interrupt-parent = <&UIC0>;
73 };
74
75 UIC2: interrupt-controller2 {
76 compatible = "ibm,uic-440spe","ibm,uic";
77 interrupt-controller;
78 cell-index = <2>;
79 dcr-reg = <0e0 009>;
80 #address-cells = <0>;
81 #size-cells = <0>;
82 #interrupt-cells = <2>;
83 interrupts = <a 4 b 4>; /* cascade */
84 interrupt-parent = <&UIC0>;
85 };
86
87 UIC3: interrupt-controller3 {
88 compatible = "ibm,uic-440spe","ibm,uic";
89 interrupt-controller;
90 cell-index = <3>;
91 dcr-reg = <0f0 009>;
92 #address-cells = <0>;
93 #size-cells = <0>;
94 #interrupt-cells = <2>;
95 interrupts = <10 4 11 4>; /* cascade */
96 interrupt-parent = <&UIC0>;
97 };
98
99 SDR0: sdr {
100 compatible = "ibm,sdr-440spe";
101 dcr-reg = <00e 002>;
102 };
103
104 CPR0: cpr {
105 compatible = "ibm,cpr-440spe";
106 dcr-reg = <00c 002>;
107 };
108
109 plb {
110 compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4";
111 #address-cells = <2>;
112 #size-cells = <1>;
113 ranges;
114 clock-frequency = <0>; /* Filled in by zImage */
115
116 SDRAM0: sdram {
117 compatible = "ibm,sdram-440spe", "ibm,sdram-405gp";
118 dcr-reg = <010 2>;
119 };
120
121 MAL0: mcmal {
122 compatible = "ibm,mcmal-440spe", "ibm,mcmal2";
123 dcr-reg = <180 62>;
124 num-tx-chans = <2>;
125 num-rx-chans = <1>;
126 interrupt-parent = <&MAL0>;
127 interrupts = <0 1 2 3 4>;
128 #interrupt-cells = <1>;
129 #address-cells = <0>;
130 #size-cells = <0>;
131 interrupt-map = </*TXEOB*/ 0 &UIC1 6 4
132 /*RXEOB*/ 1 &UIC1 7 4
133 /*SERR*/ 2 &UIC1 1 4
134 /*TXDE*/ 3 &UIC1 2 4
135 /*RXDE*/ 4 &UIC1 3 4>;
136 };
137
138 POB0: opb {
139 compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
140 #address-cells = <1>;
141 #size-cells = <1>;
142 ranges = <00000000 4 e0000000 20000000>;
143 clock-frequency = <0>; /* Filled in by zImage */
144
145 EBC0: ebc {
146 compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc";
147 dcr-reg = <012 2>;
148 #address-cells = <2>;
149 #size-cells = <1>;
150 clock-frequency = <0>; /* Filled in by zImage */
151 interrupts = <5 1>;
152 interrupt-parent = <&UIC1>;
153 };
154
155 UART0: serial@10000200 {
156 device_type = "serial";
157 compatible = "ns16550";
158 reg = <10000200 8>;
159 virtual-reg = <a0000200>;
160 clock-frequency = <0>; /* Filled in by zImage */
161 current-speed = <1c200>;
162 interrupt-parent = <&UIC0>;
163 interrupts = <0 4>;
164 };
165
166 UART1: serial@10000300 {
167 device_type = "serial";
168 compatible = "ns16550";
169 reg = <10000300 8>;
170 virtual-reg = <a0000300>;
171 clock-frequency = <0>;
172 current-speed = <0>;
173 interrupt-parent = <&UIC0>;
174 interrupts = <1 4>;
175 };
176
177
178 UART2: serial@10000600 {
179 device_type = "serial";
180 compatible = "ns16550";
181 reg = <10000600 8>;
182 virtual-reg = <a0000600>;
183 clock-frequency = <0>;
184 current-speed = <0>;
185 interrupt-parent = <&UIC1>;
186 interrupts = <5 4>;
187 };
188
189 IIC0: i2c@10000400 {
190 device_type = "i2c";
191 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
192 reg = <10000400 14>;
193 interrupt-parent = <&UIC0>;
194 interrupts = <2 4>;
195 };
196
197 IIC1: i2c@10000500 {
198 device_type = "i2c";
199 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
200 reg = <10000500 14>;
201 interrupt-parent = <&UIC0>;
202 interrupts = <3 4>;
203 };
204
205 EMAC0: ethernet@10000800 {
206 linux,network-index = <0>;
207 device_type = "network";
208 compatible = "ibm,emac-440spe", "ibm,emac4";
209 interrupt-parent = <&UIC1>;
210 interrupts = <1c 4 1d 4>;
211 reg = <10000800 70>;
212 local-mac-address = [000000000000];
213 mal-device = <&MAL0>;
214 mal-tx-channel = <0>;
215 mal-rx-channel = <0>;
216 cell-index = <0>;
217 max-frame-size = <5dc>;
218 rx-fifo-size = <1000>;
219 tx-fifo-size = <800>;
220 phy-mode = "gmii";
221 phy-map = <00000000>;
222 has-inverted-stacr-oc;
223 has-new-stacr-staopc;
224 };
225 };
226
227 PCIX0: pci@c0ec00000 {
228 device_type = "pci";
229 #interrupt-cells = <1>;
230 #size-cells = <2>;
231 #address-cells = <3>;
232 compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix";
233 primary;
234 large-inbound-windows;
235 enable-msi-hole;
236 reg = <c 0ec00000 8 /* Config space access */
237 0 0 0 /* no IACK cycles */
238 c 0ed00000 4 /* Special cycles */
239 c 0ec80000 100 /* Internal registers */
240 c 0ec80100 fc>; /* Internal messaging registers */
241
242 /* Outbound ranges, one memory and one IO,
243 * later cannot be changed
244 */
245 ranges = <02000000 0 80000000 0000000d 80000000 0 80000000
246 01000000 0 00000000 0000000c 08000000 0 00010000>;
247
248 /* Inbound 2GB range starting at 0 */
249 dma-ranges = <42000000 0 0 0 0 0 80000000>;
250
251 /* This drives busses 0 to 0xf */
252 bus-range = <0 f>;
253
254 /*
255 * On Katmai, the following PCI-X interrupts signals
256 * have to be enabled via jumpers (only INTA is
257 * enabled per default):
258 *
259 * INTB: J3: 1-2
260 * INTC: J2: 1-2
261 * INTD: J1: 1-2
262 */
263 interrupt-map-mask = <f800 0 0 7>;
264 interrupt-map = <
265 /* IDSEL 1 */
266 0800 0 0 1 &UIC1 14 8
267 0800 0 0 2 &UIC1 13 8
268 0800 0 0 3 &UIC1 12 8
269 0800 0 0 4 &UIC1 11 8
270 >;
271 };
272
273 PCIE0: pciex@d00000000 {
274 device_type = "pci";
275 #interrupt-cells = <1>;
276 #size-cells = <2>;
277 #address-cells = <3>;
278 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
279 primary;
280 port = <0>; /* port number */
281 reg = <d 00000000 20000000 /* Config space access */
282 c 10000000 00001000>; /* Registers */
283 dcr-reg = <100 020>;
284 sdr-base = <300>;
285
286 /* Outbound ranges, one memory and one IO,
287 * later cannot be changed
288 */
289 ranges = <02000000 0 80000000 0000000e 00000000 0 80000000
290 01000000 0 00000000 0000000f 80000000 0 00010000>;
291
292 /* Inbound 2GB range starting at 0 */
293 dma-ranges = <42000000 0 0 0 0 0 80000000>;
294
295 /* This drives busses 10 to 0x1f */
296 bus-range = <10 1f>;
297
298 /* Legacy interrupts (note the weird polarity, the bridge seems
299 * to invert PCIe legacy interrupts).
300 * We are de-swizzling here because the numbers are actually for
301 * port of the root complex virtual P2P bridge. But I want
302 * to avoid putting a node for it in the tree, so the numbers
303 * below are basically de-swizzled numbers.
304 * The real slot is on idsel 0, so the swizzling is 1:1
305 */
306 interrupt-map-mask = <0000 0 0 7>;
307 interrupt-map = <
308 0000 0 0 1 &UIC3 0 4 /* swizzled int A */
309 0000 0 0 2 &UIC3 1 4 /* swizzled int B */
310 0000 0 0 3 &UIC3 2 4 /* swizzled int C */
311 0000 0 0 4 &UIC3 3 4 /* swizzled int D */>;
312 };
313
314 PCIE1: pciex@d20000000 {
315 device_type = "pci";
316 #interrupt-cells = <1>;
317 #size-cells = <2>;
318 #address-cells = <3>;
319 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
320 primary;
321 port = <1>; /* port number */
322 reg = <d 20000000 20000000 /* Config space access */
323 c 10001000 00001000>; /* Registers */
324 dcr-reg = <120 020>;
325 sdr-base = <340>;
326
327 /* Outbound ranges, one memory and one IO,
328 * later cannot be changed
329 */
330 ranges = <02000000 0 80000000 0000000e 80000000 0 80000000
331 01000000 0 00000000 0000000f 80010000 0 00010000>;
332
333 /* Inbound 2GB range starting at 0 */
334 dma-ranges = <42000000 0 0 0 0 0 80000000>;
335
336 /* This drives busses 10 to 0x1f */
337 bus-range = <20 2f>;
338
339 /* Legacy interrupts (note the weird polarity, the bridge seems
340 * to invert PCIe legacy interrupts).
341 * We are de-swizzling here because the numbers are actually for
342 * port of the root complex virtual P2P bridge. But I want
343 * to avoid putting a node for it in the tree, so the numbers
344 * below are basically de-swizzled numbers.
345 * The real slot is on idsel 0, so the swizzling is 1:1
346 */
347 interrupt-map-mask = <0000 0 0 7>;
348 interrupt-map = <
349 0000 0 0 1 &UIC3 4 4 /* swizzled int A */
350 0000 0 0 2 &UIC3 5 4 /* swizzled int B */
351 0000 0 0 3 &UIC3 6 4 /* swizzled int C */
352 0000 0 0 4 &UIC3 7 4 /* swizzled int D */>;
353 };
354
355 PCIE2: pciex@d40000000 {
356 device_type = "pci";
357 #interrupt-cells = <1>;
358 #size-cells = <2>;
359 #address-cells = <3>;
360 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
361 primary;
362 port = <2>; /* port number */
363 reg = <d 40000000 20000000 /* Config space access */
364 c 10002000 00001000>; /* Registers */
365 dcr-reg = <140 020>;
366 sdr-base = <370>;
367
368 /* Outbound ranges, one memory and one IO,
369 * later cannot be changed
370 */
371 ranges = <02000000 0 80000000 0000000f 00000000 0 80000000
372 01000000 0 00000000 0000000f 80020000 0 00010000>;
373
374 /* Inbound 2GB range starting at 0 */
375 dma-ranges = <42000000 0 0 0 0 0 80000000>;
376
377 /* This drives busses 10 to 0x1f */
378 bus-range = <30 3f>;
379
380 /* Legacy interrupts (note the weird polarity, the bridge seems
381 * to invert PCIe legacy interrupts).
382 * We are de-swizzling here because the numbers are actually for
383 * port of the root complex virtual P2P bridge. But I want
384 * to avoid putting a node for it in the tree, so the numbers
385 * below are basically de-swizzled numbers.
386 * The real slot is on idsel 0, so the swizzling is 1:1
387 */
388 interrupt-map-mask = <0000 0 0 7>;
389 interrupt-map = <
390 0000 0 0 1 &UIC3 8 4 /* swizzled int A */
391 0000 0 0 2 &UIC3 9 4 /* swizzled int B */
392 0000 0 0 3 &UIC3 a 4 /* swizzled int C */
393 0000 0 0 4 &UIC3 b 4 /* swizzled int D */>;
394 };
395 };
396
397 chosen {
398 linux,stdout-path = "/plb/opb/serial@10000200";
399 };
400};
diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts
index c824e8f06454..67c7ea179a07 100644
--- a/arch/powerpc/boot/dts/kilauea.dts
+++ b/arch/powerpc/boot/dts/kilauea.dts
@@ -13,14 +13,22 @@
13 #size-cells = <1>; 13 #size-cells = <1>;
14 model = "amcc,kilauea"; 14 model = "amcc,kilauea";
15 compatible = "amcc,kilauea"; 15 compatible = "amcc,kilauea";
16 dcr-parent = <&/cpus/PowerPC,405EX@0>; 16 dcr-parent = <&/cpus/cpu@0>;
17
18 aliases {
19 ethernet0 = &EMAC0;
20 ethernet1 = &EMAC1;
21 serial0 = &UART0;
22 serial1 = &UART1;
23 };
17 24
18 cpus { 25 cpus {
19 #address-cells = <1>; 26 #address-cells = <1>;
20 #size-cells = <0>; 27 #size-cells = <0>;
21 28
22 PowerPC,405EX@0 { 29 cpu@0 {
23 device_type = "cpu"; 30 device_type = "cpu";
31 model = "PowerPC,405EX";
24 reg = <0>; 32 reg = <0>;
25 clock-frequency = <0>; /* Filled in by U-Boot */ 33 clock-frequency = <0>; /* Filled in by U-Boot */
26 timebase-frequency = <0>; /* Filled in by U-Boot */ 34 timebase-frequency = <0>; /* Filled in by U-Boot */
@@ -194,6 +202,7 @@
194 device_type = "rgmii-interface"; 202 device_type = "rgmii-interface";
195 compatible = "ibm,rgmii-405ex", "ibm,rgmii"; 203 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
196 reg = <ef600b00 104>; 204 reg = <ef600b00 104>;
205 has-mdio;
197 }; 206 };
198 207
199 EMAC0: ethernet@ef600900 { 208 EMAC0: ethernet@ef600900 {
@@ -220,6 +229,8 @@
220 phy-map = <00000000>; 229 phy-map = <00000000>;
221 rgmii-device = <&RGMII0>; 230 rgmii-device = <&RGMII0>;
222 rgmii-channel = <0>; 231 rgmii-channel = <0>;
232 has-inverted-stacr-oc;
233 has-new-stacr-staopc;
223 }; 234 };
224 235
225 EMAC1: ethernet@ef600a00 { 236 EMAC1: ethernet@ef600a00 {
@@ -246,7 +257,91 @@
246 phy-map = <00000000>; 257 phy-map = <00000000>;
247 rgmii-device = <&RGMII0>; 258 rgmii-device = <&RGMII0>;
248 rgmii-channel = <1>; 259 rgmii-channel = <1>;
260 has-inverted-stacr-oc;
261 has-new-stacr-staopc;
249 }; 262 };
250 }; 263 };
264
265 PCIE0: pciex@0a0000000 {
266 device_type = "pci";
267 #interrupt-cells = <1>;
268 #size-cells = <2>;
269 #address-cells = <3>;
270 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
271 primary;
272 port = <0>; /* port number */
273 reg = <a0000000 20000000 /* Config space access */
274 ef000000 00001000>; /* Registers */
275 dcr-reg = <040 020>;
276 sdr-base = <400>;
277
278 /* Outbound ranges, one memory and one IO,
279 * later cannot be changed
280 */
281 ranges = <02000000 0 80000000 90000000 0 08000000
282 01000000 0 00000000 e0000000 0 00010000>;
283
284 /* Inbound 2GB range starting at 0 */
285 dma-ranges = <42000000 0 0 0 0 80000000>;
286
287 /* This drives busses 0x00 to 0x3f */
288 bus-range = <00 3f>;
289
290 /* Legacy interrupts (note the weird polarity, the bridge seems
291 * to invert PCIe legacy interrupts).
292 * We are de-swizzling here because the numbers are actually for
293 * port of the root complex virtual P2P bridge. But I want
294 * to avoid putting a node for it in the tree, so the numbers
295 * below are basically de-swizzled numbers.
296 * The real slot is on idsel 0, so the swizzling is 1:1
297 */
298 interrupt-map-mask = <0000 0 0 7>;
299 interrupt-map = <
300 0000 0 0 1 &UIC2 0 4 /* swizzled int A */
301 0000 0 0 2 &UIC2 1 4 /* swizzled int B */
302 0000 0 0 3 &UIC2 2 4 /* swizzled int C */
303 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>;
304 };
305
306 PCIE1: pciex@0c0000000 {
307 device_type = "pci";
308 #interrupt-cells = <1>;
309 #size-cells = <2>;
310 #address-cells = <3>;
311 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
312 primary;
313 port = <1>; /* port number */
314 reg = <c0000000 20000000 /* Config space access */
315 ef001000 00001000>; /* Registers */
316 dcr-reg = <060 020>;
317 sdr-base = <440>;
318
319 /* Outbound ranges, one memory and one IO,
320 * later cannot be changed
321 */
322 ranges = <02000000 0 80000000 98000000 0 08000000
323 01000000 0 00000000 e0010000 0 00010000>;
324
325 /* Inbound 2GB range starting at 0 */
326 dma-ranges = <42000000 0 0 0 0 80000000>;
327
328 /* This drives busses 0x40 to 0x7f */
329 bus-range = <40 7f>;
330
331 /* Legacy interrupts (note the weird polarity, the bridge seems
332 * to invert PCIe legacy interrupts).
333 * We are de-swizzling here because the numbers are actually for
334 * port of the root complex virtual P2P bridge. But I want
335 * to avoid putting a node for it in the tree, so the numbers
336 * below are basically de-swizzled numbers.
337 * The real slot is on idsel 0, so the swizzling is 1:1
338 */
339 interrupt-map-mask = <0000 0 0 7>;
340 interrupt-map = <
341 0000 0 0 1 &UIC2 b 4 /* swizzled int A */
342 0000 0 0 2 &UIC2 c 4 /* swizzled int B */
343 0000 0 0 3 &UIC2 d 4 /* swizzled int C */
344 0000 0 0 4 &UIC2 e 4 /* swizzled int D */>;
345 };
251 }; 346 };
252}; 347};
diff --git a/arch/powerpc/boot/dts/kuroboxHD.dts b/arch/powerpc/boot/dts/kuroboxHD.dts
index ec71ab819fee..446958854519 100644
--- a/arch/powerpc/boot/dts/kuroboxHD.dts
+++ b/arch/powerpc/boot/dts/kuroboxHD.dts
@@ -23,6 +23,12 @@ XXXX add flash parts, rtc, ??
23 #address-cells = <1>; 23 #address-cells = <1>;
24 #size-cells = <1>; 24 #size-cells = <1>;
25 25
26 aliases {
27 serial0 = &serial0;
28 serial1 = &serial1;
29 pci0 = &pci0;
30 };
31
26 cpus { 32 cpus {
27 #address-cells = <1>; 33 #address-cells = <1>;
28 #size-cells = <0>; 34 #size-cells = <0>;
@@ -60,7 +66,7 @@ XXXX add flash parts, rtc, ??
60 i2c@80003000 { 66 i2c@80003000 {
61 #address-cells = <1>; 67 #address-cells = <1>;
62 #size-cells = <0>; 68 #size-cells = <0>;
63 device_type = "i2c"; 69 cell-index = <0>;
64 compatible = "fsl-i2c"; 70 compatible = "fsl-i2c";
65 reg = <80003000 1000>; 71 reg = <80003000 1000>;
66 interrupts = <5 2>; 72 interrupts = <5 2>;
@@ -73,7 +79,8 @@ XXXX add flash parts, rtc, ??
73 }; 79 };
74 }; 80 };
75 81
76 serial@80004500 { 82 serial0: serial@80004500 {
83 cell-index = <0>;
77 device_type = "serial"; 84 device_type = "serial";
78 compatible = "ns16550"; 85 compatible = "ns16550";
79 reg = <80004500 8>; 86 reg = <80004500 8>;
@@ -83,7 +90,8 @@ XXXX add flash parts, rtc, ??
83 interrupt-parent = <&mpic>; 90 interrupt-parent = <&mpic>;
84 }; 91 };
85 92
86 serial@80004600 { 93 serial1: serial@80004600 {
94 cell-index = <1>;
87 device_type = "serial"; 95 device_type = "serial";
88 compatible = "ns16550"; 96 compatible = "ns16550";
89 reg = <80004600 8>; 97 reg = <80004600 8>;
@@ -102,7 +110,7 @@ XXXX add flash parts, rtc, ??
102 reg = <80040000 40000>; 110 reg = <80040000 40000>;
103 }; 111 };
104 112
105 pci@fec00000 { 113 pci0: pci@fec00000 {
106 #address-cells = <3>; 114 #address-cells = <3>;
107 #size-cells = <2>; 115 #size-cells = <2>;
108 #interrupt-cells = <1>; 116 #interrupt-cells = <1>;
diff --git a/arch/powerpc/boot/dts/kuroboxHG.dts b/arch/powerpc/boot/dts/kuroboxHG.dts
index 32ecd2319928..8443c85b7b30 100644
--- a/arch/powerpc/boot/dts/kuroboxHG.dts
+++ b/arch/powerpc/boot/dts/kuroboxHG.dts
@@ -23,6 +23,12 @@ XXXX add flash parts, rtc, ??
23 #address-cells = <1>; 23 #address-cells = <1>;
24 #size-cells = <1>; 24 #size-cells = <1>;
25 25
26 aliases {
27 serial0 = &serial0;
28 serial1 = &serial1;
29 pci0 = &pci0;
30 };
31
26 cpus { 32 cpus {
27 #address-cells = <1>; 33 #address-cells = <1>;
28 #size-cells = <0>; 34 #size-cells = <0>;
@@ -60,7 +66,7 @@ XXXX add flash parts, rtc, ??
60 i2c@80003000 { 66 i2c@80003000 {
61 #address-cells = <1>; 67 #address-cells = <1>;
62 #size-cells = <0>; 68 #size-cells = <0>;
63 device_type = "i2c"; 69 cell-index = <0>;
64 compatible = "fsl-i2c"; 70 compatible = "fsl-i2c";
65 reg = <80003000 1000>; 71 reg = <80003000 1000>;
66 interrupts = <5 2>; 72 interrupts = <5 2>;
@@ -73,7 +79,8 @@ XXXX add flash parts, rtc, ??
73 }; 79 };
74 }; 80 };
75 81
76 serial@80004500 { 82 serial0: serial@80004500 {
83 cell-index = <0>;
77 device_type = "serial"; 84 device_type = "serial";
78 compatible = "ns16550"; 85 compatible = "ns16550";
79 reg = <80004500 8>; 86 reg = <80004500 8>;
@@ -83,7 +90,8 @@ XXXX add flash parts, rtc, ??
83 interrupt-parent = <&mpic>; 90 interrupt-parent = <&mpic>;
84 }; 91 };
85 92
86 serial@80004600 { 93 serial1: serial@80004600 {
94 cell-index = <1>;
87 device_type = "serial"; 95 device_type = "serial";
88 compatible = "ns16550"; 96 compatible = "ns16550";
89 reg = <80004600 8>; 97 reg = <80004600 8>;
@@ -102,7 +110,7 @@ XXXX add flash parts, rtc, ??
102 reg = <80040000 40000>; 110 reg = <80040000 40000>;
103 }; 111 };
104 112
105 pci@fec00000 { 113 pci0: pci@fec00000 {
106 #address-cells = <3>; 114 #address-cells = <3>;
107 #size-cells = <2>; 115 #size-cells = <2>;
108 #interrupt-cells = <1>; 116 #interrupt-cells = <1>;
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index 6731763f0282..0d701c1bf539 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -10,16 +10,9 @@
10 * option) any later version. 10 * option) any later version.
11 */ 11 */
12 12
13/*
14 * WARNING: Do not depend on this tree layout remaining static just yet.
15 * The MPC5200 device tree conventions are still in flux
16 * Keep an eye on the linuxppc-dev mailing list for more details
17 */
18
19/ { 13/ {
20 model = "fsl,lite5200"; 14 model = "fsl,lite5200";
21 // revision = "1.0"; 15 compatible = "fsl,lite5200";
22 compatible = "fsl,lite5200","generic-mpc5200";
23 #address-cells = <1>; 16 #address-cells = <1>;
24 #size-cells = <1>; 17 #size-cells = <1>;
25 18
@@ -46,30 +39,29 @@
46 }; 39 };
47 40
48 soc5200@f0000000 { 41 soc5200@f0000000 {
49 model = "fsl,mpc5200"; 42 #address-cells = <1>;
50 compatible = "mpc5200"; 43 #size-cells = <1>;
51 revision = ""; // from bootloader 44 compatible = "fsl,mpc5200-immr";
52 device_type = "soc";
53 ranges = <0 f0000000 0000c000>; 45 ranges = <0 f0000000 0000c000>;
54 reg = <f0000000 00000100>; 46 reg = <f0000000 00000100>;
55 bus-frequency = <0>; // from bootloader 47 bus-frequency = <0>; // from bootloader
56 system-frequency = <0>; // from bootloader 48 system-frequency = <0>; // from bootloader
57 49
58 cdm@200 { 50 cdm@200 {
59 compatible = "mpc5200-cdm"; 51 compatible = "fsl,mpc5200-cdm";
60 reg = <200 38>; 52 reg = <200 38>;
61 }; 53 };
62 54
63 mpc5200_pic: pic@500 { 55 mpc5200_pic: interrupt-controller@500 {
64 // 5200 interrupts are encoded into two levels; 56 // 5200 interrupts are encoded into two levels;
65 interrupt-controller; 57 interrupt-controller;
66 #interrupt-cells = <3>; 58 #interrupt-cells = <3>;
67 device_type = "interrupt-controller"; 59 device_type = "interrupt-controller";
68 compatible = "mpc5200-pic"; 60 compatible = "fsl,mpc5200-pic";
69 reg = <500 80>; 61 reg = <500 80>;
70 }; 62 };
71 63
72 gpt@600 { // General Purpose Timer 64 timer@600 { // General Purpose Timer
73 compatible = "fsl,mpc5200-gpt"; 65 compatible = "fsl,mpc5200-gpt";
74 cell-index = <0>; 66 cell-index = <0>;
75 reg = <600 10>; 67 reg = <600 10>;
@@ -78,7 +70,7 @@
78 fsl,has-wdt; 70 fsl,has-wdt;
79 }; 71 };
80 72
81 gpt@610 { // General Purpose Timer 73 timer@610 { // General Purpose Timer
82 compatible = "fsl,mpc5200-gpt"; 74 compatible = "fsl,mpc5200-gpt";
83 cell-index = <1>; 75 cell-index = <1>;
84 reg = <610 10>; 76 reg = <610 10>;
@@ -86,7 +78,7 @@
86 interrupt-parent = <&mpc5200_pic>; 78 interrupt-parent = <&mpc5200_pic>;
87 }; 79 };
88 80
89 gpt@620 { // General Purpose Timer 81 timer@620 { // General Purpose Timer
90 compatible = "fsl,mpc5200-gpt"; 82 compatible = "fsl,mpc5200-gpt";
91 cell-index = <2>; 83 cell-index = <2>;
92 reg = <620 10>; 84 reg = <620 10>;
@@ -94,7 +86,7 @@
94 interrupt-parent = <&mpc5200_pic>; 86 interrupt-parent = <&mpc5200_pic>;
95 }; 87 };
96 88
97 gpt@630 { // General Purpose Timer 89 timer@630 { // General Purpose Timer
98 compatible = "fsl,mpc5200-gpt"; 90 compatible = "fsl,mpc5200-gpt";
99 cell-index = <3>; 91 cell-index = <3>;
100 reg = <630 10>; 92 reg = <630 10>;
@@ -102,7 +94,7 @@
102 interrupt-parent = <&mpc5200_pic>; 94 interrupt-parent = <&mpc5200_pic>;
103 }; 95 };
104 96
105 gpt@640 { // General Purpose Timer 97 timer@640 { // General Purpose Timer
106 compatible = "fsl,mpc5200-gpt"; 98 compatible = "fsl,mpc5200-gpt";
107 cell-index = <4>; 99 cell-index = <4>;
108 reg = <640 10>; 100 reg = <640 10>;
@@ -110,7 +102,7 @@
110 interrupt-parent = <&mpc5200_pic>; 102 interrupt-parent = <&mpc5200_pic>;
111 }; 103 };
112 104
113 gpt@650 { // General Purpose Timer 105 timer@650 { // General Purpose Timer
114 compatible = "fsl,mpc5200-gpt"; 106 compatible = "fsl,mpc5200-gpt";
115 cell-index = <5>; 107 cell-index = <5>;
116 reg = <650 10>; 108 reg = <650 10>;
@@ -118,7 +110,7 @@
118 interrupt-parent = <&mpc5200_pic>; 110 interrupt-parent = <&mpc5200_pic>;
119 }; 111 };
120 112
121 gpt@660 { // General Purpose Timer 113 timer@660 { // General Purpose Timer
122 compatible = "fsl,mpc5200-gpt"; 114 compatible = "fsl,mpc5200-gpt";
123 cell-index = <6>; 115 cell-index = <6>;
124 reg = <660 10>; 116 reg = <660 10>;
@@ -126,7 +118,7 @@
126 interrupt-parent = <&mpc5200_pic>; 118 interrupt-parent = <&mpc5200_pic>;
127 }; 119 };
128 120
129 gpt@670 { // General Purpose Timer 121 timer@670 { // General Purpose Timer
130 compatible = "fsl,mpc5200-gpt"; 122 compatible = "fsl,mpc5200-gpt";
131 cell-index = <7>; 123 cell-index = <7>;
132 reg = <670 10>; 124 reg = <670 10>;
@@ -135,25 +127,23 @@
135 }; 127 };
136 128
137 rtc@800 { // Real time clock 129 rtc@800 { // Real time clock
138 compatible = "mpc5200-rtc"; 130 compatible = "fsl,mpc5200-rtc";
139 device_type = "rtc"; 131 device_type = "rtc";
140 reg = <800 100>; 132 reg = <800 100>;
141 interrupts = <1 5 0 1 6 0>; 133 interrupts = <1 5 0 1 6 0>;
142 interrupt-parent = <&mpc5200_pic>; 134 interrupt-parent = <&mpc5200_pic>;
143 }; 135 };
144 136
145 mscan@900 { 137 can@900 {
146 device_type = "mscan"; 138 compatible = "fsl,mpc5200-mscan";
147 compatible = "mpc5200-mscan";
148 cell-index = <0>; 139 cell-index = <0>;
149 interrupts = <2 11 0>; 140 interrupts = <2 11 0>;
150 interrupt-parent = <&mpc5200_pic>; 141 interrupt-parent = <&mpc5200_pic>;
151 reg = <900 80>; 142 reg = <900 80>;
152 }; 143 };
153 144
154 mscan@980 { 145 can@980 {
155 device_type = "mscan"; 146 compatible = "fsl,mpc5200-mscan";
156 compatible = "mpc5200-mscan";
157 cell-index = <1>; 147 cell-index = <1>;
158 interrupts = <2 12 0>; 148 interrupts = <2 12 0>;
159 interrupt-parent = <&mpc5200_pic>; 149 interrupt-parent = <&mpc5200_pic>;
@@ -161,38 +151,36 @@
161 }; 151 };
162 152
163 gpio@b00 { 153 gpio@b00 {
164 compatible = "mpc5200-gpio"; 154 compatible = "fsl,mpc5200-gpio";
165 reg = <b00 40>; 155 reg = <b00 40>;
166 interrupts = <1 7 0>; 156 interrupts = <1 7 0>;
167 interrupt-parent = <&mpc5200_pic>; 157 interrupt-parent = <&mpc5200_pic>;
168 }; 158 };
169 159
170 gpio-wkup@c00 { 160 gpio@c00 {
171 compatible = "mpc5200-gpio-wkup"; 161 compatible = "fsl,mpc5200-gpio-wkup";
172 reg = <c00 40>; 162 reg = <c00 40>;
173 interrupts = <1 8 0 0 3 0>; 163 interrupts = <1 8 0 0 3 0>;
174 interrupt-parent = <&mpc5200_pic>; 164 interrupt-parent = <&mpc5200_pic>;
175 }; 165 };
176 166
177 spi@f00 { 167 spi@f00 {
178 device_type = "spi"; 168 compatible = "fsl,mpc5200-spi";
179 compatible = "mpc5200-spi";
180 reg = <f00 20>; 169 reg = <f00 20>;
181 interrupts = <2 d 0 2 e 0>; 170 interrupts = <2 d 0 2 e 0>;
182 interrupt-parent = <&mpc5200_pic>; 171 interrupt-parent = <&mpc5200_pic>;
183 }; 172 };
184 173
185 usb@1000 { 174 usb@1000 {
186 device_type = "usb-ohci-be"; 175 compatible = "fsl,mpc5200-ohci","ohci-be";
187 compatible = "mpc5200-ohci","ohci-be";
188 reg = <1000 ff>; 176 reg = <1000 ff>;
189 interrupts = <2 6 0>; 177 interrupts = <2 6 0>;
190 interrupt-parent = <&mpc5200_pic>; 178 interrupt-parent = <&mpc5200_pic>;
191 }; 179 };
192 180
193 bestcomm@1200 { 181 dma-controller@1200 {
194 device_type = "dma-controller"; 182 device_type = "dma-controller";
195 compatible = "mpc5200-bestcomm"; 183 compatible = "fsl,mpc5200-bestcomm";
196 reg = <1200 80>; 184 reg = <1200 80>;
197 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 185 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
198 3 4 0 3 5 0 3 6 0 3 7 0 186 3 4 0 3 5 0 3 6 0 3 7 0
@@ -202,13 +190,13 @@
202 }; 190 };
203 191
204 xlb@1f00 { 192 xlb@1f00 {
205 compatible = "mpc5200-xlb"; 193 compatible = "fsl,mpc5200-xlb";
206 reg = <1f00 100>; 194 reg = <1f00 100>;
207 }; 195 };
208 196
209 serial@2000 { // PSC1 197 serial@2000 { // PSC1
210 device_type = "serial"; 198 device_type = "serial";
211 compatible = "mpc5200-psc-uart"; 199 compatible = "fsl,mpc5200-psc-uart";
212 port-number = <0>; // Logical port assignment 200 port-number = <0>; // Logical port assignment
213 cell-index = <0>; 201 cell-index = <0>;
214 reg = <2000 100>; 202 reg = <2000 100>;
@@ -218,8 +206,7 @@
218 206
219 // PSC2 in ac97 mode example 207 // PSC2 in ac97 mode example
220 //ac97@2200 { // PSC2 208 //ac97@2200 { // PSC2
221 // device_type = "sound"; 209 // compatible = "fsl,mpc5200-psc-ac97";
222 // compatible = "mpc5200-psc-ac97";
223 // cell-index = <1>; 210 // cell-index = <1>;
224 // reg = <2200 100>; 211 // reg = <2200 100>;
225 // interrupts = <2 2 0>; 212 // interrupts = <2 2 0>;
@@ -228,8 +215,7 @@
228 215
229 // PSC3 in CODEC mode example 216 // PSC3 in CODEC mode example
230 //i2s@2400 { // PSC3 217 //i2s@2400 { // PSC3
231 // device_type = "sound"; 218 // compatible = "fsl,mpc5200-psc-i2s";
232 // compatible = "mpc5200-psc-i2s";
233 // cell-index = <2>; 219 // cell-index = <2>;
234 // reg = <2400 100>; 220 // reg = <2400 100>;
235 // interrupts = <2 3 0>; 221 // interrupts = <2 3 0>;
@@ -239,7 +225,7 @@
239 // PSC4 in uart mode example 225 // PSC4 in uart mode example
240 //serial@2600 { // PSC4 226 //serial@2600 { // PSC4
241 // device_type = "serial"; 227 // device_type = "serial";
242 // compatible = "mpc5200-psc-uart"; 228 // compatible = "fsl,mpc5200-psc-uart";
243 // cell-index = <3>; 229 // cell-index = <3>;
244 // reg = <2600 100>; 230 // reg = <2600 100>;
245 // interrupts = <2 b 0>; 231 // interrupts = <2 b 0>;
@@ -249,7 +235,7 @@
249 // PSC5 in uart mode example 235 // PSC5 in uart mode example
250 //serial@2800 { // PSC5 236 //serial@2800 { // PSC5
251 // device_type = "serial"; 237 // device_type = "serial";
252 // compatible = "mpc5200-psc-uart"; 238 // compatible = "fsl,mpc5200-psc-uart";
253 // cell-index = <4>; 239 // cell-index = <4>;
254 // reg = <2800 100>; 240 // reg = <2800 100>;
255 // interrupts = <2 c 0>; 241 // interrupts = <2 c 0>;
@@ -258,8 +244,7 @@
258 244
259 // PSC6 in spi mode example 245 // PSC6 in spi mode example
260 //spi@2c00 { // PSC6 246 //spi@2c00 { // PSC6
261 // device_type = "spi"; 247 // compatible = "fsl,mpc5200-psc-spi";
262 // compatible = "mpc5200-psc-spi";
263 // cell-index = <5>; 248 // cell-index = <5>;
264 // reg = <2c00 100>; 249 // reg = <2c00 100>;
265 // interrupts = <2 4 0>; 250 // interrupts = <2 4 0>;
@@ -268,24 +253,25 @@
268 253
269 ethernet@3000 { 254 ethernet@3000 {
270 device_type = "network"; 255 device_type = "network";
271 compatible = "mpc5200-fec"; 256 compatible = "fsl,mpc5200-fec";
272 reg = <3000 800>; 257 reg = <3000 800>;
273 mac-address = [ 02 03 04 05 06 07 ]; // Bad! 258 local-mac-address = [ 00 00 00 00 00 00 ];
274 interrupts = <2 5 0>; 259 interrupts = <2 5 0>;
275 interrupt-parent = <&mpc5200_pic>; 260 interrupt-parent = <&mpc5200_pic>;
276 }; 261 };
277 262
278 ata@3a00 { 263 ata@3a00 {
279 device_type = "ata"; 264 device_type = "ata";
280 compatible = "mpc5200-ata"; 265 compatible = "fsl,mpc5200-ata";
281 reg = <3a00 100>; 266 reg = <3a00 100>;
282 interrupts = <2 7 0>; 267 interrupts = <2 7 0>;
283 interrupt-parent = <&mpc5200_pic>; 268 interrupt-parent = <&mpc5200_pic>;
284 }; 269 };
285 270
286 i2c@3d00 { 271 i2c@3d00 {
287 device_type = "i2c"; 272 #address-cells = <1>;
288 compatible = "mpc5200-i2c","fsl-i2c"; 273 #size-cells = <0>;
274 compatible = "fsl,mpc5200-i2c","fsl-i2c";
289 cell-index = <0>; 275 cell-index = <0>;
290 reg = <3d00 40>; 276 reg = <3d00 40>;
291 interrupts = <2 f 0>; 277 interrupts = <2 f 0>;
@@ -294,8 +280,9 @@
294 }; 280 };
295 281
296 i2c@3d40 { 282 i2c@3d40 {
297 device_type = "i2c"; 283 #address-cells = <1>;
298 compatible = "mpc5200-i2c","fsl-i2c"; 284 #size-cells = <0>;
285 compatible = "fsl,mpc5200-i2c","fsl-i2c";
299 cell-index = <1>; 286 cell-index = <1>;
300 reg = <3d40 40>; 287 reg = <3d40 40>;
301 interrupts = <2 10 0>; 288 interrupts = <2 10 0>;
@@ -303,8 +290,7 @@
303 fsl5200-clocking; 290 fsl5200-clocking;
304 }; 291 };
305 sram@8000 { 292 sram@8000 {
306 device_type = "sram"; 293 compatible = "fsl,mpc5200-sram","sram";
307 compatible = "mpc5200-sram","sram";
308 reg = <8000 4000>; 294 reg = <8000 4000>;
309 }; 295 };
310 }; 296 };
@@ -314,7 +300,7 @@
314 #size-cells = <2>; 300 #size-cells = <2>;
315 #address-cells = <3>; 301 #address-cells = <3>;
316 device_type = "pci"; 302 device_type = "pci";
317 compatible = "mpc5200-pci"; 303 compatible = "fsl,mpc5200-pci";
318 reg = <f0000d00 100>; 304 reg = <f0000d00 100>;
319 interrupt-map-mask = <f800 0 0 7>; 305 interrupt-map-mask = <f800 0 0 7>;
320 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 306 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index b540388c608c..571ba02accac 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -18,8 +18,7 @@
18 18
19/ { 19/ {
20 model = "fsl,lite5200b"; 20 model = "fsl,lite5200b";
21 // revision = "1.0"; 21 compatible = "fsl,lite5200b";
22 compatible = "fsl,lite5200b","generic-mpc5200";
23 #address-cells = <1>; 22 #address-cells = <1>;
24 #size-cells = <1>; 23 #size-cells = <1>;
25 24
@@ -46,30 +45,29 @@
46 }; 45 };
47 46
48 soc5200@f0000000 { 47 soc5200@f0000000 {
49 model = "fsl,mpc5200b"; 48 #address-cells = <1>;
50 compatible = "mpc5200"; 49 #size-cells = <1>;
51 revision = ""; // from bootloader 50 compatible = "fsl,mpc5200b-immr";
52 device_type = "soc";
53 ranges = <0 f0000000 0000c000>; 51 ranges = <0 f0000000 0000c000>;
54 reg = <f0000000 00000100>; 52 reg = <f0000000 00000100>;
55 bus-frequency = <0>; // from bootloader 53 bus-frequency = <0>; // from bootloader
56 system-frequency = <0>; // from bootloader 54 system-frequency = <0>; // from bootloader
57 55
58 cdm@200 { 56 cdm@200 {
59 compatible = "mpc5200b-cdm","mpc5200-cdm"; 57 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
60 reg = <200 38>; 58 reg = <200 38>;
61 }; 59 };
62 60
63 mpc5200_pic: pic@500 { 61 mpc5200_pic: interrupt-controller@500 {
64 // 5200 interrupts are encoded into two levels; 62 // 5200 interrupts are encoded into two levels;
65 interrupt-controller; 63 interrupt-controller;
66 #interrupt-cells = <3>; 64 #interrupt-cells = <3>;
67 device_type = "interrupt-controller"; 65 device_type = "interrupt-controller";
68 compatible = "mpc5200b-pic","mpc5200-pic"; 66 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
69 reg = <500 80>; 67 reg = <500 80>;
70 }; 68 };
71 69
72 gpt@600 { // General Purpose Timer 70 timer@600 { // General Purpose Timer
73 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 71 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
74 cell-index = <0>; 72 cell-index = <0>;
75 reg = <600 10>; 73 reg = <600 10>;
@@ -78,7 +76,7 @@
78 fsl,has-wdt; 76 fsl,has-wdt;
79 }; 77 };
80 78
81 gpt@610 { // General Purpose Timer 79 timer@610 { // General Purpose Timer
82 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 80 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
83 cell-index = <1>; 81 cell-index = <1>;
84 reg = <610 10>; 82 reg = <610 10>;
@@ -86,7 +84,7 @@
86 interrupt-parent = <&mpc5200_pic>; 84 interrupt-parent = <&mpc5200_pic>;
87 }; 85 };
88 86
89 gpt@620 { // General Purpose Timer 87 timer@620 { // General Purpose Timer
90 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 88 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
91 cell-index = <2>; 89 cell-index = <2>;
92 reg = <620 10>; 90 reg = <620 10>;
@@ -94,7 +92,7 @@
94 interrupt-parent = <&mpc5200_pic>; 92 interrupt-parent = <&mpc5200_pic>;
95 }; 93 };
96 94
97 gpt@630 { // General Purpose Timer 95 timer@630 { // General Purpose Timer
98 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 96 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
99 cell-index = <3>; 97 cell-index = <3>;
100 reg = <630 10>; 98 reg = <630 10>;
@@ -102,7 +100,7 @@
102 interrupt-parent = <&mpc5200_pic>; 100 interrupt-parent = <&mpc5200_pic>;
103 }; 101 };
104 102
105 gpt@640 { // General Purpose Timer 103 timer@640 { // General Purpose Timer
106 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 104 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
107 cell-index = <4>; 105 cell-index = <4>;
108 reg = <640 10>; 106 reg = <640 10>;
@@ -110,7 +108,7 @@
110 interrupt-parent = <&mpc5200_pic>; 108 interrupt-parent = <&mpc5200_pic>;
111 }; 109 };
112 110
113 gpt@650 { // General Purpose Timer 111 timer@650 { // General Purpose Timer
114 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 112 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
115 cell-index = <5>; 113 cell-index = <5>;
116 reg = <650 10>; 114 reg = <650 10>;
@@ -118,7 +116,7 @@
118 interrupt-parent = <&mpc5200_pic>; 116 interrupt-parent = <&mpc5200_pic>;
119 }; 117 };
120 118
121 gpt@660 { // General Purpose Timer 119 timer@660 { // General Purpose Timer
122 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 120 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
123 cell-index = <6>; 121 cell-index = <6>;
124 reg = <660 10>; 122 reg = <660 10>;
@@ -126,7 +124,7 @@
126 interrupt-parent = <&mpc5200_pic>; 124 interrupt-parent = <&mpc5200_pic>;
127 }; 125 };
128 126
129 gpt@670 { // General Purpose Timer 127 timer@670 { // General Purpose Timer
130 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt"; 128 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
131 cell-index = <7>; 129 cell-index = <7>;
132 reg = <670 10>; 130 reg = <670 10>;
@@ -135,25 +133,23 @@
135 }; 133 };
136 134
137 rtc@800 { // Real time clock 135 rtc@800 { // Real time clock
138 compatible = "mpc5200b-rtc","mpc5200-rtc"; 136 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
139 device_type = "rtc"; 137 device_type = "rtc";
140 reg = <800 100>; 138 reg = <800 100>;
141 interrupts = <1 5 0 1 6 0>; 139 interrupts = <1 5 0 1 6 0>;
142 interrupt-parent = <&mpc5200_pic>; 140 interrupt-parent = <&mpc5200_pic>;
143 }; 141 };
144 142
145 mscan@900 { 143 can@900 {
146 device_type = "mscan"; 144 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
147 compatible = "mpc5200b-mscan","mpc5200-mscan";
148 cell-index = <0>; 145 cell-index = <0>;
149 interrupts = <2 11 0>; 146 interrupts = <2 11 0>;
150 interrupt-parent = <&mpc5200_pic>; 147 interrupt-parent = <&mpc5200_pic>;
151 reg = <900 80>; 148 reg = <900 80>;
152 }; 149 };
153 150
154 mscan@980 { 151 can@980 {
155 device_type = "mscan"; 152 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
156 compatible = "mpc5200b-mscan","mpc5200-mscan";
157 cell-index = <1>; 153 cell-index = <1>;
158 interrupts = <2 12 0>; 154 interrupts = <2 12 0>;
159 interrupt-parent = <&mpc5200_pic>; 155 interrupt-parent = <&mpc5200_pic>;
@@ -161,38 +157,36 @@
161 }; 157 };
162 158
163 gpio@b00 { 159 gpio@b00 {
164 compatible = "mpc5200b-gpio","mpc5200-gpio"; 160 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
165 reg = <b00 40>; 161 reg = <b00 40>;
166 interrupts = <1 7 0>; 162 interrupts = <1 7 0>;
167 interrupt-parent = <&mpc5200_pic>; 163 interrupt-parent = <&mpc5200_pic>;
168 }; 164 };
169 165
170 gpio-wkup@c00 { 166 gpio@c00 {
171 compatible = "mpc5200b-gpio-wkup","mpc5200-gpio-wkup"; 167 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
172 reg = <c00 40>; 168 reg = <c00 40>;
173 interrupts = <1 8 0 0 3 0>; 169 interrupts = <1 8 0 0 3 0>;
174 interrupt-parent = <&mpc5200_pic>; 170 interrupt-parent = <&mpc5200_pic>;
175 }; 171 };
176 172
177 spi@f00 { 173 spi@f00 {
178 device_type = "spi"; 174 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
179 compatible = "mpc5200b-spi","mpc5200-spi";
180 reg = <f00 20>; 175 reg = <f00 20>;
181 interrupts = <2 d 0 2 e 0>; 176 interrupts = <2 d 0 2 e 0>;
182 interrupt-parent = <&mpc5200_pic>; 177 interrupt-parent = <&mpc5200_pic>;
183 }; 178 };
184 179
185 usb@1000 { 180 usb@1000 {
186 device_type = "usb-ohci-be"; 181 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
187 compatible = "mpc5200b-ohci","mpc5200-ohci","ohci-be";
188 reg = <1000 ff>; 182 reg = <1000 ff>;
189 interrupts = <2 6 0>; 183 interrupts = <2 6 0>;
190 interrupt-parent = <&mpc5200_pic>; 184 interrupt-parent = <&mpc5200_pic>;
191 }; 185 };
192 186
193 bestcomm@1200 { 187 dma-controller@1200 {
194 device_type = "dma-controller"; 188 device_type = "dma-controller";
195 compatible = "mpc5200b-bestcomm","mpc5200-bestcomm"; 189 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
196 reg = <1200 80>; 190 reg = <1200 80>;
197 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 191 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
198 3 4 0 3 5 0 3 6 0 3 7 0 192 3 4 0 3 5 0 3 6 0 3 7 0
@@ -202,13 +196,13 @@
202 }; 196 };
203 197
204 xlb@1f00 { 198 xlb@1f00 {
205 compatible = "mpc5200b-xlb","mpc5200-xlb"; 199 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
206 reg = <1f00 100>; 200 reg = <1f00 100>;
207 }; 201 };
208 202
209 serial@2000 { // PSC1 203 serial@2000 { // PSC1
210 device_type = "serial"; 204 device_type = "serial";
211 compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 205 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
212 port-number = <0>; // Logical port assignment 206 port-number = <0>; // Logical port assignment
213 cell-index = <0>; 207 cell-index = <0>;
214 reg = <2000 100>; 208 reg = <2000 100>;
@@ -218,8 +212,7 @@
218 212
219 // PSC2 in ac97 mode example 213 // PSC2 in ac97 mode example
220 //ac97@2200 { // PSC2 214 //ac97@2200 { // PSC2
221 // device_type = "sound"; 215 // compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
222 // compatible = "mpc5200b-psc-ac97","mpc5200-psc-ac97";
223 // cell-index = <1>; 216 // cell-index = <1>;
224 // reg = <2200 100>; 217 // reg = <2200 100>;
225 // interrupts = <2 2 0>; 218 // interrupts = <2 2 0>;
@@ -228,8 +221,7 @@
228 221
229 // PSC3 in CODEC mode example 222 // PSC3 in CODEC mode example
230 //i2s@2400 { // PSC3 223 //i2s@2400 { // PSC3
231 // device_type = "sound"; 224 // compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
232 // compatible = "mpc5200b-psc-i2s"; //not 5200 compatible
233 // cell-index = <2>; 225 // cell-index = <2>;
234 // reg = <2400 100>; 226 // reg = <2400 100>;
235 // interrupts = <2 3 0>; 227 // interrupts = <2 3 0>;
@@ -239,7 +231,7 @@
239 // PSC4 in uart mode example 231 // PSC4 in uart mode example
240 //serial@2600 { // PSC4 232 //serial@2600 { // PSC4
241 // device_type = "serial"; 233 // device_type = "serial";
242 // compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 234 // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
243 // cell-index = <3>; 235 // cell-index = <3>;
244 // reg = <2600 100>; 236 // reg = <2600 100>;
245 // interrupts = <2 b 0>; 237 // interrupts = <2 b 0>;
@@ -249,7 +241,7 @@
249 // PSC5 in uart mode example 241 // PSC5 in uart mode example
250 //serial@2800 { // PSC5 242 //serial@2800 { // PSC5
251 // device_type = "serial"; 243 // device_type = "serial";
252 // compatible = "mpc5200b-psc-uart","mpc5200-psc-uart"; 244 // compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
253 // cell-index = <4>; 245 // cell-index = <4>;
254 // reg = <2800 100>; 246 // reg = <2800 100>;
255 // interrupts = <2 c 0>; 247 // interrupts = <2 c 0>;
@@ -258,8 +250,7 @@
258 250
259 // PSC6 in spi mode example 251 // PSC6 in spi mode example
260 //spi@2c00 { // PSC6 252 //spi@2c00 { // PSC6
261 // device_type = "spi"; 253 // compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
262 // compatible = "mpc5200b-psc-spi","mpc5200-psc-spi";
263 // cell-index = <5>; 254 // cell-index = <5>;
264 // reg = <2c00 100>; 255 // reg = <2c00 100>;
265 // interrupts = <2 4 0>; 256 // interrupts = <2 4 0>;
@@ -268,9 +259,9 @@
268 259
269 ethernet@3000 { 260 ethernet@3000 {
270 device_type = "network"; 261 device_type = "network";
271 compatible = "mpc5200b-fec","mpc5200-fec"; 262 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
272 reg = <3000 400>; 263 reg = <3000 400>;
273 mac-address = [ 02 03 04 05 06 07 ]; // Bad! 264 local-mac-address = [ 00 00 00 00 00 00 ];
274 interrupts = <2 5 0>; 265 interrupts = <2 5 0>;
275 interrupt-parent = <&mpc5200_pic>; 266 interrupt-parent = <&mpc5200_pic>;
276 phy-handle = <&phy0>; 267 phy-handle = <&phy0>;
@@ -279,8 +270,7 @@
279 mdio@3000 { 270 mdio@3000 {
280 #address-cells = <1>; 271 #address-cells = <1>;
281 #size-cells = <0>; 272 #size-cells = <0>;
282 device_type = "mdio"; 273 compatible = "fsl,mpc5200b-mdio";
283 compatible = "mpc5200b-fec-phy";
284 reg = <3000 400>; // fec range, since we need to setup fec interrupts 274 reg = <3000 400>; // fec range, since we need to setup fec interrupts
285 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. 275 interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
286 interrupt-parent = <&mpc5200_pic>; 276 interrupt-parent = <&mpc5200_pic>;
@@ -293,15 +283,16 @@
293 283
294 ata@3a00 { 284 ata@3a00 {
295 device_type = "ata"; 285 device_type = "ata";
296 compatible = "mpc5200b-ata","mpc5200-ata"; 286 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
297 reg = <3a00 100>; 287 reg = <3a00 100>;
298 interrupts = <2 7 0>; 288 interrupts = <2 7 0>;
299 interrupt-parent = <&mpc5200_pic>; 289 interrupt-parent = <&mpc5200_pic>;
300 }; 290 };
301 291
302 i2c@3d00 { 292 i2c@3d00 {
303 device_type = "i2c"; 293 #address-cells = <1>;
304 compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c"; 294 #size-cells = <0>;
295 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
305 cell-index = <0>; 296 cell-index = <0>;
306 reg = <3d00 40>; 297 reg = <3d00 40>;
307 interrupts = <2 f 0>; 298 interrupts = <2 f 0>;
@@ -310,8 +301,9 @@
310 }; 301 };
311 302
312 i2c@3d40 { 303 i2c@3d40 {
313 device_type = "i2c"; 304 #address-cells = <1>;
314 compatible = "mpc5200b-i2c","mpc5200-i2c","fsl-i2c"; 305 #size-cells = <0>;
306 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
315 cell-index = <1>; 307 cell-index = <1>;
316 reg = <3d40 40>; 308 reg = <3d40 40>;
317 interrupts = <2 10 0>; 309 interrupts = <2 10 0>;
@@ -319,8 +311,7 @@
319 fsl5200-clocking; 311 fsl5200-clocking;
320 }; 312 };
321 sram@8000 { 313 sram@8000 {
322 device_type = "sram"; 314 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram";
323 compatible = "mpc5200b-sram","mpc5200-sram","sram";
324 reg = <8000 4000>; 315 reg = <8000 4000>;
325 }; 316 };
326 }; 317 };
@@ -330,7 +321,7 @@
330 #size-cells = <2>; 321 #size-cells = <2>;
331 #address-cells = <3>; 322 #address-cells = <3>;
332 device_type = "pci"; 323 device_type = "pci";
333 compatible = "mpc5200b-pci","mpc5200-pci"; 324 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
334 reg = <f0000d00 100>; 325 reg = <f0000d00 100>;
335 interrupt-map-mask = <f800 0 0 7>; 326 interrupt-map-mask = <f800 0 0 7>;
336 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot 327 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
diff --git a/arch/powerpc/boot/dts/makalu.dts b/arch/powerpc/boot/dts/makalu.dts
new file mode 100644
index 000000000000..bdd70e4596ae
--- /dev/null
+++ b/arch/powerpc/boot/dts/makalu.dts
@@ -0,0 +1,347 @@
1/*
2 * Device Tree Source for AMCC Makalu (405EX)
3 *
4 * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
9 */
10
11/ {
12 #address-cells = <1>;
13 #size-cells = <1>;
14 model = "amcc,makalu";
15 compatible = "amcc,makalu";
16 dcr-parent = <&/cpus/cpu@0>;
17
18 aliases {
19 ethernet0 = &EMAC0;
20 ethernet1 = &EMAC1;
21 serial0 = &UART0;
22 serial1 = &UART1;
23 };
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 cpu@0 {
30 device_type = "cpu";
31 model = "PowerPC,405EX";
32 reg = <0>;
33 clock-frequency = <0>; /* Filled in by U-Boot */
34 timebase-frequency = <0>; /* Filled in by U-Boot */
35 i-cache-line-size = <20>;
36 d-cache-line-size = <20>;
37 i-cache-size = <4000>; /* 16 kB */
38 d-cache-size = <4000>; /* 16 kB */
39 dcr-controller;
40 dcr-access-method = "native";
41 };
42 };
43
44 memory {
45 device_type = "memory";
46 reg = <0 0>; /* Filled in by U-Boot */
47 };
48
49 UIC0: interrupt-controller {
50 compatible = "ibm,uic-405ex", "ibm,uic";
51 interrupt-controller;
52 cell-index = <0>;
53 dcr-reg = <0c0 009>;
54 #address-cells = <0>;
55 #size-cells = <0>;
56 #interrupt-cells = <2>;
57 };
58
59 UIC1: interrupt-controller1 {
60 compatible = "ibm,uic-405ex","ibm,uic";
61 interrupt-controller;
62 cell-index = <1>;
63 dcr-reg = <0d0 009>;
64 #address-cells = <0>;
65 #size-cells = <0>;
66 #interrupt-cells = <2>;
67 interrupts = <1e 4 1f 4>; /* cascade */
68 interrupt-parent = <&UIC0>;
69 };
70
71 UIC2: interrupt-controller2 {
72 compatible = "ibm,uic-405ex","ibm,uic";
73 interrupt-controller;
74 cell-index = <2>;
75 dcr-reg = <0e0 009>;
76 #address-cells = <0>;
77 #size-cells = <0>;
78 #interrupt-cells = <2>;
79 interrupts = <1c 4 1d 4>; /* cascade */
80 interrupt-parent = <&UIC0>;
81 };
82
83 plb {
84 compatible = "ibm,plb-405ex", "ibm,plb4";
85 #address-cells = <1>;
86 #size-cells = <1>;
87 ranges;
88 clock-frequency = <0>; /* Filled in by U-Boot */
89
90 SDRAM0: memory-controller {
91 compatible = "ibm,sdram-405ex";
92 dcr-reg = <010 2>;
93 };
94
95 MAL0: mcmal {
96 compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
97 dcr-reg = <180 62>;
98 num-tx-chans = <2>;
99 num-rx-chans = <2>;
100 interrupt-parent = <&MAL0>;
101 interrupts = <0 1 2 3 4>;
102 #interrupt-cells = <1>;
103 #address-cells = <0>;
104 #size-cells = <0>;
105 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
106 /*RXEOB*/ 1 &UIC0 b 4
107 /*SERR*/ 2 &UIC1 0 4
108 /*TXDE*/ 3 &UIC1 1 4
109 /*RXDE*/ 4 &UIC1 2 4>;
110 interrupt-map-mask = <ffffffff>;
111 };
112
113 POB0: opb {
114 compatible = "ibm,opb-405ex", "ibm,opb";
115 #address-cells = <1>;
116 #size-cells = <1>;
117 ranges = <80000000 80000000 10000000
118 ef600000 ef600000 a00000
119 f0000000 f0000000 10000000>;
120 dcr-reg = <0a0 5>;
121 clock-frequency = <0>; /* Filled in by U-Boot */
122
123 EBC0: ebc {
124 compatible = "ibm,ebc-405ex", "ibm,ebc";
125 dcr-reg = <012 2>;
126 #address-cells = <2>;
127 #size-cells = <1>;
128 clock-frequency = <0>; /* Filled in by U-Boot */
129 /* ranges property is supplied by U-Boot */
130 interrupts = <5 1>;
131 interrupt-parent = <&UIC1>;
132
133 nor_flash@0,0 {
134 compatible = "amd,s29gl512n", "cfi-flash";
135 bank-width = <2>;
136 reg = <0 000000 4000000>;
137 #address-cells = <1>;
138 #size-cells = <1>;
139 partition@0 {
140 label = "kernel";
141 reg = <0 200000>;
142 };
143 partition@200000 {
144 label = "root";
145 reg = <200000 200000>;
146 };
147 partition@400000 {
148 label = "user";
149 reg = <400000 3b60000>;
150 };
151 partition@3f60000 {
152 label = "env";
153 reg = <3f60000 40000>;
154 };
155 partition@3fa0000 {
156 label = "u-boot";
157 reg = <3fa0000 60000>;
158 };
159 };
160 };
161
162 UART0: serial@ef600200 {
163 device_type = "serial";
164 compatible = "ns16550";
165 reg = <ef600200 8>;
166 virtual-reg = <ef600200>;
167 clock-frequency = <0>; /* Filled in by U-Boot */
168 current-speed = <0>;
169 interrupt-parent = <&UIC0>;
170 interrupts = <1a 4>;
171 };
172
173 UART1: serial@ef600300 {
174 device_type = "serial";
175 compatible = "ns16550";
176 reg = <ef600300 8>;
177 virtual-reg = <ef600300>;
178 clock-frequency = <0>; /* Filled in by U-Boot */
179 current-speed = <0>;
180 interrupt-parent = <&UIC0>;
181 interrupts = <1 4>;
182 };
183
184 IIC0: i2c@ef600400 {
185 device_type = "i2c";
186 compatible = "ibm,iic-405ex", "ibm,iic";
187 reg = <ef600400 14>;
188 interrupt-parent = <&UIC0>;
189 interrupts = <2 4>;
190 };
191
192 IIC1: i2c@ef600500 {
193 device_type = "i2c";
194 compatible = "ibm,iic-405ex", "ibm,iic";
195 reg = <ef600500 14>;
196 interrupt-parent = <&UIC0>;
197 interrupts = <7 4>;
198 };
199
200
201 RGMII0: emac-rgmii@ef600b00 {
202 device_type = "rgmii-interface";
203 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
204 reg = <ef600b00 104>;
205 has-mdio;
206 };
207
208 EMAC0: ethernet@ef600900 {
209 linux,network-index = <0>;
210 device_type = "network";
211 compatible = "ibm,emac-405ex", "ibm,emac4";
212 interrupt-parent = <&EMAC0>;
213 interrupts = <0 1>;
214 #interrupt-cells = <1>;
215 #address-cells = <0>;
216 #size-cells = <0>;
217 interrupt-map = </*Status*/ 0 &UIC0 18 4
218 /*Wake*/ 1 &UIC1 1d 4>;
219 reg = <ef600900 70>;
220 local-mac-address = [000000000000]; /* Filled in by U-Boot */
221 mal-device = <&MAL0>;
222 mal-tx-channel = <0>;
223 mal-rx-channel = <0>;
224 cell-index = <0>;
225 max-frame-size = <5dc>;
226 rx-fifo-size = <1000>;
227 tx-fifo-size = <800>;
228 phy-mode = "rgmii";
229 phy-map = <0000003f>; /* Start at 6 */
230 rgmii-device = <&RGMII0>;
231 rgmii-channel = <0>;
232 has-inverted-stacr-oc;
233 has-new-stacr-staopc;
234 };
235
236 EMAC1: ethernet@ef600a00 {
237 linux,network-index = <1>;
238 device_type = "network";
239 compatible = "ibm,emac-405ex", "ibm,emac4";
240 interrupt-parent = <&EMAC1>;
241 interrupts = <0 1>;
242 #interrupt-cells = <1>;
243 #address-cells = <0>;
244 #size-cells = <0>;
245 interrupt-map = </*Status*/ 0 &UIC0 19 4
246 /*Wake*/ 1 &UIC1 1f 4>;
247 reg = <ef600a00 70>;
248 local-mac-address = [000000000000]; /* Filled in by U-Boot */
249 mal-device = <&MAL0>;
250 mal-tx-channel = <1>;
251 mal-rx-channel = <1>;
252 cell-index = <1>;
253 max-frame-size = <5dc>;
254 rx-fifo-size = <1000>;
255 tx-fifo-size = <800>;
256 phy-mode = "rgmii";
257 phy-map = <00000000>;
258 rgmii-device = <&RGMII0>;
259 rgmii-channel = <1>;
260 has-inverted-stacr-oc;
261 has-new-stacr-staopc;
262 };
263 };
264
265 PCIE0: pciex@0a0000000 {
266 device_type = "pci";
267 #interrupt-cells = <1>;
268 #size-cells = <2>;
269 #address-cells = <3>;
270 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
271 primary;
272 port = <0>; /* port number */
273 reg = <a0000000 20000000 /* Config space access */
274 ef000000 00001000>; /* Registers */
275 dcr-reg = <040 020>;
276 sdr-base = <400>;
277
278 /* Outbound ranges, one memory and one IO,
279 * later cannot be changed
280 */
281 ranges = <02000000 0 80000000 90000000 0 08000000
282 01000000 0 00000000 e0000000 0 00010000>;
283
284 /* Inbound 2GB range starting at 0 */
285 dma-ranges = <42000000 0 0 0 0 80000000>;
286
287 /* This drives busses 0x00 to 0x3f */
288 bus-range = <00 3f>;
289
290 /* Legacy interrupts (note the weird polarity, the bridge seems
291 * to invert PCIe legacy interrupts).
292 * We are de-swizzling here because the numbers are actually for
293 * port of the root complex virtual P2P bridge. But I want
294 * to avoid putting a node for it in the tree, so the numbers
295 * below are basically de-swizzled numbers.
296 * The real slot is on idsel 0, so the swizzling is 1:1
297 */
298 interrupt-map-mask = <0000 0 0 7>;
299 interrupt-map = <
300 0000 0 0 1 &UIC2 0 4 /* swizzled int A */
301 0000 0 0 2 &UIC2 1 4 /* swizzled int B */
302 0000 0 0 3 &UIC2 2 4 /* swizzled int C */
303 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>;
304 };
305
306 PCIE1: pciex@0c0000000 {
307 device_type = "pci";
308 #interrupt-cells = <1>;
309 #size-cells = <2>;
310 #address-cells = <3>;
311 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
312 primary;
313 port = <1>; /* port number */
314 reg = <c0000000 20000000 /* Config space access */
315 ef001000 00001000>; /* Registers */
316 dcr-reg = <060 020>;
317 sdr-base = <440>;
318
319 /* Outbound ranges, one memory and one IO,
320 * later cannot be changed
321 */
322 ranges = <02000000 0 80000000 98000000 0 08000000
323 01000000 0 00000000 e0010000 0 00010000>;
324
325 /* Inbound 2GB range starting at 0 */
326 dma-ranges = <42000000 0 0 0 0 80000000>;
327
328 /* This drives busses 0x40 to 0x7f */
329 bus-range = <40 7f>;
330
331 /* Legacy interrupts (note the weird polarity, the bridge seems
332 * to invert PCIe legacy interrupts).
333 * We are de-swizzling here because the numbers are actually for
334 * port of the root complex virtual P2P bridge. But I want
335 * to avoid putting a node for it in the tree, so the numbers
336 * below are basically de-swizzled numbers.
337 * The real slot is on idsel 0, so the swizzling is 1:1
338 */
339 interrupt-map-mask = <0000 0 0 7>;
340 interrupt-map = <
341 0000 0 0 1 &UIC2 b 4 /* swizzled int A */
342 0000 0 0 2 &UIC2 c 4 /* swizzled int B */
343 0000 0 0 3 &UIC2 d 4 /* swizzled int C */
344 0000 0 0 4 &UIC2 e 4 /* swizzled int D */>;
345 };
346 };
347};
diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
new file mode 100644
index 000000000000..76951ab038ee
--- /dev/null
+++ b/arch/powerpc/boot/dts/motionpro.dts
@@ -0,0 +1,301 @@
1/*
2 * Motion-PRO board Device Tree Source
3 *
4 * Copyright (C) 2007 Semihalf
5 * Marian Balakowicz <m8@semihalf.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/ {
14 model = "promess,motionpro";
15 compatible = "promess,motionpro";
16 #address-cells = <1>;
17 #size-cells = <1>;
18
19 cpus {
20 #address-cells = <1>;
21 #size-cells = <0>;
22
23 PowerPC,5200@0 {
24 device_type = "cpu";
25 reg = <0>;
26 d-cache-line-size = <20>;
27 i-cache-line-size = <20>;
28 d-cache-size = <4000>; // L1, 16K
29 i-cache-size = <4000>; // L1, 16K
30 timebase-frequency = <0>; // from bootloader
31 bus-frequency = <0>; // from bootloader
32 clock-frequency = <0>; // from bootloader
33 };
34 };
35
36 memory {
37 device_type = "memory";
38 reg = <00000000 04000000>; // 64MB
39 };
40
41 soc5200@f0000000 {
42 #address-cells = <1>;
43 #size-cells = <1>;
44 compatible = "fsl,mpc5200b-immr";
45 ranges = <0 f0000000 0000c000>;
46 reg = <f0000000 00000100>;
47 bus-frequency = <0>; // from bootloader
48 system-frequency = <0>; // from bootloader
49
50 cdm@200 {
51 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
52 reg = <200 38>;
53 };
54
55 mpc5200_pic: interrupt-controller@500 {
56 // 5200 interrupts are encoded into two levels;
57 interrupt-controller;
58 #interrupt-cells = <3>;
59 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
60 reg = <500 80>;
61 };
62
63 timer@600 { // General Purpose Timer
64 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
65 reg = <600 10>;
66 interrupts = <1 9 0>;
67 interrupt-parent = <&mpc5200_pic>;
68 fsl,has-wdt;
69 };
70
71 timer@610 { // General Purpose Timer
72 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
73 reg = <610 10>;
74 interrupts = <1 a 0>;
75 interrupt-parent = <&mpc5200_pic>;
76 };
77
78 timer@620 { // General Purpose Timer
79 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
80 reg = <620 10>;
81 interrupts = <1 b 0>;
82 interrupt-parent = <&mpc5200_pic>;
83 };
84
85 timer@630 { // General Purpose Timer
86 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
87 reg = <630 10>;
88 interrupts = <1 c 0>;
89 interrupt-parent = <&mpc5200_pic>;
90 };
91
92 timer@640 { // General Purpose Timer
93 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
94 reg = <640 10>;
95 interrupts = <1 d 0>;
96 interrupt-parent = <&mpc5200_pic>;
97 };
98
99 timer@650 { // General Purpose Timer
100 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
101 reg = <650 10>;
102 interrupts = <1 e 0>;
103 interrupt-parent = <&mpc5200_pic>;
104 };
105
106 motionpro-led@660 { // Motion-PRO status LED
107 compatible = "promess,motionpro-led";
108 label = "motionpro-statusled";
109 reg = <660 10>;
110 interrupts = <1 f 0>;
111 interrupt-parent = <&mpc5200_pic>;
112 blink-delay = <64>; // 100 msec
113 };
114
115 motionpro-led@670 { // Motion-PRO ready LED
116 compatible = "promess,motionpro-led";
117 label = "motionpro-readyled";
118 reg = <670 10>;
119 interrupts = <1 10 0>;
120 interrupt-parent = <&mpc5200_pic>;
121 };
122
123 rtc@800 { // Real time clock
124 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
125 reg = <800 100>;
126 interrupts = <1 5 0 1 6 0>;
127 interrupt-parent = <&mpc5200_pic>;
128 };
129
130 mscan@980 {
131 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
132 interrupts = <2 12 0>;
133 interrupt-parent = <&mpc5200_pic>;
134 reg = <980 80>;
135 };
136
137 gpio@b00 {
138 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
139 reg = <b00 40>;
140 interrupts = <1 7 0>;
141 interrupt-parent = <&mpc5200_pic>;
142 };
143
144 gpio@c00 {
145 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
146 reg = <c00 40>;
147 interrupts = <1 8 0 0 3 0>;
148 interrupt-parent = <&mpc5200_pic>;
149 };
150
151
152 spi@f00 {
153 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
154 reg = <f00 20>;
155 interrupts = <2 d 0 2 e 0>;
156 interrupt-parent = <&mpc5200_pic>;
157 };
158
159 usb@1000 {
160 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
161 reg = <1000 ff>;
162 interrupts = <2 6 0>;
163 interrupt-parent = <&mpc5200_pic>;
164 };
165
166 dma-controller@1200 {
167 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
168 reg = <1200 80>;
169 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
170 3 4 0 3 5 0 3 6 0 3 7 0
171 3 8 0 3 9 0 3 a 0 3 b 0
172 3 c 0 3 d 0 3 e 0 3 f 0>;
173 interrupt-parent = <&mpc5200_pic>;
174 };
175
176 xlb@1f00 {
177 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
178 reg = <1f00 100>;
179 };
180
181 serial@2000 { // PSC1
182 device_type = "serial";
183 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
184 port-number = <0>; // Logical port assignment
185 reg = <2000 100>;
186 interrupts = <2 1 0>;
187 interrupt-parent = <&mpc5200_pic>;
188 };
189
190 // PSC2 in spi master mode
191 spi@2200 { // PSC2
192 compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
193 cell-index = <1>;
194 reg = <2200 100>;
195 interrupts = <2 2 0>;
196 interrupt-parent = <&mpc5200_pic>;
197 };
198
199 // PSC5 in uart mode
200 serial@2800 { // PSC5
201 device_type = "serial";
202 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
203 port-number = <4>; // Logical port assignment
204 reg = <2800 100>;
205 interrupts = <2 c 0>;
206 interrupt-parent = <&mpc5200_pic>;
207 };
208
209 ethernet@3000 {
210 device_type = "network";
211 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
212 reg = <3000 800>;
213 local-mac-address = [ 00 00 00 00 00 00 ];
214 interrupts = <2 5 0>;
215 interrupt-parent = <&mpc5200_pic>;
216 };
217
218 ata@3a00 {
219 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
220 reg = <3a00 100>;
221 interrupts = <2 7 0>;
222 interrupt-parent = <&mpc5200_pic>;
223 };
224
225 i2c@3d40 {
226 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
227 reg = <3d40 40>;
228 interrupts = <2 10 0>;
229 interrupt-parent = <&mpc5200_pic>;
230 fsl5200-clocking;
231 };
232
233 sram@8000 {
234 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
235 reg = <8000 4000>;
236 };
237 };
238
239 lpb {
240 compatible = "fsl,lpb";
241 #address-cells = <2>;
242 #size-cells = <1>;
243 ranges = <1 0 50000000 00010000
244 2 0 50010000 00010000
245 3 0 50020000 00010000>;
246
247 // 8-bit DualPort SRAM on LocalPlus Bus CS1
248 kollmorgen@1,0 {
249 compatible = "promess,motionpro-kollmorgen";
250 reg = <1 0 10000>;
251 interrupts = <1 1 0>;
252 interrupt-parent = <&mpc5200_pic>;
253 };
254
255 // 8-bit board CPLD on LocalPlus Bus CS2
256 cpld@2,0 {
257 compatible = "promess,motionpro-cpld";
258 reg = <2 0 10000>;
259 };
260
261 // 8-bit custom Anybus Module on LocalPlus Bus CS3
262 anybus@3,0 {
263 compatible = "promess,motionpro-anybus";
264 reg = <3 0 10000>;
265 };
266 pro_module_general@3,0 {
267 compatible = "promess,pro_module_general";
268 reg = <3 0 3>;
269 };
270 pro_module_dio@3,800 {
271 compatible = "promess,pro_module_dio";
272 reg = <3 800 2>;
273 };
274 };
275
276 pci@f0000d00 {
277 #interrupt-cells = <1>;
278 #size-cells = <2>;
279 #address-cells = <3>;
280 device_type = "pci";
281 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
282 reg = <f0000d00 100>;
283 interrupt-map-mask = <f800 0 0 7>;
284 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
285 c000 0 0 2 &mpc5200_pic 1 1 3
286 c000 0 0 3 &mpc5200_pic 1 2 3
287 c000 0 0 4 &mpc5200_pic 1 3 3
288
289 c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
290 c800 0 0 2 &mpc5200_pic 1 2 3
291 c800 0 0 3 &mpc5200_pic 1 3 3
292 c800 0 0 4 &mpc5200_pic 0 0 3>;
293 clock-frequency = <0>; // From boot loader
294 interrupts = <2 8 0 2 9 0 2 a 0>;
295 interrupt-parent = <&mpc5200_pic>;
296 bus-range = <0 0>;
297 ranges = <42000000 0 80000000 80000000 0 20000000
298 02000000 0 a0000000 a0000000 0 10000000
299 01000000 0 00000000 b0000000 0 01000000>;
300 };
301};
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 9e7eba973262..2d6653fe72ff 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -9,23 +9,33 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/dts-v1/;
13
12/ { 14/ {
13 model = "MPC8313ERDB"; 15 model = "MPC8313ERDB";
14 compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB"; 16 compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
15 #address-cells = <1>; 17 #address-cells = <1>;
16 #size-cells = <1>; 18 #size-cells = <1>;
17 19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
27
18 cpus { 28 cpus {
19 #address-cells = <1>; 29 #address-cells = <1>;
20 #size-cells = <0>; 30 #size-cells = <0>;
21 31
22 PowerPC,8313@0 { 32 PowerPC,8313@0 {
23 device_type = "cpu"; 33 device_type = "cpu";
24 reg = <0>; 34 reg = <0x0>;
25 d-cache-line-size = <20>; // 32 bytes 35 d-cache-line-size = <32>;
26 i-cache-line-size = <20>; // 32 bytes 36 i-cache-line-size = <32>;
27 d-cache-size = <4000>; // L1, 16K 37 d-cache-size = <16384>;
28 i-cache-size = <4000>; // L1, 16K 38 i-cache-size = <16384>;
29 timebase-frequency = <0>; // from bootloader 39 timebase-frequency = <0>; // from bootloader
30 bus-frequency = <0>; // from bootloader 40 bus-frequency = <0>; // from bootloader
31 clock-frequency = <0>; // from bootloader 41 clock-frequency = <0>; // from bootloader
@@ -34,134 +44,188 @@
34 44
35 memory { 45 memory {
36 device_type = "memory"; 46 device_type = "memory";
37 reg = <00000000 08000000>; // 128MB at 0 47 reg = <0x00000000 0x08000000>; // 128MB at 0
48 };
49
50 localbus@e0005000 {
51 #address-cells = <2>;
52 #size-cells = <1>;
53 compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus";
54 reg = <0xe0005000 0x1000>;
55 interrupts = <77 0x8>;
56 interrupt-parent = <&ipic>;
57
58 // CS0 and CS1 are swapped when
59 // booting from nand, but the
60 // addresses are the same.
61 ranges = <0x0 0x0 0xfe000000 0x00800000
62 0x1 0x0 0xe2800000 0x00008000
63 0x2 0x0 0xf0000000 0x00020000
64 0x3 0x0 0xfa000000 0x00008000>;
65
66 flash@0,0 {
67 #address-cells = <1>;
68 #size-cells = <1>;
69 compatible = "cfi-flash";
70 reg = <0x0 0x0 0x800000>;
71 bank-width = <2>;
72 device-width = <1>;
73 };
74
75 nand@1,0 {
76 #address-cells = <1>;
77 #size-cells = <1>;
78 compatible = "fsl,mpc8313-fcm-nand",
79 "fsl,elbc-fcm-nand";
80 reg = <0x1 0x0 0x2000>;
81
82 u-boot@0 {
83 reg = <0x0 0x100000>;
84 read-only;
85 };
86
87 kernel@100000 {
88 reg = <0x100000 0x300000>;
89 };
90
91 fs@400000 {
92 reg = <0x400000 0x1c00000>;
93 };
94 };
38 }; 95 };
39 96
40 soc8313@e0000000 { 97 soc8313@e0000000 {
41 #address-cells = <1>; 98 #address-cells = <1>;
42 #size-cells = <1>; 99 #size-cells = <1>;
43 device_type = "soc"; 100 device_type = "soc";
44 ranges = <0 e0000000 00100000>; 101 compatible = "simple-bus";
45 reg = <e0000000 00000200>; 102 ranges = <0x0 0xe0000000 0x00100000>;
103 reg = <0xe0000000 0x00000200>;
46 bus-frequency = <0>; 104 bus-frequency = <0>;
47 105
48 wdt@200 { 106 wdt@200 {
49 device_type = "watchdog"; 107 device_type = "watchdog";
50 compatible = "mpc83xx_wdt"; 108 compatible = "mpc83xx_wdt";
51 reg = <200 100>; 109 reg = <0x200 0x100>;
52 }; 110 };
53 111
54 i2c@3000 { 112 i2c@3000 {
55 device_type = "i2c"; 113 #address-cells = <1>;
114 #size-cells = <0>;
115 cell-index = <0>;
56 compatible = "fsl-i2c"; 116 compatible = "fsl-i2c";
57 reg = <3000 100>; 117 reg = <0x3000 0x100>;
58 interrupts = <e 8>; 118 interrupts = <14 0x8>;
59 interrupt-parent = < &ipic >; 119 interrupt-parent = <&ipic>;
60 dfsrr; 120 dfsrr;
61 }; 121 };
62 122
63 i2c@3100 { 123 i2c@3100 {
64 device_type = "i2c"; 124 #address-cells = <1>;
125 #size-cells = <0>;
126 cell-index = <1>;
65 compatible = "fsl-i2c"; 127 compatible = "fsl-i2c";
66 reg = <3100 100>; 128 reg = <0x3100 0x100>;
67 interrupts = <f 8>; 129 interrupts = <15 0x8>;
68 interrupt-parent = < &ipic >; 130 interrupt-parent = <&ipic>;
69 dfsrr; 131 dfsrr;
70 }; 132 };
71 133
72 spi@7000 { 134 spi@7000 {
73 device_type = "spi"; 135 cell-index = <0>;
74 compatible = "fsl_spi"; 136 compatible = "fsl,spi";
75 reg = <7000 1000>; 137 reg = <0x7000 0x1000>;
76 interrupts = <10 8>; 138 interrupts = <16 0x8>;
77 interrupt-parent = < &ipic >; 139 interrupt-parent = <&ipic>;
78 mode = "cpu"; 140 mode = "cpu";
79 }; 141 };
80 142
81 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ 143 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
82 usb@23000 { 144 usb@23000 {
83 device_type = "usb";
84 compatible = "fsl-usb2-dr"; 145 compatible = "fsl-usb2-dr";
85 reg = <23000 1000>; 146 reg = <0x23000 0x1000>;
86 #address-cells = <1>; 147 #address-cells = <1>;
87 #size-cells = <0>; 148 #size-cells = <0>;
88 interrupt-parent = < &ipic >; 149 interrupt-parent = <&ipic>;
89 interrupts = <26 8>; 150 interrupts = <38 0x8>;
90 phy_type = "utmi_wide"; 151 phy_type = "utmi_wide";
91 }; 152 };
92 153
93 mdio@24520 { 154 mdio@24520 {
94 device_type = "mdio";
95 compatible = "gianfar";
96 reg = <24520 20>;
97 #address-cells = <1>; 155 #address-cells = <1>;
98 #size-cells = <0>; 156 #size-cells = <0>;
157 compatible = "fsl,gianfar-mdio";
158 reg = <0x24520 0x20>;
99 phy1: ethernet-phy@1 { 159 phy1: ethernet-phy@1 {
100 interrupt-parent = < &ipic >; 160 interrupt-parent = <&ipic>;
101 interrupts = <13 8>; 161 interrupts = <19 0x8>;
102 reg = <1>; 162 reg = <0x1>;
103 device_type = "ethernet-phy"; 163 device_type = "ethernet-phy";
104 }; 164 };
105 phy4: ethernet-phy@4 { 165 phy4: ethernet-phy@4 {
106 interrupt-parent = < &ipic >; 166 interrupt-parent = <&ipic>;
107 interrupts = <14 8>; 167 interrupts = <20 0x8>;
108 reg = <4>; 168 reg = <0x4>;
109 device_type = "ethernet-phy"; 169 device_type = "ethernet-phy";
110 }; 170 };
111 }; 171 };
112 172
113 ethernet@24000 { 173 enet0: ethernet@24000 {
174 cell-index = <0>;
114 device_type = "network"; 175 device_type = "network";
115 model = "eTSEC"; 176 model = "eTSEC";
116 compatible = "gianfar"; 177 compatible = "gianfar";
117 reg = <24000 1000>; 178 reg = <0x24000 0x1000>;
118 local-mac-address = [ 00 00 00 00 00 00 ]; 179 local-mac-address = [ 00 00 00 00 00 00 ];
119 interrupts = <25 8 24 8 23 8>; 180 interrupts = <37 0x8 36 0x8 35 0x8>;
120 interrupt-parent = < &ipic >; 181 interrupt-parent = <&ipic>;
121 phy-handle = < &phy1 >; 182 phy-handle = < &phy1 >;
122 }; 183 };
123 184
124 ethernet@25000 { 185 enet1: ethernet@25000 {
186 cell-index = <1>;
125 device_type = "network"; 187 device_type = "network";
126 model = "eTSEC"; 188 model = "eTSEC";
127 compatible = "gianfar"; 189 compatible = "gianfar";
128 reg = <25000 1000>; 190 reg = <0x25000 0x1000>;
129 local-mac-address = [ 00 00 00 00 00 00 ]; 191 local-mac-address = [ 00 00 00 00 00 00 ];
130 interrupts = <22 8 21 8 20 8>; 192 interrupts = <34 0x8 33 0x8 32 0x8>;
131 interrupt-parent = < &ipic >; 193 interrupt-parent = <&ipic>;
132 phy-handle = < &phy4 >; 194 phy-handle = < &phy4 >;
133 }; 195 };
134 196
135 serial@4500 { 197 serial0: serial@4500 {
198 cell-index = <0>;
136 device_type = "serial"; 199 device_type = "serial";
137 compatible = "ns16550"; 200 compatible = "ns16550";
138 reg = <4500 100>; 201 reg = <0x4500 0x100>;
139 clock-frequency = <0>; 202 clock-frequency = <0>;
140 interrupts = <9 8>; 203 interrupts = <9 0x8>;
141 interrupt-parent = < &ipic >; 204 interrupt-parent = <&ipic>;
142 }; 205 };
143 206
144 serial@4600 { 207 serial1: serial@4600 {
208 cell-index = <1>;
145 device_type = "serial"; 209 device_type = "serial";
146 compatible = "ns16550"; 210 compatible = "ns16550";
147 reg = <4600 100>; 211 reg = <0x4600 0x100>;
148 clock-frequency = <0>; 212 clock-frequency = <0>;
149 interrupts = <a 8>; 213 interrupts = <10 0x8>;
150 interrupt-parent = < &ipic >; 214 interrupt-parent = <&ipic>;
151 }; 215 };
152 216
153 crypto@30000 { 217 crypto@30000 {
154 device_type = "crypto"; 218 device_type = "crypto";
155 model = "SEC2"; 219 model = "SEC2";
156 compatible = "talitos"; 220 compatible = "talitos";
157 reg = <30000 7000>; 221 reg = <0x30000 0x7000>;
158 interrupts = <b 8>; 222 interrupts = <11 0x8>;
159 interrupt-parent = < &ipic >; 223 interrupt-parent = <&ipic>;
160 /* Rev. 2.2 */ 224 /* Rev. 2.2 */
161 num-channels = <1>; 225 num-channels = <1>;
162 channel-fifo-len = <18>; 226 channel-fifo-len = <24>;
163 exec-units-mask = <0000004c>; 227 exec-units-mask = <0x0000004c>;
164 descriptor-types-mask = <0122003f>; 228 descriptor-types-mask = <0x0122003f>;
165 }; 229 };
166 230
167 /* IPIC 231 /* IPIC
@@ -174,37 +238,38 @@
174 interrupt-controller; 238 interrupt-controller;
175 #address-cells = <0>; 239 #address-cells = <0>;
176 #interrupt-cells = <2>; 240 #interrupt-cells = <2>;
177 reg = <700 100>; 241 reg = <0x700 0x100>;
178 device_type = "ipic"; 242 device_type = "ipic";
179 }; 243 };
180 }; 244 };
181 245
182 pci@e0008500 { 246 pci0: pci@e0008500 {
183 interrupt-map-mask = <f800 0 0 7>; 247 cell-index = <1>;
248 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
184 interrupt-map = < 249 interrupt-map = <
185 250
186 /* IDSEL 0x0E -mini PCI */ 251 /* IDSEL 0x0E -mini PCI */
187 7000 0 0 1 &ipic 12 8 252 0x7000 0x0 0x0 0x1 &ipic 18 0x8
188 7000 0 0 2 &ipic 12 8 253 0x7000 0x0 0x0 0x2 &ipic 18 0x8
189 7000 0 0 3 &ipic 12 8 254 0x7000 0x0 0x0 0x3 &ipic 18 0x8
190 7000 0 0 4 &ipic 12 8 255 0x7000 0x0 0x0 0x4 &ipic 18 0x8
191 256
192 /* IDSEL 0x0F - PCI slot */ 257 /* IDSEL 0x0F - PCI slot */
193 7800 0 0 1 &ipic 11 8 258 0x7800 0x0 0x0 0x1 &ipic 17 0x8
194 7800 0 0 2 &ipic 12 8 259 0x7800 0x0 0x0 0x2 &ipic 18 0x8
195 7800 0 0 3 &ipic 11 8 260 0x7800 0x0 0x0 0x3 &ipic 17 0x8
196 7800 0 0 4 &ipic 12 8>; 261 0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
197 interrupt-parent = < &ipic >; 262 interrupt-parent = <&ipic>;
198 interrupts = <42 8>; 263 interrupts = <66 0x8>;
199 bus-range = <0 0>; 264 bus-range = <0x0 0x0>;
200 ranges = <02000000 0 90000000 90000000 0 10000000 265 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
201 42000000 0 80000000 80000000 0 10000000 266 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
202 01000000 0 00000000 e2000000 0 00100000>; 267 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
203 clock-frequency = <3f940aa>; 268 clock-frequency = <66666666>;
204 #interrupt-cells = <1>; 269 #interrupt-cells = <1>;
205 #size-cells = <2>; 270 #size-cells = <2>;
206 #address-cells = <3>; 271 #address-cells = <3>;
207 reg = <e0008500 100>; 272 reg = <0xe0008500 0x100>;
208 compatible = "fsl,mpc8349-pci"; 273 compatible = "fsl,mpc8349-pci";
209 device_type = "pci"; 274 device_type = "pci";
210 }; 275 };
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
new file mode 100644
index 000000000000..b582032ba3d6
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -0,0 +1,287 @@
1/*
2 * MPC8315E RDB Device Tree Source
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 compatible = "fsl,mpc8315erdb";
16 #address-cells = <1>;
17 #size-cells = <1>;
18
19 aliases {
20 ethernet0 = &enet0;
21 ethernet1 = &enet1;
22 serial0 = &serial0;
23 serial1 = &serial1;
24 pci0 = &pci0;
25 };
26
27 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30
31 PowerPC,8315@0 {
32 device_type = "cpu";
33 reg = <0x0>;
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <16384>;
37 i-cache-size = <16384>;
38 timebase-frequency = <0>; // from bootloader
39 bus-frequency = <0>; // from bootloader
40 clock-frequency = <0>; // from bootloader
41 };
42 };
43
44 memory {
45 device_type = "memory";
46 reg = <0x00000000 0x08000000>; // 128MB at 0
47 };
48
49 localbus@e0005000 {
50 #address-cells = <2>;
51 #size-cells = <1>;
52 compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
53 reg = <0xe0005000 0x1000>;
54 interrupts = <77 0x8>;
55 interrupt-parent = <&ipic>;
56
57 // CS0 and CS1 are swapped when
58 // booting from nand, but the
59 // addresses are the same.
60 ranges = <0x0 0x0 0xfe000000 0x00800000
61 0x1 0x0 0xe0600000 0x00002000
62 0x2 0x0 0xf0000000 0x00020000
63 0x3 0x0 0xfa000000 0x00008000>;
64
65 flash@0,0 {
66 #address-cells = <1>;
67 #size-cells = <1>;
68 compatible = "cfi-flash";
69 reg = <0x0 0x0 0x800000>;
70 bank-width = <2>;
71 device-width = <1>;
72 };
73
74 nand@1,0 {
75 #address-cells = <1>;
76 #size-cells = <1>;
77 compatible = "fsl,mpc8315-fcm-nand",
78 "fsl,elbc-fcm-nand";
79 reg = <0x1 0x0 0x2000>;
80
81 u-boot@0 {
82 reg = <0x0 0x100000>;
83 read-only;
84 };
85
86 kernel@100000 {
87 reg = <0x100000 0x300000>;
88 };
89 fs@400000 {
90 reg = <0x400000 0x1c00000>;
91 };
92 };
93 };
94
95 immr@e0000000 {
96 #address-cells = <1>;
97 #size-cells = <1>;
98 device_type = "soc";
99 compatible = "simple-bus";
100 ranges = <0 0xe0000000 0x00100000>;
101 reg = <0xe0000000 0x00000200>;
102 bus-frequency = <0>;
103
104 wdt@200 {
105 device_type = "watchdog";
106 compatible = "mpc83xx_wdt";
107 reg = <0x200 0x100>;
108 };
109
110 i2c@3000 {
111 #address-cells = <1>;
112 #size-cells = <0>;
113 cell-index = <0>;
114 compatible = "fsl-i2c";
115 reg = <0x3000 0x100>;
116 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>;
118 dfsrr;
119 rtc@68 {
120 device_type = "rtc";
121 compatible = "dallas,ds1339";
122 reg = <0x68>;
123 };
124 };
125
126 spi@7000 {
127 cell-index = <0>;
128 compatible = "fsl,spi";
129 reg = <0x7000 0x1000>;
130 interrupts = <16 0x8>;
131 interrupt-parent = <&ipic>;
132 mode = "cpu";
133 };
134
135 usb@23000 {
136 compatible = "fsl-usb2-dr";
137 reg = <0x23000 0x1000>;
138 #address-cells = <1>;
139 #size-cells = <0>;
140 interrupt-parent = <&ipic>;
141 interrupts = <38 0x8>;
142 phy_type = "utmi";
143 };
144
145 mdio@24520 {
146 #address-cells = <1>;
147 #size-cells = <0>;
148 compatible = "fsl,gianfar-mdio";
149 reg = <0x24520 0x20>;
150 phy0: ethernet-phy@0 {
151 interrupt-parent = <&ipic>;
152 interrupts = <20 0x8>;
153 reg = <0x0>;
154 device_type = "ethernet-phy";
155 };
156 phy1: ethernet-phy@1 {
157 interrupt-parent = <&ipic>;
158 interrupts = <19 0x8>;
159 reg = <0x1>;
160 device_type = "ethernet-phy";
161 };
162 };
163
164 enet0: ethernet@24000 {
165 cell-index = <0>;
166 device_type = "network";
167 model = "eTSEC";
168 compatible = "gianfar";
169 reg = <0x24000 0x1000>;
170 local-mac-address = [ 00 00 00 00 00 00 ];
171 interrupts = <32 0x8 33 0x8 34 0x8>;
172 interrupt-parent = <&ipic>;
173 phy-handle = < &phy0 >;
174 };
175
176 enet1: ethernet@25000 {
177 cell-index = <1>;
178 device_type = "network";
179 model = "eTSEC";
180 compatible = "gianfar";
181 reg = <0x25000 0x1000>;
182 local-mac-address = [ 00 00 00 00 00 00 ];
183 interrupts = <35 0x8 36 0x8 37 0x8>;
184 interrupt-parent = <&ipic>;
185 phy-handle = < &phy1 >;
186 };
187
188 serial0: serial@4500 {
189 cell-index = <0>;
190 device_type = "serial";
191 compatible = "ns16550";
192 reg = <0x4500 0x100>;
193 clock-frequency = <0>;
194 interrupts = <9 0x8>;
195 interrupt-parent = <&ipic>;
196 };
197
198 serial1: serial@4600 {
199 cell-index = <1>;
200 device_type = "serial";
201 compatible = "ns16550";
202 reg = <0x4600 0x100>;
203 clock-frequency = <0>;
204 interrupts = <10 0x8>;
205 interrupt-parent = <&ipic>;
206 };
207
208 crypto@30000 {
209 model = "SEC3";
210 device_type = "crypto";
211 compatible = "talitos";
212 reg = <0x30000 0x10000>;
213 interrupts = <11 0x8>;
214 interrupt-parent = <&ipic>;
215 /* Rev. 3.0 geometry */
216 num-channels = <4>;
217 channel-fifo-len = <24>;
218 exec-units-mask = <0x000001fe>;
219 descriptor-types-mask = <0x03ab0ebf>;
220 };
221
222 sata@18000 {
223 compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
224 reg = <0x18000 0x1000>;
225 cell-index = <1>;
226 interrupts = <44 0x8>;
227 interrupt-parent = <&ipic>;
228 };
229
230 sata@19000 {
231 compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
232 reg = <0x19000 0x1000>;
233 cell-index = <2>;
234 interrupts = <45 0x8>;
235 interrupt-parent = <&ipic>;
236 };
237
238 /* IPIC
239 * interrupts cell = <intr #, sense>
240 * sense values match linux IORESOURCE_IRQ_* defines:
241 * sense == 8: Level, low assertion
242 * sense == 2: Edge, high-to-low change
243 */
244 ipic: interrupt-controller@700 {
245 interrupt-controller;
246 #address-cells = <0>;
247 #interrupt-cells = <2>;
248 reg = <0x700 0x100>;
249 device_type = "ipic";
250 };
251 };
252
253 pci0: pci@e0008500 {
254 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
255 interrupt-map = <
256 /* IDSEL 0x0E -mini PCI */
257 0x7000 0x0 0x0 0x1 &ipic 18 0x8
258 0x7000 0x0 0x0 0x2 &ipic 18 0x8
259 0x7000 0x0 0x0 0x3 &ipic 18 0x8
260 0x7000 0x0 0x0 0x4 &ipic 18 0x8
261
262 /* IDSEL 0x0F -mini PCI */
263 0x7800 0x0 0x0 0x1 &ipic 17 0x8
264 0x7800 0x0 0x0 0x2 &ipic 17 0x8
265 0x7800 0x0 0x0 0x3 &ipic 17 0x8
266 0x7800 0x0 0x0 0x4 &ipic 17 0x8
267
268 /* IDSEL 0x10 - PCI slot */
269 0x8000 0x0 0x0 0x1 &ipic 48 0x8
270 0x8000 0x0 0x0 0x2 &ipic 17 0x8
271 0x8000 0x0 0x0 0x3 &ipic 48 0x8
272 0x8000 0x0 0x0 0x4 &ipic 17 0x8>;
273 interrupt-parent = <&ipic>;
274 interrupts = <66 0x8>;
275 bus-range = <0x0 0x0>;
276 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
277 0x42000000 0 0x80000000 0x80000000 0 0x10000000
278 0x01000000 0 0x00000000 0xe0300000 0 0x00100000>;
279 clock-frequency = <66666666>;
280 #interrupt-cells = <1>;
281 #size-cells = <2>;
282 #address-cells = <3>;
283 reg = <0xe0008500 0x100>;
284 compatible = "fsl,mpc8349-pci";
285 device_type = "pci";
286 };
287};
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index c64f3037a13b..9bb408371bcd 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -7,25 +7,47 @@
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your 8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version. 9 * option) any later version.
10
11 * To enable external serial I/O on a Freescale MPC 8323 SYS/MDS board, do
12 * this:
13 *
14 * 1) On chip U61, lift (disconnect) pins 21 (TXD) and 22 (RXD) from the board.
15 * 2) Solder a wire from U61-21 to P19A-23. P19 is a grid of pins on the board
16 * next to the serial ports.
17 * 3) Solder a wire from U61-22 to P19K-22.
18 *
19 * Note that there's a typo in the schematic. The board labels the last column
20 * of pins "P19K", but in the schematic, that column is called "P19J". So if
21 * you're going by the schematic, the pin is called "P19J-K22".
10 */ 22 */
11 23
24/dts-v1/;
25
12/ { 26/ {
13 model = "MPC8323EMDS"; 27 model = "MPC8323EMDS";
14 compatible = "MPC8323EMDS", "MPC832xMDS", "MPC83xxMDS"; 28 compatible = "MPC8323EMDS", "MPC832xMDS", "MPC83xxMDS";
15 #address-cells = <1>; 29 #address-cells = <1>;
16 #size-cells = <1>; 30 #size-cells = <1>;
17 31
32 aliases {
33 ethernet0 = &enet0;
34 ethernet1 = &enet1;
35 serial0 = &serial0;
36 serial1 = &serial1;
37 pci0 = &pci0;
38 };
39
18 cpus { 40 cpus {
19 #address-cells = <1>; 41 #address-cells = <1>;
20 #size-cells = <0>; 42 #size-cells = <0>;
21 43
22 PowerPC,8323@0 { 44 PowerPC,8323@0 {
23 device_type = "cpu"; 45 device_type = "cpu";
24 reg = <0>; 46 reg = <0x0>;
25 d-cache-line-size = <20>; // 32 bytes 47 d-cache-line-size = <32>; // 32 bytes
26 i-cache-line-size = <20>; // 32 bytes 48 i-cache-line-size = <32>; // 32 bytes
27 d-cache-size = <4000>; // L1, 16K 49 d-cache-size = <16384>; // L1, 16K
28 i-cache-size = <4000>; // L1, 16K 50 i-cache-size = <16384>; // L1, 16K
29 timebase-frequency = <0>; 51 timebase-frequency = <0>;
30 bus-frequency = <0>; 52 bus-frequency = <0>;
31 clock-frequency = <0>; 53 clock-frequency = <0>;
@@ -34,86 +56,88 @@
34 56
35 memory { 57 memory {
36 device_type = "memory"; 58 device_type = "memory";
37 reg = <00000000 08000000>; 59 reg = <0x00000000 0x08000000>;
38 }; 60 };
39 61
40 bcsr@f8000000 { 62 bcsr@f8000000 {
41 device_type = "board-control"; 63 device_type = "board-control";
42 reg = <f8000000 8000>; 64 reg = <0xf8000000 0x8000>;
43 }; 65 };
44 66
45 soc8323@e0000000 { 67 soc8323@e0000000 {
46 #address-cells = <1>; 68 #address-cells = <1>;
47 #size-cells = <1>; 69 #size-cells = <1>;
48 device_type = "soc"; 70 device_type = "soc";
49 ranges = <0 e0000000 00100000>; 71 ranges = <0x0 0xe0000000 0x00100000>;
50 reg = <e0000000 00000200>; 72 reg = <0xe0000000 0x00000200>;
51 bus-frequency = <7DE2900>; 73 bus-frequency = <132000000>;
52 74
53 wdt@200 { 75 wdt@200 {
54 device_type = "watchdog"; 76 device_type = "watchdog";
55 compatible = "mpc83xx_wdt"; 77 compatible = "mpc83xx_wdt";
56 reg = <200 100>; 78 reg = <0x200 0x100>;
57 }; 79 };
58 80
59 i2c@3000 { 81 i2c@3000 {
60 #address-cells = <1>; 82 #address-cells = <1>;
61 #size-cells = <0>; 83 #size-cells = <0>;
62 device_type = "i2c"; 84 cell-index = <0>;
63 compatible = "fsl-i2c"; 85 compatible = "fsl-i2c";
64 reg = <3000 100>; 86 reg = <0x3000 0x100>;
65 interrupts = <e 8>; 87 interrupts = <14 0x8>;
66 interrupt-parent = < &ipic >; 88 interrupt-parent = <&ipic>;
67 dfsrr; 89 dfsrr;
68 90
69 rtc@68 { 91 rtc@68 {
70 compatible = "dallas,ds1374"; 92 compatible = "dallas,ds1374";
71 reg = <68>; 93 reg = <0x68>;
72 }; 94 };
73 }; 95 };
74 96
75 serial@4500 { 97 serial0: serial@4500 {
98 cell-index = <0>;
76 device_type = "serial"; 99 device_type = "serial";
77 compatible = "ns16550"; 100 compatible = "ns16550";
78 reg = <4500 100>; 101 reg = <0x4500 0x100>;
79 clock-frequency = <0>; 102 clock-frequency = <0>;
80 interrupts = <9 8>; 103 interrupts = <9 0x8>;
81 interrupt-parent = < &ipic >; 104 interrupt-parent = <&ipic>;
82 }; 105 };
83 106
84 serial@4600 { 107 serial1: serial@4600 {
108 cell-index = <1>;
85 device_type = "serial"; 109 device_type = "serial";
86 compatible = "ns16550"; 110 compatible = "ns16550";
87 reg = <4600 100>; 111 reg = <0x4600 0x100>;
88 clock-frequency = <0>; 112 clock-frequency = <0>;
89 interrupts = <a 8>; 113 interrupts = <10 0x8>;
90 interrupt-parent = < &ipic >; 114 interrupt-parent = <&ipic>;
91 }; 115 };
92 116
93 crypto@30000 { 117 crypto@30000 {
94 device_type = "crypto"; 118 device_type = "crypto";
95 model = "SEC2"; 119 model = "SEC2";
96 compatible = "talitos"; 120 compatible = "talitos";
97 reg = <30000 7000>; 121 reg = <0x30000 0x7000>;
98 interrupts = <b 8>; 122 interrupts = <11 0x8>;
99 interrupt-parent = < &ipic >; 123 interrupt-parent = <&ipic>;
100 /* Rev. 2.2 */ 124 /* Rev. 2.2 */
101 num-channels = <1>; 125 num-channels = <1>;
102 channel-fifo-len = <18>; 126 channel-fifo-len = <24>;
103 exec-units-mask = <0000004c>; 127 exec-units-mask = <0x0000004c>;
104 descriptor-types-mask = <0122003f>; 128 descriptor-types-mask = <0x0122003f>;
105 }; 129 };
106 130
107 ipic: pic@700 { 131 ipic: pic@700 {
108 interrupt-controller; 132 interrupt-controller;
109 #address-cells = <0>; 133 #address-cells = <0>;
110 #interrupt-cells = <2>; 134 #interrupt-cells = <2>;
111 reg = <700 100>; 135 reg = <0x700 0x100>;
112 device_type = "ipic"; 136 device_type = "ipic";
113 }; 137 };
114 138
115 par_io@1400 { 139 par_io@1400 {
116 reg = <1400 100>; 140 reg = <0x1400 0x100>;
117 device_type = "par_io"; 141 device_type = "par_io";
118 num-ports = <7>; 142 num-ports = <7>;
119 143
@@ -122,8 +146,8 @@
122 /* port pin dir open_drain assignment has_irq */ 146 /* port pin dir open_drain assignment has_irq */
123 3 4 3 0 2 0 /* MDIO */ 147 3 4 3 0 2 0 /* MDIO */
124 3 5 1 0 2 0 /* MDC */ 148 3 5 1 0 2 0 /* MDC */
125 0 d 2 0 1 0 /* RX_CLK (CLK9) */ 149 0 13 2 0 1 0 /* RX_CLK (CLK9) */
126 3 18 2 0 1 0 /* TX_CLK (CLK10) */ 150 3 24 2 0 1 0 /* TX_CLK (CLK10) */
127 1 0 1 0 1 0 /* TxD0 */ 151 1 0 1 0 1 0 /* TxD0 */
128 1 1 1 0 1 0 /* TxD1 */ 152 1 1 1 0 1 0 /* TxD1 */
129 1 2 1 0 1 0 /* TxD2 */ 153 1 2 1 0 1 0 /* TxD2 */
@@ -134,31 +158,48 @@
134 1 7 2 0 1 0 /* RxD3 */ 158 1 7 2 0 1 0 /* RxD3 */
135 1 8 2 0 1 0 /* RX_ER */ 159 1 8 2 0 1 0 /* RX_ER */
136 1 9 1 0 1 0 /* TX_ER */ 160 1 9 1 0 1 0 /* TX_ER */
137 1 a 2 0 1 0 /* RX_DV */ 161 1 10 2 0 1 0 /* RX_DV */
138 1 b 2 0 1 0 /* COL */ 162 1 11 2 0 1 0 /* COL */
139 1 c 1 0 1 0 /* TX_EN */ 163 1 12 1 0 1 0 /* TX_EN */
140 1 d 2 0 1 0>;/* CRS */ 164 1 13 2 0 1 0>; /* CRS */
141 }; 165 };
142 pio4: ucc_pin@04 { 166 pio4: ucc_pin@04 {
143 pio-map = < 167 pio-map = <
144 /* port pin dir open_drain assignment has_irq */ 168 /* port pin dir open_drain assignment has_irq */
145 3 1f 2 0 1 0 /* RX_CLK (CLK7) */ 169 3 31 2 0 1 0 /* RX_CLK (CLK7) */
146 3 6 2 0 1 0 /* TX_CLK (CLK8) */ 170 3 6 2 0 1 0 /* TX_CLK (CLK8) */
147 1 12 1 0 1 0 /* TxD0 */ 171 1 18 1 0 1 0 /* TxD0 */
148 1 13 1 0 1 0 /* TxD1 */ 172 1 19 1 0 1 0 /* TxD1 */
149 1 14 1 0 1 0 /* TxD2 */ 173 1 20 1 0 1 0 /* TxD2 */
150 1 15 1 0 1 0 /* TxD3 */ 174 1 21 1 0 1 0 /* TxD3 */
151 1 16 2 0 1 0 /* RxD0 */ 175 1 22 2 0 1 0 /* RxD0 */
152 1 17 2 0 1 0 /* RxD1 */ 176 1 23 2 0 1 0 /* RxD1 */
153 1 18 2 0 1 0 /* RxD2 */ 177 1 24 2 0 1 0 /* RxD2 */
154 1 19 2 0 1 0 /* RxD3 */ 178 1 25 2 0 1 0 /* RxD3 */
155 1 1a 2 0 1 0 /* RX_ER */ 179 1 26 2 0 1 0 /* RX_ER */
156 1 1b 1 0 1 0 /* TX_ER */ 180 1 27 1 0 1 0 /* TX_ER */
157 1 1c 2 0 1 0 /* RX_DV */ 181 1 28 2 0 1 0 /* RX_DV */
158 1 1d 2 0 1 0 /* COL */ 182 1 29 2 0 1 0 /* COL */
159 1 1e 1 0 1 0 /* TX_EN */ 183 1 30 1 0 1 0 /* TX_EN */
160 1 1f 2 0 1 0>;/* CRS */ 184 1 31 2 0 1 0>; /* CRS */
161 }; 185 };
186 pio5: ucc_pin@05 {
187 pio-map = <
188 /*
189 * open has
190 * port pin dir drain sel irq
191 */
192 2 0 1 0 2 0 /* TxD5 */
193 2 8 2 0 2 0 /* RxD5 */
194
195 2 29 2 0 0 0 /* CTS5 */
196 2 31 1 0 2 0 /* RTS5 */
197
198 2 24 2 0 0 0 /* CD */
199
200 >;
201 };
202
162 }; 203 };
163 }; 204 };
164 205
@@ -166,178 +207,191 @@
166 #address-cells = <1>; 207 #address-cells = <1>;
167 #size-cells = <1>; 208 #size-cells = <1>;
168 device_type = "qe"; 209 device_type = "qe";
169 model = "QE"; 210 compatible = "fsl,qe";
170 ranges = <0 e0100000 00100000>; 211 ranges = <0x0 0xe0100000 0x00100000>;
171 reg = <e0100000 480>; 212 reg = <0xe0100000 0x480>;
172 brg-frequency = <0>; 213 brg-frequency = <0>;
173 bus-frequency = <BCD3D80>; 214 bus-frequency = <198000000>;
174 215
175 muram@10000 { 216 muram@10000 {
176 device_type = "muram"; 217 #address-cells = <1>;
177 ranges = <0 00010000 00004000>; 218 #size-cells = <1>;
219 compatible = "fsl,qe-muram", "fsl,cpm-muram";
220 ranges = <0x0 0x00010000 0x00004000>;
178 221
179 data-only@0 { 222 data-only@0 {
180 reg = <0 4000>; 223 compatible = "fsl,qe-muram-data",
224 "fsl,cpm-muram-data";
225 reg = <0x0 0x4000>;
181 }; 226 };
182 }; 227 };
183 228
184 spi@4c0 { 229 spi@4c0 {
185 device_type = "spi"; 230 cell-index = <0>;
186 compatible = "fsl_spi"; 231 compatible = "fsl,spi";
187 reg = <4c0 40>; 232 reg = <0x4c0 0x40>;
188 interrupts = <2>; 233 interrupts = <2>;
189 interrupt-parent = < &qeic >; 234 interrupt-parent = <&qeic>;
190 mode = "cpu"; 235 mode = "cpu";
191 }; 236 };
192 237
193 spi@500 { 238 spi@500 {
194 device_type = "spi"; 239 cell-index = <1>;
195 compatible = "fsl_spi"; 240 compatible = "fsl,spi";
196 reg = <500 40>; 241 reg = <0x500 0x40>;
197 interrupts = <1>; 242 interrupts = <1>;
198 interrupt-parent = < &qeic >; 243 interrupt-parent = <&qeic>;
199 mode = "cpu"; 244 mode = "cpu";
200 }; 245 };
201 246
202 usb@6c0 { 247 usb@6c0 {
203 device_type = "usb";
204 compatible = "qe_udc"; 248 compatible = "qe_udc";
205 reg = <6c0 40 8B00 100>; 249 reg = <0x6c0 0x40 0x8b00 0x100>;
206 interrupts = <b>; 250 interrupts = <11>;
207 interrupt-parent = < &qeic >; 251 interrupt-parent = <&qeic>;
208 mode = "slave"; 252 mode = "slave";
209 }; 253 };
210 254
211 ucc@2200 { 255 enet0: ucc@2200 {
212 device_type = "network"; 256 device_type = "network";
213 compatible = "ucc_geth"; 257 compatible = "ucc_geth";
214 model = "UCC"; 258 model = "UCC";
259 cell-index = <3>;
215 device-id = <3>; 260 device-id = <3>;
216 reg = <2200 200>; 261 reg = <0x2200 0x200>;
217 interrupts = <22>; 262 interrupts = <34>;
218 interrupt-parent = < &qeic >; 263 interrupt-parent = <&qeic>;
219 /*
220 * mac-address is deprecated and will be removed
221 * in 2.6.25. Only recent versions of
222 * U-Boot support local-mac-address, however.
223 */
224 mac-address = [ 00 00 00 00 00 00 ];
225 local-mac-address = [ 00 00 00 00 00 00 ]; 264 local-mac-address = [ 00 00 00 00 00 00 ];
226 rx-clock = <19>; 265 rx-clock-name = "clk9";
227 tx-clock = <1a>; 266 tx-clock-name = "clk10";
228 phy-handle = < &phy3 >; 267 phy-handle = <&phy3>;
229 pio-handle = < &pio3 >; 268 pio-handle = <&pio3>;
230 }; 269 };
231 270
232 ucc@3200 { 271 enet1: ucc@3200 {
233 device_type = "network"; 272 device_type = "network";
234 compatible = "ucc_geth"; 273 compatible = "ucc_geth";
235 model = "UCC"; 274 model = "UCC";
275 cell-index = <4>;
236 device-id = <4>; 276 device-id = <4>;
237 reg = <3200 200>; 277 reg = <0x3200 0x200>;
238 interrupts = <23>; 278 interrupts = <35>;
279 interrupt-parent = <&qeic>;
280 local-mac-address = [ 00 00 00 00 00 00 ];
281 rx-clock-name = "clk7";
282 tx-clock-name = "clk8";
283 phy-handle = <&phy4>;
284 pio-handle = <&pio4>;
285 };
286
287 ucc@2400 {
288 device_type = "serial";
289 compatible = "ucc_uart";
290 model = "UCC";
291 device-id = <5>; /* The UCC number, 1-7*/
292 port-number = <0>; /* Which ttyQEx device */
293 soft-uart; /* We need Soft-UART */
294 reg = <0x2400 0x200>;
295 interrupts = <40>; /* From Table 18-12 */
239 interrupt-parent = < &qeic >; 296 interrupt-parent = < &qeic >;
240 /* 297 /*
241 * mac-address is deprecated and will be removed 298 * For Soft-UART, we need to set TX to 1X, which
242 * in 2.6.25. Only recent versions of 299 * means specifying separate clock sources.
243 * U-Boot support local-mac-address, however.
244 */ 300 */
245 mac-address = [ 00 00 00 00 00 00 ]; 301 rx-clock-name = "brg5";
246 local-mac-address = [ 00 00 00 00 00 00 ]; 302 tx-clock-name = "brg6";
247 rx-clock = <17>; 303 pio-handle = < &pio5 >;
248 tx-clock = <18>;
249 phy-handle = < &phy4 >;
250 pio-handle = < &pio4 >;
251 }; 304 };
252 305
306
253 mdio@2320 { 307 mdio@2320 {
254 #address-cells = <1>; 308 #address-cells = <1>;
255 #size-cells = <0>; 309 #size-cells = <0>;
256 reg = <2320 18>; 310 reg = <0x2320 0x18>;
257 device_type = "mdio"; 311 compatible = "fsl,ucc-mdio";
258 compatible = "ucc_geth_phy";
259 312
260 phy3: ethernet-phy@03 { 313 phy3: ethernet-phy@03 {
261 interrupt-parent = < &ipic >; 314 interrupt-parent = <&ipic>;
262 interrupts = <11 8>; 315 interrupts = <17 0x8>;
263 reg = <3>; 316 reg = <0x3>;
264 device_type = "ethernet-phy"; 317 device_type = "ethernet-phy";
265 }; 318 };
266 phy4: ethernet-phy@04 { 319 phy4: ethernet-phy@04 {
267 interrupt-parent = < &ipic >; 320 interrupt-parent = <&ipic>;
268 interrupts = <12 8>; 321 interrupts = <18 0x8>;
269 reg = <4>; 322 reg = <0x4>;
270 device_type = "ethernet-phy"; 323 device_type = "ethernet-phy";
271 }; 324 };
272 }; 325 };
273 326
274 qeic: qeic@80 { 327 qeic: interrupt-controller@80 {
275 interrupt-controller; 328 interrupt-controller;
276 device_type = "qeic"; 329 compatible = "fsl,qe-ic";
277 #address-cells = <0>; 330 #address-cells = <0>;
278 #interrupt-cells = <1>; 331 #interrupt-cells = <1>;
279 reg = <80 80>; 332 reg = <0x80 0x80>;
280 big-endian; 333 big-endian;
281 interrupts = <20 8 21 8>; //high:32 low:33 334 interrupts = <32 0x8 33 0x8>; //high:32 low:33
282 interrupt-parent = < &ipic >; 335 interrupt-parent = <&ipic>;
283 }; 336 };
284 }; 337 };
285 338
286 pci@e0008500 { 339 pci0: pci@e0008500 {
287 interrupt-map-mask = <f800 0 0 7>; 340 cell-index = <1>;
341 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
288 interrupt-map = < 342 interrupt-map = <
289 /* IDSEL 0x11 AD17 */ 343 /* IDSEL 0x11 AD17 */
290 8800 0 0 1 &ipic 14 8 344 0x8800 0x0 0x0 0x1 &ipic 20 0x8
291 8800 0 0 2 &ipic 15 8 345 0x8800 0x0 0x0 0x2 &ipic 21 0x8
292 8800 0 0 3 &ipic 16 8 346 0x8800 0x0 0x0 0x3 &ipic 22 0x8
293 8800 0 0 4 &ipic 17 8 347 0x8800 0x0 0x0 0x4 &ipic 23 0x8
294 348
295 /* IDSEL 0x12 AD18 */ 349 /* IDSEL 0x12 AD18 */
296 9000 0 0 1 &ipic 16 8 350 0x9000 0x0 0x0 0x1 &ipic 22 0x8
297 9000 0 0 2 &ipic 17 8 351 0x9000 0x0 0x0 0x2 &ipic 23 0x8
298 9000 0 0 3 &ipic 14 8 352 0x9000 0x0 0x0 0x3 &ipic 20 0x8
299 9000 0 0 4 &ipic 15 8 353 0x9000 0x0 0x0 0x4 &ipic 21 0x8
300 354
301 /* IDSEL 0x13 AD19 */ 355 /* IDSEL 0x13 AD19 */
302 9800 0 0 1 &ipic 17 8 356 0x9800 0x0 0x0 0x1 &ipic 23 0x8
303 9800 0 0 2 &ipic 14 8 357 0x9800 0x0 0x0 0x2 &ipic 20 0x8
304 9800 0 0 3 &ipic 15 8 358 0x9800 0x0 0x0 0x3 &ipic 21 0x8
305 9800 0 0 4 &ipic 16 8 359 0x9800 0x0 0x0 0x4 &ipic 22 0x8
306 360
307 /* IDSEL 0x15 AD21*/ 361 /* IDSEL 0x15 AD21*/
308 a800 0 0 1 &ipic 14 8 362 0xa800 0x0 0x0 0x1 &ipic 20 0x8
309 a800 0 0 2 &ipic 15 8 363 0xa800 0x0 0x0 0x2 &ipic 21 0x8
310 a800 0 0 3 &ipic 16 8 364 0xa800 0x0 0x0 0x3 &ipic 22 0x8
311 a800 0 0 4 &ipic 17 8 365 0xa800 0x0 0x0 0x4 &ipic 23 0x8
312 366
313 /* IDSEL 0x16 AD22*/ 367 /* IDSEL 0x16 AD22*/
314 b000 0 0 1 &ipic 17 8 368 0xb000 0x0 0x0 0x1 &ipic 23 0x8
315 b000 0 0 2 &ipic 14 8 369 0xb000 0x0 0x0 0x2 &ipic 20 0x8
316 b000 0 0 3 &ipic 15 8 370 0xb000 0x0 0x0 0x3 &ipic 21 0x8
317 b000 0 0 4 &ipic 16 8 371 0xb000 0x0 0x0 0x4 &ipic 22 0x8
318 372
319 /* IDSEL 0x17 AD23*/ 373 /* IDSEL 0x17 AD23*/
320 b800 0 0 1 &ipic 16 8 374 0xb800 0x0 0x0 0x1 &ipic 22 0x8
321 b800 0 0 2 &ipic 17 8 375 0xb800 0x0 0x0 0x2 &ipic 23 0x8
322 b800 0 0 3 &ipic 14 8 376 0xb800 0x0 0x0 0x3 &ipic 20 0x8
323 b800 0 0 4 &ipic 15 8 377 0xb800 0x0 0x0 0x4 &ipic 21 0x8
324 378
325 /* IDSEL 0x18 AD24*/ 379 /* IDSEL 0x18 AD24*/
326 c000 0 0 1 &ipic 15 8 380 0xc000 0x0 0x0 0x1 &ipic 21 0x8
327 c000 0 0 2 &ipic 16 8 381 0xc000 0x0 0x0 0x2 &ipic 22 0x8
328 c000 0 0 3 &ipic 17 8 382 0xc000 0x0 0x0 0x3 &ipic 23 0x8
329 c000 0 0 4 &ipic 14 8>; 383 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
330 interrupt-parent = < &ipic >; 384 interrupt-parent = <&ipic>;
331 interrupts = <42 8>; 385 interrupts = <66 0x8>;
332 bus-range = <0 0>; 386 bus-range = <0x0 0x0>;
333 ranges = <02000000 0 90000000 90000000 0 10000000 387 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
334 42000000 0 80000000 80000000 0 10000000 388 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
335 01000000 0 00000000 d0000000 0 00100000>; 389 0x01000000 0x0 0x00000000 0xd0000000 0x0 0x00100000>;
336 clock-frequency = <0>; 390 clock-frequency = <0>;
337 #interrupt-cells = <1>; 391 #interrupt-cells = <1>;
338 #size-cells = <2>; 392 #size-cells = <2>;
339 #address-cells = <3>; 393 #address-cells = <3>;
340 reg = <e0008500 100>; 394 reg = <0xe0008500 0x100>;
341 compatible = "fsl,mpc8349-pci"; 395 compatible = "fsl,mpc8349-pci";
342 device_type = "pci"; 396 device_type = "pci";
343 }; 397 };
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 388c8a7012e1..94f93d209de8 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -9,23 +9,33 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/dts-v1/;
13
12/ { 14/ {
13 model = "MPC8323ERDB"; 15 model = "MPC8323ERDB";
14 compatible = "MPC8323ERDB", "MPC832xRDB", "MPC83xxRDB"; 16 compatible = "MPC8323ERDB", "MPC832xRDB", "MPC83xxRDB";
15 #address-cells = <1>; 17 #address-cells = <1>;
16 #size-cells = <1>; 18 #size-cells = <1>;
17 19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
27
18 cpus { 28 cpus {
19 #address-cells = <1>; 29 #address-cells = <1>;
20 #size-cells = <0>; 30 #size-cells = <0>;
21 31
22 PowerPC,8323@0 { 32 PowerPC,8323@0 {
23 device_type = "cpu"; 33 device_type = "cpu";
24 reg = <0>; 34 reg = <0x0>;
25 d-cache-line-size = <20>; // 32 bytes 35 d-cache-line-size = <0x20>; // 32 bytes
26 i-cache-line-size = <20>; // 32 bytes 36 i-cache-line-size = <0x20>; // 32 bytes
27 d-cache-size = <4000>; // L1, 16K 37 d-cache-size = <16384>; // L1, 16K
28 i-cache-size = <4000>; // L1, 16K 38 i-cache-size = <16384>; // L1, 16K
29 timebase-frequency = <0>; 39 timebase-frequency = <0>;
30 bus-frequency = <0>; 40 bus-frequency = <0>;
31 clock-frequency = <0>; 41 clock-frequency = <0>;
@@ -34,47 +44,51 @@
34 44
35 memory { 45 memory {
36 device_type = "memory"; 46 device_type = "memory";
37 reg = <00000000 04000000>; 47 reg = <0x00000000 0x04000000>;
38 }; 48 };
39 49
40 soc8323@e0000000 { 50 soc8323@e0000000 {
41 #address-cells = <1>; 51 #address-cells = <1>;
42 #size-cells = <1>; 52 #size-cells = <1>;
43 device_type = "soc"; 53 device_type = "soc";
44 ranges = <0 e0000000 00100000>; 54 ranges = <0x0 0xe0000000 0x00100000>;
45 reg = <e0000000 00000200>; 55 reg = <0xe0000000 0x00000200>;
46 bus-frequency = <0>; 56 bus-frequency = <0>;
47 57
48 wdt@200 { 58 wdt@200 {
49 device_type = "watchdog"; 59 device_type = "watchdog";
50 compatible = "mpc83xx_wdt"; 60 compatible = "mpc83xx_wdt";
51 reg = <200 100>; 61 reg = <0x200 0x100>;
52 }; 62 };
53 63
54 i2c@3000 { 64 i2c@3000 {
55 device_type = "i2c"; 65 #address-cells = <1>;
66 #size-cells = <0>;
67 cell-index = <0>;
56 compatible = "fsl-i2c"; 68 compatible = "fsl-i2c";
57 reg = <3000 100>; 69 reg = <0x3000 0x100>;
58 interrupts = <e 8>; 70 interrupts = <14 0x8>;
59 interrupt-parent = <&pic>; 71 interrupt-parent = <&pic>;
60 dfsrr; 72 dfsrr;
61 }; 73 };
62 74
63 serial@4500 { 75 serial0: serial@4500 {
76 cell-index = <0>;
64 device_type = "serial"; 77 device_type = "serial";
65 compatible = "ns16550"; 78 compatible = "ns16550";
66 reg = <4500 100>; 79 reg = <0x4500 0x100>;
67 clock-frequency = <0>; 80 clock-frequency = <0>;
68 interrupts = <9 8>; 81 interrupts = <9 0x8>;
69 interrupt-parent = <&pic>; 82 interrupt-parent = <&pic>;
70 }; 83 };
71 84
72 serial@4600 { 85 serial1: serial@4600 {
86 cell-index = <1>;
73 device_type = "serial"; 87 device_type = "serial";
74 compatible = "ns16550"; 88 compatible = "ns16550";
75 reg = <4600 100>; 89 reg = <0x4600 0x100>;
76 clock-frequency = <0>; 90 clock-frequency = <0>;
77 interrupts = <a 8>; 91 interrupts = <10 0x8>;
78 interrupt-parent = <&pic>; 92 interrupt-parent = <&pic>;
79 }; 93 };
80 94
@@ -82,26 +96,26 @@
82 device_type = "crypto"; 96 device_type = "crypto";
83 model = "SEC2"; 97 model = "SEC2";
84 compatible = "talitos"; 98 compatible = "talitos";
85 reg = <30000 7000>; 99 reg = <0x30000 0x7000>;
86 interrupts = <b 8>; 100 interrupts = <11 0x8>;
87 interrupt-parent = <&pic>; 101 interrupt-parent = <&pic>;
88 /* Rev. 2.2 */ 102 /* Rev. 2.2 */
89 num-channels = <1>; 103 num-channels = <1>;
90 channel-fifo-len = <18>; 104 channel-fifo-len = <24>;
91 exec-units-mask = <0000004c>; 105 exec-units-mask = <0x0000004c>;
92 descriptor-types-mask = <0122003f>; 106 descriptor-types-mask = <0x0122003f>;
93 }; 107 };
94 108
95 pic:pic@700 { 109 pic:pic@700 {
96 interrupt-controller; 110 interrupt-controller;
97 #address-cells = <0>; 111 #address-cells = <0>;
98 #interrupt-cells = <2>; 112 #interrupt-cells = <2>;
99 reg = <700 100>; 113 reg = <0x700 0x100>;
100 device_type = "ipic"; 114 device_type = "ipic";
101 }; 115 };
102 116
103 par_io@1400 { 117 par_io@1400 {
104 reg = <1400 100>; 118 reg = <0x1400 0x100>;
105 device_type = "par_io"; 119 device_type = "par_io";
106 num-ports = <7>; 120 num-ports = <7>;
107 121
@@ -110,28 +124,28 @@
110 /* port pin dir open_drain assignment has_irq */ 124 /* port pin dir open_drain assignment has_irq */
111 3 4 3 0 2 0 /* MDIO */ 125 3 4 3 0 2 0 /* MDIO */
112 3 5 1 0 2 0 /* MDC */ 126 3 5 1 0 2 0 /* MDC */
113 3 15 2 0 1 0 /* RX_CLK (CLK16) */ 127 3 21 2 0 1 0 /* RX_CLK (CLK16) */
114 3 17 2 0 1 0 /* TX_CLK (CLK3) */ 128 3 23 2 0 1 0 /* TX_CLK (CLK3) */
115 0 12 1 0 1 0 /* TxD0 */ 129 0 18 1 0 1 0 /* TxD0 */
116 0 13 1 0 1 0 /* TxD1 */ 130 0 19 1 0 1 0 /* TxD1 */
117 0 14 1 0 1 0 /* TxD2 */ 131 0 20 1 0 1 0 /* TxD2 */
118 0 15 1 0 1 0 /* TxD3 */ 132 0 21 1 0 1 0 /* TxD3 */
119 0 16 2 0 1 0 /* RxD0 */ 133 0 22 2 0 1 0 /* RxD0 */
120 0 17 2 0 1 0 /* RxD1 */ 134 0 23 2 0 1 0 /* RxD1 */
121 0 18 2 0 1 0 /* RxD2 */ 135 0 24 2 0 1 0 /* RxD2 */
122 0 19 2 0 1 0 /* RxD3 */ 136 0 25 2 0 1 0 /* RxD3 */
123 0 1a 2 0 1 0 /* RX_ER */ 137 0 26 2 0 1 0 /* RX_ER */
124 0 1b 1 0 1 0 /* TX_ER */ 138 0 27 1 0 1 0 /* TX_ER */
125 0 1c 2 0 1 0 /* RX_DV */ 139 0 28 2 0 1 0 /* RX_DV */
126 0 1d 2 0 1 0 /* COL */ 140 0 29 2 0 1 0 /* COL */
127 0 1e 1 0 1 0 /* TX_EN */ 141 0 30 1 0 1 0 /* TX_EN */
128 0 1f 2 0 1 0>; /* CRS */ 142 0 31 2 0 1 0>; /* CRS */
129 }; 143 };
130 ucc3pio:ucc_pin@03 { 144 ucc3pio:ucc_pin@03 {
131 pio-map = < 145 pio-map = <
132 /* port pin dir open_drain assignment has_irq */ 146 /* port pin dir open_drain assignment has_irq */
133 0 d 2 0 1 0 /* RX_CLK (CLK9) */ 147 0 13 2 0 1 0 /* RX_CLK (CLK9) */
134 3 18 2 0 1 0 /* TX_CLK (CLK10) */ 148 3 24 2 0 1 0 /* TX_CLK (CLK10) */
135 1 0 1 0 1 0 /* TxD0 */ 149 1 0 1 0 1 0 /* TxD0 */
136 1 1 1 0 1 0 /* TxD1 */ 150 1 1 1 0 1 0 /* TxD1 */
137 1 2 1 0 1 0 /* TxD2 */ 151 1 2 1 0 1 0 /* TxD2 */
@@ -142,10 +156,10 @@
142 1 7 2 0 1 0 /* RxD3 */ 156 1 7 2 0 1 0 /* RxD3 */
143 1 8 2 0 1 0 /* RX_ER */ 157 1 8 2 0 1 0 /* RX_ER */
144 1 9 1 0 1 0 /* TX_ER */ 158 1 9 1 0 1 0 /* TX_ER */
145 1 a 2 0 1 0 /* RX_DV */ 159 1 10 2 0 1 0 /* RX_DV */
146 1 b 2 0 1 0 /* COL */ 160 1 11 2 0 1 0 /* COL */
147 1 c 1 0 1 0 /* TX_EN */ 161 1 12 1 0 1 0 /* TX_EN */
148 1 d 2 0 1 0>; /* CRS */ 162 1 13 2 0 1 0>; /* CRS */
149 }; 163 };
150 }; 164 };
151 }; 165 };
@@ -154,77 +168,71 @@
154 #address-cells = <1>; 168 #address-cells = <1>;
155 #size-cells = <1>; 169 #size-cells = <1>;
156 device_type = "qe"; 170 device_type = "qe";
157 model = "QE"; 171 compatible = "fsl,qe";
158 ranges = <0 e0100000 00100000>; 172 ranges = <0x0 0xe0100000 0x00100000>;
159 reg = <e0100000 480>; 173 reg = <0xe0100000 0x480>;
160 brg-frequency = <0>; 174 brg-frequency = <0>;
161 bus-frequency = <BCD3D80>; 175 bus-frequency = <198000000>;
162 176
163 muram@10000 { 177 muram@10000 {
164 device_type = "muram"; 178 #address-cells = <1>;
165 ranges = <0 00010000 00004000>; 179 #size-cells = <1>;
180 compatible = "fsl,qe-muram", "fsl,cpm-muram";
181 ranges = <0x0 0x00010000 0x00004000>;
166 182
167 data-only@0 { 183 data-only@0 {
168 reg = <0 4000>; 184 compatible = "fsl,qe-muram-data",
185 "fsl,cpm-muram-data";
186 reg = <0x0 0x4000>;
169 }; 187 };
170 }; 188 };
171 189
172 spi@4c0 { 190 spi@4c0 {
173 device_type = "spi"; 191 cell-index = <0>;
174 compatible = "fsl_spi"; 192 compatible = "fsl,spi";
175 reg = <4c0 40>; 193 reg = <0x4c0 0x40>;
176 interrupts = <2>; 194 interrupts = <2>;
177 interrupt-parent = <&qeic>; 195 interrupt-parent = <&qeic>;
178 mode = "cpu-qe"; 196 mode = "cpu-qe";
179 }; 197 };
180 198
181 spi@500 { 199 spi@500 {
182 device_type = "spi"; 200 cell-index = <1>;
183 compatible = "fsl_spi"; 201 compatible = "fsl,spi";
184 reg = <500 40>; 202 reg = <0x500 0x40>;
185 interrupts = <1>; 203 interrupts = <1>;
186 interrupt-parent = <&qeic>; 204 interrupt-parent = <&qeic>;
187 mode = "cpu"; 205 mode = "cpu";
188 }; 206 };
189 207
190 ucc@3000 { 208 enet0: ucc@3000 {
191 device_type = "network"; 209 device_type = "network";
192 compatible = "ucc_geth"; 210 compatible = "ucc_geth";
193 model = "UCC"; 211 model = "UCC";
212 cell-index = <2>;
194 device-id = <2>; 213 device-id = <2>;
195 reg = <3000 200>; 214 reg = <0x3000 0x200>;
196 interrupts = <21>; 215 interrupts = <33>;
197 interrupt-parent = <&qeic>; 216 interrupt-parent = <&qeic>;
198 /*
199 * mac-address is deprecated and will be removed
200 * in 2.6.25. Only recent versions of
201 * U-Boot support local-mac-address, however.
202 */
203 mac-address = [ 00 00 00 00 00 00 ];
204 local-mac-address = [ 00 00 00 00 00 00 ]; 217 local-mac-address = [ 00 00 00 00 00 00 ];
205 rx-clock = <20>; 218 rx-clock-name = "clk16";
206 tx-clock = <13>; 219 tx-clock-name = "clk3";
207 phy-handle = <&phy00>; 220 phy-handle = <&phy00>;
208 pio-handle = <&ucc2pio>; 221 pio-handle = <&ucc2pio>;
209 }; 222 };
210 223
211 ucc@2200 { 224 enet1: ucc@2200 {
212 device_type = "network"; 225 device_type = "network";
213 compatible = "ucc_geth"; 226 compatible = "ucc_geth";
214 model = "UCC"; 227 model = "UCC";
228 cell-index = <3>;
215 device-id = <3>; 229 device-id = <3>;
216 reg = <2200 200>; 230 reg = <0x2200 0x200>;
217 interrupts = <22>; 231 interrupts = <34>;
218 interrupt-parent = <&qeic>; 232 interrupt-parent = <&qeic>;
219 /*
220 * mac-address is deprecated and will be removed
221 * in 2.6.25. Only recent versions of
222 * U-Boot support local-mac-address, however.
223 */
224 mac-address = [ 00 00 00 00 00 00 ];
225 local-mac-address = [ 00 00 00 00 00 00 ]; 233 local-mac-address = [ 00 00 00 00 00 00 ];
226 rx-clock = <19>; 234 rx-clock-name = "clk9";
227 tx-clock = <1a>; 235 tx-clock-name = "clk10";
228 phy-handle = <&phy04>; 236 phy-handle = <&phy04>;
229 pio-handle = <&ucc3pio>; 237 pio-handle = <&ucc3pio>;
230 }; 238 };
@@ -232,65 +240,65 @@
232 mdio@3120 { 240 mdio@3120 {
233 #address-cells = <1>; 241 #address-cells = <1>;
234 #size-cells = <0>; 242 #size-cells = <0>;
235 reg = <3120 18>; 243 reg = <0x3120 0x18>;
236 device_type = "mdio"; 244 compatible = "fsl,ucc-mdio";
237 compatible = "ucc_geth_phy";
238 245
239 phy00:ethernet-phy@00 { 246 phy00:ethernet-phy@00 {
240 interrupt-parent = <&pic>; 247 interrupt-parent = <&pic>;
241 interrupts = <0>; 248 interrupts = <0>;
242 reg = <0>; 249 reg = <0x0>;
243 device_type = "ethernet-phy"; 250 device_type = "ethernet-phy";
244 }; 251 };
245 phy04:ethernet-phy@04 { 252 phy04:ethernet-phy@04 {
246 interrupt-parent = <&pic>; 253 interrupt-parent = <&pic>;
247 interrupts = <0>; 254 interrupts = <0>;
248 reg = <4>; 255 reg = <0x4>;
249 device_type = "ethernet-phy"; 256 device_type = "ethernet-phy";
250 }; 257 };
251 }; 258 };
252 259
253 qeic:qeic@80 { 260 qeic:interrupt-controller@80 {
254 interrupt-controller; 261 interrupt-controller;
255 device_type = "qeic"; 262 compatible = "fsl,qe-ic";
256 #address-cells = <0>; 263 #address-cells = <0>;
257 #interrupt-cells = <1>; 264 #interrupt-cells = <1>;
258 reg = <80 80>; 265 reg = <0x80 0x80>;
259 big-endian; 266 big-endian;
260 interrupts = <20 8 21 8>; //high:32 low:33 267 interrupts = <32 0x8 33 0x8>; //high:32 low:33
261 interrupt-parent = <&pic>; 268 interrupt-parent = <&pic>;
262 }; 269 };
263 }; 270 };
264 271
265 pci@e0008500 { 272 pci0: pci@e0008500 {
266 interrupt-map-mask = <f800 0 0 7>; 273 cell-index = <1>;
274 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
267 interrupt-map = < 275 interrupt-map = <
268 /* IDSEL 0x10 AD16 (USB) */ 276 /* IDSEL 0x10 AD16 (USB) */
269 8000 0 0 1 &pic 11 8 277 0x8000 0x0 0x0 0x1 &pic 17 0x8
270 278
271 /* IDSEL 0x11 AD17 (Mini1)*/ 279 /* IDSEL 0x11 AD17 (Mini1)*/
272 8800 0 0 1 &pic 12 8 280 0x8800 0x0 0x0 0x1 &pic 18 0x8
273 8800 0 0 2 &pic 13 8 281 0x8800 0x0 0x0 0x2 &pic 19 0x8
274 8800 0 0 3 &pic 14 8 282 0x8800 0x0 0x0 0x3 &pic 20 0x8
275 8800 0 0 4 &pic 30 8 283 0x8800 0x0 0x0 0x4 &pic 48 0x8
276 284
277 /* IDSEL 0x12 AD18 (PCI/Mini2) */ 285 /* IDSEL 0x12 AD18 (PCI/Mini2) */
278 9000 0 0 1 &pic 13 8 286 0x9000 0x0 0x0 0x1 &pic 19 0x8
279 9000 0 0 2 &pic 14 8 287 0x9000 0x0 0x0 0x2 &pic 20 0x8
280 9000 0 0 3 &pic 30 8 288 0x9000 0x0 0x0 0x3 &pic 48 0x8
281 9000 0 0 4 &pic 11 8>; 289 0x9000 0x0 0x0 0x4 &pic 17 0x8>;
282 290
283 interrupt-parent = <&pic>; 291 interrupt-parent = <&pic>;
284 interrupts = <42 8>; 292 interrupts = <66 0x8>;
285 bus-range = <0 0>; 293 bus-range = <0x0 0x0>;
286 ranges = <42000000 0 80000000 80000000 0 10000000 294 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
287 02000000 0 90000000 90000000 0 10000000 295 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
288 01000000 0 d0000000 d0000000 0 04000000>; 296 0x01000000 0x0 0xd0000000 0xd0000000 0x0 0x04000000>;
289 clock-frequency = <0>; 297 clock-frequency = <0>;
290 #interrupt-cells = <1>; 298 #interrupt-cells = <1>;
291 #size-cells = <2>; 299 #size-cells = <2>;
292 #address-cells = <3>; 300 #address-cells = <3>;
293 reg = <e0008500 100>; 301 reg = <0xe0008500 0x100>;
294 compatible = "fsl,mpc8349-pci"; 302 compatible = "fsl,mpc8349-pci";
295 device_type = "pci"; 303 device_type = "pci";
296 }; 304 };
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 5072f6d0a46d..9426676b0b7d 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -8,23 +8,35 @@
8 * Free Software Foundation; either version 2 of the License, or (at your 8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11
12/dts-v1/;
13
11/ { 14/ {
12 model = "MPC8349EMITX"; 15 model = "MPC8349EMITX";
13 compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX"; 16 compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
14 #address-cells = <1>; 17 #address-cells = <1>;
15 #size-cells = <1>; 18 #size-cells = <1>;
16 19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 pci1 = &pci1;
27 };
28
17 cpus { 29 cpus {
18 #address-cells = <1>; 30 #address-cells = <1>;
19 #size-cells = <0>; 31 #size-cells = <0>;
20 32
21 PowerPC,8349@0 { 33 PowerPC,8349@0 {
22 device_type = "cpu"; 34 device_type = "cpu";
23 reg = <0>; 35 reg = <0x0>;
24 d-cache-line-size = <20>; 36 d-cache-line-size = <32>;
25 i-cache-line-size = <20>; 37 i-cache-line-size = <32>;
26 d-cache-size = <8000>; 38 d-cache-size = <32768>;
27 i-cache-size = <8000>; 39 i-cache-size = <32768>;
28 timebase-frequency = <0>; // from bootloader 40 timebase-frequency = <0>; // from bootloader
29 bus-frequency = <0>; // from bootloader 41 bus-frequency = <0>; // from bootloader
30 clock-frequency = <0>; // from bootloader 42 clock-frequency = <0>; // from bootloader
@@ -33,222 +45,223 @@
33 45
34 memory { 46 memory {
35 device_type = "memory"; 47 device_type = "memory";
36 reg = <00000000 10000000>; 48 reg = <0x00000000 0x10000000>;
37 }; 49 };
38 50
39 soc8349@e0000000 { 51 soc8349@e0000000 {
40 #address-cells = <1>; 52 #address-cells = <1>;
41 #size-cells = <1>; 53 #size-cells = <1>;
42 device_type = "soc"; 54 device_type = "soc";
43 ranges = <0 e0000000 00100000>; 55 ranges = <0x0 0xe0000000 0x00100000>;
44 reg = <e0000000 00000200>; 56 reg = <0xe0000000 0x00000200>;
45 bus-frequency = <0>; // from bootloader 57 bus-frequency = <0>; // from bootloader
46 58
47 wdt@200 { 59 wdt@200 {
48 device_type = "watchdog"; 60 device_type = "watchdog";
49 compatible = "mpc83xx_wdt"; 61 compatible = "mpc83xx_wdt";
50 reg = <200 100>; 62 reg = <0x200 0x100>;
51 }; 63 };
52 64
53 i2c@3000 { 65 i2c@3000 {
54 device_type = "i2c"; 66 #address-cells = <1>;
67 #size-cells = <0>;
68 cell-index = <0>;
55 compatible = "fsl-i2c"; 69 compatible = "fsl-i2c";
56 reg = <3000 100>; 70 reg = <0x3000 0x100>;
57 interrupts = <e 8>; 71 interrupts = <14 0x8>;
58 interrupt-parent = < &ipic >; 72 interrupt-parent = <&ipic>;
59 dfsrr; 73 dfsrr;
60 }; 74 };
61 75
62 i2c@3100 { 76 i2c@3100 {
63 device_type = "i2c"; 77 #address-cells = <1>;
78 #size-cells = <0>;
79 cell-index = <1>;
64 compatible = "fsl-i2c"; 80 compatible = "fsl-i2c";
65 reg = <3100 100>; 81 reg = <0x3100 0x100>;
66 interrupts = <f 8>; 82 interrupts = <15 0x8>;
67 interrupt-parent = < &ipic >; 83 interrupt-parent = <&ipic>;
68 dfsrr; 84 dfsrr;
69 }; 85 };
70 86
71 spi@7000 { 87 spi@7000 {
72 device_type = "spi"; 88 cell-index = <0>;
73 compatible = "fsl_spi"; 89 compatible = "fsl,spi";
74 reg = <7000 1000>; 90 reg = <0x7000 0x1000>;
75 interrupts = <10 8>; 91 interrupts = <16 0x8>;
76 interrupt-parent = < &ipic >; 92 interrupt-parent = <&ipic>;
77 mode = "cpu"; 93 mode = "cpu";
78 }; 94 };
79 95
80 usb@22000 { 96 usb@22000 {
81 device_type = "usb";
82 compatible = "fsl-usb2-mph"; 97 compatible = "fsl-usb2-mph";
83 reg = <22000 1000>; 98 reg = <0x22000 0x1000>;
84 #address-cells = <1>; 99 #address-cells = <1>;
85 #size-cells = <0>; 100 #size-cells = <0>;
86 interrupt-parent = < &ipic >; 101 interrupt-parent = <&ipic>;
87 interrupts = <27 8>; 102 interrupts = <39 0x8>;
88 phy_type = "ulpi"; 103 phy_type = "ulpi";
89 port1; 104 port1;
90 }; 105 };
91 106
92 usb@23000 { 107 usb@23000 {
93 device_type = "usb";
94 compatible = "fsl-usb2-dr"; 108 compatible = "fsl-usb2-dr";
95 reg = <23000 1000>; 109 reg = <0x23000 0x1000>;
96 #address-cells = <1>; 110 #address-cells = <1>;
97 #size-cells = <0>; 111 #size-cells = <0>;
98 interrupt-parent = < &ipic >; 112 interrupt-parent = <&ipic>;
99 interrupts = <26 8>; 113 interrupts = <38 0x8>;
100 dr_mode = "peripheral"; 114 dr_mode = "peripheral";
101 phy_type = "ulpi"; 115 phy_type = "ulpi";
102 }; 116 };
103 117
104 mdio@24520 { 118 mdio@24520 {
105 device_type = "mdio";
106 compatible = "gianfar";
107 reg = <24520 20>;
108 #address-cells = <1>; 119 #address-cells = <1>;
109 #size-cells = <0>; 120 #size-cells = <0>;
121 compatible = "fsl,gianfar-mdio";
122 reg = <0x24520 0x20>;
110 123
111 /* Vitesse 8201 */ 124 /* Vitesse 8201 */
112 phy1c: ethernet-phy@1c { 125 phy1c: ethernet-phy@1c {
113 interrupt-parent = < &ipic >; 126 interrupt-parent = <&ipic>;
114 interrupts = <12 8>; 127 interrupts = <18 0x8>;
115 reg = <1c>; 128 reg = <0x1c>;
116 device_type = "ethernet-phy";
117 };
118
119 /* Vitesse 7385 */
120 phy1f: ethernet-phy@1f {
121 interrupt-parent = < &ipic >;
122 interrupts = <12 8>;
123 reg = <1f>;
124 device_type = "ethernet-phy"; 129 device_type = "ethernet-phy";
125 }; 130 };
126 }; 131 };
127 132
128 ethernet@24000 { 133 enet0: ethernet@24000 {
134 cell-index = <0>;
129 device_type = "network"; 135 device_type = "network";
130 model = "TSEC"; 136 model = "TSEC";
131 compatible = "gianfar"; 137 compatible = "gianfar";
132 reg = <24000 1000>; 138 reg = <0x24000 0x1000>;
133 /*
134 * address is deprecated and will be removed
135 * in 2.6.25. Only recent versions of
136 * U-Boot support local-mac-address, however.
137 */
138 address = [ 00 00 00 00 00 00 ];
139 local-mac-address = [ 00 00 00 00 00 00 ]; 139 local-mac-address = [ 00 00 00 00 00 00 ];
140 interrupts = <20 8 21 8 22 8>; 140 interrupts = <32 0x8 33 0x8 34 0x8>;
141 interrupt-parent = < &ipic >; 141 interrupt-parent = <&ipic>;
142 phy-handle = < &phy1c >; 142 phy-handle = <&phy1c>;
143 linux,network-index = <0>; 143 linux,network-index = <0>;
144 }; 144 };
145 145
146 ethernet@25000 { 146 enet1: ethernet@25000 {
147 #address-cells = <1>; 147 cell-index = <1>;
148 #size-cells = <0>;
149 device_type = "network"; 148 device_type = "network";
150 model = "TSEC"; 149 model = "TSEC";
151 compatible = "gianfar"; 150 compatible = "gianfar";
152 reg = <25000 1000>; 151 reg = <0x25000 0x1000>;
153 /*
154 * address is deprecated and will be removed
155 * in 2.6.25. Only recent versions of
156 * U-Boot support local-mac-address, however.
157 */
158 address = [ 00 00 00 00 00 00 ];
159 local-mac-address = [ 00 00 00 00 00 00 ]; 152 local-mac-address = [ 00 00 00 00 00 00 ];
160 interrupts = <23 8 24 8 25 8>; 153 interrupts = <35 0x8 36 0x8 37 0x8>;
161 interrupt-parent = < &ipic >; 154 interrupt-parent = <&ipic>;
162 phy-handle = < &phy1f >; 155 /* Vitesse 7385 isn't on the MDIO bus */
156 fixed-link = <1 1 1000 0 0>;
163 linux,network-index = <1>; 157 linux,network-index = <1>;
164 }; 158 };
165 159
166 serial@4500 { 160 serial0: serial@4500 {
161 cell-index = <0>;
167 device_type = "serial"; 162 device_type = "serial";
168 compatible = "ns16550"; 163 compatible = "ns16550";
169 reg = <4500 100>; 164 reg = <0x4500 0x100>;
170 clock-frequency = <0>; // from bootloader 165 clock-frequency = <0>; // from bootloader
171 interrupts = <9 8>; 166 interrupts = <9 0x8>;
172 interrupt-parent = < &ipic >; 167 interrupt-parent = <&ipic>;
173 }; 168 };
174 169
175 serial@4600 { 170 serial1: serial@4600 {
171 cell-index = <1>;
176 device_type = "serial"; 172 device_type = "serial";
177 compatible = "ns16550"; 173 compatible = "ns16550";
178 reg = <4600 100>; 174 reg = <0x4600 0x100>;
179 clock-frequency = <0>; // from bootloader 175 clock-frequency = <0>; // from bootloader
180 interrupts = <a 8>; 176 interrupts = <10 0x8>;
181 interrupt-parent = < &ipic >; 177 interrupt-parent = <&ipic>;
182 }; 178 };
183 179
184 crypto@30000 { 180 crypto@30000 {
185 device_type = "crypto"; 181 device_type = "crypto";
186 model = "SEC2"; 182 model = "SEC2";
187 compatible = "talitos"; 183 compatible = "talitos";
188 reg = <30000 10000>; 184 reg = <0x30000 0x10000>;
189 interrupts = <b 8>; 185 interrupts = <11 0x8>;
190 interrupt-parent = < &ipic >; 186 interrupt-parent = <&ipic>;
191 num-channels = <4>; 187 num-channels = <4>;
192 channel-fifo-len = <18>; 188 channel-fifo-len = <24>;
193 exec-units-mask = <0000007e>; 189 exec-units-mask = <0x0000007e>;
194 descriptor-types-mask = <01010ebf>; 190 descriptor-types-mask = <0x01010ebf>;
195 }; 191 };
196 192
197 ipic: pic@700 { 193 ipic: pic@700 {
198 interrupt-controller; 194 interrupt-controller;
199 #address-cells = <0>; 195 #address-cells = <0>;
200 #interrupt-cells = <2>; 196 #interrupt-cells = <2>;
201 reg = <700 100>; 197 reg = <0x700 0x100>;
202 device_type = "ipic"; 198 device_type = "ipic";
203 }; 199 };
204 }; 200 };
205 201
206 pci@e0008500 { 202 pci0: pci@e0008500 {
207 interrupt-map-mask = <f800 0 0 7>; 203 cell-index = <1>;
204 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
208 interrupt-map = < 205 interrupt-map = <
209 /* IDSEL 0x10 - SATA */ 206 /* IDSEL 0x10 - SATA */
210 8000 0 0 1 &ipic 16 8 /* SATA_INTA */ 207 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
211 >; 208 >;
212 interrupt-parent = < &ipic >; 209 interrupt-parent = <&ipic>;
213 interrupts = <42 8>; 210 interrupts = <66 0x8>;
214 bus-range = <0 0>; 211 bus-range = <0x0 0x0>;
215 ranges = <42000000 0 80000000 80000000 0 10000000 212 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
216 02000000 0 90000000 90000000 0 10000000 213 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
217 01000000 0 00000000 e2000000 0 01000000>; 214 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
218 clock-frequency = <3f940aa>; 215 clock-frequency = <66666666>;
219 #interrupt-cells = <1>; 216 #interrupt-cells = <1>;
220 #size-cells = <2>; 217 #size-cells = <2>;
221 #address-cells = <3>; 218 #address-cells = <3>;
222 reg = <e0008500 100>; 219 reg = <0xe0008500 0x100>;
223 compatible = "fsl,mpc8349-pci"; 220 compatible = "fsl,mpc8349-pci";
224 device_type = "pci"; 221 device_type = "pci";
225 }; 222 };
226 223
227 pci@e0008600 { 224 pci1: pci@e0008600 {
228 interrupt-map-mask = <f800 0 0 7>; 225 cell-index = <2>;
226 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
229 interrupt-map = < 227 interrupt-map = <
230 /* IDSEL 0x0E - MiniPCI Slot */ 228 /* IDSEL 0x0E - MiniPCI Slot */
231 7000 0 0 1 &ipic 15 8 /* PCI_INTA */ 229 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
232 230
233 /* IDSEL 0x0F - PCI Slot */ 231 /* IDSEL 0x0F - PCI Slot */
234 7800 0 0 1 &ipic 14 8 /* PCI_INTA */ 232 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
235 7800 0 0 2 &ipic 15 8 /* PCI_INTB */ 233 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
236 >; 234 >;
237 interrupt-parent = < &ipic >; 235 interrupt-parent = <&ipic>;
238 interrupts = <43 8>; 236 interrupts = <67 0x8>;
239 bus-range = <0 0>; 237 bus-range = <0x0 0x0>;
240 ranges = <42000000 0 a0000000 a0000000 0 10000000 238 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
241 02000000 0 b0000000 b0000000 0 10000000 239 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
242 01000000 0 00000000 e3000000 0 01000000>; 240 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
243 clock-frequency = <3f940aa>; 241 clock-frequency = <66666666>;
244 #interrupt-cells = <1>; 242 #interrupt-cells = <1>;
245 #size-cells = <2>; 243 #size-cells = <2>;
246 #address-cells = <3>; 244 #address-cells = <3>;
247 reg = <e0008600 100>; 245 reg = <0xe0008600 0x100>;
248 compatible = "fsl,mpc8349-pci"; 246 compatible = "fsl,mpc8349-pci";
249 device_type = "pci"; 247 device_type = "pci";
250 }; 248 };
251 249
250 localbus@e0005000 {
251 #address-cells = <2>;
252 #size-cells = <1>;
253 compatible = "fsl,mpc8349e-localbus",
254 "fsl,pq2pro-localbus";
255 reg = <0xe0005000 0xd8>;
256 ranges = <0x3 0x0 0xf0000000 0x210>;
252 257
253 258 pata@3,0 {
259 compatible = "fsl,mpc8349emitx-pata", "ata-generic";
260 reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
261 reg-shift = <1>;
262 pio-mode = <6>;
263 interrupts = <23 0x8>;
264 interrupt-parent = <&ipic>;
265 };
266 };
254}; 267};
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index 074f7a2ab7e4..f81d735e6e72 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -8,23 +8,33 @@
8 * Free Software Foundation; either version 2 of the License, or (at your 8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11
12/dts-v1/;
13
11/ { 14/ {
12 model = "MPC8349EMITXGP"; 15 model = "MPC8349EMITXGP";
13 compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX"; 16 compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
14 #address-cells = <1>; 17 #address-cells = <1>;
15 #size-cells = <1>; 18 #size-cells = <1>;
16 19
20 aliases {
21 ethernet0 = &enet0;
22 serial0 = &serial0;
23 serial1 = &serial1;
24 pci0 = &pci0;
25 };
26
17 cpus { 27 cpus {
18 #address-cells = <1>; 28 #address-cells = <1>;
19 #size-cells = <0>; 29 #size-cells = <0>;
20 30
21 PowerPC,8349@0 { 31 PowerPC,8349@0 {
22 device_type = "cpu"; 32 device_type = "cpu";
23 reg = <0>; 33 reg = <0x0>;
24 d-cache-line-size = <20>; 34 d-cache-line-size = <32>;
25 i-cache-line-size = <20>; 35 i-cache-line-size = <32>;
26 d-cache-size = <8000>; 36 d-cache-size = <32768>;
27 i-cache-size = <8000>; 37 i-cache-size = <32768>;
28 timebase-frequency = <0>; // from bootloader 38 timebase-frequency = <0>; // from bootloader
29 bus-frequency = <0>; // from bootloader 39 bus-frequency = <0>; // from bootloader
30 clock-frequency = <0>; // from bootloader 40 clock-frequency = <0>; // from bootloader
@@ -33,148 +43,154 @@
33 43
34 memory { 44 memory {
35 device_type = "memory"; 45 device_type = "memory";
36 reg = <00000000 10000000>; 46 reg = <0x00000000 0x10000000>;
37 }; 47 };
38 48
39 soc8349@e0000000 { 49 soc8349@e0000000 {
40 #address-cells = <1>; 50 #address-cells = <1>;
41 #size-cells = <1>; 51 #size-cells = <1>;
42 device_type = "soc"; 52 device_type = "soc";
43 ranges = <0 e0000000 00100000>; 53 ranges = <0x0 0xe0000000 0x00100000>;
44 reg = <e0000000 00000200>; 54 reg = <0xe0000000 0x00000200>;
45 bus-frequency = <0>; // from bootloader 55 bus-frequency = <0>; // from bootloader
46 56
47 wdt@200 { 57 wdt@200 {
48 device_type = "watchdog"; 58 device_type = "watchdog";
49 compatible = "mpc83xx_wdt"; 59 compatible = "mpc83xx_wdt";
50 reg = <200 100>; 60 reg = <0x200 0x100>;
51 }; 61 };
52 62
53 i2c@3000 { 63 i2c@3000 {
54 device_type = "i2c"; 64 #address-cells = <1>;
65 #size-cells = <0>;
66 cell-index = <0>;
55 compatible = "fsl-i2c"; 67 compatible = "fsl-i2c";
56 reg = <3000 100>; 68 reg = <0x3000 0x100>;
57 interrupts = <e 8>; 69 interrupts = <14 0x8>;
58 interrupt-parent = < &ipic >; 70 interrupt-parent = <&ipic>;
59 dfsrr; 71 dfsrr;
60 }; 72 };
61 73
62 i2c@3100 { 74 i2c@3100 {
63 device_type = "i2c"; 75 #address-cells = <1>;
76 #size-cells = <0>;
77 cell-index = <1>;
64 compatible = "fsl-i2c"; 78 compatible = "fsl-i2c";
65 reg = <3100 100>; 79 reg = <0x3100 0x100>;
66 interrupts = <f 8>; 80 interrupts = <15 0x8>;
67 interrupt-parent = < &ipic >; 81 interrupt-parent = <&ipic>;
68 dfsrr; 82 dfsrr;
69 }; 83 };
70 84
71 spi@7000 { 85 spi@7000 {
72 device_type = "spi"; 86 cell-index = <0>;
73 compatible = "fsl_spi"; 87 compatible = "fsl,spi";
74 reg = <7000 1000>; 88 reg = <0x7000 0x1000>;
75 interrupts = <10 8>; 89 interrupts = <16 0x8>;
76 interrupt-parent = < &ipic >; 90 interrupt-parent = <&ipic>;
77 mode = "cpu"; 91 mode = "cpu";
78 }; 92 };
79 93
80 usb@23000 { 94 usb@23000 {
81 device_type = "usb";
82 compatible = "fsl-usb2-dr"; 95 compatible = "fsl-usb2-dr";
83 reg = <23000 1000>; 96 reg = <0x23000 0x1000>;
84 #address-cells = <1>; 97 #address-cells = <1>;
85 #size-cells = <0>; 98 #size-cells = <0>;
86 interrupt-parent = < &ipic >; 99 interrupt-parent = <&ipic>;
87 interrupts = <26 8>; 100 interrupts = <38 0x8>;
88 dr_mode = "otg"; 101 dr_mode = "otg";
89 phy_type = "ulpi"; 102 phy_type = "ulpi";
90 }; 103 };
91 104
92 mdio@24520 { 105 mdio@24520 {
93 device_type = "mdio";
94 compatible = "gianfar";
95 reg = <24520 20>;
96 #address-cells = <1>; 106 #address-cells = <1>;
97 #size-cells = <0>; 107 #size-cells = <0>;
108 compatible = "fsl,gianfar-mdio";
109 reg = <0x24520 0x20>;
98 110
99 /* Vitesse 8201 */ 111 /* Vitesse 8201 */
100 phy1c: ethernet-phy@1c { 112 phy1c: ethernet-phy@1c {
101 interrupt-parent = < &ipic >; 113 interrupt-parent = <&ipic>;
102 interrupts = <12 8>; 114 interrupts = <18 0x8>;
103 reg = <1c>; 115 reg = <0x1c>;
104 device_type = "ethernet-phy"; 116 device_type = "ethernet-phy";
105 }; 117 };
106 }; 118 };
107 119
108 ethernet@24000 { 120 enet0: ethernet@24000 {
121 cell-index = <0>;
109 device_type = "network"; 122 device_type = "network";
110 model = "TSEC"; 123 model = "TSEC";
111 compatible = "gianfar"; 124 compatible = "gianfar";
112 reg = <24000 1000>; 125 reg = <0x24000 0x1000>;
113 local-mac-address = [ 00 00 00 00 00 00 ]; 126 local-mac-address = [ 00 00 00 00 00 00 ];
114 interrupts = <20 8 21 8 22 8>; 127 interrupts = <32 0x8 33 0x8 34 0x8>;
115 interrupt-parent = < &ipic >; 128 interrupt-parent = <&ipic>;
116 phy-handle = < &phy1c >; 129 phy-handle = <&phy1c>;
117 linux,network-index = <0>; 130 linux,network-index = <0>;
118 }; 131 };
119 132
120 serial@4500 { 133 serial0: serial@4500 {
134 cell-index = <0>;
121 device_type = "serial"; 135 device_type = "serial";
122 compatible = "ns16550"; 136 compatible = "ns16550";
123 reg = <4500 100>; 137 reg = <0x4500 0x100>;
124 clock-frequency = <0>; // from bootloader 138 clock-frequency = <0>; // from bootloader
125 interrupts = <9 8>; 139 interrupts = <9 0x8>;
126 interrupt-parent = < &ipic >; 140 interrupt-parent = <&ipic>;
127 }; 141 };
128 142
129 serial@4600 { 143 serial1: serial@4600 {
144 cell-index = <1>;
130 device_type = "serial"; 145 device_type = "serial";
131 compatible = "ns16550"; 146 compatible = "ns16550";
132 reg = <4600 100>; 147 reg = <0x4600 0x100>;
133 clock-frequency = <0>; // from bootloader 148 clock-frequency = <0>; // from bootloader
134 interrupts = <a 8>; 149 interrupts = <10 0x8>;
135 interrupt-parent = < &ipic >; 150 interrupt-parent = <&ipic>;
136 }; 151 };
137 152
138 crypto@30000 { 153 crypto@30000 {
139 device_type = "crypto"; 154 device_type = "crypto";
140 model = "SEC2"; 155 model = "SEC2";
141 compatible = "talitos"; 156 compatible = "talitos";
142 reg = <30000 10000>; 157 reg = <0x30000 0x10000>;
143 interrupts = <b 8>; 158 interrupts = <11 0x8>;
144 interrupt-parent = < &ipic >; 159 interrupt-parent = <&ipic>;
145 num-channels = <4>; 160 num-channels = <4>;
146 channel-fifo-len = <18>; 161 channel-fifo-len = <24>;
147 exec-units-mask = <0000007e>; 162 exec-units-mask = <0x0000007e>;
148 descriptor-types-mask = <01010ebf>; 163 descriptor-types-mask = <0x01010ebf>;
149 }; 164 };
150 165
151 ipic: pic@700 { 166 ipic: pic@700 {
152 interrupt-controller; 167 interrupt-controller;
153 #address-cells = <0>; 168 #address-cells = <0>;
154 #interrupt-cells = <2>; 169 #interrupt-cells = <2>;
155 reg = <700 100>; 170 reg = <0x700 0x100>;
156 device_type = "ipic"; 171 device_type = "ipic";
157 }; 172 };
158 }; 173 };
159 174
160 pci@e0008600 { 175 pci0: pci@e0008600 {
161 interrupt-map-mask = <f800 0 0 7>; 176 cell-index = <2>;
177 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
162 interrupt-map = < 178 interrupt-map = <
163 /* IDSEL 0x0F - PCI Slot */ 179 /* IDSEL 0x0F - PCI Slot */
164 7800 0 0 1 &ipic 14 8 /* PCI_INTA */ 180 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
165 7800 0 0 2 &ipic 15 8 /* PCI_INTB */ 181 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
166 >; 182 >;
167 interrupt-parent = < &ipic >; 183 interrupt-parent = <&ipic>;
168 interrupts = <43 8>; 184 interrupts = <67 0x8>;
169 bus-range = <1 1>; 185 bus-range = <0x1 0x1>;
170 ranges = <42000000 0 a0000000 a0000000 0 10000000 186 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
171 02000000 0 b0000000 b0000000 0 10000000 187 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
172 01000000 0 00000000 e3000000 0 01000000>; 188 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
173 clock-frequency = <3f940aa>; 189 clock-frequency = <66666666>;
174 #interrupt-cells = <1>; 190 #interrupt-cells = <1>;
175 #size-cells = <2>; 191 #size-cells = <2>;
176 #address-cells = <3>; 192 #address-cells = <3>;
177 reg = <e0008600 100>; 193 reg = <0xe0008600 0x100>;
178 compatible = "fsl,mpc8349-pci"; 194 compatible = "fsl,mpc8349-pci";
179 device_type = "pci"; 195 device_type = "pci";
180 }; 196 };
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 49363f89cb71..7480edae85ed 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -9,23 +9,34 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/dts-v1/;
13
12/ { 14/ {
13 model = "MPC8349EMDS"; 15 model = "MPC8349EMDS";
14 compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS"; 16 compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
15 #address-cells = <1>; 17 #address-cells = <1>;
16 #size-cells = <1>; 18 #size-cells = <1>;
17 19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 pci1 = &pci1;
27 };
28
18 cpus { 29 cpus {
19 #address-cells = <1>; 30 #address-cells = <1>;
20 #size-cells = <0>; 31 #size-cells = <0>;
21 32
22 PowerPC,8349@0 { 33 PowerPC,8349@0 {
23 device_type = "cpu"; 34 device_type = "cpu";
24 reg = <0>; 35 reg = <0x0>;
25 d-cache-line-size = <20>; // 32 bytes 36 d-cache-line-size = <32>;
26 i-cache-line-size = <20>; // 32 bytes 37 i-cache-line-size = <32>;
27 d-cache-size = <8000>; // L1, 32K 38 d-cache-size = <32768>;
28 i-cache-size = <8000>; // L1, 32K 39 i-cache-size = <32768>;
29 timebase-frequency = <0>; // from bootloader 40 timebase-frequency = <0>; // from bootloader
30 bus-frequency = <0>; // from bootloader 41 bus-frequency = <0>; // from bootloader
31 clock-frequency = <0>; // from bootloader 42 clock-frequency = <0>; // from bootloader
@@ -34,164 +45,152 @@
34 45
35 memory { 46 memory {
36 device_type = "memory"; 47 device_type = "memory";
37 reg = <00000000 10000000>; // 256MB at 0 48 reg = <0x00000000 0x10000000>; // 256MB at 0
38 }; 49 };
39 50
40 bcsr@e2400000 { 51 bcsr@e2400000 {
41 device_type = "board-control"; 52 device_type = "board-control";
42 reg = <e2400000 8000>; 53 reg = <0xe2400000 0x8000>;
43 }; 54 };
44 55
45 soc8349@e0000000 { 56 soc8349@e0000000 {
46 #address-cells = <1>; 57 #address-cells = <1>;
47 #size-cells = <1>; 58 #size-cells = <1>;
48 device_type = "soc"; 59 device_type = "soc";
49 ranges = <0 e0000000 00100000>; 60 ranges = <0x0 0xe0000000 0x00100000>;
50 reg = <e0000000 00000200>; 61 reg = <0xe0000000 0x00000200>;
51 bus-frequency = <0>; 62 bus-frequency = <0>;
52 63
53 wdt@200 { 64 wdt@200 {
54 device_type = "watchdog"; 65 device_type = "watchdog";
55 compatible = "mpc83xx_wdt"; 66 compatible = "mpc83xx_wdt";
56 reg = <200 100>; 67 reg = <0x200 0x100>;
57 }; 68 };
58 69
59 i2c@3000 { 70 i2c@3000 {
60 #address-cells = <1>; 71 #address-cells = <1>;
61 #size-cells = <0>; 72 #size-cells = <0>;
62 device_type = "i2c"; 73 cell-index = <0>;
63 compatible = "fsl-i2c"; 74 compatible = "fsl-i2c";
64 reg = <3000 100>; 75 reg = <0x3000 0x100>;
65 interrupts = <e 8>; 76 interrupts = <14 0x8>;
66 interrupt-parent = < &ipic >; 77 interrupt-parent = <&ipic>;
67 dfsrr; 78 dfsrr;
68 79
69 rtc@68 { 80 rtc@68 {
70 compatible = "dallas,ds1374"; 81 compatible = "dallas,ds1374";
71 reg = <68>; 82 reg = <0x68>;
72 }; 83 };
73 }; 84 };
74 85
75 i2c@3100 { 86 i2c@3100 {
76 #address-cells = <1>; 87 #address-cells = <1>;
77 #size-cells = <0>; 88 #size-cells = <0>;
78 device_type = "i2c"; 89 cell-index = <1>;
79 compatible = "fsl-i2c"; 90 compatible = "fsl-i2c";
80 reg = <3100 100>; 91 reg = <0x3100 0x100>;
81 interrupts = <f 8>; 92 interrupts = <15 0x8>;
82 interrupt-parent = < &ipic >; 93 interrupt-parent = <&ipic>;
83 dfsrr; 94 dfsrr;
84 }; 95 };
85 96
86 spi@7000 { 97 spi@7000 {
87 device_type = "spi"; 98 cell-index = <0>;
88 compatible = "fsl_spi"; 99 compatible = "fsl,spi";
89 reg = <7000 1000>; 100 reg = <0x7000 0x1000>;
90 interrupts = <10 8>; 101 interrupts = <16 0x8>;
91 interrupt-parent = < &ipic >; 102 interrupt-parent = <&ipic>;
92 mode = "cpu"; 103 mode = "cpu";
93 }; 104 };
94 105
95 /* phy type (ULPI or SERIAL) are only types supportted for MPH */ 106 /* phy type (ULPI or SERIAL) are only types supported for MPH */
96 /* port = 0 or 1 */ 107 /* port = 0 or 1 */
97 usb@22000 { 108 usb@22000 {
98 device_type = "usb";
99 compatible = "fsl-usb2-mph"; 109 compatible = "fsl-usb2-mph";
100 reg = <22000 1000>; 110 reg = <0x22000 0x1000>;
101 #address-cells = <1>; 111 #address-cells = <1>;
102 #size-cells = <0>; 112 #size-cells = <0>;
103 interrupt-parent = < &ipic >; 113 interrupt-parent = <&ipic>;
104 interrupts = <27 8>; 114 interrupts = <39 0x8>;
105 phy_type = "ulpi"; 115 phy_type = "ulpi";
106 port1; 116 port1;
107 }; 117 };
108 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ 118 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
109 usb@23000 { 119 usb@23000 {
110 device_type = "usb";
111 compatible = "fsl-usb2-dr"; 120 compatible = "fsl-usb2-dr";
112 reg = <23000 1000>; 121 reg = <0x23000 0x1000>;
113 #address-cells = <1>; 122 #address-cells = <1>;
114 #size-cells = <0>; 123 #size-cells = <0>;
115 interrupt-parent = < &ipic >; 124 interrupt-parent = <&ipic>;
116 interrupts = <26 8>; 125 interrupts = <38 0x8>;
117 dr_mode = "otg"; 126 dr_mode = "otg";
118 phy_type = "ulpi"; 127 phy_type = "ulpi";
119 }; 128 };
120 129
121 mdio@24520 { 130 mdio@24520 {
122 device_type = "mdio";
123 compatible = "gianfar";
124 reg = <24520 20>;
125 #address-cells = <1>; 131 #address-cells = <1>;
126 #size-cells = <0>; 132 #size-cells = <0>;
133 compatible = "fsl,gianfar-mdio";
134 reg = <0x24520 0x20>;
135
127 phy0: ethernet-phy@0 { 136 phy0: ethernet-phy@0 {
128 interrupt-parent = < &ipic >; 137 interrupt-parent = <&ipic>;
129 interrupts = <11 8>; 138 interrupts = <17 0x8>;
130 reg = <0>; 139 reg = <0x0>;
131 device_type = "ethernet-phy"; 140 device_type = "ethernet-phy";
132 }; 141 };
133 phy1: ethernet-phy@1 { 142 phy1: ethernet-phy@1 {
134 interrupt-parent = < &ipic >; 143 interrupt-parent = <&ipic>;
135 interrupts = <12 8>; 144 interrupts = <18 0x8>;
136 reg = <1>; 145 reg = <0x1>;
137 device_type = "ethernet-phy"; 146 device_type = "ethernet-phy";
138 }; 147 };
139 }; 148 };
140 149
141 ethernet@24000 { 150 enet0: ethernet@24000 {
151 cell-index = <0>;
142 device_type = "network"; 152 device_type = "network";
143 model = "TSEC"; 153 model = "TSEC";
144 compatible = "gianfar"; 154 compatible = "gianfar";
145 reg = <24000 1000>; 155 reg = <0x24000 0x1000>;
146 /*
147 * address is deprecated and will be removed
148 * in 2.6.25. Only recent versions of
149 * U-Boot support local-mac-address, however.
150 */
151 address = [ 00 00 00 00 00 00 ];
152 local-mac-address = [ 00 00 00 00 00 00 ]; 156 local-mac-address = [ 00 00 00 00 00 00 ];
153 interrupts = <20 8 21 8 22 8>; 157 interrupts = <32 0x8 33 0x8 34 0x8>;
154 interrupt-parent = < &ipic >; 158 interrupt-parent = <&ipic>;
155 phy-handle = < &phy0 >; 159 phy-handle = <&phy0>;
156 linux,network-index = <0>; 160 linux,network-index = <0>;
157 }; 161 };
158 162
159 ethernet@25000 { 163 enet1: ethernet@25000 {
160 #address-cells = <1>; 164 cell-index = <1>;
161 #size-cells = <0>;
162 device_type = "network"; 165 device_type = "network";
163 model = "TSEC"; 166 model = "TSEC";
164 compatible = "gianfar"; 167 compatible = "gianfar";
165 reg = <25000 1000>; 168 reg = <0x25000 0x1000>;
166 /*
167 * address is deprecated and will be removed
168 * in 2.6.25. Only recent versions of
169 * U-Boot support local-mac-address, however.
170 */
171 address = [ 00 00 00 00 00 00 ];
172 local-mac-address = [ 00 00 00 00 00 00 ]; 169 local-mac-address = [ 00 00 00 00 00 00 ];
173 interrupts = <23 8 24 8 25 8>; 170 interrupts = <35 0x8 36 0x8 37 0x8>;
174 interrupt-parent = < &ipic >; 171 interrupt-parent = <&ipic>;
175 phy-handle = < &phy1 >; 172 phy-handle = <&phy1>;
176 linux,network-index = <1>; 173 linux,network-index = <1>;
177 }; 174 };
178 175
179 serial@4500 { 176 serial0: serial@4500 {
177 cell-index = <0>;
180 device_type = "serial"; 178 device_type = "serial";
181 compatible = "ns16550"; 179 compatible = "ns16550";
182 reg = <4500 100>; 180 reg = <0x4500 0x100>;
183 clock-frequency = <0>; 181 clock-frequency = <0>;
184 interrupts = <9 8>; 182 interrupts = <9 0x8>;
185 interrupt-parent = < &ipic >; 183 interrupt-parent = <&ipic>;
186 }; 184 };
187 185
188 serial@4600 { 186 serial1: serial@4600 {
187 cell-index = <1>;
189 device_type = "serial"; 188 device_type = "serial";
190 compatible = "ns16550"; 189 compatible = "ns16550";
191 reg = <4600 100>; 190 reg = <0x4600 0x100>;
192 clock-frequency = <0>; 191 clock-frequency = <0>;
193 interrupts = <a 8>; 192 interrupts = <10 0x8>;
194 interrupt-parent = < &ipic >; 193 interrupt-parent = <&ipic>;
195 }; 194 };
196 195
197 /* May need to remove if on a part without crypto engine */ 196 /* May need to remove if on a part without crypto engine */
@@ -199,15 +198,15 @@
199 device_type = "crypto"; 198 device_type = "crypto";
200 model = "SEC2"; 199 model = "SEC2";
201 compatible = "talitos"; 200 compatible = "talitos";
202 reg = <30000 10000>; 201 reg = <0x30000 0x10000>;
203 interrupts = <b 8>; 202 interrupts = <11 0x8>;
204 interrupt-parent = < &ipic >; 203 interrupt-parent = <&ipic>;
205 num-channels = <4>; 204 num-channels = <4>;
206 channel-fifo-len = <18>; 205 channel-fifo-len = <24>;
207 exec-units-mask = <0000007e>; 206 exec-units-mask = <0x0000007e>;
208 /* desc mask is for rev2.0, 207 /* desc mask is for rev2.0,
209 * we need runtime fixup for >2.0 */ 208 * we need runtime fixup for >2.0 */
210 descriptor-types-mask = <01010ebf>; 209 descriptor-types-mask = <0x01010ebf>;
211 }; 210 };
212 211
213 /* IPIC 212 /* IPIC
@@ -220,127 +219,129 @@
220 interrupt-controller; 219 interrupt-controller;
221 #address-cells = <0>; 220 #address-cells = <0>;
222 #interrupt-cells = <2>; 221 #interrupt-cells = <2>;
223 reg = <700 100>; 222 reg = <0x700 0x100>;
224 device_type = "ipic"; 223 device_type = "ipic";
225 }; 224 };
226 }; 225 };
227 226
228 pci@e0008500 { 227 pci0: pci@e0008500 {
229 interrupt-map-mask = <f800 0 0 7>; 228 cell-index = <1>;
229 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
230 interrupt-map = < 230 interrupt-map = <
231 231
232 /* IDSEL 0x11 */ 232 /* IDSEL 0x11 */
233 8800 0 0 1 &ipic 14 8 233 0x8800 0x0 0x0 0x1 &ipic 20 0x8
234 8800 0 0 2 &ipic 15 8 234 0x8800 0x0 0x0 0x2 &ipic 21 0x8
235 8800 0 0 3 &ipic 16 8 235 0x8800 0x0 0x0 0x3 &ipic 22 0x8
236 8800 0 0 4 &ipic 17 8 236 0x8800 0x0 0x0 0x4 &ipic 23 0x8
237 237
238 /* IDSEL 0x12 */ 238 /* IDSEL 0x12 */
239 9000 0 0 1 &ipic 16 8 239 0x9000 0x0 0x0 0x1 &ipic 22 0x8
240 9000 0 0 2 &ipic 17 8 240 0x9000 0x0 0x0 0x2 &ipic 23 0x8
241 9000 0 0 3 &ipic 14 8 241 0x9000 0x0 0x0 0x3 &ipic 20 0x8
242 9000 0 0 4 &ipic 15 8 242 0x9000 0x0 0x0 0x4 &ipic 21 0x8
243 243
244 /* IDSEL 0x13 */ 244 /* IDSEL 0x13 */
245 9800 0 0 1 &ipic 17 8 245 0x9800 0x0 0x0 0x1 &ipic 23 0x8
246 9800 0 0 2 &ipic 14 8 246 0x9800 0x0 0x0 0x2 &ipic 20 0x8
247 9800 0 0 3 &ipic 15 8 247 0x9800 0x0 0x0 0x3 &ipic 21 0x8
248 9800 0 0 4 &ipic 16 8 248 0x9800 0x0 0x0 0x4 &ipic 22 0x8
249 249
250 /* IDSEL 0x15 */ 250 /* IDSEL 0x15 */
251 a800 0 0 1 &ipic 14 8 251 0xa800 0x0 0x0 0x1 &ipic 20 0x8
252 a800 0 0 2 &ipic 15 8 252 0xa800 0x0 0x0 0x2 &ipic 21 0x8
253 a800 0 0 3 &ipic 16 8 253 0xa800 0x0 0x0 0x3 &ipic 22 0x8
254 a800 0 0 4 &ipic 17 8 254 0xa800 0x0 0x0 0x4 &ipic 23 0x8
255 255
256 /* IDSEL 0x16 */ 256 /* IDSEL 0x16 */
257 b000 0 0 1 &ipic 17 8 257 0xb000 0x0 0x0 0x1 &ipic 23 0x8
258 b000 0 0 2 &ipic 14 8 258 0xb000 0x0 0x0 0x2 &ipic 20 0x8
259 b000 0 0 3 &ipic 15 8 259 0xb000 0x0 0x0 0x3 &ipic 21 0x8
260 b000 0 0 4 &ipic 16 8 260 0xb000 0x0 0x0 0x4 &ipic 22 0x8
261 261
262 /* IDSEL 0x17 */ 262 /* IDSEL 0x17 */
263 b800 0 0 1 &ipic 16 8 263 0xb800 0x0 0x0 0x1 &ipic 22 0x8
264 b800 0 0 2 &ipic 17 8 264 0xb800 0x0 0x0 0x2 &ipic 23 0x8
265 b800 0 0 3 &ipic 14 8 265 0xb800 0x0 0x0 0x3 &ipic 20 0x8
266 b800 0 0 4 &ipic 15 8 266 0xb800 0x0 0x0 0x4 &ipic 21 0x8
267 267
268 /* IDSEL 0x18 */ 268 /* IDSEL 0x18 */
269 c000 0 0 1 &ipic 15 8 269 0xc000 0x0 0x0 0x1 &ipic 21 0x8
270 c000 0 0 2 &ipic 16 8 270 0xc000 0x0 0x0 0x2 &ipic 22 0x8
271 c000 0 0 3 &ipic 17 8 271 0xc000 0x0 0x0 0x3 &ipic 23 0x8
272 c000 0 0 4 &ipic 14 8>; 272 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
273 interrupt-parent = < &ipic >; 273 interrupt-parent = <&ipic>;
274 interrupts = <42 8>; 274 interrupts = <66 0x8>;
275 bus-range = <0 0>; 275 bus-range = <0 0>;
276 ranges = <02000000 0 90000000 90000000 0 10000000 276 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
277 42000000 0 80000000 80000000 0 10000000 277 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
278 01000000 0 00000000 e2000000 0 00100000>; 278 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
279 clock-frequency = <3f940aa>; 279 clock-frequency = <66666666>;
280 #interrupt-cells = <1>; 280 #interrupt-cells = <1>;
281 #size-cells = <2>; 281 #size-cells = <2>;
282 #address-cells = <3>; 282 #address-cells = <3>;
283 reg = <e0008500 100>; 283 reg = <0xe0008500 0x100>;
284 compatible = "fsl,mpc8349-pci"; 284 compatible = "fsl,mpc8349-pci";
285 device_type = "pci"; 285 device_type = "pci";
286 }; 286 };
287 287
288 pci@e0008600 { 288 pci1: pci@e0008600 {
289 interrupt-map-mask = <f800 0 0 7>; 289 cell-index = <2>;
290 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
290 interrupt-map = < 291 interrupt-map = <
291 292
292 /* IDSEL 0x11 */ 293 /* IDSEL 0x11 */
293 8800 0 0 1 &ipic 14 8 294 0x8800 0x0 0x0 0x1 &ipic 20 0x8
294 8800 0 0 2 &ipic 15 8 295 0x8800 0x0 0x0 0x2 &ipic 21 0x8
295 8800 0 0 3 &ipic 16 8 296 0x8800 0x0 0x0 0x3 &ipic 22 0x8
296 8800 0 0 4 &ipic 17 8 297 0x8800 0x0 0x0 0x4 &ipic 23 0x8
297 298
298 /* IDSEL 0x12 */ 299 /* IDSEL 0x12 */
299 9000 0 0 1 &ipic 16 8 300 0x9000 0x0 0x0 0x1 &ipic 22 0x8
300 9000 0 0 2 &ipic 17 8 301 0x9000 0x0 0x0 0x2 &ipic 23 0x8
301 9000 0 0 3 &ipic 14 8 302 0x9000 0x0 0x0 0x3 &ipic 20 0x8
302 9000 0 0 4 &ipic 15 8 303 0x9000 0x0 0x0 0x4 &ipic 21 0x8
303 304
304 /* IDSEL 0x13 */ 305 /* IDSEL 0x13 */
305 9800 0 0 1 &ipic 17 8 306 0x9800 0x0 0x0 0x1 &ipic 23 0x8
306 9800 0 0 2 &ipic 14 8 307 0x9800 0x0 0x0 0x2 &ipic 20 0x8
307 9800 0 0 3 &ipic 15 8 308 0x9800 0x0 0x0 0x3 &ipic 21 0x8
308 9800 0 0 4 &ipic 16 8 309 0x9800 0x0 0x0 0x4 &ipic 22 0x8
309 310
310 /* IDSEL 0x15 */ 311 /* IDSEL 0x15 */
311 a800 0 0 1 &ipic 14 8 312 0xa800 0x0 0x0 0x1 &ipic 20 0x8
312 a800 0 0 2 &ipic 15 8 313 0xa800 0x0 0x0 0x2 &ipic 21 0x8
313 a800 0 0 3 &ipic 16 8 314 0xa800 0x0 0x0 0x3 &ipic 22 0x8
314 a800 0 0 4 &ipic 17 8 315 0xa800 0x0 0x0 0x4 &ipic 23 0x8
315 316
316 /* IDSEL 0x16 */ 317 /* IDSEL 0x16 */
317 b000 0 0 1 &ipic 17 8 318 0xb000 0x0 0x0 0x1 &ipic 23 0x8
318 b000 0 0 2 &ipic 14 8 319 0xb000 0x0 0x0 0x2 &ipic 20 0x8
319 b000 0 0 3 &ipic 15 8 320 0xb000 0x0 0x0 0x3 &ipic 21 0x8
320 b000 0 0 4 &ipic 16 8 321 0xb000 0x0 0x0 0x4 &ipic 22 0x8
321 322
322 /* IDSEL 0x17 */ 323 /* IDSEL 0x17 */
323 b800 0 0 1 &ipic 16 8 324 0xb800 0x0 0x0 0x1 &ipic 22 0x8
324 b800 0 0 2 &ipic 17 8 325 0xb800 0x0 0x0 0x2 &ipic 23 0x8
325 b800 0 0 3 &ipic 14 8 326 0xb800 0x0 0x0 0x3 &ipic 20 0x8
326 b800 0 0 4 &ipic 15 8 327 0xb800 0x0 0x0 0x4 &ipic 21 0x8
327 328
328 /* IDSEL 0x18 */ 329 /* IDSEL 0x18 */
329 c000 0 0 1 &ipic 15 8 330 0xc000 0x0 0x0 0x1 &ipic 21 0x8
330 c000 0 0 2 &ipic 16 8 331 0xc000 0x0 0x0 0x2 &ipic 22 0x8
331 c000 0 0 3 &ipic 17 8 332 0xc000 0x0 0x0 0x3 &ipic 23 0x8
332 c000 0 0 4 &ipic 14 8>; 333 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
333 interrupt-parent = < &ipic >; 334 interrupt-parent = <&ipic>;
334 interrupts = <42 8>; 335 interrupts = <66 0x8>;
335 bus-range = <0 0>; 336 bus-range = <0 0>;
336 ranges = <02000000 0 b0000000 b0000000 0 10000000 337 ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
337 42000000 0 a0000000 a0000000 0 10000000 338 0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
338 01000000 0 00000000 e2100000 0 00100000>; 339 0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>;
339 clock-frequency = <3f940aa>; 340 clock-frequency = <66666666>;
340 #interrupt-cells = <1>; 341 #interrupt-cells = <1>;
341 #size-cells = <2>; 342 #size-cells = <2>;
342 #address-cells = <3>; 343 #address-cells = <3>;
343 reg = <e0008600 100>; 344 reg = <0xe0008600 0x100>;
344 compatible = "fsl,mpc8349-pci"; 345 compatible = "fsl,mpc8349-pci";
345 device_type = "pci"; 346 device_type = "pci";
346 }; 347 };
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 0b2d2b588daa..55f03e8dc97f 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -14,122 +14,134 @@
14/memreserve/ 00000000 1000000; 14/memreserve/ 00000000 1000000;
15*/ 15*/
16 16
17/dts-v1/;
18
17/ { 19/ {
18 model = "MPC8360MDS"; 20 model = "MPC8360MDS";
19 compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS"; 21 compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS";
20 #address-cells = <1>; 22 #address-cells = <1>;
21 #size-cells = <1>; 23 #size-cells = <1>;
22 24
25 aliases {
26 ethernet0 = &enet0;
27 ethernet1 = &enet1;
28 serial0 = &serial0;
29 serial1 = &serial1;
30 pci0 = &pci0;
31 };
32
23 cpus { 33 cpus {
24 #address-cells = <1>; 34 #address-cells = <1>;
25 #size-cells = <0>; 35 #size-cells = <0>;
26 36
27 PowerPC,8360@0 { 37 PowerPC,8360@0 {
28 device_type = "cpu"; 38 device_type = "cpu";
29 reg = <0>; 39 reg = <0x0>;
30 d-cache-line-size = <20>; // 32 bytes 40 d-cache-line-size = <32>; // 32 bytes
31 i-cache-line-size = <20>; // 32 bytes 41 i-cache-line-size = <32>; // 32 bytes
32 d-cache-size = <8000>; // L1, 32K 42 d-cache-size = <32768>; // L1, 32K
33 i-cache-size = <8000>; // L1, 32K 43 i-cache-size = <32768>; // L1, 32K
34 timebase-frequency = <3EF1480>; 44 timebase-frequency = <66000000>;
35 bus-frequency = <FBC5200>; 45 bus-frequency = <264000000>;
36 clock-frequency = <1F78A400>; 46 clock-frequency = <528000000>;
37 }; 47 };
38 }; 48 };
39 49
40 memory { 50 memory {
41 device_type = "memory"; 51 device_type = "memory";
42 reg = <00000000 10000000>; 52 reg = <0x00000000 0x10000000>;
43 }; 53 };
44 54
45 bcsr@f8000000 { 55 bcsr@f8000000 {
46 device_type = "board-control"; 56 device_type = "board-control";
47 reg = <f8000000 8000>; 57 reg = <0xf8000000 0x8000>;
48 }; 58 };
49 59
50 soc8360@e0000000 { 60 soc8360@e0000000 {
51 #address-cells = <1>; 61 #address-cells = <1>;
52 #size-cells = <1>; 62 #size-cells = <1>;
53 device_type = "soc"; 63 device_type = "soc";
54 ranges = <0 e0000000 00100000>; 64 ranges = <0x0 0xe0000000 0x00100000>;
55 reg = <e0000000 00000200>; 65 reg = <0xe0000000 0x00000200>;
56 bus-frequency = <FBC5200>; 66 bus-frequency = <264000000>;
57 67
58 wdt@200 { 68 wdt@200 {
59 device_type = "watchdog"; 69 device_type = "watchdog";
60 compatible = "mpc83xx_wdt"; 70 compatible = "mpc83xx_wdt";
61 reg = <200 100>; 71 reg = <0x200 0x100>;
62 }; 72 };
63 73
64 i2c@3000 { 74 i2c@3000 {
65 #address-cells = <1>; 75 #address-cells = <1>;
66 #size-cells = <0>; 76 #size-cells = <0>;
67 device_type = "i2c"; 77 cell-index = <0>;
68 compatible = "fsl-i2c"; 78 compatible = "fsl-i2c";
69 reg = <3000 100>; 79 reg = <0x3000 0x100>;
70 interrupts = <e 8>; 80 interrupts = <14 0x8>;
71 interrupt-parent = < &ipic >; 81 interrupt-parent = <&ipic>;
72 dfsrr; 82 dfsrr;
73 83
74 rtc@68 { 84 rtc@68 {
75 compatible = "dallas,ds1374"; 85 compatible = "dallas,ds1374";
76 reg = <68>; 86 reg = <0x68>;
77 }; 87 };
78 }; 88 };
79 89
80 i2c@3100 { 90 i2c@3100 {
81 #address-cells = <1>; 91 #address-cells = <1>;
82 #size-cells = <0>; 92 #size-cells = <0>;
83 device_type = "i2c"; 93 cell-index = <1>;
84 compatible = "fsl-i2c"; 94 compatible = "fsl-i2c";
85 reg = <3100 100>; 95 reg = <0x3100 0x100>;
86 interrupts = <f 8>; 96 interrupts = <15 0x8>;
87 interrupt-parent = < &ipic >; 97 interrupt-parent = <&ipic>;
88 dfsrr; 98 dfsrr;
89 }; 99 };
90 100
91 serial@4500 { 101 serial0: serial@4500 {
102 cell-index = <0>;
92 device_type = "serial"; 103 device_type = "serial";
93 compatible = "ns16550"; 104 compatible = "ns16550";
94 reg = <4500 100>; 105 reg = <0x4500 0x100>;
95 clock-frequency = <FBC5200>; 106 clock-frequency = <264000000>;
96 interrupts = <9 8>; 107 interrupts = <9 0x8>;
97 interrupt-parent = < &ipic >; 108 interrupt-parent = <&ipic>;
98 }; 109 };
99 110
100 serial@4600 { 111 serial1: serial@4600 {
112 cell-index = <1>;
101 device_type = "serial"; 113 device_type = "serial";
102 compatible = "ns16550"; 114 compatible = "ns16550";
103 reg = <4600 100>; 115 reg = <0x4600 0x100>;
104 clock-frequency = <FBC5200>; 116 clock-frequency = <264000000>;
105 interrupts = <a 8>; 117 interrupts = <10 0x8>;
106 interrupt-parent = < &ipic >; 118 interrupt-parent = <&ipic>;
107 }; 119 };
108 120
109 crypto@30000 { 121 crypto@30000 {
110 device_type = "crypto"; 122 device_type = "crypto";
111 model = "SEC2"; 123 model = "SEC2";
112 compatible = "talitos"; 124 compatible = "talitos";
113 reg = <30000 10000>; 125 reg = <0x30000 0x10000>;
114 interrupts = <b 8>; 126 interrupts = <11 0x8>;
115 interrupt-parent = < &ipic >; 127 interrupt-parent = <&ipic>;
116 num-channels = <4>; 128 num-channels = <4>;
117 channel-fifo-len = <18>; 129 channel-fifo-len = <24>;
118 exec-units-mask = <0000007e>; 130 exec-units-mask = <0x0000007e>;
119 /* desc mask is for rev1.x, we need runtime fixup for >=2.x */ 131 /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
120 descriptor-types-mask = <01010ebf>; 132 descriptor-types-mask = <0x01010ebf>;
121 }; 133 };
122 134
123 ipic: pic@700 { 135 ipic: pic@700 {
124 interrupt-controller; 136 interrupt-controller;
125 #address-cells = <0>; 137 #address-cells = <0>;
126 #interrupt-cells = <2>; 138 #interrupt-cells = <2>;
127 reg = <700 100>; 139 reg = <0x700 0x100>;
128 device_type = "ipic"; 140 device_type = "ipic";
129 }; 141 };
130 142
131 par_io@1400 { 143 par_io@1400 {
132 reg = <1400 100>; 144 reg = <0x1400 0x100>;
133 device_type = "par_io"; 145 device_type = "par_io";
134 num-ports = <7>; 146 num-ports = <7>;
135 147
@@ -143,19 +155,19 @@
143 1 6 1 0 3 0 /* TxD4 */ 155 1 6 1 0 3 0 /* TxD4 */
144 1 7 1 0 1 0 /* TxD5 */ 156 1 7 1 0 1 0 /* TxD5 */
145 1 9 1 0 2 0 /* TxD6 */ 157 1 9 1 0 2 0 /* TxD6 */
146 1 a 1 0 2 0 /* TxD7 */ 158 1 10 1 0 2 0 /* TxD7 */
147 0 9 2 0 1 0 /* RxD0 */ 159 0 9 2 0 1 0 /* RxD0 */
148 0 a 2 0 1 0 /* RxD1 */ 160 0 10 2 0 1 0 /* RxD1 */
149 0 b 2 0 1 0 /* RxD2 */ 161 0 11 2 0 1 0 /* RxD2 */
150 0 c 2 0 1 0 /* RxD3 */ 162 0 12 2 0 1 0 /* RxD3 */
151 0 d 2 0 1 0 /* RxD4 */ 163 0 13 2 0 1 0 /* RxD4 */
152 1 1 2 0 2 0 /* RxD5 */ 164 1 1 2 0 2 0 /* RxD5 */
153 1 0 2 0 2 0 /* RxD6 */ 165 1 0 2 0 2 0 /* RxD6 */
154 1 4 2 0 2 0 /* RxD7 */ 166 1 4 2 0 2 0 /* RxD7 */
155 0 7 1 0 1 0 /* TX_EN */ 167 0 7 1 0 1 0 /* TX_EN */
156 0 8 1 0 1 0 /* TX_ER */ 168 0 8 1 0 1 0 /* TX_ER */
157 0 f 2 0 1 0 /* RX_DV */ 169 0 15 2 0 1 0 /* RX_DV */
158 0 10 2 0 1 0 /* RX_ER */ 170 0 16 2 0 1 0 /* RX_ER */
159 0 0 2 0 1 0 /* RX_CLK */ 171 0 0 2 0 1 0 /* RX_CLK */
160 2 9 1 0 3 0 /* GTX_CLK - CLK10 */ 172 2 9 1 0 3 0 /* GTX_CLK - CLK10 */
161 2 8 2 0 1 0>; /* GTX125 - CLK9 */ 173 2 8 2 0 1 0>; /* GTX125 - CLK9 */
@@ -163,27 +175,27 @@
163 pio2: ucc_pin@02 { 175 pio2: ucc_pin@02 {
164 pio-map = < 176 pio-map = <
165 /* port pin dir open_drain assignment has_irq */ 177 /* port pin dir open_drain assignment has_irq */
166 0 11 1 0 1 0 /* TxD0 */ 178 0 17 1 0 1 0 /* TxD0 */
167 0 12 1 0 1 0 /* TxD1 */ 179 0 18 1 0 1 0 /* TxD1 */
168 0 13 1 0 1 0 /* TxD2 */ 180 0 19 1 0 1 0 /* TxD2 */
169 0 14 1 0 1 0 /* TxD3 */ 181 0 20 1 0 1 0 /* TxD3 */
170 1 2 1 0 1 0 /* TxD4 */ 182 1 2 1 0 1 0 /* TxD4 */
171 1 3 1 0 2 0 /* TxD5 */ 183 1 3 1 0 2 0 /* TxD5 */
172 1 5 1 0 3 0 /* TxD6 */ 184 1 5 1 0 3 0 /* TxD6 */
173 1 8 1 0 3 0 /* TxD7 */ 185 1 8 1 0 3 0 /* TxD7 */
174 0 17 2 0 1 0 /* RxD0 */ 186 0 23 2 0 1 0 /* RxD0 */
175 0 18 2 0 1 0 /* RxD1 */ 187 0 24 2 0 1 0 /* RxD1 */
176 0 19 2 0 1 0 /* RxD2 */ 188 0 25 2 0 1 0 /* RxD2 */
177 0 1a 2 0 1 0 /* RxD3 */ 189 0 26 2 0 1 0 /* RxD3 */
178 0 1b 2 0 1 0 /* RxD4 */ 190 0 27 2 0 1 0 /* RxD4 */
179 1 c 2 0 2 0 /* RxD5 */ 191 1 12 2 0 2 0 /* RxD5 */
180 1 d 2 0 3 0 /* RxD6 */ 192 1 13 2 0 3 0 /* RxD6 */
181 1 b 2 0 2 0 /* RxD7 */ 193 1 11 2 0 2 0 /* RxD7 */
182 0 15 1 0 1 0 /* TX_EN */ 194 0 21 1 0 1 0 /* TX_EN */
183 0 16 1 0 1 0 /* TX_ER */ 195 0 22 1 0 1 0 /* TX_ER */
184 0 1d 2 0 1 0 /* RX_DV */ 196 0 29 2 0 1 0 /* RX_DV */
185 0 1e 2 0 1 0 /* RX_ER */ 197 0 30 2 0 1 0 /* RX_ER */
186 0 1f 2 0 1 0 /* RX_CLK */ 198 0 31 2 0 1 0 /* RX_CLK */
187 2 2 1 0 2 0 /* GTX_CLK - CLK10 */ 199 2 2 1 0 2 0 /* GTX_CLK - CLK10 */
188 2 3 2 0 1 0 /* GTX125 - CLK4 */ 200 2 3 2 0 1 0 /* GTX125 - CLK4 */
189 0 1 3 0 2 0 /* MDIO */ 201 0 1 3 0 2 0 /* MDIO */
@@ -197,181 +209,174 @@
197 #address-cells = <1>; 209 #address-cells = <1>;
198 #size-cells = <1>; 210 #size-cells = <1>;
199 device_type = "qe"; 211 device_type = "qe";
200 model = "QE"; 212 compatible = "fsl,qe";
201 ranges = <0 e0100000 00100000>; 213 ranges = <0x0 0xe0100000 0x00100000>;
202 reg = <e0100000 480>; 214 reg = <0xe0100000 0x480>;
203 brg-frequency = <0>; 215 brg-frequency = <0>;
204 bus-frequency = <179A7B00>; 216 bus-frequency = <396000000>;
205 217
206 muram@10000 { 218 muram@10000 {
207 device_type = "muram"; 219 #address-cells = <1>;
208 ranges = <0 00010000 0000c000>; 220 #size-cells = <1>;
209 221 compatible = "fsl,qe-muram", "fsl,cpm-muram";
210 data-only@0{ 222 ranges = <0x0 0x00010000 0x0000c000>;
211 reg = <0 c000>; 223
224 data-only@0 {
225 compatible = "fsl,qe-muram-data",
226 "fsl,cpm-muram-data";
227 reg = <0x0 0xc000>;
212 }; 228 };
213 }; 229 };
214 230
215 spi@4c0 { 231 spi@4c0 {
216 device_type = "spi"; 232 cell-index = <0>;
217 compatible = "fsl_spi"; 233 compatible = "fsl,spi";
218 reg = <4c0 40>; 234 reg = <0x4c0 0x40>;
219 interrupts = <2>; 235 interrupts = <2>;
220 interrupt-parent = < &qeic >; 236 interrupt-parent = <&qeic>;
221 mode = "cpu"; 237 mode = "cpu";
222 }; 238 };
223 239
224 spi@500 { 240 spi@500 {
225 device_type = "spi"; 241 cell-index = <1>;
226 compatible = "fsl_spi"; 242 compatible = "fsl,spi";
227 reg = <500 40>; 243 reg = <0x500 0x40>;
228 interrupts = <1>; 244 interrupts = <1>;
229 interrupt-parent = < &qeic >; 245 interrupt-parent = <&qeic>;
230 mode = "cpu"; 246 mode = "cpu";
231 }; 247 };
232 248
233 usb@6c0 { 249 usb@6c0 {
234 device_type = "usb";
235 compatible = "qe_udc"; 250 compatible = "qe_udc";
236 reg = <6c0 40 8B00 100>; 251 reg = <0x6c0 0x40 0x8b00 0x100>;
237 interrupts = <b>; 252 interrupts = <11>;
238 interrupt-parent = < &qeic >; 253 interrupt-parent = <&qeic>;
239 mode = "slave"; 254 mode = "slave";
240 }; 255 };
241 256
242 ucc@2000 { 257 enet0: ucc@2000 {
243 device_type = "network"; 258 device_type = "network";
244 compatible = "ucc_geth"; 259 compatible = "ucc_geth";
245 model = "UCC"; 260 model = "UCC";
261 cell-index = <1>;
246 device-id = <1>; 262 device-id = <1>;
247 reg = <2000 200>; 263 reg = <0x2000 0x200>;
248 interrupts = <20>; 264 interrupts = <32>;
249 interrupt-parent = < &qeic >; 265 interrupt-parent = <&qeic>;
250 /*
251 * mac-address is deprecated and will be removed
252 * in 2.6.25. Only recent versions of
253 * U-Boot support local-mac-address, however.
254 */
255 mac-address = [ 00 00 00 00 00 00 ];
256 local-mac-address = [ 00 00 00 00 00 00 ]; 266 local-mac-address = [ 00 00 00 00 00 00 ];
257 rx-clock = <0>; 267 rx-clock-name = "none";
258 tx-clock = <19>; 268 tx-clock-name = "clk9";
259 phy-handle = < &phy0 >; 269 phy-handle = <&phy0>;
260 phy-connection-type = "rgmii-id"; 270 phy-connection-type = "rgmii-id";
261 pio-handle = < &pio1 >; 271 pio-handle = <&pio1>;
262 }; 272 };
263 273
264 ucc@3000 { 274 enet1: ucc@3000 {
265 device_type = "network"; 275 device_type = "network";
266 compatible = "ucc_geth"; 276 compatible = "ucc_geth";
267 model = "UCC"; 277 model = "UCC";
278 cell-index = <2>;
268 device-id = <2>; 279 device-id = <2>;
269 reg = <3000 200>; 280 reg = <0x3000 0x200>;
270 interrupts = <21>; 281 interrupts = <33>;
271 interrupt-parent = < &qeic >; 282 interrupt-parent = <&qeic>;
272 /*
273 * mac-address is deprecated and will be removed
274 * in 2.6.25. Only recent versions of
275 * U-Boot support local-mac-address, however.
276 */
277 mac-address = [ 00 00 00 00 00 00 ];
278 local-mac-address = [ 00 00 00 00 00 00 ]; 283 local-mac-address = [ 00 00 00 00 00 00 ];
279 rx-clock = <0>; 284 rx-clock-name = "none";
280 tx-clock = <14>; 285 tx-clock-name = "clk4";
281 phy-handle = < &phy1 >; 286 phy-handle = <&phy1>;
282 phy-connection-type = "rgmii-id"; 287 phy-connection-type = "rgmii-id";
283 pio-handle = < &pio2 >; 288 pio-handle = <&pio2>;
284 }; 289 };
285 290
286 mdio@2120 { 291 mdio@2120 {
287 #address-cells = <1>; 292 #address-cells = <1>;
288 #size-cells = <0>; 293 #size-cells = <0>;
289 reg = <2120 18>; 294 reg = <0x2120 0x18>;
290 device_type = "mdio"; 295 compatible = "fsl,ucc-mdio";
291 compatible = "ucc_geth_phy";
292 296
293 phy0: ethernet-phy@00 { 297 phy0: ethernet-phy@00 {
294 interrupt-parent = < &ipic >; 298 interrupt-parent = <&ipic>;
295 interrupts = <11 8>; 299 interrupts = <17 0x8>;
296 reg = <0>; 300 reg = <0x0>;
297 device_type = "ethernet-phy"; 301 device_type = "ethernet-phy";
298 }; 302 };
299 phy1: ethernet-phy@01 { 303 phy1: ethernet-phy@01 {
300 interrupt-parent = < &ipic >; 304 interrupt-parent = <&ipic>;
301 interrupts = <12 8>; 305 interrupts = <18 0x8>;
302 reg = <1>; 306 reg = <0x1>;
303 device_type = "ethernet-phy"; 307 device_type = "ethernet-phy";
304 }; 308 };
305 }; 309 };
306 310
307 qeic: qeic@80 { 311 qeic: interrupt-controller@80 {
308 interrupt-controller; 312 interrupt-controller;
309 device_type = "qeic"; 313 compatible = "fsl,qe-ic";
310 #address-cells = <0>; 314 #address-cells = <0>;
311 #interrupt-cells = <1>; 315 #interrupt-cells = <1>;
312 reg = <80 80>; 316 reg = <0x80 0x80>;
313 big-endian; 317 big-endian;
314 interrupts = <20 8 21 8>; //high:32 low:33 318 interrupts = <32 0x8 33 0x8>; // high:32 low:33
315 interrupt-parent = < &ipic >; 319 interrupt-parent = <&ipic>;
316 }; 320 };
317 }; 321 };
318 322
319 pci@e0008500 { 323 pci0: pci@e0008500 {
320 interrupt-map-mask = <f800 0 0 7>; 324 cell-index = <1>;
325 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
321 interrupt-map = < 326 interrupt-map = <
322 327
323 /* IDSEL 0x11 AD17 */ 328 /* IDSEL 0x11 AD17 */
324 8800 0 0 1 &ipic 14 8 329 0x8800 0x0 0x0 0x1 &ipic 20 0x8
325 8800 0 0 2 &ipic 15 8 330 0x8800 0x0 0x0 0x2 &ipic 21 0x8
326 8800 0 0 3 &ipic 16 8 331 0x8800 0x0 0x0 0x3 &ipic 22 0x8
327 8800 0 0 4 &ipic 17 8 332 0x8800 0x0 0x0 0x4 &ipic 23 0x8
328 333
329 /* IDSEL 0x12 AD18 */ 334 /* IDSEL 0x12 AD18 */
330 9000 0 0 1 &ipic 16 8 335 0x9000 0x0 0x0 0x1 &ipic 22 0x8
331 9000 0 0 2 &ipic 17 8 336 0x9000 0x0 0x0 0x2 &ipic 23 0x8
332 9000 0 0 3 &ipic 14 8 337 0x9000 0x0 0x0 0x3 &ipic 20 0x8
333 9000 0 0 4 &ipic 15 8 338 0x9000 0x0 0x0 0x4 &ipic 21 0x8
334 339
335 /* IDSEL 0x13 AD19 */ 340 /* IDSEL 0x13 AD19 */
336 9800 0 0 1 &ipic 17 8 341 0x9800 0x0 0x0 0x1 &ipic 23 0x8
337 9800 0 0 2 &ipic 14 8 342 0x9800 0x0 0x0 0x2 &ipic 20 0x8
338 9800 0 0 3 &ipic 15 8 343 0x9800 0x0 0x0 0x3 &ipic 21 0x8
339 9800 0 0 4 &ipic 16 8 344 0x9800 0x0 0x0 0x4 &ipic 22 0x8
340 345
341 /* IDSEL 0x15 AD21*/ 346 /* IDSEL 0x15 AD21*/
342 a800 0 0 1 &ipic 14 8 347 0xa800 0x0 0x0 0x1 &ipic 20 0x8
343 a800 0 0 2 &ipic 15 8 348 0xa800 0x0 0x0 0x2 &ipic 21 0x8
344 a800 0 0 3 &ipic 16 8 349 0xa800 0x0 0x0 0x3 &ipic 22 0x8
345 a800 0 0 4 &ipic 17 8 350 0xa800 0x0 0x0 0x4 &ipic 23 0x8
346 351
347 /* IDSEL 0x16 AD22*/ 352 /* IDSEL 0x16 AD22*/
348 b000 0 0 1 &ipic 17 8 353 0xb000 0x0 0x0 0x1 &ipic 23 0x8
349 b000 0 0 2 &ipic 14 8 354 0xb000 0x0 0x0 0x2 &ipic 20 0x8
350 b000 0 0 3 &ipic 15 8 355 0xb000 0x0 0x0 0x3 &ipic 21 0x8
351 b000 0 0 4 &ipic 16 8 356 0xb000 0x0 0x0 0x4 &ipic 22 0x8
352 357
353 /* IDSEL 0x17 AD23*/ 358 /* IDSEL 0x17 AD23*/
354 b800 0 0 1 &ipic 16 8 359 0xb800 0x0 0x0 0x1 &ipic 22 0x8
355 b800 0 0 2 &ipic 17 8 360 0xb800 0x0 0x0 0x2 &ipic 23 0x8
356 b800 0 0 3 &ipic 14 8 361 0xb800 0x0 0x0 0x3 &ipic 20 0x8
357 b800 0 0 4 &ipic 15 8 362 0xb800 0x0 0x0 0x4 &ipic 21 0x8
358 363
359 /* IDSEL 0x18 AD24*/ 364 /* IDSEL 0x18 AD24*/
360 c000 0 0 1 &ipic 15 8 365 0xc000 0x0 0x0 0x1 &ipic 21 0x8
361 c000 0 0 2 &ipic 16 8 366 0xc000 0x0 0x0 0x2 &ipic 22 0x8
362 c000 0 0 3 &ipic 17 8 367 0xc000 0x0 0x0 0x3 &ipic 23 0x8
363 c000 0 0 4 &ipic 14 8>; 368 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
364 interrupt-parent = < &ipic >; 369 interrupt-parent = <&ipic>;
365 interrupts = <42 8>; 370 interrupts = <66 0x8>;
366 bus-range = <0 0>; 371 bus-range = <0 0>;
367 ranges = <02000000 0 a0000000 a0000000 0 10000000 372 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
368 42000000 0 80000000 80000000 0 10000000 373 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
369 01000000 0 00000000 e2000000 0 00100000>; 374 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
370 clock-frequency = <3f940aa>; 375 clock-frequency = <66666666>;
371 #interrupt-cells = <1>; 376 #interrupt-cells = <1>;
372 #size-cells = <2>; 377 #size-cells = <2>;
373 #address-cells = <3>; 378 #address-cells = <3>;
374 reg = <e0008500 100>; 379 reg = <0xe0008500 0x100>;
375 compatible = "fsl,mpc8349-pci"; 380 compatible = "fsl,mpc8349-pci";
376 device_type = "pci"; 381 device_type = "pci";
377 }; 382 };
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
new file mode 100644
index 000000000000..a3637fff73cc
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -0,0 +1,280 @@
1/*
2 * MPC8377E MDS Device Tree Source
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "fsl,mpc8377emds";
16 compatible = "fsl,mpc8377emds","fsl,mpc837xmds";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
27
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 PowerPC,8377@0 {
33 device_type = "cpu";
34 reg = <0x0>;
35 d-cache-line-size = <32>;
36 i-cache-line-size = <32>;
37 d-cache-size = <32768>;
38 i-cache-size = <32768>;
39 timebase-frequency = <0>;
40 bus-frequency = <0>;
41 clock-frequency = <0>;
42 };
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0x00000000 0x20000000>; // 512MB at 0
48 };
49
50 soc@e0000000 {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 device_type = "soc";
54 ranges = <0x0 0xe0000000 0x00100000>;
55 reg = <0xe0000000 0x00000200>;
56 bus-frequency = <0>;
57
58 wdt@200 {
59 compatible = "mpc83xx_wdt";
60 reg = <0x200 0x100>;
61 };
62
63 i2c@3000 {
64 #address-cells = <1>;
65 #size-cells = <0>;
66 cell-index = <0>;
67 compatible = "fsl-i2c";
68 reg = <0x3000 0x100>;
69 interrupts = <14 0x8>;
70 interrupt-parent = <&ipic>;
71 dfsrr;
72 };
73
74 i2c@3100 {
75 #address-cells = <1>;
76 #size-cells = <0>;
77 cell-index = <1>;
78 compatible = "fsl-i2c";
79 reg = <0x3100 0x100>;
80 interrupts = <15 0x8>;
81 interrupt-parent = <&ipic>;
82 dfsrr;
83 };
84
85 spi@7000 {
86 cell-index = <0>;
87 compatible = "fsl,spi";
88 reg = <0x7000 0x1000>;
89 interrupts = <16 0x8>;
90 interrupt-parent = <&ipic>;
91 mode = "cpu";
92 };
93
94 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
95 usb@23000 {
96 compatible = "fsl-usb2-dr";
97 reg = <0x23000 0x1000>;
98 #address-cells = <1>;
99 #size-cells = <0>;
100 interrupt-parent = <&ipic>;
101 interrupts = <38 0x8>;
102 phy_type = "utmi_wide";
103 };
104
105 mdio@24520 {
106 #address-cells = <1>;
107 #size-cells = <0>;
108 compatible = "fsl,gianfar-mdio";
109 reg = <0x24520 0x20>;
110 phy2: ethernet-phy@2 {
111 interrupt-parent = <&ipic>;
112 interrupts = <17 0x8>;
113 reg = <0x2>;
114 device_type = "ethernet-phy";
115 };
116 phy3: ethernet-phy@3 {
117 interrupt-parent = <&ipic>;
118 interrupts = <18 0x8>;
119 reg = <0x3>;
120 device_type = "ethernet-phy";
121 };
122 };
123
124 enet0: ethernet@24000 {
125 cell-index = <0>;
126 device_type = "network";
127 model = "eTSEC";
128 compatible = "gianfar";
129 reg = <0x24000 0x1000>;
130 local-mac-address = [ 00 00 00 00 00 00 ];
131 interrupts = <32 0x8 33 0x8 34 0x8>;
132 phy-connection-type = "mii";
133 interrupt-parent = <&ipic>;
134 phy-handle = <&phy2>;
135 };
136
137 enet1: ethernet@25000 {
138 cell-index = <1>;
139 device_type = "network";
140 model = "eTSEC";
141 compatible = "gianfar";
142 reg = <0x25000 0x1000>;
143 local-mac-address = [ 00 00 00 00 00 00 ];
144 interrupts = <35 0x8 36 0x8 37 0x8>;
145 phy-connection-type = "mii";
146 interrupt-parent = <&ipic>;
147 phy-handle = <&phy3>;
148 };
149
150 serial0: serial@4500 {
151 cell-index = <0>;
152 device_type = "serial";
153 compatible = "ns16550";
154 reg = <0x4500 0x100>;
155 clock-frequency = <0>;
156 interrupts = <9 0x8>;
157 interrupt-parent = <&ipic>;
158 };
159
160 serial1: serial@4600 {
161 cell-index = <1>;
162 device_type = "serial";
163 compatible = "ns16550";
164 reg = <0x4600 0x100>;
165 clock-frequency = <0>;
166 interrupts = <10 0x8>;
167 interrupt-parent = <&ipic>;
168 };
169
170 crypto@30000 {
171 model = "SEC3";
172 compatible = "talitos";
173 reg = <0x30000 0x10000>;
174 interrupts = <11 0x8>;
175 interrupt-parent = <&ipic>;
176 /* Rev. 3.0 geometry */
177 num-channels = <4>;
178 channel-fifo-len = <24>;
179 exec-units-mask = <0x000001fe>;
180 descriptor-types-mask = <0x03ab0ebf>;
181 };
182
183 sdhc@2e000 {
184 model = "eSDHC";
185 compatible = "fsl,esdhc";
186 reg = <0x2e000 0x1000>;
187 interrupts = <42 0x8>;
188 interrupt-parent = <&ipic>;
189 };
190
191 sata@18000 {
192 compatible = "fsl,mpc8379-sata";
193 reg = <0x18000 0x1000>;
194 interrupts = <44 0x8>;
195 interrupt-parent = <&ipic>;
196 };
197
198 sata@19000 {
199 compatible = "fsl,mpc8379-sata";
200 reg = <0x19000 0x1000>;
201 interrupts = <45 0x8>;
202 interrupt-parent = <&ipic>;
203 };
204
205 /* IPIC
206 * interrupts cell = <intr #, sense>
207 * sense values match linux IORESOURCE_IRQ_* defines:
208 * sense == 8: Level, low assertion
209 * sense == 2: Edge, high-to-low change
210 */
211 ipic: pic@700 {
212 compatible = "fsl,ipic";
213 interrupt-controller;
214 #address-cells = <0>;
215 #interrupt-cells = <2>;
216 reg = <0x700 0x100>;
217 };
218 };
219
220 pci0: pci@e0008500 {
221 cell-index = <0>;
222 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
223 interrupt-map = <
224
225 /* IDSEL 0x11 */
226 0x8800 0x0 0x0 0x1 &ipic 20 0x8
227 0x8800 0x0 0x0 0x2 &ipic 21 0x8
228 0x8800 0x0 0x0 0x3 &ipic 22 0x8
229 0x8800 0x0 0x0 0x4 &ipic 23 0x8
230
231 /* IDSEL 0x12 */
232 0x9000 0x0 0x0 0x1 &ipic 22 0x8
233 0x9000 0x0 0x0 0x2 &ipic 23 0x8
234 0x9000 0x0 0x0 0x3 &ipic 20 0x8
235 0x9000 0x0 0x0 0x4 &ipic 21 0x8
236
237 /* IDSEL 0x13 */
238 0x9800 0x0 0x0 0x1 &ipic 23 0x8
239 0x9800 0x0 0x0 0x2 &ipic 20 0x8
240 0x9800 0x0 0x0 0x3 &ipic 21 0x8
241 0x9800 0x0 0x0 0x4 &ipic 22 0x8
242
243 /* IDSEL 0x15 */
244 0xa800 0x0 0x0 0x1 &ipic 20 0x8
245 0xa800 0x0 0x0 0x2 &ipic 21 0x8
246 0xa800 0x0 0x0 0x3 &ipic 22 0x8
247 0xa800 0x0 0x0 0x4 &ipic 23 0x8
248
249 /* IDSEL 0x16 */
250 0xb000 0x0 0x0 0x1 &ipic 23 0x8
251 0xb000 0x0 0x0 0x2 &ipic 20 0x8
252 0xb000 0x0 0x0 0x3 &ipic 21 0x8
253 0xb000 0x0 0x0 0x4 &ipic 22 0x8
254
255 /* IDSEL 0x17 */
256 0xb800 0x0 0x0 0x1 &ipic 22 0x8
257 0xb800 0x0 0x0 0x2 &ipic 23 0x8
258 0xb800 0x0 0x0 0x3 &ipic 20 0x8
259 0xb800 0x0 0x0 0x4 &ipic 21 0x8
260
261 /* IDSEL 0x18 */
262 0xc000 0x0 0x0 0x1 &ipic 21 0x8
263 0xc000 0x0 0x0 0x2 &ipic 22 0x8
264 0xc000 0x0 0x0 0x3 &ipic 23 0x8
265 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
266 interrupt-parent = <&ipic>;
267 interrupts = <66 0x8>;
268 bus-range = <0x0 0x0>;
269 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
270 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
271 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
272 clock-frequency = <0>;
273 #interrupt-cells = <1>;
274 #size-cells = <2>;
275 #address-cells = <3>;
276 reg = <0xe0008500 0x100>;
277 compatible = "fsl,mpc8349-pci";
278 device_type = "pci";
279 };
280};
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
new file mode 100644
index 000000000000..440aa4dfab0c
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -0,0 +1,296 @@
1/*
2 * MPC8377E RDB Device Tree Source
3 *
4 * Copyright 2007, 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 compatible = "fsl,mpc8377rdb";
16 #address-cells = <1>;
17 #size-cells = <1>;
18
19 aliases {
20 ethernet0 = &enet0;
21 ethernet1 = &enet1;
22 serial0 = &serial0;
23 serial1 = &serial1;
24 pci0 = &pci0;
25 };
26
27 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30
31 PowerPC,8377@0 {
32 device_type = "cpu";
33 reg = <0x0>;
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>;
37 i-cache-size = <32768>;
38 timebase-frequency = <0>;
39 bus-frequency = <0>;
40 clock-frequency = <0>;
41 };
42 };
43
44 memory {
45 device_type = "memory";
46 reg = <0x00000000 0x10000000>; // 256MB at 0
47 };
48
49 localbus@e0005000 {
50 #address-cells = <2>;
51 #size-cells = <1>;
52 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
53 reg = <0xe0005000 0x1000>;
54 interrupts = <77 0x8>;
55 interrupt-parent = <&ipic>;
56
57 // CS0 and CS1 are swapped when
58 // booting from nand, but the
59 // addresses are the same.
60 ranges = <0x0 0x0 0xfe000000 0x00800000
61 0x1 0x0 0xe0600000 0x00008000
62 0x2 0x0 0xf0000000 0x00020000
63 0x3 0x0 0xfa000000 0x00008000>;
64
65 flash@0,0 {
66 #address-cells = <1>;
67 #size-cells = <1>;
68 compatible = "cfi-flash";
69 reg = <0x0 0x0 0x800000>;
70 bank-width = <2>;
71 device-width = <1>;
72 };
73
74 nand@1,0 {
75 #address-cells = <1>;
76 #size-cells = <1>;
77 compatible = "fsl,mpc8377-fcm-nand",
78 "fsl,elbc-fcm-nand";
79 reg = <0x1 0x0 0x8000>;
80
81 u-boot@0 {
82 reg = <0x0 0x100000>;
83 read-only;
84 };
85
86 kernel@100000 {
87 reg = <0x100000 0x300000>;
88 };
89 fs@400000 {
90 reg = <0x400000 0x1c00000>;
91 };
92 };
93 };
94
95 immr@e0000000 {
96 #address-cells = <1>;
97 #size-cells = <1>;
98 device_type = "soc";
99 compatible = "simple-bus";
100 ranges = <0x0 0xe0000000 0x00100000>;
101 reg = <0xe0000000 0x00000200>;
102 bus-frequency = <0>;
103
104 wdt@200 {
105 device_type = "watchdog";
106 compatible = "mpc83xx_wdt";
107 reg = <0x200 0x100>;
108 };
109
110 i2c@3000 {
111 #address-cells = <1>;
112 #size-cells = <0>;
113 cell-index = <0>;
114 compatible = "fsl-i2c";
115 reg = <0x3000 0x100>;
116 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>;
118 dfsrr;
119 rtc@68 {
120 device_type = "rtc";
121 compatible = "dallas,ds1339";
122 reg = <0x68>;
123 };
124 };
125
126 i2c@3100 {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 cell-index = <1>;
130 compatible = "fsl-i2c";
131 reg = <0x3100 0x100>;
132 interrupts = <15 0x8>;
133 interrupt-parent = <&ipic>;
134 dfsrr;
135 };
136
137 spi@7000 {
138 cell-index = <0>;
139 compatible = "fsl,spi";
140 reg = <0x7000 0x1000>;
141 interrupts = <16 0x8>;
142 interrupt-parent = <&ipic>;
143 mode = "cpu";
144 };
145
146 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
147 usb@23000 {
148 compatible = "fsl-usb2-dr";
149 reg = <0x23000 0x1000>;
150 #address-cells = <1>;
151 #size-cells = <0>;
152 interrupt-parent = <&ipic>;
153 interrupts = <38 0x8>;
154 phy_type = "utmi";
155 };
156
157 mdio@24520 {
158 #address-cells = <1>;
159 #size-cells = <0>;
160 compatible = "fsl,gianfar-mdio";
161 reg = <0x24520 0x20>;
162 phy2: ethernet-phy@2 {
163 interrupt-parent = <&ipic>;
164 interrupts = <17 0x8>;
165 reg = <0x2>;
166 device_type = "ethernet-phy";
167 };
168 phy3: ethernet-phy@3 {
169 interrupt-parent = <&ipic>;
170 interrupts = <18 0x8>;
171 reg = <0x3>;
172 device_type = "ethernet-phy";
173 };
174 };
175
176 enet0: ethernet@24000 {
177 cell-index = <0>;
178 device_type = "network";
179 model = "eTSEC";
180 compatible = "gianfar";
181 reg = <0x24000 0x1000>;
182 local-mac-address = [ 00 00 00 00 00 00 ];
183 interrupts = <32 0x8 33 0x8 34 0x8>;
184 phy-connection-type = "mii";
185 interrupt-parent = <&ipic>;
186 phy-handle = <&phy2>;
187 };
188
189 enet1: ethernet@25000 {
190 cell-index = <1>;
191 device_type = "network";
192 model = "eTSEC";
193 compatible = "gianfar";
194 reg = <0x25000 0x1000>;
195 local-mac-address = [ 00 00 00 00 00 00 ];
196 interrupts = <35 0x8 36 0x8 37 0x8>;
197 phy-connection-type = "mii";
198 interrupt-parent = <&ipic>;
199 phy-handle = <&phy3>;
200 };
201
202 serial0: serial@4500 {
203 cell-index = <0>;
204 device_type = "serial";
205 compatible = "ns16550";
206 reg = <0x4500 0x100>;
207 clock-frequency = <0>;
208 interrupts = <9 0x8>;
209 interrupt-parent = <&ipic>;
210 };
211
212 serial1: serial@4600 {
213 cell-index = <1>;
214 device_type = "serial";
215 compatible = "ns16550";
216 reg = <0x4600 0x100>;
217 clock-frequency = <0>;
218 interrupts = <10 0x8>;
219 interrupt-parent = <&ipic>;
220 };
221
222 crypto@30000 {
223 model = "SEC3";
224 device_type = "crypto";
225 compatible = "talitos";
226 reg = <0x30000 0x10000>;
227 interrupts = <11 0x8>;
228 interrupt-parent = <&ipic>;
229 /* Rev. 3.0 geometry */
230 num-channels = <4>;
231 channel-fifo-len = <24>;
232 exec-units-mask = <0x000001fe>;
233 descriptor-types-mask = <0x03ab0ebf>;
234 };
235
236 sata@18000 {
237 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
238 reg = <0x18000 0x1000>;
239 interrupts = <44 0x8>;
240 interrupt-parent = <&ipic>;
241 };
242
243 sata@19000 {
244 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
245 reg = <0x19000 0x1000>;
246 interrupts = <45 0x8>;
247 interrupt-parent = <&ipic>;
248 };
249
250 /* IPIC
251 * interrupts cell = <intr #, sense>
252 * sense values match linux IORESOURCE_IRQ_* defines:
253 * sense == 8: Level, low assertion
254 * sense == 2: Edge, high-to-low change
255 */
256 ipic: interrupt-controller@700 {
257 compatible = "fsl,ipic";
258 interrupt-controller;
259 #address-cells = <0>;
260 #interrupt-cells = <2>;
261 reg = <0x700 0x100>;
262 };
263 };
264
265 pci0: pci@e0008500 {
266 interrupt-map-mask = <0xf800 0 0 7>;
267 interrupt-map = <
268 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
269
270 /* IDSEL AD14 IRQ6 inta */
271 0x7000 0x0 0x0 0x1 &ipic 22 0x8
272
273 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
274 0x7800 0x0 0x0 0x1 &ipic 21 0x8
275 0x7800 0x0 0x0 0x2 &ipic 22 0x8
276 0x7800 0x0 0x0 0x4 &ipic 23 0x8
277
278 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
279 0xE000 0x0 0x0 0x1 &ipic 23 0x8
280 0xE000 0x0 0x0 0x2 &ipic 21 0x8
281 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
282 interrupt-parent = <&ipic>;
283 interrupts = <66 0x8>;
284 bus-range = <0 0>;
285 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
286 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
287 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
288 clock-frequency = <66666666>;
289 #interrupt-cells = <1>;
290 #size-cells = <2>;
291 #address-cells = <3>;
292 reg = <0xe0008500 0x100>;
293 compatible = "fsl,mpc8349-pci";
294 device_type = "pci";
295 };
296};
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
new file mode 100644
index 000000000000..533e9b06cc8f
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -0,0 +1,266 @@
1/*
2 * MPC8378E MDS Device Tree Source
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "fsl,mpc8378emds";
16 compatible = "fsl,mpc8378emds","fsl,mpc837xmds";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
27
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 PowerPC,8378@0 {
33 device_type = "cpu";
34 reg = <0x0>;
35 d-cache-line-size = <32>;
36 i-cache-line-size = <32>;
37 d-cache-size = <32768>;
38 i-cache-size = <32768>;
39 timebase-frequency = <0>;
40 bus-frequency = <0>;
41 clock-frequency = <0>;
42 };
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0x00000000 0x20000000>; // 512MB at 0
48 };
49
50 soc@e0000000 {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 device_type = "soc";
54 ranges = <0x0 0xe0000000 0x00100000>;
55 reg = <0xe0000000 0x00000200>;
56 bus-frequency = <0>;
57
58 wdt@200 {
59 compatible = "mpc83xx_wdt";
60 reg = <0x200 0x100>;
61 };
62
63 i2c@3000 {
64 #address-cells = <1>;
65 #size-cells = <0>;
66 cell-index = <0>;
67 compatible = "fsl-i2c";
68 reg = <0x3000 0x100>;
69 interrupts = <14 0x8>;
70 interrupt-parent = <&ipic>;
71 dfsrr;
72 };
73
74 i2c@3100 {
75 #address-cells = <1>;
76 #size-cells = <0>;
77 cell-index = <1>;
78 compatible = "fsl-i2c";
79 reg = <0x3100 0x100>;
80 interrupts = <15 0x8>;
81 interrupt-parent = <&ipic>;
82 dfsrr;
83 };
84
85 spi@7000 {
86 cell-index = <0>;
87 compatible = "fsl,spi";
88 reg = <0x7000 0x1000>;
89 interrupts = <16 0x8>;
90 interrupt-parent = <&ipic>;
91 mode = "cpu";
92 };
93
94 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
95 usb@23000 {
96 compatible = "fsl-usb2-dr";
97 reg = <0x23000 0x1000>;
98 #address-cells = <1>;
99 #size-cells = <0>;
100 interrupt-parent = <&ipic>;
101 interrupts = <38 0x8>;
102 phy_type = "utmi_wide";
103 };
104
105 mdio@24520 {
106 #address-cells = <1>;
107 #size-cells = <0>;
108 compatible = "fsl,gianfar-mdio";
109 reg = <0x24520 0x20>;
110 phy2: ethernet-phy@2 {
111 interrupt-parent = <&ipic>;
112 interrupts = <17 0x8>;
113 reg = <0x2>;
114 device_type = "ethernet-phy";
115 };
116 phy3: ethernet-phy@3 {
117 interrupt-parent = <&ipic>;
118 interrupts = <18 0x8>;
119 reg = <0x3>;
120 device_type = "ethernet-phy";
121 };
122 };
123
124 enet0: ethernet@24000 {
125 cell-index = <0>;
126 device_type = "network";
127 model = "eTSEC";
128 compatible = "gianfar";
129 reg = <0x24000 0x1000>;
130 local-mac-address = [ 00 00 00 00 00 00 ];
131 interrupts = <32 0x8 33 0x8 34 0x8>;
132 phy-connection-type = "mii";
133 interrupt-parent = <&ipic>;
134 phy-handle = <&phy2>;
135 };
136
137 enet1: ethernet@25000 {
138 cell-index = <1>;
139 device_type = "network";
140 model = "eTSEC";
141 compatible = "gianfar";
142 reg = <0x25000 0x1000>;
143 local-mac-address = [ 00 00 00 00 00 00 ];
144 interrupts = <35 0x8 36 0x8 37 0x8>;
145 phy-connection-type = "mii";
146 interrupt-parent = <&ipic>;
147 phy-handle = <&phy3>;
148 };
149
150 serial0: serial@4500 {
151 cell-index = <0>;
152 device_type = "serial";
153 compatible = "ns16550";
154 reg = <0x4500 0x100>;
155 clock-frequency = <0>;
156 interrupts = <9 0x8>;
157 interrupt-parent = <&ipic>;
158 };
159
160 serial1: serial@4600 {
161 cell-index = <1>;
162 device_type = "serial";
163 compatible = "ns16550";
164 reg = <0x4600 0x100>;
165 clock-frequency = <0>;
166 interrupts = <10 0x8>;
167 interrupt-parent = <&ipic>;
168 };
169
170 crypto@30000 {
171 model = "SEC3";
172 compatible = "talitos";
173 reg = <0x30000 0x10000>;
174 interrupts = <11 0x8>;
175 interrupt-parent = <&ipic>;
176 /* Rev. 3.0 geometry */
177 num-channels = <4>;
178 channel-fifo-len = <24>;
179 exec-units-mask = <0x000001fe>;
180 descriptor-types-mask = <0x03ab0ebf>;
181 };
182
183 sdhc@2e000 {
184 model = "eSDHC";
185 compatible = "fsl,esdhc";
186 reg = <0x2e000 0x1000>;
187 interrupts = <42 0x8>;
188 interrupt-parent = <&ipic>;
189 };
190
191 /* IPIC
192 * interrupts cell = <intr #, sense>
193 * sense values match linux IORESOURCE_IRQ_* defines:
194 * sense == 8: Level, low assertion
195 * sense == 2: Edge, high-to-low change
196 */
197 ipic: pic@700 {
198 compatible = "fsl,ipic";
199 interrupt-controller;
200 #address-cells = <0>;
201 #interrupt-cells = <2>;
202 reg = <0x700 0x100>;
203 };
204 };
205
206 pci0: pci@e0008500 {
207 cell-index = <0>;
208 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
209 interrupt-map = <
210
211 /* IDSEL 0x11 */
212 0x8800 0x0 0x0 0x1 &ipic 20 0x8
213 0x8800 0x0 0x0 0x2 &ipic 21 0x8
214 0x8800 0x0 0x0 0x3 &ipic 22 0x8
215 0x8800 0x0 0x0 0x4 &ipic 23 0x8
216
217 /* IDSEL 0x12 */
218 0x9000 0x0 0x0 0x1 &ipic 22 0x8
219 0x9000 0x0 0x0 0x2 &ipic 23 0x8
220 0x9000 0x0 0x0 0x3 &ipic 20 0x8
221 0x9000 0x0 0x0 0x4 &ipic 21 0x8
222
223 /* IDSEL 0x13 */
224 0x9800 0x0 0x0 0x1 &ipic 23 0x8
225 0x9800 0x0 0x0 0x2 &ipic 20 0x8
226 0x9800 0x0 0x0 0x3 &ipic 21 0x8
227 0x9800 0x0 0x0 0x4 &ipic 22 0x8
228
229 /* IDSEL 0x15 */
230 0xa800 0x0 0x0 0x1 &ipic 20 0x8
231 0xa800 0x0 0x0 0x2 &ipic 21 0x8
232 0xa800 0x0 0x0 0x3 &ipic 22 0x8
233 0xa800 0x0 0x0 0x4 &ipic 23 0x8
234
235 /* IDSEL 0x16 */
236 0xb000 0x0 0x0 0x1 &ipic 23 0x8
237 0xb000 0x0 0x0 0x2 &ipic 20 0x8
238 0xb000 0x0 0x0 0x3 &ipic 21 0x8
239 0xb000 0x0 0x0 0x4 &ipic 22 0x8
240
241 /* IDSEL 0x17 */
242 0xb800 0x0 0x0 0x1 &ipic 22 0x8
243 0xb800 0x0 0x0 0x2 &ipic 23 0x8
244 0xb800 0x0 0x0 0x3 &ipic 20 0x8
245 0xb800 0x0 0x0 0x4 &ipic 21 0x8
246
247 /* IDSEL 0x18 */
248 0xc000 0x0 0x0 0x1 &ipic 21 0x8
249 0xc000 0x0 0x0 0x2 &ipic 22 0x8
250 0xc000 0x0 0x0 0x3 &ipic 23 0x8
251 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
252 interrupt-parent = <&ipic>;
253 interrupts = <66 0x8>;
254 bus-range = <0x0 0x0>;
255 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
256 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
257 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
258 clock-frequency = <0>;
259 #interrupt-cells = <1>;
260 #size-cells = <2>;
261 #address-cells = <3>;
262 reg = <0xe0008500 0x100>;
263 compatible = "fsl,mpc8349-pci";
264 device_type = "pci";
265 };
266};
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
new file mode 100644
index 000000000000..92711534b179
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -0,0 +1,282 @@
1/*
2 * MPC8378E RDB Device Tree Source
3 *
4 * Copyright 2007, 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 compatible = "fsl,mpc8378rdb";
16 #address-cells = <1>;
17 #size-cells = <1>;
18
19 aliases {
20 ethernet0 = &enet0;
21 ethernet1 = &enet1;
22 serial0 = &serial0;
23 serial1 = &serial1;
24 pci0 = &pci0;
25 };
26
27 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30
31 PowerPC,8378@0 {
32 device_type = "cpu";
33 reg = <0x0>;
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>;
37 i-cache-size = <32768>;
38 timebase-frequency = <0>;
39 bus-frequency = <0>;
40 clock-frequency = <0>;
41 };
42 };
43
44 memory {
45 device_type = "memory";
46 reg = <0x00000000 0x10000000>; // 256MB at 0
47 };
48
49 localbus@e0005000 {
50 #address-cells = <2>;
51 #size-cells = <1>;
52 compatible = "fsl,mpc8378-elbc", "fsl,elbc", "simple-bus";
53 reg = <0xe0005000 0x1000>;
54 interrupts = <77 0x8>;
55 interrupt-parent = <&ipic>;
56
57 // CS0 and CS1 are swapped when
58 // booting from nand, but the
59 // addresses are the same.
60 ranges = <0x0 0x0 0xfe000000 0x00800000
61 0x1 0x0 0xe0600000 0x00008000
62 0x2 0x0 0xf0000000 0x00020000
63 0x3 0x0 0xfa000000 0x00008000>;
64
65 flash@0,0 {
66 #address-cells = <1>;
67 #size-cells = <1>;
68 compatible = "cfi-flash";
69 reg = <0x0 0x0 0x800000>;
70 bank-width = <2>;
71 device-width = <1>;
72 };
73
74 nand@1,0 {
75 #address-cells = <1>;
76 #size-cells = <1>;
77 compatible = "fsl,mpc8378-fcm-nand",
78 "fsl,elbc-fcm-nand";
79 reg = <0x1 0x0 0x8000>;
80
81 u-boot@0 {
82 reg = <0x0 0x100000>;
83 read-only;
84 };
85
86 kernel@100000 {
87 reg = <0x100000 0x300000>;
88 };
89 fs@400000 {
90 reg = <0x400000 0x1c00000>;
91 };
92 };
93 };
94
95 immr@e0000000 {
96 #address-cells = <1>;
97 #size-cells = <1>;
98 device_type = "soc";
99 compatible = "simple-bus";
100 ranges = <0x0 0xe0000000 0x00100000>;
101 reg = <0xe0000000 0x00000200>;
102 bus-frequency = <0>;
103
104 wdt@200 {
105 device_type = "watchdog";
106 compatible = "mpc83xx_wdt";
107 reg = <0x200 0x100>;
108 };
109
110 i2c@3000 {
111 #address-cells = <1>;
112 #size-cells = <0>;
113 cell-index = <0>;
114 compatible = "fsl-i2c";
115 reg = <0x3000 0x100>;
116 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>;
118 dfsrr;
119 rtc@68 {
120 device_type = "rtc";
121 compatible = "dallas,ds1339";
122 reg = <0x68>;
123 };
124 };
125
126 i2c@3100 {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 cell-index = <1>;
130 compatible = "fsl-i2c";
131 reg = <0x3100 0x100>;
132 interrupts = <15 0x8>;
133 interrupt-parent = <&ipic>;
134 dfsrr;
135 };
136
137 spi@7000 {
138 cell-index = <0>;
139 compatible = "fsl,spi";
140 reg = <0x7000 0x1000>;
141 interrupts = <16 0x8>;
142 interrupt-parent = <&ipic>;
143 mode = "cpu";
144 };
145
146 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
147 usb@23000 {
148 compatible = "fsl-usb2-dr";
149 reg = <0x23000 0x1000>;
150 #address-cells = <1>;
151 #size-cells = <0>;
152 interrupt-parent = <&ipic>;
153 interrupts = <38 0x8>;
154 phy_type = "utmi";
155 };
156
157 mdio@24520 {
158 #address-cells = <1>;
159 #size-cells = <0>;
160 compatible = "fsl,gianfar-mdio";
161 reg = <0x24520 0x20>;
162 phy2: ethernet-phy@2 {
163 interrupt-parent = <&ipic>;
164 interrupts = <17 0x8>;
165 reg = <0x2>;
166 device_type = "ethernet-phy";
167 };
168 phy3: ethernet-phy@3 {
169 interrupt-parent = <&ipic>;
170 interrupts = <18 0x8>;
171 reg = <0x3>;
172 device_type = "ethernet-phy";
173 };
174 };
175
176 enet0: ethernet@24000 {
177 cell-index = <0>;
178 device_type = "network";
179 model = "eTSEC";
180 compatible = "gianfar";
181 reg = <0x24000 0x1000>;
182 local-mac-address = [ 00 00 00 00 00 00 ];
183 interrupts = <32 0x8 33 0x8 34 0x8>;
184 phy-connection-type = "mii";
185 interrupt-parent = <&ipic>;
186 phy-handle = <&phy2>;
187 };
188
189 enet1: ethernet@25000 {
190 cell-index = <1>;
191 device_type = "network";
192 model = "eTSEC";
193 compatible = "gianfar";
194 reg = <0x25000 0x1000>;
195 local-mac-address = [ 00 00 00 00 00 00 ];
196 interrupts = <35 0x8 36 0x8 37 0x8>;
197 phy-connection-type = "mii";
198 interrupt-parent = <&ipic>;
199 phy-handle = <&phy3>;
200 };
201
202 serial0: serial@4500 {
203 cell-index = <0>;
204 device_type = "serial";
205 compatible = "ns16550";
206 reg = <0x4500 0x100>;
207 clock-frequency = <0>;
208 interrupts = <9 0x8>;
209 interrupt-parent = <&ipic>;
210 };
211
212 serial1: serial@4600 {
213 cell-index = <1>;
214 device_type = "serial";
215 compatible = "ns16550";
216 reg = <0x4600 0x100>;
217 clock-frequency = <0>;
218 interrupts = <10 0x8>;
219 interrupt-parent = <&ipic>;
220 };
221
222 crypto@30000 {
223 model = "SEC3";
224 device_type = "crypto";
225 compatible = "talitos";
226 reg = <0x30000 0x10000>;
227 interrupts = <11 0x8>;
228 interrupt-parent = <&ipic>;
229 /* Rev. 3.0 geometry */
230 num-channels = <4>;
231 channel-fifo-len = <24>;
232 exec-units-mask = <0x000001fe>;
233 descriptor-types-mask = <0x03ab0ebf>;
234 };
235
236 /* IPIC
237 * interrupts cell = <intr #, sense>
238 * sense values match linux IORESOURCE_IRQ_* defines:
239 * sense == 8: Level, low assertion
240 * sense == 2: Edge, high-to-low change
241 */
242 ipic: interrupt-controller@700 {
243 compatible = "fsl,ipic";
244 interrupt-controller;
245 #address-cells = <0>;
246 #interrupt-cells = <2>;
247 reg = <0x700 0x100>;
248 };
249 };
250
251 pci0: pci@e0008500 {
252 interrupt-map-mask = <0xf800 0 0 7>;
253 interrupt-map = <
254 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
255
256 /* IDSEL AD14 IRQ6 inta */
257 0x7000 0x0 0x0 0x1 &ipic 22 0x8
258
259 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
260 0x7800 0x0 0x0 0x1 &ipic 21 0x8
261 0x7800 0x0 0x0 0x2 &ipic 22 0x8
262 0x7800 0x0 0x0 0x4 &ipic 23 0x8
263
264 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
265 0xE000 0x0 0x0 0x1 &ipic 23 0x8
266 0xE000 0x0 0x0 0x2 &ipic 21 0x8
267 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
268 interrupt-parent = <&ipic>;
269 interrupts = <66 0x8>;
270 bus-range = <0 0>;
271 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
272 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
273 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
274 clock-frequency = <66666666>;
275 #interrupt-cells = <1>;
276 #size-cells = <2>;
277 #address-cells = <3>;
278 reg = <0xe0008500 0x100>;
279 compatible = "fsl,mpc8349-pci";
280 device_type = "pci";
281 };
282};
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
new file mode 100644
index 000000000000..c270685bbde4
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -0,0 +1,294 @@
1/*
2 * MPC8379E MDS Device Tree Source
3 *
4 * Copyright 2007 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "fsl,mpc8379emds";
16 compatible = "fsl,mpc8379emds","fsl,mpc837xmds";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
27
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 PowerPC,8379@0 {
33 device_type = "cpu";
34 reg = <0x0>;
35 d-cache-line-size = <32>;
36 i-cache-line-size = <32>;
37 d-cache-size = <32768>;
38 i-cache-size = <32768>;
39 timebase-frequency = <0>;
40 bus-frequency = <0>;
41 clock-frequency = <0>;
42 };
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0x00000000 0x20000000>; // 512MB at 0
48 };
49
50 soc@e0000000 {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 device_type = "soc";
54 ranges = <0x0 0xe0000000 0x00100000>;
55 reg = <0xe0000000 0x00000200>;
56 bus-frequency = <0>;
57
58 wdt@200 {
59 compatible = "mpc83xx_wdt";
60 reg = <0x200 0x100>;
61 };
62
63 i2c@3000 {
64 #address-cells = <1>;
65 #size-cells = <0>;
66 cell-index = <0>;
67 compatible = "fsl-i2c";
68 reg = <0x3000 0x100>;
69 interrupts = <14 0x8>;
70 interrupt-parent = <&ipic>;
71 dfsrr;
72 };
73
74 i2c@3100 {
75 #address-cells = <1>;
76 #size-cells = <0>;
77 cell-index = <1>;
78 compatible = "fsl-i2c";
79 reg = <0x3100 0x100>;
80 interrupts = <15 0x8>;
81 interrupt-parent = <&ipic>;
82 dfsrr;
83 };
84
85 spi@7000 {
86 cell-index = <0>;
87 compatible = "fsl,spi";
88 reg = <0x7000 0x1000>;
89 interrupts = <16 0x8>;
90 interrupt-parent = <&ipic>;
91 mode = "cpu";
92 };
93
94 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
95 usb@23000 {
96 compatible = "fsl-usb2-dr";
97 reg = <0x23000 0x1000>;
98 #address-cells = <1>;
99 #size-cells = <0>;
100 interrupt-parent = <&ipic>;
101 interrupts = <38 0x8>;
102 phy_type = "utmi_wide";
103 };
104
105 mdio@24520 {
106 #address-cells = <1>;
107 #size-cells = <0>;
108 compatible = "fsl,gianfar-mdio";
109 reg = <0x24520 0x20>;
110 phy2: ethernet-phy@2 {
111 interrupt-parent = <&ipic>;
112 interrupts = <17 0x8>;
113 reg = <0x2>;
114 device_type = "ethernet-phy";
115 };
116 phy3: ethernet-phy@3 {
117 interrupt-parent = <&ipic>;
118 interrupts = <18 0x8>;
119 reg = <0x3>;
120 device_type = "ethernet-phy";
121 };
122 };
123
124 enet0: ethernet@24000 {
125 cell-index = <0>;
126 device_type = "network";
127 model = "eTSEC";
128 compatible = "gianfar";
129 reg = <0x24000 0x1000>;
130 local-mac-address = [ 00 00 00 00 00 00 ];
131 interrupts = <32 0x8 33 0x8 34 0x8>;
132 phy-connection-type = "mii";
133 interrupt-parent = <&ipic>;
134 phy-handle = <&phy2>;
135 };
136
137 enet1: ethernet@25000 {
138 cell-index = <1>;
139 device_type = "network";
140 model = "eTSEC";
141 compatible = "gianfar";
142 reg = <0x25000 0x1000>;
143 local-mac-address = [ 00 00 00 00 00 00 ];
144 interrupts = <35 0x8 36 0x8 37 0x8>;
145 phy-connection-type = "mii";
146 interrupt-parent = <&ipic>;
147 phy-handle = <&phy3>;
148 };
149
150 serial0: serial@4500 {
151 cell-index = <0>;
152 device_type = "serial";
153 compatible = "ns16550";
154 reg = <0x4500 0x100>;
155 clock-frequency = <0>;
156 interrupts = <9 0x8>;
157 interrupt-parent = <&ipic>;
158 };
159
160 serial1: serial@4600 {
161 cell-index = <1>;
162 device_type = "serial";
163 compatible = "ns16550";
164 reg = <0x4600 0x100>;
165 clock-frequency = <0>;
166 interrupts = <10 0x8>;
167 interrupt-parent = <&ipic>;
168 };
169
170 crypto@30000 {
171 model = "SEC3";
172 compatible = "talitos";
173 reg = <0x30000 0x10000>;
174 interrupts = <11 0x8>;
175 interrupt-parent = <&ipic>;
176 /* Rev. 3.0 geometry */
177 num-channels = <4>;
178 channel-fifo-len = <24>;
179 exec-units-mask = <0x000001fe>;
180 descriptor-types-mask = <0x03ab0ebf>;
181 };
182
183 sdhc@2e000 {
184 model = "eSDHC";
185 compatible = "fsl,esdhc";
186 reg = <0x2e000 0x1000>;
187 interrupts = <42 0x8>;
188 interrupt-parent = <&ipic>;
189 };
190
191 sata@18000 {
192 compatible = "fsl,mpc8379-sata";
193 reg = <0x18000 0x1000>;
194 interrupts = <44 0x8>;
195 interrupt-parent = <&ipic>;
196 };
197
198 sata@19000 {
199 compatible = "fsl,mpc8379-sata";
200 reg = <0x19000 0x1000>;
201 interrupts = <45 0x8>;
202 interrupt-parent = <&ipic>;
203 };
204
205 sata@1a000 {
206 compatible = "fsl,mpc8379-sata";
207 reg = <0x1a000 0x1000>;
208 interrupts = <46 0x8>;
209 interrupt-parent = <&ipic>;
210 };
211
212 sata@1b000 {
213 compatible = "fsl,mpc8379-sata";
214 reg = <0x1b000 0x1000>;
215 interrupts = <47 0x8>;
216 interrupt-parent = <&ipic>;
217 };
218
219 /* IPIC
220 * interrupts cell = <intr #, sense>
221 * sense values match linux IORESOURCE_IRQ_* defines:
222 * sense == 8: Level, low assertion
223 * sense == 2: Edge, high-to-low change
224 */
225 ipic: pic@700 {
226 compatible = "fsl,ipic";
227 interrupt-controller;
228 #address-cells = <0>;
229 #interrupt-cells = <2>;
230 reg = <0x700 0x100>;
231 };
232 };
233
234 pci0: pci@e0008500 {
235 cell-index = <0>;
236 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
237 interrupt-map = <
238
239 /* IDSEL 0x11 */
240 0x8800 0x0 0x0 0x1 &ipic 20 0x8
241 0x8800 0x0 0x0 0x2 &ipic 21 0x8
242 0x8800 0x0 0x0 0x3 &ipic 22 0x8
243 0x8800 0x0 0x0 0x4 &ipic 23 0x8
244
245 /* IDSEL 0x12 */
246 0x9000 0x0 0x0 0x1 &ipic 22 0x8
247 0x9000 0x0 0x0 0x2 &ipic 23 0x8
248 0x9000 0x0 0x0 0x3 &ipic 20 0x8
249 0x9000 0x0 0x0 0x4 &ipic 21 0x8
250
251 /* IDSEL 0x13 */
252 0x9800 0x0 0x0 0x1 &ipic 23 0x8
253 0x9800 0x0 0x0 0x2 &ipic 20 0x8
254 0x9800 0x0 0x0 0x3 &ipic 21 0x8
255 0x9800 0x0 0x0 0x4 &ipic 22 0x8
256
257 /* IDSEL 0x15 */
258 0xa800 0x0 0x0 0x1 &ipic 20 0x8
259 0xa800 0x0 0x0 0x2 &ipic 21 0x8
260 0xa800 0x0 0x0 0x3 &ipic 22 0x8
261 0xa800 0x0 0x0 0x4 &ipic 23 0x8
262
263 /* IDSEL 0x16 */
264 0xb000 0x0 0x0 0x1 &ipic 23 0x8
265 0xb000 0x0 0x0 0x2 &ipic 20 0x8
266 0xb000 0x0 0x0 0x3 &ipic 21 0x8
267 0xb000 0x0 0x0 0x4 &ipic 22 0x8
268
269 /* IDSEL 0x17 */
270 0xb800 0x0 0x0 0x1 &ipic 22 0x8
271 0xb800 0x0 0x0 0x2 &ipic 23 0x8
272 0xb800 0x0 0x0 0x3 &ipic 20 0x8
273 0xb800 0x0 0x0 0x4 &ipic 21 0x8
274
275 /* IDSEL 0x18 */
276 0xc000 0x0 0x0 0x1 &ipic 21 0x8
277 0xc000 0x0 0x0 0x2 &ipic 22 0x8
278 0xc000 0x0 0x0 0x3 &ipic 23 0x8
279 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
280 interrupt-parent = <&ipic>;
281 interrupts = <66 0x8>;
282 bus-range = <0x0 0x0>;
283 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
284 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
285 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
286 clock-frequency = <0>;
287 #interrupt-cells = <1>;
288 #size-cells = <2>;
289 #address-cells = <3>;
290 reg = <0xe0008500 0x100>;
291 compatible = "fsl,mpc8349-pci";
292 device_type = "pci";
293 };
294};
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
new file mode 100644
index 000000000000..0dda2fc558f8
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -0,0 +1,310 @@
1/*
2 * MPC8379E RDB Device Tree Source
3 *
4 * Copyright 2007, 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 compatible = "fsl,mpc8379rdb";
16 #address-cells = <1>;
17 #size-cells = <1>;
18
19 aliases {
20 ethernet0 = &enet0;
21 ethernet1 = &enet1;
22 serial0 = &serial0;
23 serial1 = &serial1;
24 pci0 = &pci0;
25 };
26
27 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30
31 PowerPC,8379@0 {
32 device_type = "cpu";
33 reg = <0x0>;
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>;
37 i-cache-size = <32768>;
38 timebase-frequency = <0>;
39 bus-frequency = <0>;
40 clock-frequency = <0>;
41 };
42 };
43
44 memory {
45 device_type = "memory";
46 reg = <0x00000000 0x10000000>; // 256MB at 0
47 };
48
49 localbus@e0005000 {
50 #address-cells = <2>;
51 #size-cells = <1>;
52 compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
53 reg = <0xe0005000 0x1000>;
54 interrupts = <77 0x8>;
55 interrupt-parent = <&ipic>;
56
57 // CS0 and CS1 are swapped when
58 // booting from nand, but the
59 // addresses are the same.
60 ranges = <0x0 0x0 0xfe000000 0x00800000
61 0x1 0x0 0xe0600000 0x00008000
62 0x2 0x0 0xf0000000 0x00020000
63 0x3 0x0 0xfa000000 0x00008000>;
64
65 flash@0,0 {
66 #address-cells = <1>;
67 #size-cells = <1>;
68 compatible = "cfi-flash";
69 reg = <0x0 0x0 0x800000>;
70 bank-width = <2>;
71 device-width = <1>;
72 };
73
74 nand@1,0 {
75 #address-cells = <1>;
76 #size-cells = <1>;
77 compatible = "fsl,mpc8379-fcm-nand",
78 "fsl,elbc-fcm-nand";
79 reg = <0x1 0x0 0x8000>;
80
81 u-boot@0 {
82 reg = <0x0 0x100000>;
83 read-only;
84 };
85
86 kernel@100000 {
87 reg = <0x100000 0x300000>;
88 };
89 fs@400000 {
90 reg = <0x400000 0x1c00000>;
91 };
92 };
93 };
94
95 immr@e0000000 {
96 #address-cells = <1>;
97 #size-cells = <1>;
98 device_type = "soc";
99 compatible = "simple-bus";
100 ranges = <0x0 0xe0000000 0x00100000>;
101 reg = <0xe0000000 0x00000200>;
102 bus-frequency = <0>;
103
104 wdt@200 {
105 device_type = "watchdog";
106 compatible = "mpc83xx_wdt";
107 reg = <0x200 0x100>;
108 };
109
110 i2c@3000 {
111 #address-cells = <1>;
112 #size-cells = <0>;
113 cell-index = <0>;
114 compatible = "fsl-i2c";
115 reg = <0x3000 0x100>;
116 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>;
118 dfsrr;
119 rtc@68 {
120 device_type = "rtc";
121 compatible = "dallas,ds1339";
122 reg = <0x68>;
123 };
124 };
125
126 i2c@3100 {
127 #address-cells = <1>;
128 #size-cells = <0>;
129 cell-index = <1>;
130 compatible = "fsl-i2c";
131 reg = <0x3100 0x100>;
132 interrupts = <15 0x8>;
133 interrupt-parent = <&ipic>;
134 dfsrr;
135 };
136
137 spi@7000 {
138 cell-index = <0>;
139 compatible = "fsl,spi";
140 reg = <0x7000 0x1000>;
141 interrupts = <16 0x8>;
142 interrupt-parent = <&ipic>;
143 mode = "cpu";
144 };
145
146 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
147 usb@23000 {
148 compatible = "fsl-usb2-dr";
149 reg = <0x23000 0x1000>;
150 #address-cells = <1>;
151 #size-cells = <0>;
152 interrupt-parent = <&ipic>;
153 interrupts = <38 0x8>;
154 phy_type = "utmi";
155 };
156
157 mdio@24520 {
158 #address-cells = <1>;
159 #size-cells = <0>;
160 compatible = "fsl,gianfar-mdio";
161 reg = <0x24520 0x20>;
162 phy2: ethernet-phy@2 {
163 interrupt-parent = <&ipic>;
164 interrupts = <17 0x8>;
165 reg = <0x2>;
166 device_type = "ethernet-phy";
167 };
168 phy3: ethernet-phy@3 {
169 interrupt-parent = <&ipic>;
170 interrupts = <18 0x8>;
171 reg = <0x3>;
172 device_type = "ethernet-phy";
173 };
174 };
175
176 enet0: ethernet@24000 {
177 cell-index = <0>;
178 device_type = "network";
179 model = "eTSEC";
180 compatible = "gianfar";
181 reg = <0x24000 0x1000>;
182 local-mac-address = [ 00 00 00 00 00 00 ];
183 interrupts = <32 0x8 33 0x8 34 0x8>;
184 phy-connection-type = "mii";
185 interrupt-parent = <&ipic>;
186 phy-handle = <&phy2>;
187 };
188
189 enet1: ethernet@25000 {
190 cell-index = <1>;
191 device_type = "network";
192 model = "eTSEC";
193 compatible = "gianfar";
194 reg = <0x25000 0x1000>;
195 local-mac-address = [ 00 00 00 00 00 00 ];
196 interrupts = <35 0x8 36 0x8 37 0x8>;
197 phy-connection-type = "mii";
198 interrupt-parent = <&ipic>;
199 phy-handle = <&phy3>;
200 };
201
202 serial0: serial@4500 {
203 cell-index = <0>;
204 device_type = "serial";
205 compatible = "ns16550";
206 reg = <0x4500 0x100>;
207 clock-frequency = <0>;
208 interrupts = <9 0x8>;
209 interrupt-parent = <&ipic>;
210 };
211
212 serial1: serial@4600 {
213 cell-index = <1>;
214 device_type = "serial";
215 compatible = "ns16550";
216 reg = <0x4600 0x100>;
217 clock-frequency = <0>;
218 interrupts = <10 0x8>;
219 interrupt-parent = <&ipic>;
220 };
221
222 crypto@30000 {
223 model = "SEC3";
224 device_type = "crypto";
225 compatible = "talitos";
226 reg = <0x30000 0x10000>;
227 interrupts = <11 0x8>;
228 interrupt-parent = <&ipic>;
229 /* Rev. 3.0 geometry */
230 num-channels = <4>;
231 channel-fifo-len = <24>;
232 exec-units-mask = <0x000001fe>;
233 descriptor-types-mask = <0x03ab0ebf>;
234 };
235
236 sata@18000 {
237 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
238 reg = <0x18000 0x1000>;
239 interrupts = <44 0x8>;
240 interrupt-parent = <&ipic>;
241 };
242
243 sata@19000 {
244 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
245 reg = <0x19000 0x1000>;
246 interrupts = <45 0x8>;
247 interrupt-parent = <&ipic>;
248 };
249
250 sata@1a000 {
251 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
252 reg = <0x1a000 0x1000>;
253 interrupts = <46 0x8>;
254 interrupt-parent = <&ipic>;
255 };
256
257 sata@1b000 {
258 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
259 reg = <0x1b000 0x1000>;
260 interrupts = <47 0x8>;
261 interrupt-parent = <&ipic>;
262 };
263
264 /* IPIC
265 * interrupts cell = <intr #, sense>
266 * sense values match linux IORESOURCE_IRQ_* defines:
267 * sense == 8: Level, low assertion
268 * sense == 2: Edge, high-to-low change
269 */
270 ipic: interrupt-controller@700 {
271 compatible = "fsl,ipic";
272 interrupt-controller;
273 #address-cells = <0>;
274 #interrupt-cells = <2>;
275 reg = <0x700 0x100>;
276 };
277 };
278
279 pci0: pci@e0008500 {
280 interrupt-map-mask = <0xf800 0 0 7>;
281 interrupt-map = <
282 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
283
284 /* IDSEL AD14 IRQ6 inta */
285 0x7000 0x0 0x0 0x1 &ipic 22 0x8
286
287 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
288 0x7800 0x0 0x0 0x1 &ipic 21 0x8
289 0x7800 0x0 0x0 0x2 &ipic 22 0x8
290 0x7800 0x0 0x0 0x4 &ipic 23 0x8
291
292 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
293 0xE000 0x0 0x0 0x1 &ipic 23 0x8
294 0xE000 0x0 0x0 0x2 &ipic 21 0x8
295 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
296 interrupt-parent = <&ipic>;
297 interrupts = <66 0x8>;
298 bus-range = <0x0 0x0>;
299 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
300 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
301 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
302 clock-frequency = <66666666>;
303 #interrupt-cells = <1>;
304 #size-cells = <2>;
305 #address-cells = <3>;
306 reg = <0xe0008500 0x100>;
307 compatible = "fsl,mpc8349-pci";
308 device_type = "pci";
309 };
310};
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 6442a717ec3b..975248491b7b 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -16,6 +16,15 @@
16 #address-cells = <1>; 16 #address-cells = <1>;
17 #size-cells = <1>; 17 #size-cells = <1>;
18 18
19 aliases {
20 ethernet0 = &enet0;
21 ethernet1 = &enet1;
22 ethernet2 = &enet2;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
27
19 cpus { 28 cpus {
20 #address-cells = <1>; 29 #address-cells = <1>;
21 #size-cells = <0>; 30 #size-cells = <0>;
@@ -63,7 +72,9 @@
63 }; 72 };
64 73
65 i2c@3000 { 74 i2c@3000 {
66 device_type = "i2c"; 75 #address-cells = <1>;
76 #size-cells = <0>;
77 cell-index = <0>;
67 compatible = "fsl-i2c"; 78 compatible = "fsl-i2c";
68 reg = <3000 100>; 79 reg = <3000 100>;
69 interrupts = <2b 2>; 80 interrupts = <2b 2>;
@@ -74,9 +85,9 @@
74 mdio@24520 { 85 mdio@24520 {
75 #address-cells = <1>; 86 #address-cells = <1>;
76 #size-cells = <0>; 87 #size-cells = <0>;
77 device_type = "mdio"; 88 compatible = "fsl,gianfar-mdio";
78 compatible = "gianfar";
79 reg = <24520 20>; 89 reg = <24520 20>;
90
80 phy0: ethernet-phy@0 { 91 phy0: ethernet-phy@0 {
81 interrupt-parent = <&mpic>; 92 interrupt-parent = <&mpic>;
82 interrupts = <5 1>; 93 interrupts = <5 1>;
@@ -97,64 +108,44 @@
97 }; 108 };
98 }; 109 };
99 110
100 ethernet@24000 { 111 enet0: ethernet@24000 {
101 #address-cells = <1>; 112 cell-index = <0>;
102 #size-cells = <0>;
103 device_type = "network"; 113 device_type = "network";
104 model = "TSEC"; 114 model = "TSEC";
105 compatible = "gianfar"; 115 compatible = "gianfar";
106 reg = <24000 1000>; 116 reg = <24000 1000>;
107 /*
108 * address is deprecated and will be removed
109 * in 2.6.25. Only recent versions of
110 * U-Boot support local-mac-address, however.
111 */
112 address = [ 00 00 00 00 00 00 ];
113 local-mac-address = [ 00 00 00 00 00 00 ]; 117 local-mac-address = [ 00 00 00 00 00 00 ];
114 interrupts = <1d 2 1e 2 22 2>; 118 interrupts = <1d 2 1e 2 22 2>;
115 interrupt-parent = <&mpic>; 119 interrupt-parent = <&mpic>;
116 phy-handle = <&phy0>; 120 phy-handle = <&phy0>;
117 }; 121 };
118 122
119 ethernet@25000 { 123 enet1: ethernet@25000 {
120 #address-cells = <1>; 124 cell-index = <1>;
121 #size-cells = <0>;
122 device_type = "network"; 125 device_type = "network";
123 model = "TSEC"; 126 model = "TSEC";
124 compatible = "gianfar"; 127 compatible = "gianfar";
125 reg = <25000 1000>; 128 reg = <25000 1000>;
126 /*
127 * address is deprecated and will be removed
128 * in 2.6.25. Only recent versions of
129 * U-Boot support local-mac-address, however.
130 */
131 address = [ 00 00 00 00 00 00 ];
132 local-mac-address = [ 00 00 00 00 00 00 ]; 129 local-mac-address = [ 00 00 00 00 00 00 ];
133 interrupts = <23 2 24 2 28 2>; 130 interrupts = <23 2 24 2 28 2>;
134 interrupt-parent = <&mpic>; 131 interrupt-parent = <&mpic>;
135 phy-handle = <&phy1>; 132 phy-handle = <&phy1>;
136 }; 133 };
137 134
138 ethernet@26000 { 135 enet2: ethernet@26000 {
139 #address-cells = <1>; 136 cell-index = <2>;
140 #size-cells = <0>;
141 device_type = "network"; 137 device_type = "network";
142 model = "FEC"; 138 model = "FEC";
143 compatible = "gianfar"; 139 compatible = "gianfar";
144 reg = <26000 1000>; 140 reg = <26000 1000>;
145 /*
146 * address is deprecated and will be removed
147 * in 2.6.25. Only recent versions of
148 * U-Boot support local-mac-address, however.
149 */
150 address = [ 00 00 00 00 00 00 ];
151 local-mac-address = [ 00 00 00 00 00 00 ]; 141 local-mac-address = [ 00 00 00 00 00 00 ];
152 interrupts = <29 2>; 142 interrupts = <29 2>;
153 interrupt-parent = <&mpic>; 143 interrupt-parent = <&mpic>;
154 phy-handle = <&phy3>; 144 phy-handle = <&phy3>;
155 }; 145 };
156 146
157 serial@4500 { 147 serial0: serial@4500 {
148 cell-index = <0>;
158 device_type = "serial"; 149 device_type = "serial";
159 compatible = "ns16550"; 150 compatible = "ns16550";
160 reg = <4500 100>; // reg base, size 151 reg = <4500 100>; // reg base, size
@@ -163,7 +154,8 @@
163 interrupt-parent = <&mpic>; 154 interrupt-parent = <&mpic>;
164 }; 155 };
165 156
166 serial@4600 { 157 serial1: serial@4600 {
158 cell-index = <1>;
167 device_type = "serial"; 159 device_type = "serial";
168 compatible = "ns16550"; 160 compatible = "ns16550";
169 reg = <4600 100>; // reg base, size 161 reg = <4600 100>; // reg base, size
@@ -183,7 +175,8 @@
183 }; 175 };
184 }; 176 };
185 177
186 pci@e0008000 { 178 pci0: pci@e0008000 {
179 cell-index = <0>;
187 interrupt-map-mask = <f800 0 0 7>; 180 interrupt-map-mask = <f800 0 0 7>;
188 interrupt-map = < 181 interrupt-map = <
189 182
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index f3f4d79deb63..fa8d9aaad157 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -16,6 +16,15 @@
16 #address-cells = <1>; 16 #address-cells = <1>;
17 #size-cells = <1>; 17 #size-cells = <1>;
18 18
19 aliases {
20 ethernet0 = &enet0;
21 ethernet1 = &enet1;
22 serial0 = &serial0;
23 serial1 = &serial1;
24 pci0 = &pci0;
25 pci1 = &pci1;
26 };
27
19 cpus { 28 cpus {
20 #address-cells = <1>; 29 #address-cells = <1>;
21 #size-cells = <0>; 30 #size-cells = <0>;
@@ -63,7 +72,9 @@
63 }; 72 };
64 73
65 i2c@3000 { 74 i2c@3000 {
66 device_type = "i2c"; 75 #address-cells = <1>;
76 #size-cells = <0>;
77 cell-index = <0>;
67 compatible = "fsl-i2c"; 78 compatible = "fsl-i2c";
68 reg = <3000 100>; 79 reg = <3000 100>;
69 interrupts = <2b 2>; 80 interrupts = <2b 2>;
@@ -74,9 +85,9 @@
74 mdio@24520 { 85 mdio@24520 {
75 #address-cells = <1>; 86 #address-cells = <1>;
76 #size-cells = <0>; 87 #size-cells = <0>;
77 device_type = "mdio"; 88 compatible = "fsl,gianfar-mdio";
78 compatible = "gianfar";
79 reg = <24520 20>; 89 reg = <24520 20>;
90
80 phy0: ethernet-phy@0 { 91 phy0: ethernet-phy@0 {
81 interrupt-parent = <&mpic>; 92 interrupt-parent = <&mpic>;
82 interrupts = <5 1>; 93 interrupts = <5 1>;
@@ -91,9 +102,8 @@
91 }; 102 };
92 }; 103 };
93 104
94 ethernet@24000 { 105 enet0: ethernet@24000 {
95 #address-cells = <1>; 106 cell-index = <0>;
96 #size-cells = <0>;
97 device_type = "network"; 107 device_type = "network";
98 model = "TSEC"; 108 model = "TSEC";
99 compatible = "gianfar"; 109 compatible = "gianfar";
@@ -104,9 +114,8 @@
104 phy-handle = <&phy0>; 114 phy-handle = <&phy0>;
105 }; 115 };
106 116
107 ethernet@25000 { 117 enet1: ethernet@25000 {
108 #address-cells = <1>; 118 cell-index = <1>;
109 #size-cells = <0>;
110 device_type = "network"; 119 device_type = "network";
111 model = "TSEC"; 120 model = "TSEC";
112 compatible = "gianfar"; 121 compatible = "gianfar";
@@ -117,7 +126,8 @@
117 phy-handle = <&phy1>; 126 phy-handle = <&phy1>;
118 }; 127 };
119 128
120 serial@4500 { 129 serial0: serial@4500 {
130 cell-index = <0>;
121 device_type = "serial"; 131 device_type = "serial";
122 compatible = "ns16550"; 132 compatible = "ns16550";
123 reg = <4500 100>; // reg base, size 133 reg = <4500 100>; // reg base, size
@@ -126,7 +136,8 @@
126 interrupt-parent = <&mpic>; 136 interrupt-parent = <&mpic>;
127 }; 137 };
128 138
129 serial@4600 { 139 serial1: serial@4600 {
140 cell-index = <1>;
130 device_type = "serial"; 141 device_type = "serial";
131 compatible = "ns16550"; 142 compatible = "ns16550";
132 reg = <4600 100>; // reg base, size 143 reg = <4600 100>; // reg base, size
@@ -183,7 +194,8 @@
183 }; 194 };
184 }; 195 };
185 196
186 pci1: pci@e0008000 { 197 pci0: pci@e0008000 {
198 cell-index = <0>;
187 interrupt-map-mask = <1f800 0 0 7>; 199 interrupt-map-mask = <1f800 0 0 7>;
188 interrupt-map = < 200 interrupt-map = <
189 201
@@ -250,11 +262,12 @@
250 #interrupt-cells = <2>; 262 #interrupt-cells = <2>;
251 compatible = "chrp,iic"; 263 compatible = "chrp,iic";
252 interrupts = <1>; 264 interrupts = <1>;
253 interrupt-parent = <&pci1>; 265 interrupt-parent = <&pci0>;
254 }; 266 };
255 }; 267 };
256 268
257 pci@e0009000 { 269 pci1: pci@e0009000 {
270 cell-index = <1>;
258 interrupt-map-mask = <f800 0 0 7>; 271 interrupt-map-mask = <f800 0 0 7>;
259 interrupt-map = < 272 interrupt-map = <
260 273
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 6c608de1fc1b..688af9d06382 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -15,6 +15,17 @@
15 #address-cells = <1>; 15 #address-cells = <1>;
16 #size-cells = <1>; 16 #size-cells = <1>;
17 17
18 aliases {
19 ethernet0 = &enet0;
20 ethernet1 = &enet1;
21 serial0 = &serial0;
22 serial1 = &serial1;
23 pci0 = &pci0;
24 pci1 = &pci1;
25 pci2 = &pci2;
26 pci3 = &pci3;
27 };
28
18 cpus { 29 cpus {
19 #cpus = <1>; 30 #cpus = <1>;
20 #address-cells = <1>; 31 #address-cells = <1>;
@@ -64,7 +75,9 @@
64 }; 75 };
65 76
66 i2c@3000 { 77 i2c@3000 {
67 device_type = "i2c"; 78 #address-cells = <1>;
79 #size-cells = <0>;
80 cell-index = <0>;
68 compatible = "fsl-i2c"; 81 compatible = "fsl-i2c";
69 reg = <3000 100>; 82 reg = <3000 100>;
70 interrupts = <2b 2>; 83 interrupts = <2b 2>;
@@ -72,12 +85,23 @@
72 dfsrr; 85 dfsrr;
73 }; 86 };
74 87
88 i2c@3100 {
89 #address-cells = <1>;
90 #size-cells = <0>;
91 cell-index = <1>;
92 compatible = "fsl-i2c";
93 reg = <3100 100>;
94 interrupts = <2b 2>;
95 interrupt-parent = <&mpic>;
96 dfsrr;
97 };
98
75 mdio@24520 { 99 mdio@24520 {
76 #address-cells = <1>; 100 #address-cells = <1>;
77 #size-cells = <0>; 101 #size-cells = <0>;
78 device_type = "mdio"; 102 compatible = "fsl,gianfar-mdio";
79 compatible = "gianfar";
80 reg = <24520 20>; 103 reg = <24520 20>;
104
81 phy0: ethernet-phy@0 { 105 phy0: ethernet-phy@0 {
82 interrupt-parent = <&mpic>; 106 interrupt-parent = <&mpic>;
83 interrupts = <a 1>; 107 interrupts = <a 1>;
@@ -92,9 +116,8 @@
92 }; 116 };
93 }; 117 };
94 118
95 ethernet@24000 { 119 enet0: ethernet@24000 {
96 #address-cells = <1>; 120 cell-index = <0>;
97 #size-cells = <0>;
98 device_type = "network"; 121 device_type = "network";
99 model = "TSEC"; 122 model = "TSEC";
100 compatible = "gianfar"; 123 compatible = "gianfar";
@@ -106,9 +129,8 @@
106 phy-connection-type = "rgmii-id"; 129 phy-connection-type = "rgmii-id";
107 }; 130 };
108 131
109 ethernet@26000 { 132 enet1: ethernet@26000 {
110 #address-cells = <1>; 133 cell-index = <1>;
111 #size-cells = <0>;
112 device_type = "network"; 134 device_type = "network";
113 model = "TSEC"; 135 model = "TSEC";
114 compatible = "gianfar"; 136 compatible = "gianfar";
@@ -120,7 +142,8 @@
120 phy-connection-type = "rgmii-id"; 142 phy-connection-type = "rgmii-id";
121 }; 143 };
122 144
123 serial@4500 { 145 serial0: serial@4500 {
146 cell-index = <0>;
124 device_type = "serial"; 147 device_type = "serial";
125 compatible = "ns16550"; 148 compatible = "ns16550";
126 reg = <4500 100>; 149 reg = <4500 100>;
@@ -129,7 +152,8 @@
129 interrupt-parent = <&mpic>; 152 interrupt-parent = <&mpic>;
130 }; 153 };
131 154
132 serial@4600 { 155 serial1: serial@4600 {
156 cell-index = <1>;
133 device_type = "serial"; 157 device_type = "serial";
134 compatible = "ns16550"; 158 compatible = "ns16550";
135 reg = <4600 100>; 159 reg = <4600 100>;
@@ -156,7 +180,8 @@
156 }; 180 };
157 }; 181 };
158 182
159 pci@e0008000 { 183 pci0: pci@e0008000 {
184 cell-index = <0>;
160 compatible = "fsl,mpc8540-pci"; 185 compatible = "fsl,mpc8540-pci";
161 device_type = "pci"; 186 device_type = "pci";
162 interrupt-map-mask = <f800 0 0 7>; 187 interrupt-map-mask = <f800 0 0 7>;
@@ -187,7 +212,8 @@
187 reg = <e0008000 1000>; 212 reg = <e0008000 1000>;
188 }; 213 };
189 214
190 pcie@e0009000 { 215 pci1: pcie@e0009000 {
216 cell-index = <1>;
191 compatible = "fsl,mpc8548-pcie"; 217 compatible = "fsl,mpc8548-pcie";
192 device_type = "pci"; 218 device_type = "pci";
193 #interrupt-cells = <1>; 219 #interrupt-cells = <1>;
@@ -223,7 +249,8 @@
223 }; 249 };
224 }; 250 };
225 251
226 pcie@e000a000 { 252 pci2: pcie@e000a000 {
253 cell-index = <2>;
227 compatible = "fsl,mpc8548-pcie"; 254 compatible = "fsl,mpc8548-pcie";
228 device_type = "pci"; 255 device_type = "pci";
229 #interrupt-cells = <1>; 256 #interrupt-cells = <1>;
@@ -259,7 +286,8 @@
259 }; 286 };
260 }; 287 };
261 288
262 pcie@e000b000 { 289 pci3: pcie@e000b000 {
290 cell-index = <3>;
263 compatible = "fsl,mpc8548-pcie"; 291 compatible = "fsl,mpc8548-pcie";
264 device_type = "pci"; 292 device_type = "pci";
265 #interrupt-cells = <1>; 293 #interrupt-cells = <1>;
@@ -276,9 +304,9 @@
276 interrupt-map = < 304 interrupt-map = <
277 // IDSEL 0x1c USB 305 // IDSEL 0x1c USB
278 e000 0 0 1 &i8259 c 2 306 e000 0 0 1 &i8259 c 2
279 e100 0 0 1 &i8259 9 2 307 e100 0 0 2 &i8259 9 2
280 e200 0 0 1 &i8259 a 2 308 e200 0 0 3 &i8259 a 2
281 e300 0 0 1 &i8259 b 2 309 e300 0 0 4 &i8259 b 2
282 310
283 // IDSEL 0x1d Audio 311 // IDSEL 0x1d Audio
284 e800 0 0 1 &i8259 6 2 312 e800 0 0 1 &i8259 6 2
@@ -369,6 +397,5 @@
369 }; 397 };
370 }; 398 };
371 }; 399 };
372
373 }; 400 };
374}; 401};
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index 69ca5025d972..1f470c6a1c63 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -16,6 +16,20 @@
16 #address-cells = <1>; 16 #address-cells = <1>;
17 #size-cells = <1>; 17 #size-cells = <1>;
18 18
19 aliases {
20 ethernet0 = &enet0;
21 ethernet1 = &enet1;
22/*
23 ethernet2 = &enet2;
24 ethernet3 = &enet3;
25*/
26 serial0 = &serial0;
27 serial1 = &serial1;
28 pci0 = &pci0;
29 pci1 = &pci1;
30 pci2 = &pci2;
31 };
32
19 cpus { 33 cpus {
20 #address-cells = <1>; 34 #address-cells = <1>;
21 #size-cells = <0>; 35 #size-cells = <0>;
@@ -63,7 +77,9 @@
63 }; 77 };
64 78
65 i2c@3000 { 79 i2c@3000 {
66 device_type = "i2c"; 80 #address-cells = <1>;
81 #size-cells = <0>;
82 cell-index = <0>;
67 compatible = "fsl-i2c"; 83 compatible = "fsl-i2c";
68 reg = <3000 100>; 84 reg = <3000 100>;
69 interrupts = <2b 2>; 85 interrupts = <2b 2>;
@@ -71,12 +87,23 @@
71 dfsrr; 87 dfsrr;
72 }; 88 };
73 89
90 i2c@3100 {
91 #address-cells = <1>;
92 #size-cells = <0>;
93 cell-index = <1>;
94 compatible = "fsl-i2c";
95 reg = <3100 100>;
96 interrupts = <2b 2>;
97 interrupt-parent = <&mpic>;
98 dfsrr;
99 };
100
74 mdio@24520 { 101 mdio@24520 {
75 #address-cells = <1>; 102 #address-cells = <1>;
76 #size-cells = <0>; 103 #size-cells = <0>;
77 device_type = "mdio"; 104 compatible = "fsl,gianfar-mdio";
78 compatible = "gianfar";
79 reg = <24520 20>; 105 reg = <24520 20>;
106
80 phy0: ethernet-phy@0 { 107 phy0: ethernet-phy@0 {
81 interrupt-parent = <&mpic>; 108 interrupt-parent = <&mpic>;
82 interrupts = <5 1>; 109 interrupts = <5 1>;
@@ -103,9 +130,8 @@
103 }; 130 };
104 }; 131 };
105 132
106 ethernet@24000 { 133 enet0: ethernet@24000 {
107 #address-cells = <1>; 134 cell-index = <0>;
108 #size-cells = <0>;
109 device_type = "network"; 135 device_type = "network";
110 model = "eTSEC"; 136 model = "eTSEC";
111 compatible = "gianfar"; 137 compatible = "gianfar";
@@ -116,9 +142,8 @@
116 phy-handle = <&phy0>; 142 phy-handle = <&phy0>;
117 }; 143 };
118 144
119 ethernet@25000 { 145 enet1: ethernet@25000 {
120 #address-cells = <1>; 146 cell-index = <1>;
121 #size-cells = <0>;
122 device_type = "network"; 147 device_type = "network";
123 model = "eTSEC"; 148 model = "eTSEC";
124 compatible = "gianfar"; 149 compatible = "gianfar";
@@ -130,9 +155,8 @@
130 }; 155 };
131 156
132/* eTSEC 3/4 are currently broken 157/* eTSEC 3/4 are currently broken
133 ethernet@26000 { 158 enet2: ethernet@26000 {
134 #address-cells = <1>; 159 cell-index = <2>;
135 #size-cells = <0>;
136 device_type = "network"; 160 device_type = "network";
137 model = "eTSEC"; 161 model = "eTSEC";
138 compatible = "gianfar"; 162 compatible = "gianfar";
@@ -143,9 +167,8 @@
143 phy-handle = <&phy2>; 167 phy-handle = <&phy2>;
144 }; 168 };
145 169
146 ethernet@27000 { 170 enet3: ethernet@27000 {
147 #address-cells = <1>; 171 cell-index = <3>;
148 #size-cells = <0>;
149 device_type = "network"; 172 device_type = "network";
150 model = "eTSEC"; 173 model = "eTSEC";
151 compatible = "gianfar"; 174 compatible = "gianfar";
@@ -157,7 +180,8 @@
157 }; 180 };
158 */ 181 */
159 182
160 serial@4500 { 183 serial0: serial@4500 {
184 cell-index = <0>;
161 device_type = "serial"; 185 device_type = "serial";
162 compatible = "ns16550"; 186 compatible = "ns16550";
163 reg = <4500 100>; // reg base, size 187 reg = <4500 100>; // reg base, size
@@ -166,7 +190,8 @@
166 interrupt-parent = <&mpic>; 190 interrupt-parent = <&mpic>;
167 }; 191 };
168 192
169 serial@4600 { 193 serial1: serial@4600 {
194 cell-index = <1>;
170 device_type = "serial"; 195 device_type = "serial";
171 compatible = "ns16550"; 196 compatible = "ns16550";
172 reg = <4600 100>; // reg base, size 197 reg = <4600 100>; // reg base, size
@@ -193,7 +218,8 @@
193 }; 218 };
194 }; 219 };
195 220
196 pci@e0008000 { 221 pci0: pci@e0008000 {
222 cell-index = <0>;
197 interrupt-map-mask = <f800 0 0 7>; 223 interrupt-map-mask = <f800 0 0 7>;
198 interrupt-map = < 224 interrupt-map = <
199 /* IDSEL 0x4 (PCIX Slot 2) */ 225 /* IDSEL 0x4 (PCIX Slot 2) */
@@ -342,7 +368,8 @@
342 }; 368 };
343 }; 369 };
344 370
345 pci@e0009000 { 371 pci1: pci@e0009000 {
372 cell-index = <1>;
346 interrupt-map-mask = <f800 0 0 7>; 373 interrupt-map-mask = <f800 0 0 7>;
347 interrupt-map = < 374 interrupt-map = <
348 375
@@ -366,7 +393,8 @@
366 device_type = "pci"; 393 device_type = "pci";
367 }; 394 };
368 395
369 pcie@e000a000 { 396 pci2: pcie@e000a000 {
397 cell-index = <2>;
370 interrupt-map-mask = <f800 0 0 7>; 398 interrupt-map-mask = <f800 0 0 7>;
371 interrupt-map = < 399 interrupt-map = <
372 400
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index 57029cca32b2..4538f3c38862 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -16,6 +16,15 @@
16 #address-cells = <1>; 16 #address-cells = <1>;
17 #size-cells = <1>; 17 #size-cells = <1>;
18 18
19 aliases {
20 ethernet0 = &enet0;
21 ethernet1 = &enet1;
22 serial0 = &serial0;
23 serial1 = &serial1;
24 pci0 = &pci0;
25 pci1 = &pci1;
26 };
27
19 cpus { 28 cpus {
20 #address-cells = <1>; 29 #address-cells = <1>;
21 #size-cells = <0>; 30 #size-cells = <0>;
@@ -63,7 +72,9 @@
63 }; 72 };
64 73
65 i2c@3000 { 74 i2c@3000 {
66 device_type = "i2c"; 75 #address-cells = <1>;
76 #size-cells = <0>;
77 cell-index = <0>;
67 compatible = "fsl-i2c"; 78 compatible = "fsl-i2c";
68 reg = <3000 100>; 79 reg = <3000 100>;
69 interrupts = <2b 2>; 80 interrupts = <2b 2>;
@@ -74,9 +85,9 @@
74 mdio@24520 { 85 mdio@24520 {
75 #address-cells = <1>; 86 #address-cells = <1>;
76 #size-cells = <0>; 87 #size-cells = <0>;
77 device_type = "mdio"; 88 compatible = "fsl,gianfar-mdio";
78 compatible = "gianfar";
79 reg = <24520 20>; 89 reg = <24520 20>;
90
80 phy0: ethernet-phy@0 { 91 phy0: ethernet-phy@0 {
81 interrupt-parent = <&mpic>; 92 interrupt-parent = <&mpic>;
82 interrupts = <5 1>; 93 interrupts = <5 1>;
@@ -91,9 +102,8 @@
91 }; 102 };
92 }; 103 };
93 104
94 ethernet@24000 { 105 enet0: ethernet@24000 {
95 #address-cells = <1>; 106 cell-index = <0>;
96 #size-cells = <0>;
97 device_type = "network"; 107 device_type = "network";
98 model = "TSEC"; 108 model = "TSEC";
99 compatible = "gianfar"; 109 compatible = "gianfar";
@@ -104,9 +114,8 @@
104 phy-handle = <&phy0>; 114 phy-handle = <&phy0>;
105 }; 115 };
106 116
107 ethernet@25000 { 117 enet1: ethernet@25000 {
108 #address-cells = <1>; 118 cell-index = <1>;
109 #size-cells = <0>;
110 device_type = "network"; 119 device_type = "network";
111 model = "TSEC"; 120 model = "TSEC";
112 compatible = "gianfar"; 121 compatible = "gianfar";
@@ -117,7 +126,8 @@
117 phy-handle = <&phy1>; 126 phy-handle = <&phy1>;
118 }; 127 };
119 128
120 serial@4500 { 129 serial0: serial@4500 {
130 cell-index = <0>;
121 device_type = "serial"; 131 device_type = "serial";
122 compatible = "ns16550"; 132 compatible = "ns16550";
123 reg = <4500 100>; // reg base, size 133 reg = <4500 100>; // reg base, size
@@ -126,7 +136,8 @@
126 interrupt-parent = <&mpic>; 136 interrupt-parent = <&mpic>;
127 }; 137 };
128 138
129 serial@4600 { 139 serial1: serial@4600 {
140 cell-index = <1>;
130 device_type = "serial"; 141 device_type = "serial";
131 compatible = "ns16550"; 142 compatible = "ns16550";
132 reg = <4600 100>; // reg base, size 143 reg = <4600 100>; // reg base, size
@@ -183,7 +194,8 @@
183 }; 194 };
184 }; 195 };
185 196
186 pci1: pci@e0008000 { 197 pci0: pci@e0008000 {
198 cell-index = <0>;
187 interrupt-map-mask = <1f800 0 0 7>; 199 interrupt-map-mask = <1f800 0 0 7>;
188 interrupt-map = < 200 interrupt-map = <
189 201
@@ -250,11 +262,12 @@
250 #interrupt-cells = <2>; 262 #interrupt-cells = <2>;
251 compatible = "chrp,iic"; 263 compatible = "chrp,iic";
252 interrupts = <1>; 264 interrupts = <1>;
253 interrupt-parent = <&pci1>; 265 interrupt-parent = <&pci0>;
254 }; 266 };
255 }; 267 };
256 268
257 pci@e0009000 { 269 pci1: pci@e0009000 {
270 cell-index = <1>;
258 interrupt-map-mask = <f800 0 0 7>; 271 interrupt-map-mask = <f800 0 0 7>;
259 interrupt-map = < 272 interrupt-map = <
260 273
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 6b362f8222c1..639ce8a709a6 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -16,6 +16,16 @@
16 #address-cells = <1>; 16 #address-cells = <1>;
17 #size-cells = <1>; 17 #size-cells = <1>;
18 18
19 aliases {
20 ethernet0 = &enet0;
21 ethernet1 = &enet1;
22 ethernet2 = &enet2;
23 ethernet3 = &enet3;
24 serial0 = &serial0;
25 serial1 = &serial1;
26 pci0 = &pci0;
27 };
28
19 cpus { 29 cpus {
20 #address-cells = <1>; 30 #address-cells = <1>;
21 #size-cells = <0>; 31 #size-cells = <0>;
@@ -63,11 +73,11 @@
63 }; 73 };
64 74
65 mdio@24520 { 75 mdio@24520 {
66 device_type = "mdio";
67 compatible = "gianfar";
68 reg = <24520 20>;
69 #address-cells = <1>; 76 #address-cells = <1>;
70 #size-cells = <0>; 77 #size-cells = <0>;
78 compatible = "fsl,gianfar-mdio";
79 reg = <24520 20>;
80
71 phy0: ethernet-phy@0 { 81 phy0: ethernet-phy@0 {
72 interrupt-parent = <&mpic>; 82 interrupt-parent = <&mpic>;
73 interrupts = <5 1>; 83 interrupts = <5 1>;
@@ -94,36 +104,24 @@
94 }; 104 };
95 }; 105 };
96 106
97 ethernet@24000 { 107 enet0: ethernet@24000 {
108 cell-index = <0>;
98 device_type = "network"; 109 device_type = "network";
99 model = "TSEC"; 110 model = "TSEC";
100 compatible = "gianfar"; 111 compatible = "gianfar";
101 reg = <24000 1000>; 112 reg = <24000 1000>;
102 /*
103 * address is deprecated and will be removed
104 * in 2.6.25. Only recent versions of
105 * U-Boot support local-mac-address, however.
106 */
107 address = [ 00 00 00 00 00 00 ];
108 local-mac-address = [ 00 00 00 00 00 00 ]; 113 local-mac-address = [ 00 00 00 00 00 00 ];
109 interrupts = <1d 2 1e 2 22 2>; 114 interrupts = <1d 2 1e 2 22 2>;
110 interrupt-parent = <&mpic>; 115 interrupt-parent = <&mpic>;
111 phy-handle = <&phy0>; 116 phy-handle = <&phy0>;
112 }; 117 };
113 118
114 ethernet@25000 { 119 enet1: ethernet@25000 {
115 #address-cells = <1>; 120 cell-index = <1>;
116 #size-cells = <0>;
117 device_type = "network"; 121 device_type = "network";
118 model = "TSEC"; 122 model = "TSEC";
119 compatible = "gianfar"; 123 compatible = "gianfar";
120 reg = <25000 1000>; 124 reg = <25000 1000>;
121 /*
122 * address is deprecated and will be removed
123 * in 2.6.25. Only recent versions of
124 * U-Boot support local-mac-address, however.
125 */
126 address = [ 00 00 00 00 00 00 ];
127 local-mac-address = [ 00 00 00 00 00 00 ]; 125 local-mac-address = [ 00 00 00 00 00 00 ];
128 interrupts = <23 2 24 2 28 2>; 126 interrupts = <23 2 24 2 28 2>;
129 interrupt-parent = <&mpic>; 127 interrupt-parent = <&mpic>;
@@ -174,7 +172,7 @@
174 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; 172 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
175 }; 173 };
176 174
177 serial@91a00 { 175 serial0: serial@91a00 {
178 device_type = "serial"; 176 device_type = "serial";
179 compatible = "fsl,mpc8560-scc-uart", 177 compatible = "fsl,mpc8560-scc-uart",
180 "fsl,cpm2-scc-uart"; 178 "fsl,cpm2-scc-uart";
@@ -186,7 +184,7 @@
186 interrupt-parent = <&cpmpic>; 184 interrupt-parent = <&cpmpic>;
187 }; 185 };
188 186
189 serial@91a20 { 187 serial1: serial@91a20 {
190 device_type = "serial"; 188 device_type = "serial";
191 compatible = "fsl,mpc8560-scc-uart", 189 compatible = "fsl,mpc8560-scc-uart",
192 "fsl,cpm2-scc-uart"; 190 "fsl,cpm2-scc-uart";
@@ -198,17 +196,11 @@
198 interrupt-parent = <&cpmpic>; 196 interrupt-parent = <&cpmpic>;
199 }; 197 };
200 198
201 ethernet@91320 { 199 enet2: ethernet@91320 {
202 device_type = "network"; 200 device_type = "network";
203 compatible = "fsl,mpc8560-fcc-enet", 201 compatible = "fsl,mpc8560-fcc-enet",
204 "fsl,cpm2-fcc-enet"; 202 "fsl,cpm2-fcc-enet";
205 reg = <91320 20 88500 100 913b0 1>; 203 reg = <91320 20 88500 100 913b0 1>;
206 /*
207 * mac-address is deprecated and will be removed
208 * in 2.6.25. Only recent versions of
209 * U-Boot support local-mac-address, however.
210 */
211 mac-address = [ 00 00 00 00 00 00 ];
212 local-mac-address = [ 00 00 00 00 00 00 ]; 204 local-mac-address = [ 00 00 00 00 00 00 ];
213 fsl,cpm-command = <16200300>; 205 fsl,cpm-command = <16200300>;
214 interrupts = <21 8>; 206 interrupts = <21 8>;
@@ -216,17 +208,11 @@
216 phy-handle = <&phy2>; 208 phy-handle = <&phy2>;
217 }; 209 };
218 210
219 ethernet@91340 { 211 enet3: ethernet@91340 {
220 device_type = "network"; 212 device_type = "network";
221 compatible = "fsl,mpc8560-fcc-enet", 213 compatible = "fsl,mpc8560-fcc-enet",
222 "fsl,cpm2-fcc-enet"; 214 "fsl,cpm2-fcc-enet";
223 reg = <91340 20 88600 100 913d0 1>; 215 reg = <91340 20 88600 100 913d0 1>;
224 /*
225 * mac-address is deprecated and will be removed
226 * in 2.6.25. Only recent versions of
227 * U-Boot support local-mac-address, however.
228 */
229 mac-address = [ 00 00 00 00 00 00 ];
230 local-mac-address = [ 00 00 00 00 00 00 ]; 216 local-mac-address = [ 00 00 00 00 00 00 ];
231 fsl,cpm-command = <1a400300>; 217 fsl,cpm-command = <1a400300>;
232 interrupts = <22 8>; 218 interrupts = <22 8>;
@@ -236,7 +222,8 @@
236 }; 222 };
237 }; 223 };
238 224
239 pci@e0008000 { 225 pci0: pci@e0008000 {
226 cell-index = <0>;
240 #interrupt-cells = <1>; 227 #interrupt-cells = <1>;
241 #size-cells = <2>; 228 #size-cells = <2>;
242 #address-cells = <3>; 229 #address-cells = <3>;
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 54394372b12a..97bc048f2158 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -20,6 +20,17 @@
20 #address-cells = <1>; 20 #address-cells = <1>;
21 #size-cells = <1>; 21 #size-cells = <1>;
22 22
23 aliases {
24 ethernet0 = &enet0;
25 ethernet1 = &enet1;
26 ethernet2 = &enet2;
27 ethernet3 = &enet3;
28 serial0 = &serial0;
29 serial1 = &serial1;
30 pci0 = &pci0;
31 pci1 = &pci1;
32 };
33
23 cpus { 34 cpus {
24 #address-cells = <1>; 35 #address-cells = <1>;
25 #size-cells = <0>; 36 #size-cells = <0>;
@@ -74,7 +85,7 @@
74 i2c@3000 { 85 i2c@3000 {
75 #address-cells = <1>; 86 #address-cells = <1>;
76 #size-cells = <0>; 87 #size-cells = <0>;
77 device_type = "i2c"; 88 cell-index = <0>;
78 compatible = "fsl-i2c"; 89 compatible = "fsl-i2c";
79 reg = <3000 100>; 90 reg = <3000 100>;
80 interrupts = <2b 2>; 91 interrupts = <2b 2>;
@@ -90,7 +101,7 @@
90 i2c@3100 { 101 i2c@3100 {
91 #address-cells = <1>; 102 #address-cells = <1>;
92 #size-cells = <0>; 103 #size-cells = <0>;
93 device_type = "i2c"; 104 cell-index = <1>;
94 compatible = "fsl-i2c"; 105 compatible = "fsl-i2c";
95 reg = <3100 100>; 106 reg = <3100 100>;
96 interrupts = <2b 2>; 107 interrupts = <2b 2>;
@@ -101,9 +112,9 @@
101 mdio@24520 { 112 mdio@24520 {
102 #address-cells = <1>; 113 #address-cells = <1>;
103 #size-cells = <0>; 114 #size-cells = <0>;
104 device_type = "mdio"; 115 compatible = "fsl,gianfar-mdio";
105 compatible = "gianfar";
106 reg = <24520 20>; 116 reg = <24520 20>;
117
107 phy0: ethernet-phy@7 { 118 phy0: ethernet-phy@7 {
108 interrupt-parent = <&mpic>; 119 interrupt-parent = <&mpic>;
109 interrupts = <1 1>; 120 interrupts = <1 1>;
@@ -130,45 +141,32 @@
130 }; 141 };
131 }; 142 };
132 143
133 ethernet@24000 { 144 enet0: ethernet@24000 {
134 #address-cells = <1>; 145 cell-index = <0>;
135 #size-cells = <0>;
136 device_type = "network"; 146 device_type = "network";
137 model = "eTSEC"; 147 model = "eTSEC";
138 compatible = "gianfar"; 148 compatible = "gianfar";
139 reg = <24000 1000>; 149 reg = <24000 1000>;
140 /*
141 * mac-address is deprecated and will be removed
142 * in 2.6.25. Only recent versions of
143 * U-Boot support local-mac-address, however.
144 */
145 mac-address = [ 00 00 00 00 00 00 ];
146 local-mac-address = [ 00 00 00 00 00 00 ]; 150 local-mac-address = [ 00 00 00 00 00 00 ];
147 interrupts = <1d 2 1e 2 22 2>; 151 interrupts = <1d 2 1e 2 22 2>;
148 interrupt-parent = <&mpic>; 152 interrupt-parent = <&mpic>;
149 phy-handle = <&phy2>; 153 phy-handle = <&phy2>;
150 }; 154 };
151 155
152 ethernet@25000 { 156 enet1: ethernet@25000 {
153 #address-cells = <1>; 157 cell-index = <1>;
154 #size-cells = <0>;
155 device_type = "network"; 158 device_type = "network";
156 model = "eTSEC"; 159 model = "eTSEC";
157 compatible = "gianfar"; 160 compatible = "gianfar";
158 reg = <25000 1000>; 161 reg = <25000 1000>;
159 /*
160 * mac-address is deprecated and will be removed
161 * in 2.6.25. Only recent versions of
162 * U-Boot support local-mac-address, however.
163 */
164 mac-address = [ 00 00 00 00 00 00 ];
165 local-mac-address = [ 00 00 00 00 00 00 ]; 162 local-mac-address = [ 00 00 00 00 00 00 ];
166 interrupts = <23 2 24 2 28 2>; 163 interrupts = <23 2 24 2 28 2>;
167 interrupt-parent = <&mpic>; 164 interrupt-parent = <&mpic>;
168 phy-handle = <&phy3>; 165 phy-handle = <&phy3>;
169 }; 166 };
170 167
171 serial@4500 { 168 serial0: serial@4500 {
169 cell-index = <0>;
172 device_type = "serial"; 170 device_type = "serial";
173 compatible = "ns16550"; 171 compatible = "ns16550";
174 reg = <4500 100>; 172 reg = <4500 100>;
@@ -183,7 +181,8 @@
183 fsl,has-rstcr; 181 fsl,has-rstcr;
184 }; 182 };
185 183
186 serial@4600 { 184 serial1: serial@4600 {
185 cell-index = <1>;
187 device_type = "serial"; 186 device_type = "serial";
188 compatible = "ns16550"; 187 compatible = "ns16550";
189 reg = <4600 100>; 188 reg = <4600 100>;
@@ -285,24 +284,28 @@
285 #address-cells = <1>; 284 #address-cells = <1>;
286 #size-cells = <1>; 285 #size-cells = <1>;
287 device_type = "qe"; 286 device_type = "qe";
288 model = "QE"; 287 compatible = "fsl,qe";
289 ranges = <0 e0080000 00040000>; 288 ranges = <0 e0080000 00040000>;
290 reg = <e0080000 480>; 289 reg = <e0080000 480>;
291 brg-frequency = <0>; 290 brg-frequency = <0>;
292 bus-frequency = <179A7B00>; 291 bus-frequency = <179A7B00>;
293 292
294 muram@10000 { 293 muram@10000 {
295 device_type = "muram"; 294 #address-cells = <1>;
295 #size-cells = <1>;
296 compatible = "fsl,qe-muram", "fsl,cpm-muram";
296 ranges = <0 00010000 0000c000>; 297 ranges = <0 00010000 0000c000>;
297 298
298 data-only@0{ 299 data-only@0 {
300 compatible = "fsl,qe-muram-data",
301 "fsl,cpm-muram-data";
299 reg = <0 c000>; 302 reg = <0 c000>;
300 }; 303 };
301 }; 304 };
302 305
303 spi@4c0 { 306 spi@4c0 {
304 device_type = "spi"; 307 cell-index = <0>;
305 compatible = "fsl_spi"; 308 compatible = "fsl,spi";
306 reg = <4c0 40>; 309 reg = <4c0 40>;
307 interrupts = <2>; 310 interrupts = <2>;
308 interrupt-parent = <&qeic>; 311 interrupt-parent = <&qeic>;
@@ -310,53 +313,43 @@
310 }; 313 };
311 314
312 spi@500 { 315 spi@500 {
313 device_type = "spi"; 316 cell-index = <1>;
314 compatible = "fsl_spi"; 317 compatible = "fsl,spi";
315 reg = <500 40>; 318 reg = <500 40>;
316 interrupts = <1>; 319 interrupts = <1>;
317 interrupt-parent = <&qeic>; 320 interrupt-parent = <&qeic>;
318 mode = "cpu"; 321 mode = "cpu";
319 }; 322 };
320 323
321 ucc@2000 { 324 enet2: ucc@2000 {
322 device_type = "network"; 325 device_type = "network";
323 compatible = "ucc_geth"; 326 compatible = "ucc_geth";
324 model = "UCC"; 327 model = "UCC";
328 cell-index = <1>;
325 device-id = <1>; 329 device-id = <1>;
326 reg = <2000 200>; 330 reg = <2000 200>;
327 interrupts = <20>; 331 interrupts = <20>;
328 interrupt-parent = <&qeic>; 332 interrupt-parent = <&qeic>;
329 /*
330 * mac-address is deprecated and will be removed
331 * in 2.6.25. Only recent versions of
332 * U-Boot support local-mac-address, however.
333 */
334 mac-address = [ 00 00 00 00 00 00 ];
335 local-mac-address = [ 00 00 00 00 00 00 ]; 333 local-mac-address = [ 00 00 00 00 00 00 ];
336 rx-clock = <0>; 334 rx-clock-name = "none";
337 tx-clock = <20>; 335 tx-clock-name = "clk16";
338 pio-handle = <&pio1>; 336 pio-handle = <&pio1>;
339 phy-handle = <&phy0>; 337 phy-handle = <&phy0>;
340 phy-connection-type = "rgmii-id"; 338 phy-connection-type = "rgmii-id";
341 }; 339 };
342 340
343 ucc@3000 { 341 enet3: ucc@3000 {
344 device_type = "network"; 342 device_type = "network";
345 compatible = "ucc_geth"; 343 compatible = "ucc_geth";
346 model = "UCC"; 344 model = "UCC";
345 cell-index = <2>;
347 device-id = <2>; 346 device-id = <2>;
348 reg = <3000 200>; 347 reg = <3000 200>;
349 interrupts = <21>; 348 interrupts = <21>;
350 interrupt-parent = <&qeic>; 349 interrupt-parent = <&qeic>;
351 /*
352 * mac-address is deprecated and will be removed
353 * in 2.6.25. Only recent versions of
354 * U-Boot support local-mac-address, however.
355 */
356 mac-address = [ 00 00 00 00 00 00 ];
357 local-mac-address = [ 00 00 00 00 00 00 ]; 350 local-mac-address = [ 00 00 00 00 00 00 ];
358 rx-clock = <0>; 351 rx-clock-name = "none";
359 tx-clock = <20>; 352 tx-clock-name = "clk16";
360 pio-handle = <&pio2>; 353 pio-handle = <&pio2>;
361 phy-handle = <&phy1>; 354 phy-handle = <&phy1>;
362 phy-connection-type = "rgmii-id"; 355 phy-connection-type = "rgmii-id";
@@ -366,8 +359,7 @@
366 #address-cells = <1>; 359 #address-cells = <1>;
367 #size-cells = <0>; 360 #size-cells = <0>;
368 reg = <2120 18>; 361 reg = <2120 18>;
369 device_type = "mdio"; 362 compatible = "fsl,ucc-mdio";
370 compatible = "ucc_geth_phy";
371 363
372 /* These are the same PHYs as on 364 /* These are the same PHYs as on
373 * gianfar's MDIO bus */ 365 * gianfar's MDIO bus */
@@ -397,9 +389,9 @@
397 }; 389 };
398 }; 390 };
399 391
400 qeic: qeic@80 { 392 qeic: interrupt-controller@80 {
401 interrupt-controller; 393 interrupt-controller;
402 device_type = "qeic"; 394 compatible = "fsl,qe-ic";
403 #address-cells = <0>; 395 #address-cells = <0>;
404 #interrupt-cells = <1>; 396 #interrupt-cells = <1>;
405 reg = <80 80>; 397 reg = <80 80>;
@@ -410,7 +402,8 @@
410 402
411 }; 403 };
412 404
413 pci@e0008000 { 405 pci0: pci@e0008000 {
406 cell-index = <0>;
414 interrupt-map-mask = <f800 0 0 7>; 407 interrupt-map-mask = <f800 0 0 7>;
415 interrupt-map = < 408 interrupt-map = <
416 /* IDSEL 0x12 AD18 */ 409 /* IDSEL 0x12 AD18 */
@@ -440,7 +433,8 @@
440 }; 433 };
441 434
442 /* PCI Express */ 435 /* PCI Express */
443 pcie@e000a000 { 436 pci1: pcie@e000a000 {
437 cell-index = <2>;
444 interrupt-map-mask = <f800 0 0 7>; 438 interrupt-map-mask = <f800 0 0 7>;
445 interrupt-map = < 439 interrupt-map = <
446 440
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index 0eb44fb9647d..813c259abbe5 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -15,6 +15,18 @@
15 #address-cells = <1>; 15 #address-cells = <1>;
16 #size-cells = <1>; 16 #size-cells = <1>;
17 17
18 aliases {
19 ethernet0 = &enet0;
20 ethernet1 = &enet1;
21 ethernet2 = &enet2;
22 ethernet3 = &enet3;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 pci1 = &pci1;
27 pci2 = &pci2;
28 };
29
18 cpus { 30 cpus {
19 #address-cells = <1>; 31 #address-cells = <1>;
20 #size-cells = <0>; 32 #size-cells = <0>;
@@ -69,7 +81,9 @@
69 }; 81 };
70 82
71 i2c@3000 { 83 i2c@3000 {
72 device_type = "i2c"; 84 #address-cells = <1>;
85 #size-cells = <0>;
86 cell-index = <0>;
73 compatible = "fsl-i2c"; 87 compatible = "fsl-i2c";
74 reg = <3000 100>; 88 reg = <3000 100>;
75 interrupts = <2b 2>; 89 interrupts = <2b 2>;
@@ -78,7 +92,9 @@
78 }; 92 };
79 93
80 i2c@3100 { 94 i2c@3100 {
81 device_type = "i2c"; 95 #address-cells = <1>;
96 #size-cells = <0>;
97 cell-index = <1>;
82 compatible = "fsl-i2c"; 98 compatible = "fsl-i2c";
83 reg = <3100 100>; 99 reg = <3100 100>;
84 interrupts = <2b 2>; 100 interrupts = <2b 2>;
@@ -89,9 +105,9 @@
89 mdio@24520 { 105 mdio@24520 {
90 #address-cells = <1>; 106 #address-cells = <1>;
91 #size-cells = <0>; 107 #size-cells = <0>;
92 device_type = "mdio"; 108 compatible = "fsl,gianfar-mdio";
93 compatible = "gianfar";
94 reg = <24520 20>; 109 reg = <24520 20>;
110
95 phy0: ethernet-phy@0 { 111 phy0: ethernet-phy@0 {
96 interrupt-parent = <&mpic>; 112 interrupt-parent = <&mpic>;
97 interrupts = <a 1>; 113 interrupts = <a 1>;
@@ -114,9 +130,8 @@
114 }; 130 };
115 }; 131 };
116 132
117 ethernet@24000 { 133 enet0: ethernet@24000 {
118 #address-cells = <1>; 134 cell-index = <0>;
119 #size-cells = <0>;
120 device_type = "network"; 135 device_type = "network";
121 model = "eTSEC"; 136 model = "eTSEC";
122 compatible = "gianfar"; 137 compatible = "gianfar";
@@ -128,9 +143,8 @@
128 phy-connection-type = "rgmii-id"; 143 phy-connection-type = "rgmii-id";
129 }; 144 };
130 145
131 ethernet@25000 { 146 enet1: ethernet@25000 {
132 #address-cells = <1>; 147 cell-index = <1>;
133 #size-cells = <0>;
134 device_type = "network"; 148 device_type = "network";
135 model = "eTSEC"; 149 model = "eTSEC";
136 compatible = "gianfar"; 150 compatible = "gianfar";
@@ -142,9 +156,8 @@
142 phy-connection-type = "rgmii-id"; 156 phy-connection-type = "rgmii-id";
143 }; 157 };
144 158
145 ethernet@26000 { 159 enet2: ethernet@26000 {
146 #address-cells = <1>; 160 cell-index = <2>;
147 #size-cells = <0>;
148 device_type = "network"; 161 device_type = "network";
149 model = "eTSEC"; 162 model = "eTSEC";
150 compatible = "gianfar"; 163 compatible = "gianfar";
@@ -156,9 +169,8 @@
156 phy-connection-type = "rgmii-id"; 169 phy-connection-type = "rgmii-id";
157 }; 170 };
158 171
159 ethernet@27000 { 172 enet3: ethernet@27000 {
160 #address-cells = <1>; 173 cell-index = <3>;
161 #size-cells = <0>;
162 device_type = "network"; 174 device_type = "network";
163 model = "eTSEC"; 175 model = "eTSEC";
164 compatible = "gianfar"; 176 compatible = "gianfar";
@@ -170,7 +182,8 @@
170 phy-connection-type = "rgmii-id"; 182 phy-connection-type = "rgmii-id";
171 }; 183 };
172 184
173 serial@4500 { 185 serial0: serial@4500 {
186 cell-index = <0>;
174 device_type = "serial"; 187 device_type = "serial";
175 compatible = "ns16550"; 188 compatible = "ns16550";
176 reg = <4500 100>; 189 reg = <4500 100>;
@@ -179,7 +192,8 @@
179 interrupt-parent = <&mpic>; 192 interrupt-parent = <&mpic>;
180 }; 193 };
181 194
182 serial@4600 { 195 serial1: serial@4600 {
196 cell-index = <1>;
183 device_type = "serial"; 197 device_type = "serial";
184 compatible = "ns16550"; 198 compatible = "ns16550";
185 reg = <4600 100>; 199 reg = <4600 100>;
@@ -206,7 +220,8 @@
206 }; 220 };
207 }; 221 };
208 222
209 pcie@ffe08000 { 223 pci0: pcie@ffe08000 {
224 cell-index = <0>;
210 compatible = "fsl,mpc8548-pcie"; 225 compatible = "fsl,mpc8548-pcie";
211 device_type = "pci"; 226 device_type = "pci";
212 #interrupt-cells = <1>; 227 #interrupt-cells = <1>;
@@ -319,9 +334,9 @@
319 334
320 // IDSEL 0x1c USB 335 // IDSEL 0x1c USB
321 e000 0 0 1 &i8259 c 2 336 e000 0 0 1 &i8259 c 2
322 e100 0 0 1 &i8259 9 2 337 e100 0 0 2 &i8259 9 2
323 e200 0 0 1 &i8259 a 2 338 e200 0 0 3 &i8259 a 2
324 e300 0 0 1 &i8259 b 2 339 e300 0 0 4 &i8259 b 2
325 340
326 // IDSEL 0x1d Audio 341 // IDSEL 0x1d Audio
327 e800 0 0 1 &i8259 6 2 342 e800 0 0 1 &i8259 6 2
@@ -415,7 +430,8 @@
415 430
416 }; 431 };
417 432
418 pcie@ffe09000 { 433 pci1: pcie@ffe09000 {
434 cell-index = <1>;
419 compatible = "fsl,mpc8548-pcie"; 435 compatible = "fsl,mpc8548-pcie";
420 device_type = "pci"; 436 device_type = "pci";
421 #interrupt-cells = <1>; 437 #interrupt-cells = <1>;
@@ -451,7 +467,8 @@
451 }; 467 };
452 }; 468 };
453 469
454 pcie@ffe0a000 { 470 pci2: pcie@ffe0a000 {
471 cell-index = <2>;
455 compatible = "fsl,mpc8548-pcie"; 472 compatible = "fsl,mpc8548-pcie";
456 device_type = "pci"; 473 device_type = "pci";
457 #interrupt-cells = <1>; 474 #interrupt-cells = <1>;
@@ -464,6 +481,7 @@
464 clock-frequency = <1fca055>; 481 clock-frequency = <1fca055>;
465 interrupt-parent = <&mpic>; 482 interrupt-parent = <&mpic>;
466 interrupts = <1b 2>; 483 interrupts = <1b 2>;
484 interrupt-map-mask = <f800 0 0 7>;
467 interrupt-map = < 485 interrupt-map = <
468 /* IDSEL 0x0 */ 486 /* IDSEL 0x0 */
469 0000 0 0 1 &mpic 0 1 487 0000 0 0 1 &mpic 0 1
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 966edf1161a6..16c947b8a721 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -1,13 +1,14 @@
1/* 1/*
2 * MPC8610 HPCD Device Tree Source 2 * MPC8610 HPCD Device Tree Source
3 * 3 *
4 * Copyright 2007 Freescale Semiconductor Inc. 4 * Copyright 2007-2008 Freescale Semiconductor Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License Version 2 as published 7 * under the terms of the GNU General Public License Version 2 as published
8 * by the Free Software Foundation. 8 * by the Free Software Foundation.
9 */ 9 */
10 10
11/dts-v1/;
11 12
12/ { 13/ {
13 model = "MPC8610HPCD"; 14 model = "MPC8610HPCD";
@@ -15,6 +16,13 @@
15 #address-cells = <1>; 16 #address-cells = <1>;
16 #size-cells = <1>; 17 #size-cells = <1>;
17 18
19 aliases {
20 serial0 = &serial0;
21 serial1 = &serial1;
22 pci0 = &pci0;
23 pci1 = &pci1;
24 };
25
18 cpus { 26 cpus {
19 #address-cells = <1>; 27 #address-cells = <1>;
20 #size-cells = <0>; 28 #size-cells = <0>;
@@ -22,11 +30,11 @@
22 PowerPC,8610@0 { 30 PowerPC,8610@0 {
23 device_type = "cpu"; 31 device_type = "cpu";
24 reg = <0>; 32 reg = <0>;
25 d-cache-line-size = <d# 32>; // bytes 33 d-cache-line-size = <32>;
26 i-cache-line-size = <d# 32>; // bytes 34 i-cache-line-size = <32>;
27 d-cache-size = <8000>; // L1, 32K 35 d-cache-size = <32768>; // L1
28 i-cache-size = <8000>; // L1, 32K 36 i-cache-size = <32768>; // L1
29 timebase-frequency = <0>; // 33 MHz, from uboot 37 timebase-frequency = <0>; // From uboot
30 bus-frequency = <0>; // From uboot 38 bus-frequency = <0>; // From uboot
31 clock-frequency = <0>; // From uboot 39 clock-frequency = <0>; // From uboot
32 }; 40 };
@@ -34,7 +42,7 @@
34 42
35 memory { 43 memory {
36 device_type = "memory"; 44 device_type = "memory";
37 reg = <00000000 20000000>; // 512M at 0x0 45 reg = <0x00000000 0x20000000>; // 512M at 0x0
38 }; 46 };
39 47
40 soc@e0000000 { 48 soc@e0000000 {
@@ -42,57 +50,66 @@
42 #size-cells = <1>; 50 #size-cells = <1>;
43 #interrupt-cells = <2>; 51 #interrupt-cells = <2>;
44 device_type = "soc"; 52 device_type = "soc";
45 ranges = <0 e0000000 00100000>; 53 compatible = "fsl,mpc8610-immr", "simple-bus";
46 reg = <e0000000 1000>; 54 ranges = <0x0 0xe0000000 0x00100000>;
55 reg = <0xe0000000 0x1000>;
47 bus-frequency = <0>; 56 bus-frequency = <0>;
48 57
49 i2c@3000 { 58 i2c@3000 {
50 device_type = "i2c";
51 compatible = "fsl-i2c";
52 #address-cells = <1>; 59 #address-cells = <1>;
53 #size-cells = <0>; 60 #size-cells = <0>;
54 reg = <3000 100>; 61 cell-index = <0>;
55 interrupts = <2b 2>; 62 compatible = "fsl-i2c";
63 reg = <0x3000 0x100>;
64 interrupts = <43 2>;
56 interrupt-parent = <&mpic>; 65 interrupt-parent = <&mpic>;
57 dfsrr; 66 dfsrr;
67
68 cs4270:codec@4f {
69 compatible = "cirrus,cs4270";
70 reg = <0x4f>;
71 /* MCLK source is a stand-alone oscillator */
72 clock-frequency = <12288000>;
73 };
58 }; 74 };
59 75
60 i2c@3100 { 76 i2c@3100 {
61 device_type = "i2c";
62 compatible = "fsl-i2c";
63 #address-cells = <1>; 77 #address-cells = <1>;
64 #size-cells = <0>; 78 #size-cells = <0>;
65 reg = <3100 100>; 79 cell-index = <1>;
66 interrupts = <2b 2>; 80 compatible = "fsl-i2c";
81 reg = <0x3100 0x100>;
82 interrupts = <43 2>;
67 interrupt-parent = <&mpic>; 83 interrupt-parent = <&mpic>;
68 dfsrr; 84 dfsrr;
69 }; 85 };
70 86
71 serial@4500 { 87 serial0: serial@4500 {
88 cell-index = <0>;
72 device_type = "serial"; 89 device_type = "serial";
73 compatible = "ns16550"; 90 compatible = "ns16550";
74 reg = <4500 100>; 91 reg = <0x4500 0x100>;
75 clock-frequency = <0>; 92 clock-frequency = <0>;
76 interrupts = <2a 2>; 93 interrupts = <42 2>;
77 interrupt-parent = <&mpic>; 94 interrupt-parent = <&mpic>;
78 }; 95 };
79 96
80 serial@4600 { 97 serial1: serial@4600 {
98 cell-index = <1>;
81 device_type = "serial"; 99 device_type = "serial";
82 compatible = "ns16550"; 100 compatible = "ns16550";
83 reg = <4600 100>; 101 reg = <0x4600 0x100>;
84 clock-frequency = <0>; 102 clock-frequency = <0>;
85 interrupts = <1c 2>; 103 interrupts = <28 2>;
86 interrupt-parent = <&mpic>; 104 interrupt-parent = <&mpic>;
87 }; 105 };
88 106
89
90 mpic: interrupt-controller@40000 { 107 mpic: interrupt-controller@40000 {
91 clock-frequency = <0>; 108 clock-frequency = <0>;
92 interrupt-controller; 109 interrupt-controller;
93 #address-cells = <0>; 110 #address-cells = <0>;
94 #interrupt-cells = <2>; 111 #interrupt-cells = <2>;
95 reg = <40000 40000>; 112 reg = <0x40000 0x40000>;
96 compatible = "chrp,open-pic"; 113 compatible = "chrp,open-pic";
97 device_type = "open-pic"; 114 device_type = "open-pic";
98 big-endian; 115 big-endian;
@@ -100,68 +117,173 @@
100 117
101 global-utilities@e0000 { 118 global-utilities@e0000 {
102 compatible = "fsl,mpc8610-guts"; 119 compatible = "fsl,mpc8610-guts";
103 reg = <e0000 1000>; 120 reg = <0xe0000 0x1000>;
104 fsl,has-rstcr; 121 fsl,has-rstcr;
105 }; 122 };
123
124 i2s@16000 {
125 compatible = "fsl,mpc8610-ssi";
126 cell-index = <0>;
127 reg = <0x16000 0x100>;
128 interrupt-parent = <&mpic>;
129 interrupts = <62 2>;
130 fsl,mode = "i2s-slave";
131 codec-handle = <&cs4270>;
132 };
133
134 ssi@16100 {
135 compatible = "fsl,mpc8610-ssi";
136 cell-index = <1>;
137 reg = <0x16100 0x100>;
138 interrupt-parent = <&mpic>;
139 interrupts = <63 2>;
140 };
141
142 dma@21300 {
143 #address-cells = <1>;
144 #size-cells = <1>;
145 compatible = "fsl,mpc8610-dma", "fsl,eloplus-dma";
146 cell-index = <0>;
147 reg = <0x21300 0x4>; /* DMA general status register */
148 ranges = <0x0 0x21100 0x200>;
149
150 dma-channel@0 {
151 compatible = "fsl,mpc8610-dma-channel",
152 "fsl,eloplus-dma-channel";
153 cell-index = <0>;
154 reg = <0x0 0x80>;
155 interrupt-parent = <&mpic>;
156 interrupts = <20 2>;
157 };
158 dma-channel@1 {
159 compatible = "fsl,mpc8610-dma-channel",
160 "fsl,eloplus-dma-channel";
161 cell-index = <1>;
162 reg = <0x80 0x80>;
163 interrupt-parent = <&mpic>;
164 interrupts = <21 2>;
165 };
166 dma-channel@2 {
167 compatible = "fsl,mpc8610-dma-channel",
168 "fsl,eloplus-dma-channel";
169 cell-index = <2>;
170 reg = <0x100 0x80>;
171 interrupt-parent = <&mpic>;
172 interrupts = <22 2>;
173 };
174 dma-channel@3 {
175 compatible = "fsl,mpc8610-dma-channel",
176 "fsl,eloplus-dma-channel";
177 cell-index = <3>;
178 reg = <0x180 0x80>;
179 interrupt-parent = <&mpic>;
180 interrupts = <23 2>;
181 };
182 };
183
184 dma@c300 {
185 #address-cells = <1>;
186 #size-cells = <1>;
187 compatible = "fsl,mpc8610-dma", "fsl,mpc8540-dma";
188 cell-index = <1>;
189 reg = <0xc300 0x4>; /* DMA general status register */
190 ranges = <0x0 0xc100 0x200>;
191
192 dma-channel@0 {
193 compatible = "fsl,mpc8610-dma-channel",
194 "fsl,mpc8540-dma-channel";
195 cell-index = <0>;
196 reg = <0x0 0x80>;
197 interrupt-parent = <&mpic>;
198 interrupts = <60 2>;
199 };
200 dma-channel@1 {
201 compatible = "fsl,mpc8610-dma-channel",
202 "fsl,mpc8540-dma-channel";
203 cell-index = <1>;
204 reg = <0x80 0x80>;
205 interrupt-parent = <&mpic>;
206 interrupts = <61 2>;
207 };
208 dma-channel@2 {
209 compatible = "fsl,mpc8610-dma-channel",
210 "fsl,mpc8540-dma-channel";
211 cell-index = <2>;
212 reg = <0x100 0x80>;
213 interrupt-parent = <&mpic>;
214 interrupts = <62 2>;
215 };
216 dma-channel@3 {
217 compatible = "fsl,mpc8610-dma-channel",
218 "fsl,mpc8540-dma-channel";
219 cell-index = <3>;
220 reg = <0x180 0x80>;
221 interrupt-parent = <&mpic>;
222 interrupts = <63 2>;
223 };
224 };
225
106 }; 226 };
107 227
108 pci@e0008000 { 228 pci0: pci@e0008000 {
229 cell-index = <0>;
109 compatible = "fsl,mpc8610-pci"; 230 compatible = "fsl,mpc8610-pci";
110 device_type = "pci"; 231 device_type = "pci";
111 #interrupt-cells = <1>; 232 #interrupt-cells = <1>;
112 #size-cells = <2>; 233 #size-cells = <2>;
113 #address-cells = <3>; 234 #address-cells = <3>;
114 reg = <e0008000 1000>; 235 reg = <0xe0008000 0x1000>;
115 bus-range = <0 0>; 236 bus-range = <0 0>;
116 ranges = <02000000 0 80000000 80000000 0 10000000 237 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000
117 01000000 0 00000000 e1000000 0 00100000>; 238 0x01000000 0x0 0x00000000 0xe1000000 0x0 0x00100000>;
118 clock-frequency = <1fca055>; 239 clock-frequency = <33333333>;
119 interrupt-parent = <&mpic>; 240 interrupt-parent = <&mpic>;
120 interrupts = <18 2>; 241 interrupts = <24 2>;
121 interrupt-map-mask = <f800 0 0 7>; 242 interrupt-map-mask = <0xf800 0 0 7>;
122 interrupt-map = < 243 interrupt-map = <
123 /* IDSEL 0x11 */ 244 /* IDSEL 0x11 */
124 8800 0 0 1 &mpic 4 1 245 0x8800 0 0 1 &mpic 4 1
125 8800 0 0 2 &mpic 5 1 246 0x8800 0 0 2 &mpic 5 1
126 8800 0 0 3 &mpic 6 1 247 0x8800 0 0 3 &mpic 6 1
127 8800 0 0 4 &mpic 7 1 248 0x8800 0 0 4 &mpic 7 1
128 249
129 /* IDSEL 0x12 */ 250 /* IDSEL 0x12 */
130 9000 0 0 1 &mpic 5 1 251 0x9000 0 0 1 &mpic 5 1
131 9000 0 0 2 &mpic 6 1 252 0x9000 0 0 2 &mpic 6 1
132 9000 0 0 3 &mpic 7 1 253 0x9000 0 0 3 &mpic 7 1
133 9000 0 0 4 &mpic 4 1 254 0x9000 0 0 4 &mpic 4 1
134 >; 255 >;
135 }; 256 };
136 257
137 pcie@e000a000 { 258 pci1: pcie@e000a000 {
259 cell-index = <1>;
138 compatible = "fsl,mpc8641-pcie"; 260 compatible = "fsl,mpc8641-pcie";
139 device_type = "pci"; 261 device_type = "pci";
140 #interrupt-cells = <1>; 262 #interrupt-cells = <1>;
141 #size-cells = <2>; 263 #size-cells = <2>;
142 #address-cells = <3>; 264 #address-cells = <3>;
143 reg = <e000a000 1000>; 265 reg = <0xe000a000 0x1000>;
144 bus-range = <1 3>; 266 bus-range = <1 3>;
145 ranges = <02000000 0 a0000000 a0000000 0 10000000 267 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
146 01000000 0 00000000 e3000000 0 00100000>; 268 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
147 clock-frequency = <1fca055>; 269 clock-frequency = <33333333>;
148 interrupt-parent = <&mpic>; 270 interrupt-parent = <&mpic>;
149 interrupts = <1a 2>; 271 interrupts = <26 2>;
150 interrupt-map-mask = <f800 0 0 7>; 272 interrupt-map-mask = <0xf800 0 0 7>;
151 273
152 interrupt-map = < 274 interrupt-map = <
153 /* IDSEL 0x1b */ 275 /* IDSEL 0x1b */
154 d800 0 0 1 &mpic 2 1 276 0xd800 0 0 1 &mpic 2 1
155 277
156 /* IDSEL 0x1c*/ 278 /* IDSEL 0x1c*/
157 e000 0 0 1 &mpic 1 1 279 0xe000 0 0 1 &mpic 1 1
158 e000 0 0 2 &mpic 1 1 280 0xe000 0 0 2 &mpic 1 1
159 e000 0 0 3 &mpic 1 1 281 0xe000 0 0 3 &mpic 1 1
160 e000 0 0 4 &mpic 1 1 282 0xe000 0 0 4 &mpic 1 1
161 283
162 /* IDSEL 0x1f */ 284 /* IDSEL 0x1f */
163 f800 0 0 1 &mpic 3 0 285 0xf800 0 0 1 &mpic 3 0
164 f800 0 0 2 &mpic 0 1 286 0xf800 0 0 2 &mpic 0 1
165 >; 287 >;
166 288
167 pcie@0 { 289 pcie@0 {
@@ -169,22 +291,22 @@
169 #size-cells = <2>; 291 #size-cells = <2>;
170 #address-cells = <3>; 292 #address-cells = <3>;
171 device_type = "pci"; 293 device_type = "pci";
172 ranges = <02000000 0 a0000000 294 ranges = <0x02000000 0x0 0xa0000000
173 02000000 0 a0000000 295 0x02000000 0x0 0xa0000000
174 0 10000000 296 0x0 0x10000000
175 01000000 0 00000000 297 0x01000000 0x0 0x00000000
176 01000000 0 00000000 298 0x01000000 0x0 0x00000000
177 0 00100000>; 299 0x0 0x00100000>;
178 uli1575@0 { 300 uli1575@0 {
179 reg = <0 0 0 0 0>; 301 reg = <0 0 0 0 0>;
180 #size-cells = <2>; 302 #size-cells = <2>;
181 #address-cells = <3>; 303 #address-cells = <3>;
182 ranges = <02000000 0 a0000000 304 ranges = <0x02000000 0x0 0xa0000000
183 02000000 0 a0000000 305 0x02000000 0x0 0xa0000000
184 0 10000000 306 0x0 0x10000000
185 01000000 0 00000000 307 0x01000000 0x0 0x00000000
186 01000000 0 00000000 308 0x01000000 0x0 0x00000000
187 0 00100000>; 309 0x0 0x00100000>;
188 }; 310 };
189 }; 311 };
190 }; 312 };
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index abb26dc42558..79385bcd5c5f 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -9,6 +9,7 @@
9 * option) any later version. 9 * option) any later version.
10 */ 10 */
11 11
12/dts-v1/;
12 13
13/ { 14/ {
14 model = "MPC8641HPCN"; 15 model = "MPC8641HPCN";
@@ -16,6 +17,17 @@
16 #address-cells = <1>; 17 #address-cells = <1>;
17 #size-cells = <1>; 18 #size-cells = <1>;
18 19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 ethernet2 = &enet2;
24 ethernet3 = &enet3;
25 serial0 = &serial0;
26 serial1 = &serial1;
27 pci0 = &pci0;
28 pci1 = &pci1;
29 };
30
19 cpus { 31 cpus {
20 #address-cells = <1>; 32 #address-cells = <1>;
21 #size-cells = <0>; 33 #size-cells = <0>;
@@ -23,22 +35,22 @@
23 PowerPC,8641@0 { 35 PowerPC,8641@0 {
24 device_type = "cpu"; 36 device_type = "cpu";
25 reg = <0>; 37 reg = <0>;
26 d-cache-line-size = <20>; // 32 bytes 38 d-cache-line-size = <32>;
27 i-cache-line-size = <20>; // 32 bytes 39 i-cache-line-size = <32>;
28 d-cache-size = <8000>; // L1, 32K 40 d-cache-size = <32768>; // L1
29 i-cache-size = <8000>; // L1, 32K 41 i-cache-size = <32768>; // L1
30 timebase-frequency = <0>; // 33 MHz, from uboot 42 timebase-frequency = <0>; // From uboot
31 bus-frequency = <0>; // From uboot 43 bus-frequency = <0>; // From uboot
32 clock-frequency = <0>; // From uboot 44 clock-frequency = <0>; // From uboot
33 }; 45 };
34 PowerPC,8641@1 { 46 PowerPC,8641@1 {
35 device_type = "cpu"; 47 device_type = "cpu";
36 reg = <1>; 48 reg = <1>;
37 d-cache-line-size = <20>; // 32 bytes 49 d-cache-line-size = <32>;
38 i-cache-line-size = <20>; // 32 bytes 50 i-cache-line-size = <32>;
39 d-cache-size = <8000>; // L1, 32K 51 d-cache-size = <32768>;
40 i-cache-size = <8000>; // L1, 32K 52 i-cache-size = <32768>;
41 timebase-frequency = <0>; // 33 MHz, from uboot 53 timebase-frequency = <0>; // From uboot
42 bus-frequency = <0>; // From uboot 54 bus-frequency = <0>; // From uboot
43 clock-frequency = <0>; // From uboot 55 clock-frequency = <0>; // From uboot
44 }; 56 };
@@ -46,31 +58,77 @@
46 58
47 memory { 59 memory {
48 device_type = "memory"; 60 device_type = "memory";
49 reg = <00000000 40000000>; // 1G at 0x0 61 reg = <0x00000000 0x40000000>; // 1G at 0x0
62 };
63
64 localbus@f8005000 {
65 #address-cells = <2>;
66 #size-cells = <1>;
67 compatible = "fsl,mpc8641-localbus", "simple-bus";
68 reg = <0xf8005000 0x1000>;
69 interrupts = <19 2>;
70 interrupt-parent = <&mpic>;
71
72 ranges = <0 0 0xff800000 0x00800000
73 1 0 0xfe000000 0x01000000
74 2 0 0xf8200000 0x00100000
75 3 0 0xf8100000 0x00100000>;
76
77 flash@0,0 {
78 compatible = "cfi-flash";
79 reg = <0 0 0x00800000>;
80 bank-width = <2>;
81 device-width = <2>;
82 #address-cells = <1>;
83 #size-cells = <1>;
84 partition@0 {
85 label = "kernel";
86 reg = <0x00000000 0x00300000>;
87 };
88 partition@300000 {
89 label = "firmware b";
90 reg = <0x00300000 0x00100000>;
91 read-only;
92 };
93 partition@400000 {
94 label = "fs";
95 reg = <0x00400000 0x00300000>;
96 };
97 partition@700000 {
98 label = "firmware a";
99 reg = <0x00700000 0x00100000>;
100 read-only;
101 };
102 };
50 }; 103 };
51 104
52 soc8641@f8000000 { 105 soc8641@f8000000 {
53 #address-cells = <1>; 106 #address-cells = <1>;
54 #size-cells = <1>; 107 #size-cells = <1>;
55 device_type = "soc"; 108 device_type = "soc";
56 ranges = <00000000 f8000000 00100000>; 109 compatible = "simple-bus";
57 reg = <f8000000 00001000>; // CCSRBAR 110 ranges = <0x00000000 0xf8000000 0x00100000>;
111 reg = <0xf8000000 0x00001000>; // CCSRBAR
58 bus-frequency = <0>; 112 bus-frequency = <0>;
59 113
60 i2c@3000 { 114 i2c@3000 {
61 device_type = "i2c"; 115 #address-cells = <1>;
116 #size-cells = <0>;
117 cell-index = <0>;
62 compatible = "fsl-i2c"; 118 compatible = "fsl-i2c";
63 reg = <3000 100>; 119 reg = <0x3000 0x100>;
64 interrupts = <2b 2>; 120 interrupts = <43 2>;
65 interrupt-parent = <&mpic>; 121 interrupt-parent = <&mpic>;
66 dfsrr; 122 dfsrr;
67 }; 123 };
68 124
69 i2c@3100 { 125 i2c@3100 {
70 device_type = "i2c"; 126 #address-cells = <1>;
127 #size-cells = <0>;
128 cell-index = <1>;
71 compatible = "fsl-i2c"; 129 compatible = "fsl-i2c";
72 reg = <3100 100>; 130 reg = <0x3100 0x100>;
73 interrupts = <2b 2>; 131 interrupts = <43 2>;
74 interrupt-parent = <&mpic>; 132 interrupt-parent = <&mpic>;
75 dfsrr; 133 dfsrr;
76 }; 134 };
@@ -78,129 +136,104 @@
78 mdio@24520 { 136 mdio@24520 {
79 #address-cells = <1>; 137 #address-cells = <1>;
80 #size-cells = <0>; 138 #size-cells = <0>;
81 device_type = "mdio"; 139 compatible = "fsl,gianfar-mdio";
82 compatible = "gianfar"; 140 reg = <0x24520 0x20>;
83 reg = <24520 20>; 141
84 phy0: ethernet-phy@0 { 142 phy0: ethernet-phy@0 {
85 interrupt-parent = <&mpic>; 143 interrupt-parent = <&mpic>;
86 interrupts = <a 1>; 144 interrupts = <10 1>;
87 reg = <0>; 145 reg = <0>;
88 device_type = "ethernet-phy"; 146 device_type = "ethernet-phy";
89 }; 147 };
90 phy1: ethernet-phy@1 { 148 phy1: ethernet-phy@1 {
91 interrupt-parent = <&mpic>; 149 interrupt-parent = <&mpic>;
92 interrupts = <a 1>; 150 interrupts = <10 1>;
93 reg = <1>; 151 reg = <1>;
94 device_type = "ethernet-phy"; 152 device_type = "ethernet-phy";
95 }; 153 };
96 phy2: ethernet-phy@2 { 154 phy2: ethernet-phy@2 {
97 interrupt-parent = <&mpic>; 155 interrupt-parent = <&mpic>;
98 interrupts = <a 1>; 156 interrupts = <10 1>;
99 reg = <2>; 157 reg = <2>;
100 device_type = "ethernet-phy"; 158 device_type = "ethernet-phy";
101 }; 159 };
102 phy3: ethernet-phy@3 { 160 phy3: ethernet-phy@3 {
103 interrupt-parent = <&mpic>; 161 interrupt-parent = <&mpic>;
104 interrupts = <a 1>; 162 interrupts = <10 1>;
105 reg = <3>; 163 reg = <3>;
106 device_type = "ethernet-phy"; 164 device_type = "ethernet-phy";
107 }; 165 };
108 }; 166 };
109 167
110 ethernet@24000 { 168 enet0: ethernet@24000 {
111 #address-cells = <1>; 169 cell-index = <0>;
112 #size-cells = <0>;
113 device_type = "network"; 170 device_type = "network";
114 model = "TSEC"; 171 model = "TSEC";
115 compatible = "gianfar"; 172 compatible = "gianfar";
116 reg = <24000 1000>; 173 reg = <0x24000 0x1000>;
117 /*
118 * mac-address is deprecated and will be removed
119 * in 2.6.25. Only recent versions of
120 * U-Boot support local-mac-address, however.
121 */
122 mac-address = [ 00 00 00 00 00 00 ];
123 local-mac-address = [ 00 00 00 00 00 00 ]; 174 local-mac-address = [ 00 00 00 00 00 00 ];
124 interrupts = <1d 2 1e 2 22 2>; 175 interrupts = <29 2 30 2 34 2>;
125 interrupt-parent = <&mpic>; 176 interrupt-parent = <&mpic>;
126 phy-handle = <&phy0>; 177 phy-handle = <&phy0>;
127 phy-connection-type = "rgmii-id"; 178 phy-connection-type = "rgmii-id";
128 }; 179 };
129 180
130 ethernet@25000 { 181 enet1: ethernet@25000 {
131 #address-cells = <1>; 182 cell-index = <1>;
132 #size-cells = <0>;
133 device_type = "network"; 183 device_type = "network";
134 model = "TSEC"; 184 model = "TSEC";
135 compatible = "gianfar"; 185 compatible = "gianfar";
136 reg = <25000 1000>; 186 reg = <0x25000 0x1000>;
137 /*
138 * mac-address is deprecated and will be removed
139 * in 2.6.25. Only recent versions of
140 * U-Boot support local-mac-address, however.
141 */
142 mac-address = [ 00 00 00 00 00 00 ];
143 local-mac-address = [ 00 00 00 00 00 00 ]; 187 local-mac-address = [ 00 00 00 00 00 00 ];
144 interrupts = <23 2 24 2 28 2>; 188 interrupts = <35 2 36 2 40 2>;
145 interrupt-parent = <&mpic>; 189 interrupt-parent = <&mpic>;
146 phy-handle = <&phy1>; 190 phy-handle = <&phy1>;
147 phy-connection-type = "rgmii-id"; 191 phy-connection-type = "rgmii-id";
148 }; 192 };
149 193
150 ethernet@26000 { 194 enet2: ethernet@26000 {
151 #address-cells = <1>; 195 cell-index = <2>;
152 #size-cells = <0>;
153 device_type = "network"; 196 device_type = "network";
154 model = "TSEC"; 197 model = "TSEC";
155 compatible = "gianfar"; 198 compatible = "gianfar";
156 reg = <26000 1000>; 199 reg = <0x26000 0x1000>;
157 /*
158 * mac-address is deprecated and will be removed
159 * in 2.6.25. Only recent versions of
160 * U-Boot support local-mac-address, however.
161 */
162 mac-address = [ 00 00 00 00 00 00 ];
163 local-mac-address = [ 00 00 00 00 00 00 ]; 200 local-mac-address = [ 00 00 00 00 00 00 ];
164 interrupts = <1F 2 20 2 21 2>; 201 interrupts = <31 2 32 2 33 2>;
165 interrupt-parent = <&mpic>; 202 interrupt-parent = <&mpic>;
166 phy-handle = <&phy2>; 203 phy-handle = <&phy2>;
167 phy-connection-type = "rgmii-id"; 204 phy-connection-type = "rgmii-id";
168 }; 205 };
169 206
170 ethernet@27000 { 207 enet3: ethernet@27000 {
171 #address-cells = <1>; 208 cell-index = <3>;
172 #size-cells = <0>;
173 device_type = "network"; 209 device_type = "network";
174 model = "TSEC"; 210 model = "TSEC";
175 compatible = "gianfar"; 211 compatible = "gianfar";
176 reg = <27000 1000>; 212 reg = <0x27000 0x1000>;
177 /*
178 * mac-address is deprecated and will be removed
179 * in 2.6.25. Only recent versions of
180 * U-Boot support local-mac-address, however.
181 */
182 mac-address = [ 00 00 00 00 00 00 ];
183 local-mac-address = [ 00 00 00 00 00 00 ]; 213 local-mac-address = [ 00 00 00 00 00 00 ];
184 interrupts = <25 2 26 2 27 2>; 214 interrupts = <37 2 38 2 39 2>;
185 interrupt-parent = <&mpic>; 215 interrupt-parent = <&mpic>;
186 phy-handle = <&phy3>; 216 phy-handle = <&phy3>;
187 phy-connection-type = "rgmii-id"; 217 phy-connection-type = "rgmii-id";
188 }; 218 };
189 serial@4500 { 219
220 serial0: serial@4500 {
221 cell-index = <0>;
190 device_type = "serial"; 222 device_type = "serial";
191 compatible = "ns16550"; 223 compatible = "ns16550";
192 reg = <4500 100>; 224 reg = <0x4500 0x100>;
193 clock-frequency = <0>; 225 clock-frequency = <0>;
194 interrupts = <2a 2>; 226 interrupts = <42 2>;
195 interrupt-parent = <&mpic>; 227 interrupt-parent = <&mpic>;
196 }; 228 };
197 229
198 serial@4600 { 230 serial1: serial@4600 {
231 cell-index = <1>;
199 device_type = "serial"; 232 device_type = "serial";
200 compatible = "ns16550"; 233 compatible = "ns16550";
201 reg = <4600 100>; 234 reg = <0x4600 0x100>;
202 clock-frequency = <0>; 235 clock-frequency = <0>;
203 interrupts = <1c 2>; 236 interrupts = <28 2>;
204 interrupt-parent = <&mpic>; 237 interrupt-parent = <&mpic>;
205 }; 238 };
206 239
@@ -209,7 +242,7 @@
209 interrupt-controller; 242 interrupt-controller;
210 #address-cells = <0>; 243 #address-cells = <0>;
211 #interrupt-cells = <2>; 244 #interrupt-cells = <2>;
212 reg = <40000 40000>; 245 reg = <0x40000 0x40000>;
213 compatible = "chrp,open-pic"; 246 compatible = "chrp,open-pic";
214 device_type = "open-pic"; 247 device_type = "open-pic";
215 big-endian; 248 big-endian;
@@ -217,138 +250,139 @@
217 250
218 global-utilities@e0000 { 251 global-utilities@e0000 {
219 compatible = "fsl,mpc8641-guts"; 252 compatible = "fsl,mpc8641-guts";
220 reg = <e0000 1000>; 253 reg = <0xe0000 0x1000>;
221 fsl,has-rstcr; 254 fsl,has-rstcr;
222 }; 255 };
223 }; 256 };
224 257
225 pcie@f8008000 { 258 pci0: pcie@f8008000 {
259 cell-index = <0>;
226 compatible = "fsl,mpc8641-pcie"; 260 compatible = "fsl,mpc8641-pcie";
227 device_type = "pci"; 261 device_type = "pci";
228 #interrupt-cells = <1>; 262 #interrupt-cells = <1>;
229 #size-cells = <2>; 263 #size-cells = <2>;
230 #address-cells = <3>; 264 #address-cells = <3>;
231 reg = <f8008000 1000>; 265 reg = <0xf8008000 0x1000>;
232 bus-range = <0 ff>; 266 bus-range = <0x0 0xff>;
233 ranges = <02000000 0 80000000 80000000 0 20000000 267 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
234 01000000 0 00000000 e2000000 0 00100000>; 268 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
235 clock-frequency = <1fca055>; 269 clock-frequency = <33333333>;
236 interrupt-parent = <&mpic>; 270 interrupt-parent = <&mpic>;
237 interrupts = <18 2>; 271 interrupts = <24 2>;
238 interrupt-map-mask = <ff00 0 0 7>; 272 interrupt-map-mask = <0xff00 0 0 7>;
239 interrupt-map = < 273 interrupt-map = <
240 /* IDSEL 0x11 func 0 - PCI slot 1 */ 274 /* IDSEL 0x11 func 0 - PCI slot 1 */
241 8800 0 0 1 &mpic 2 1 275 0x8800 0 0 1 &mpic 2 1
242 8800 0 0 2 &mpic 3 1 276 0x8800 0 0 2 &mpic 3 1
243 8800 0 0 3 &mpic 4 1 277 0x8800 0 0 3 &mpic 4 1
244 8800 0 0 4 &mpic 1 1 278 0x8800 0 0 4 &mpic 1 1
245 279
246 /* IDSEL 0x11 func 1 - PCI slot 1 */ 280 /* IDSEL 0x11 func 1 - PCI slot 1 */
247 8900 0 0 1 &mpic 2 1 281 0x8900 0 0 1 &mpic 2 1
248 8900 0 0 2 &mpic 3 1 282 0x8900 0 0 2 &mpic 3 1
249 8900 0 0 3 &mpic 4 1 283 0x8900 0 0 3 &mpic 4 1
250 8900 0 0 4 &mpic 1 1 284 0x8900 0 0 4 &mpic 1 1
251 285
252 /* IDSEL 0x11 func 2 - PCI slot 1 */ 286 /* IDSEL 0x11 func 2 - PCI slot 1 */
253 8a00 0 0 1 &mpic 2 1 287 0x8a00 0 0 1 &mpic 2 1
254 8a00 0 0 2 &mpic 3 1 288 0x8a00 0 0 2 &mpic 3 1
255 8a00 0 0 3 &mpic 4 1 289 0x8a00 0 0 3 &mpic 4 1
256 8a00 0 0 4 &mpic 1 1 290 0x8a00 0 0 4 &mpic 1 1
257 291
258 /* IDSEL 0x11 func 3 - PCI slot 1 */ 292 /* IDSEL 0x11 func 3 - PCI slot 1 */
259 8b00 0 0 1 &mpic 2 1 293 0x8b00 0 0 1 &mpic 2 1
260 8b00 0 0 2 &mpic 3 1 294 0x8b00 0 0 2 &mpic 3 1
261 8b00 0 0 3 &mpic 4 1 295 0x8b00 0 0 3 &mpic 4 1
262 8b00 0 0 4 &mpic 1 1 296 0x8b00 0 0 4 &mpic 1 1
263 297
264 /* IDSEL 0x11 func 4 - PCI slot 1 */ 298 /* IDSEL 0x11 func 4 - PCI slot 1 */
265 8c00 0 0 1 &mpic 2 1 299 0x8c00 0 0 1 &mpic 2 1
266 8c00 0 0 2 &mpic 3 1 300 0x8c00 0 0 2 &mpic 3 1
267 8c00 0 0 3 &mpic 4 1 301 0x8c00 0 0 3 &mpic 4 1
268 8c00 0 0 4 &mpic 1 1 302 0x8c00 0 0 4 &mpic 1 1
269 303
270 /* IDSEL 0x11 func 5 - PCI slot 1 */ 304 /* IDSEL 0x11 func 5 - PCI slot 1 */
271 8d00 0 0 1 &mpic 2 1 305 0x8d00 0 0 1 &mpic 2 1
272 8d00 0 0 2 &mpic 3 1 306 0x8d00 0 0 2 &mpic 3 1
273 8d00 0 0 3 &mpic 4 1 307 0x8d00 0 0 3 &mpic 4 1
274 8d00 0 0 4 &mpic 1 1 308 0x8d00 0 0 4 &mpic 1 1
275 309
276 /* IDSEL 0x11 func 6 - PCI slot 1 */ 310 /* IDSEL 0x11 func 6 - PCI slot 1 */
277 8e00 0 0 1 &mpic 2 1 311 0x8e00 0 0 1 &mpic 2 1
278 8e00 0 0 2 &mpic 3 1 312 0x8e00 0 0 2 &mpic 3 1
279 8e00 0 0 3 &mpic 4 1 313 0x8e00 0 0 3 &mpic 4 1
280 8e00 0 0 4 &mpic 1 1 314 0x8e00 0 0 4 &mpic 1 1
281 315
282 /* IDSEL 0x11 func 7 - PCI slot 1 */ 316 /* IDSEL 0x11 func 7 - PCI slot 1 */
283 8f00 0 0 1 &mpic 2 1 317 0x8f00 0 0 1 &mpic 2 1
284 8f00 0 0 2 &mpic 3 1 318 0x8f00 0 0 2 &mpic 3 1
285 8f00 0 0 3 &mpic 4 1 319 0x8f00 0 0 3 &mpic 4 1
286 8f00 0 0 4 &mpic 1 1 320 0x8f00 0 0 4 &mpic 1 1
287 321
288 /* IDSEL 0x12 func 0 - PCI slot 2 */ 322 /* IDSEL 0x12 func 0 - PCI slot 2 */
289 9000 0 0 1 &mpic 3 1 323 0x9000 0 0 1 &mpic 3 1
290 9000 0 0 2 &mpic 4 1 324 0x9000 0 0 2 &mpic 4 1
291 9000 0 0 3 &mpic 1 1 325 0x9000 0 0 3 &mpic 1 1
292 9000 0 0 4 &mpic 2 1 326 0x9000 0 0 4 &mpic 2 1
293 327
294 /* IDSEL 0x12 func 1 - PCI slot 2 */ 328 /* IDSEL 0x12 func 1 - PCI slot 2 */
295 9100 0 0 1 &mpic 3 1 329 0x9100 0 0 1 &mpic 3 1
296 9100 0 0 2 &mpic 4 1 330 0x9100 0 0 2 &mpic 4 1
297 9100 0 0 3 &mpic 1 1 331 0x9100 0 0 3 &mpic 1 1
298 9100 0 0 4 &mpic 2 1 332 0x9100 0 0 4 &mpic 2 1
299 333
300 /* IDSEL 0x12 func 2 - PCI slot 2 */ 334 /* IDSEL 0x12 func 2 - PCI slot 2 */
301 9200 0 0 1 &mpic 3 1 335 0x9200 0 0 1 &mpic 3 1
302 9200 0 0 2 &mpic 4 1 336 0x9200 0 0 2 &mpic 4 1
303 9200 0 0 3 &mpic 1 1 337 0x9200 0 0 3 &mpic 1 1
304 9200 0 0 4 &mpic 2 1 338 0x9200 0 0 4 &mpic 2 1
305 339
306 /* IDSEL 0x12 func 3 - PCI slot 2 */ 340 /* IDSEL 0x12 func 3 - PCI slot 2 */
307 9300 0 0 1 &mpic 3 1 341 0x9300 0 0 1 &mpic 3 1
308 9300 0 0 2 &mpic 4 1 342 0x9300 0 0 2 &mpic 4 1
309 9300 0 0 3 &mpic 1 1 343 0x9300 0 0 3 &mpic 1 1
310 9300 0 0 4 &mpic 2 1 344 0x9300 0 0 4 &mpic 2 1
311 345
312 /* IDSEL 0x12 func 4 - PCI slot 2 */ 346 /* IDSEL 0x12 func 4 - PCI slot 2 */
313 9400 0 0 1 &mpic 3 1 347 0x9400 0 0 1 &mpic 3 1
314 9400 0 0 2 &mpic 4 1 348 0x9400 0 0 2 &mpic 4 1
315 9400 0 0 3 &mpic 1 1 349 0x9400 0 0 3 &mpic 1 1
316 9400 0 0 4 &mpic 2 1 350 0x9400 0 0 4 &mpic 2 1
317 351
318 /* IDSEL 0x12 func 5 - PCI slot 2 */ 352 /* IDSEL 0x12 func 5 - PCI slot 2 */
319 9500 0 0 1 &mpic 3 1 353 0x9500 0 0 1 &mpic 3 1
320 9500 0 0 2 &mpic 4 1 354 0x9500 0 0 2 &mpic 4 1
321 9500 0 0 3 &mpic 1 1 355 0x9500 0 0 3 &mpic 1 1
322 9500 0 0 4 &mpic 2 1 356 0x9500 0 0 4 &mpic 2 1
323 357
324 /* IDSEL 0x12 func 6 - PCI slot 2 */ 358 /* IDSEL 0x12 func 6 - PCI slot 2 */
325 9600 0 0 1 &mpic 3 1 359 0x9600 0 0 1 &mpic 3 1
326 9600 0 0 2 &mpic 4 1 360 0x9600 0 0 2 &mpic 4 1
327 9600 0 0 3 &mpic 1 1 361 0x9600 0 0 3 &mpic 1 1
328 9600 0 0 4 &mpic 2 1 362 0x9600 0 0 4 &mpic 2 1
329 363
330 /* IDSEL 0x12 func 7 - PCI slot 2 */ 364 /* IDSEL 0x12 func 7 - PCI slot 2 */
331 9700 0 0 1 &mpic 3 1 365 0x9700 0 0 1 &mpic 3 1
332 9700 0 0 2 &mpic 4 1 366 0x9700 0 0 2 &mpic 4 1
333 9700 0 0 3 &mpic 1 1 367 0x9700 0 0 3 &mpic 1 1
334 9700 0 0 4 &mpic 2 1 368 0x9700 0 0 4 &mpic 2 1
335 369
336 // IDSEL 0x1c USB 370 // IDSEL 0x1c USB
337 e000 0 0 1 &i8259 c 2 371 0xe000 0 0 1 &i8259 12 2
338 e100 0 0 1 &i8259 9 2 372 0xe100 0 0 2 &i8259 9 2
339 e200 0 0 1 &i8259 a 2 373 0xe200 0 0 3 &i8259 10 2
340 e300 0 0 1 &i8259 b 2 374 0xe300 0 0 4 &i8259 112
341 375
342 // IDSEL 0x1d Audio 376 // IDSEL 0x1d Audio
343 e800 0 0 1 &i8259 6 2 377 0xe800 0 0 1 &i8259 6 2
344 378
345 // IDSEL 0x1e Legacy 379 // IDSEL 0x1e Legacy
346 f000 0 0 1 &i8259 7 2 380 0xf000 0 0 1 &i8259 7 2
347 f100 0 0 1 &i8259 7 2 381 0xf100 0 0 1 &i8259 7 2
348 382
349 // IDSEL 0x1f IDE/SATA 383 // IDSEL 0x1f IDE/SATA
350 f800 0 0 1 &i8259 e 2 384 0xf800 0 0 1 &i8259 14 2
351 f900 0 0 1 &i8259 5 2 385 0xf900 0 0 1 &i8259 5 2
352 >; 386 >;
353 387
354 pcie@0 { 388 pcie@0 {
@@ -356,37 +390,37 @@
356 #size-cells = <2>; 390 #size-cells = <2>;
357 #address-cells = <3>; 391 #address-cells = <3>;
358 device_type = "pci"; 392 device_type = "pci";
359 ranges = <02000000 0 80000000 393 ranges = <0x02000000 0x0 0x80000000
360 02000000 0 80000000 394 0x02000000 0x0 0x80000000
361 0 20000000 395 0x0 0x20000000
362 396
363 01000000 0 00000000 397 0x01000000 0x0 0x00000000
364 01000000 0 00000000 398 0x01000000 0x0 0x00000000
365 0 00100000>; 399 0x0 0x00100000>;
366 uli1575@0 { 400 uli1575@0 {
367 reg = <0 0 0 0 0>; 401 reg = <0 0 0 0 0>;
368 #size-cells = <2>; 402 #size-cells = <2>;
369 #address-cells = <3>; 403 #address-cells = <3>;
370 ranges = <02000000 0 80000000 404 ranges = <0x02000000 0x0 0x80000000
371 02000000 0 80000000 405 0x02000000 0x0 0x80000000
372 0 20000000 406 0x0 0x20000000
373 01000000 0 00000000 407 0x01000000 0x0 0x00000000
374 01000000 0 00000000 408 0x01000000 0x0 0x00000000
375 0 00100000>; 409 0x0 0x00100000>;
376 isa@1e { 410 isa@1e {
377 device_type = "isa"; 411 device_type = "isa";
378 #interrupt-cells = <2>; 412 #interrupt-cells = <2>;
379 #size-cells = <1>; 413 #size-cells = <1>;
380 #address-cells = <2>; 414 #address-cells = <2>;
381 reg = <f000 0 0 0 0>; 415 reg = <0xf000 0 0 0 0>;
382 ranges = <1 0 01000000 0 0 416 ranges = <1 0 0x01000000 0 0
383 00001000>; 417 0x00001000>;
384 interrupt-parent = <&i8259>; 418 interrupt-parent = <&i8259>;
385 419
386 i8259: interrupt-controller@20 { 420 i8259: interrupt-controller@20 {
387 reg = <1 20 2 421 reg = <1 0x20 2
388 1 a0 2 422 1 0xa0 2
389 1 4d0 2>; 423 1 0x4d0 2>;
390 interrupt-controller; 424 interrupt-controller;
391 device_type = "interrupt-controller"; 425 device_type = "interrupt-controller";
392 #address-cells = <0>; 426 #address-cells = <0>;
@@ -399,8 +433,8 @@
399 i8042@60 { 433 i8042@60 {
400 #size-cells = <0>; 434 #size-cells = <0>;
401 #address-cells = <1>; 435 #address-cells = <1>;
402 reg = <1 60 1 1 64 1>; 436 reg = <1 0x60 1 1 0x64 1>;
403 interrupts = <1 3 c 3>; 437 interrupts = <1 3 12 3>;
404 interrupt-parent = 438 interrupt-parent =
405 <&i8259>; 439 <&i8259>;
406 440
@@ -418,11 +452,11 @@
418 rtc@70 { 452 rtc@70 {
419 compatible = 453 compatible =
420 "pnpPNP,b00"; 454 "pnpPNP,b00";
421 reg = <1 70 2>; 455 reg = <1 0x70 2>;
422 }; 456 };
423 457
424 gpio@400 { 458 gpio@400 {
425 reg = <1 400 80>; 459 reg = <1 0x400 0x80>;
426 }; 460 };
427 }; 461 };
428 }; 462 };
@@ -430,39 +464,40 @@
430 464
431 }; 465 };
432 466
433 pcie@f8009000 { 467 pci1: pcie@f8009000 {
468 cell-index = <1>;
434 compatible = "fsl,mpc8641-pcie"; 469 compatible = "fsl,mpc8641-pcie";
435 device_type = "pci"; 470 device_type = "pci";
436 #interrupt-cells = <1>; 471 #interrupt-cells = <1>;
437 #size-cells = <2>; 472 #size-cells = <2>;
438 #address-cells = <3>; 473 #address-cells = <3>;
439 reg = <f8009000 1000>; 474 reg = <0xf8009000 0x1000>;
440 bus-range = <0 ff>; 475 bus-range = <0 0xff>;
441 ranges = <02000000 0 a0000000 a0000000 0 20000000 476 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
442 01000000 0 00000000 e3000000 0 00100000>; 477 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
443 clock-frequency = <1fca055>; 478 clock-frequency = <33333333>;
444 interrupt-parent = <&mpic>; 479 interrupt-parent = <&mpic>;
445 interrupts = <19 2>; 480 interrupts = <25 2>;
446 interrupt-map-mask = <f800 0 0 7>; 481 interrupt-map-mask = <0xf800 0 0 7>;
447 interrupt-map = < 482 interrupt-map = <
448 /* IDSEL 0x0 */ 483 /* IDSEL 0x0 */
449 0000 0 0 1 &mpic 4 1 484 0x0000 0 0 1 &mpic 4 1
450 0000 0 0 2 &mpic 5 1 485 0x0000 0 0 2 &mpic 5 1
451 0000 0 0 3 &mpic 6 1 486 0x0000 0 0 3 &mpic 6 1
452 0000 0 0 4 &mpic 7 1 487 0x0000 0 0 4 &mpic 7 1
453 >; 488 >;
454 pcie@0 { 489 pcie@0 {
455 reg = <0 0 0 0 0>; 490 reg = <0 0 0 0 0>;
456 #size-cells = <2>; 491 #size-cells = <2>;
457 #address-cells = <3>; 492 #address-cells = <3>;
458 device_type = "pci"; 493 device_type = "pci";
459 ranges = <02000000 0 a0000000 494 ranges = <0x02000000 0x0 0xa0000000
460 02000000 0 a0000000 495 0x02000000 0x0 0xa0000000
461 0 20000000 496 0x0 0x20000000
462 497
463 01000000 0 00000000 498 0x01000000 0x0 0x00000000
464 01000000 0 00000000 499 0x01000000 0x0 0x00000000
465 0 00100000>; 500 0x0 0x00100000>;
466 }; 501 };
467 }; 502 };
468}; 503};
diff --git a/arch/powerpc/boot/dts/mpc866ads.dts b/arch/powerpc/boot/dts/mpc866ads.dts
index 90f2293ed3cd..daf9433e906b 100644
--- a/arch/powerpc/boot/dts/mpc866ads.dts
+++ b/arch/powerpc/boot/dts/mpc866ads.dts
@@ -12,7 +12,7 @@
12 12
13/ { 13/ {
14 model = "MPC866ADS"; 14 model = "MPC866ADS";
15 compatible = "mpc8xx"; 15 compatible = "fsl,mpc866ads";
16 #address-cells = <1>; 16 #address-cells = <1>;
17 #size-cells = <1>; 17 #size-cells = <1>;
18 18
@@ -23,15 +23,15 @@
23 PowerPC,866@0 { 23 PowerPC,866@0 {
24 device_type = "cpu"; 24 device_type = "cpu";
25 reg = <0>; 25 reg = <0>;
26 d-cache-line-size = <20>; // 32 bytes 26 d-cache-line-size = <10>; // 16 bytes
27 i-cache-line-size = <20>; // 32 bytes 27 i-cache-line-size = <10>; // 16 bytes
28 d-cache-size = <2000>; // L1, 8K 28 d-cache-size = <2000>; // L1, 8K
29 i-cache-size = <4000>; // L1, 16K 29 i-cache-size = <4000>; // L1, 16K
30 timebase-frequency = <0>; 30 timebase-frequency = <0>;
31 bus-frequency = <0>; 31 bus-frequency = <0>;
32 clock-frequency = <0>; 32 clock-frequency = <0>;
33 interrupts = <f 2>; // decrementer interrupt 33 interrupts = <f 2>; // decrementer interrupt
34 interrupt-parent = <&Mpc8xx_pic>; 34 interrupt-parent = <&PIC>;
35 }; 35 };
36 }; 36 };
37 37
@@ -40,107 +40,139 @@
40 reg = <00000000 800000>; 40 reg = <00000000 800000>;
41 }; 41 };
42 42
43 soc866@ff000000 { 43 localbus@ff000100 {
44 compatible = "fsl,mpc866-localbus", "fsl,pq1-localbus";
45 #address-cells = <2>;
46 #size-cells = <1>;
47 reg = <ff000100 40>;
48
49 ranges = <
50 1 0 ff080000 00008000
51 5 0 ff0a0000 00008000
52 >;
53
54 board-control@1,0 {
55 reg = <1 0 20 5 300 4>;
56 compatible = "fsl,mpc866ads-bcsr";
57 };
58 };
59
60 soc@ff000000 {
44 #address-cells = <1>; 61 #address-cells = <1>;
45 #size-cells = <1>; 62 #size-cells = <1>;
46 device_type = "soc"; 63 device_type = "soc";
47 ranges = <0 ff000000 00100000>; 64 ranges = <0 ff000000 00100000>;
48 reg = <ff000000 00000200>; 65 reg = <ff000000 00000200>;
49 bus-frequency = <0>; 66 bus-frequency = <0>;
50 mdio@e80 { 67
51 device_type = "mdio"; 68 mdio@e00 {
52 compatible = "fs_enet"; 69 compatible = "fsl,mpc866-fec-mdio", "fsl,pq1-fec-mdio";
53 reg = <e80 8>; 70 reg = <e00 188>;
54 #address-cells = <1>; 71 #address-cells = <1>;
55 #size-cells = <0>; 72 #size-cells = <0>;
56 phy: ethernet-phy@f { 73 PHY: ethernet-phy@f {
57 reg = <f>; 74 reg = <f>;
58 device_type = "ethernet-phy"; 75 device_type = "ethernet-phy";
59 }; 76 };
60 }; 77 };
61 78
62 fec@e00 { 79 ethernet@e00 {
63 device_type = "network"; 80 device_type = "network";
64 compatible = "fs_enet"; 81 compatible = "fsl,mpc866-fec-enet",
65 model = "FEC"; 82 "fsl,pq1-fec-enet";
66 device-id = <1>;
67 reg = <e00 188>; 83 reg = <e00 188>;
68 mac-address = [ 00 00 0C 00 01 FD ]; 84 local-mac-address = [ 00 00 00 00 00 00 ];
69 interrupts = <3 1>; 85 interrupts = <3 1>;
70 interrupt-parent = <&Mpc8xx_pic>; 86 interrupt-parent = <&PIC>;
71 phy-handle = <&Phy>; 87 phy-handle = <&PHY>;
88 linux,network-index = <0>;
72 }; 89 };
73 90
74 mpc8xx_pic: pic@ff000000 { 91 PIC: pic@0 {
75 interrupt-controller; 92 interrupt-controller;
76 #address-cells = <0>;
77 #interrupt-cells = <2>; 93 #interrupt-cells = <2>;
78 reg = <0 24>; 94 reg = <0 24>;
79 device_type = "mpc8xx-pic"; 95 compatible = "fsl,mpc866-pic", "fsl,pq1-pic";
80 compatible = "CPM";
81 }; 96 };
82 97
83 cpm@ff000000 { 98 cpm@9c0 {
84 #address-cells = <1>; 99 #address-cells = <1>;
85 #size-cells = <1>; 100 #size-cells = <1>;
86 device_type = "cpm"; 101 compatible = "fsl,mpc866-cpm", "fsl,cpm1";
87 model = "CPM"; 102 ranges;
88 ranges = <0 0 4000>; 103 reg = <9c0 40>;
89 reg = <860 f0>;
90 command-proc = <9c0>;
91 brg-frequency = <0>; 104 brg-frequency = <0>;
92 interrupts = <0 2>; // cpm error interrupt 105 interrupts = <0 2>; // cpm error interrupt
93 interrupt-parent = <&Cpm_pic>; 106 interrupt-parent = <&CPM_PIC>;
94 107
95 cpm_pic: pic@930 { 108 muram@2000 {
109 #address-cells = <1>;
110 #size-cells = <1>;
111 ranges = <0 2000 2000>;
112
113 data@0 {
114 compatible = "fsl,cpm-muram-data";
115 reg = <0 1c00>;
116 };
117 };
118
119 brg@9f0 {
120 compatible = "fsl,mpc866-brg",
121 "fsl,cpm1-brg",
122 "fsl,cpm-brg";
123 reg = <9f0 10>;
124 clock-frequency = <0>;
125 };
126
127 CPM_PIC: pic@930 {
96 interrupt-controller; 128 interrupt-controller;
97 #address-cells = <0>; 129 #address-cells = <0>;
98 #interrupt-cells = <2>; 130 #interrupt-cells = <1>;
99 interrupts = <5 2 0 2>; 131 interrupts = <5 2 0 2>;
100 interrupt-parent = <&Mpc8xx_pic>; 132 interrupt-parent = <&PIC>;
101 reg = <930 20>; 133 reg = <930 20>;
102 device_type = "cpm-pic"; 134 compatible = "fsl,mpc866-cpm-pic",
103 compatible = "CPM"; 135 "fsl,cpm1-pic";
104 }; 136 };
105 137
106 smc@a80 { 138
139 serial@a80 {
107 device_type = "serial"; 140 device_type = "serial";
108 compatible = "cpm_uart"; 141 compatible = "fsl,mpc866-smc-uart",
109 model = "SMC"; 142 "fsl,cpm1-smc-uart";
110 device-id = <1>;
111 reg = <a80 10 3e80 40>; 143 reg = <a80 10 3e80 40>;
112 clock-setup = <00ffffff 0>; 144 interrupts = <4>;
113 rx-clock = <1>; 145 interrupt-parent = <&CPM_PIC>;
114 tx-clock = <1>; 146 fsl,cpm-brg = <1>;
115 current-speed = <0>; 147 fsl,cpm-command = <0090>;
116 interrupts = <4 3>;
117 interrupt-parent = <&Cpm_pic>;
118 }; 148 };
119 149
120 smc@a90 { 150 serial@a90 {
121 device_type = "serial"; 151 device_type = "serial";
122 compatible = "cpm_uart"; 152 compatible = "fsl,mpc866-smc-uart",
123 model = "SMC"; 153 "fsl,cpm1-smc-uart";
124 device-id = <2>; 154 reg = <a90 10 3f80 40>;
125 reg = <a90 20 3f80 40>; 155 interrupts = <3>;
126 clock-setup = <ff00ffff 90000>; 156 interrupt-parent = <&CPM_PIC>;
127 rx-clock = <2>; 157 fsl,cpm-brg = <2>;
128 tx-clock = <2>; 158 fsl,cpm-command = <00d0>;
129 current-speed = <0>;
130 interrupts = <3 3>;
131 interrupt-parent = <&Cpm_pic>;
132 }; 159 };
133 160
134 scc@a00 { 161 ethernet@a00 {
135 device_type = "network"; 162 device_type = "network";
136 compatible = "fs_enet"; 163 compatible = "fsl,mpc866-scc-enet",
137 model = "SCC"; 164 "fsl,cpm1-scc-enet";
138 device-id = <1>; 165 reg = <a00 18 3c00 100>;
139 reg = <a00 18 3c00 80>; 166 local-mac-address = [ 00 00 00 00 00 00 ];
140 mac-address = [ 00 00 0C 00 03 FD ]; 167 interrupts = <1e>;
141 interrupts = <1e 3>; 168 interrupt-parent = <&CPM_PIC>;
142 interrupt-parent = <&Cpm_pic>; 169 fsl,cpm-command = <0000>;
170 linux,network-index = <1>;
143 }; 171 };
144 }; 172 };
145 }; 173 };
174
175 chosen {
176 linux,stdout-path = "/soc/cpm/serial@a80";
177 };
146}; 178};
diff --git a/arch/powerpc/boot/dts/rainier.dts b/arch/powerpc/boot/dts/rainier.dts
new file mode 100644
index 000000000000..d3c2ac394ce9
--- /dev/null
+++ b/arch/powerpc/boot/dts/rainier.dts
@@ -0,0 +1,353 @@
1/*
2 * Device Tree Source for AMCC Rainier
3 *
4 * Based on Sequoia code
5 * Copyright (c) 2007 MontaVista Software, Inc.
6 *
7 * FIXME: Draft only!
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without
11 * any warranty of any kind, whether express or implied.
12 *
13 */
14
15/ {
16 #address-cells = <2>;
17 #size-cells = <1>;
18 model = "amcc,rainier";
19 compatible = "amcc,rainier";
20 dcr-parent = <&/cpus/cpu@0>;
21
22 aliases {
23 ethernet0 = &EMAC0;
24 ethernet1 = &EMAC1;
25 serial0 = &UART0;
26 serial1 = &UART1;
27 serial2 = &UART2;
28 serial3 = &UART3;
29 };
30
31 cpus {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 cpu@0 {
36 device_type = "cpu";
37 model = "PowerPC,440GRx";
38 reg = <0>;
39 clock-frequency = <0>; /* Filled in by zImage */
40 timebase-frequency = <0>; /* Filled in by zImage */
41 i-cache-line-size = <20>;
42 d-cache-line-size = <20>;
43 i-cache-size = <8000>;
44 d-cache-size = <8000>;
45 dcr-controller;
46 dcr-access-method = "native";
47 };
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0 0 0>; /* Filled in by zImage */
53 };
54
55 UIC0: interrupt-controller0 {
56 compatible = "ibm,uic-440grx","ibm,uic";
57 interrupt-controller;
58 cell-index = <0>;
59 dcr-reg = <0c0 009>;
60 #address-cells = <0>;
61 #size-cells = <0>;
62 #interrupt-cells = <2>;
63 };
64
65 UIC1: interrupt-controller1 {
66 compatible = "ibm,uic-440grx","ibm,uic";
67 interrupt-controller;
68 cell-index = <1>;
69 dcr-reg = <0d0 009>;
70 #address-cells = <0>;
71 #size-cells = <0>;
72 #interrupt-cells = <2>;
73 interrupts = <1e 4 1f 4>; /* cascade */
74 interrupt-parent = <&UIC0>;
75 };
76
77 UIC2: interrupt-controller2 {
78 compatible = "ibm,uic-440grx","ibm,uic";
79 interrupt-controller;
80 cell-index = <2>;
81 dcr-reg = <0e0 009>;
82 #address-cells = <0>;
83 #size-cells = <0>;
84 #interrupt-cells = <2>;
85 interrupts = <1c 4 1d 4>; /* cascade */
86 interrupt-parent = <&UIC0>;
87 };
88
89 SDR0: sdr {
90 compatible = "ibm,sdr-440grx", "ibm,sdr-440ep";
91 dcr-reg = <00e 002>;
92 };
93
94 CPR0: cpr {
95 compatible = "ibm,cpr-440grx", "ibm,cpr-440ep";
96 dcr-reg = <00c 002>;
97 };
98
99 plb {
100 compatible = "ibm,plb-440grx", "ibm,plb4";
101 #address-cells = <2>;
102 #size-cells = <1>;
103 ranges;
104 clock-frequency = <0>; /* Filled in by zImage */
105
106 SDRAM0: sdram {
107 compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali";
108 dcr-reg = <010 2>;
109 };
110
111 DMA0: dma {
112 compatible = "ibm,dma-440grx", "ibm,dma-4xx";
113 dcr-reg = <100 027>;
114 };
115
116 MAL0: mcmal {
117 compatible = "ibm,mcmal-440grx", "ibm,mcmal2";
118 dcr-reg = <180 62>;
119 num-tx-chans = <2>;
120 num-rx-chans = <2>;
121 interrupt-parent = <&MAL0>;
122 interrupts = <0 1 2 3 4>;
123 #interrupt-cells = <1>;
124 #address-cells = <0>;
125 #size-cells = <0>;
126 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
127 /*RXEOB*/ 1 &UIC0 b 4
128 /*SERR*/ 2 &UIC1 0 4
129 /*TXDE*/ 3 &UIC1 1 4
130 /*RXDE*/ 4 &UIC1 2 4>;
131 interrupt-map-mask = <ffffffff>;
132 };
133
134 POB0: opb {
135 compatible = "ibm,opb-440grx", "ibm,opb";
136 #address-cells = <1>;
137 #size-cells = <1>;
138 ranges = <00000000 1 00000000 80000000
139 80000000 1 80000000 80000000>;
140 interrupt-parent = <&UIC1>;
141 interrupts = <7 4>;
142 clock-frequency = <0>; /* Filled in by zImage */
143
144 EBC0: ebc {
145 compatible = "ibm,ebc-440grx", "ibm,ebc";
146 dcr-reg = <012 2>;
147 #address-cells = <2>;
148 #size-cells = <1>;
149 clock-frequency = <0>; /* Filled in by zImage */
150 interrupts = <5 1>;
151 interrupt-parent = <&UIC1>;
152
153 nor_flash@0,0 {
154 compatible = "amd,s29gl256n", "cfi-flash";
155 bank-width = <2>;
156 reg = <0 000000 4000000>;
157 #address-cells = <1>;
158 #size-cells = <1>;
159 partition@0 {
160 label = "Kernel";
161 reg = <0 180000>;
162 };
163 partition@180000 {
164 label = "ramdisk";
165 reg = <180000 200000>;
166 };
167 partition@380000 {
168 label = "file system";
169 reg = <380000 3aa0000>;
170 };
171 partition@3e20000 {
172 label = "kozio";
173 reg = <3e20000 140000>;
174 };
175 partition@3f60000 {
176 label = "env";
177 reg = <3f60000 40000>;
178 };
179 partition@3fa0000 {
180 label = "u-boot";
181 reg = <3fa0000 60000>;
182 };
183 };
184
185 };
186
187 UART0: serial@ef600300 {
188 device_type = "serial";
189 compatible = "ns16550";
190 reg = <ef600300 8>;
191 virtual-reg = <ef600300>;
192 clock-frequency = <0>; /* Filled in by zImage */
193 current-speed = <1c200>;
194 interrupt-parent = <&UIC0>;
195 interrupts = <0 4>;
196 };
197
198 UART1: serial@ef600400 {
199 device_type = "serial";
200 compatible = "ns16550";
201 reg = <ef600400 8>;
202 virtual-reg = <ef600400>;
203 clock-frequency = <0>;
204 current-speed = <0>;
205 interrupt-parent = <&UIC0>;
206 interrupts = <1 4>;
207 };
208
209 UART2: serial@ef600500 {
210 device_type = "serial";
211 compatible = "ns16550";
212 reg = <ef600500 8>;
213 virtual-reg = <ef600500>;
214 clock-frequency = <0>;
215 current-speed = <0>;
216 interrupt-parent = <&UIC1>;
217 interrupts = <3 4>;
218 };
219
220 UART3: serial@ef600600 {
221 device_type = "serial";
222 compatible = "ns16550";
223 reg = <ef600600 8>;
224 virtual-reg = <ef600600>;
225 clock-frequency = <0>;
226 current-speed = <0>;
227 interrupt-parent = <&UIC1>;
228 interrupts = <4 4>;
229 };
230
231 IIC0: i2c@ef600700 {
232 device_type = "i2c";
233 compatible = "ibm,iic-440grx", "ibm,iic";
234 reg = <ef600700 14>;
235 interrupt-parent = <&UIC0>;
236 interrupts = <2 4>;
237 };
238
239 IIC1: i2c@ef600800 {
240 device_type = "i2c";
241 compatible = "ibm,iic-440grx", "ibm,iic";
242 reg = <ef600800 14>;
243 interrupt-parent = <&UIC0>;
244 interrupts = <7 4>;
245 };
246
247 ZMII0: emac-zmii@ef600d00 {
248 device_type = "zmii-interface";
249 compatible = "ibm,zmii-440grx", "ibm,zmii";
250 reg = <ef600d00 c>;
251 };
252
253 RGMII0: emac-rgmii@ef601000 {
254 device_type = "rgmii-interface";
255 compatible = "ibm,rgmii-440grx", "ibm,rgmii";
256 reg = <ef601000 8>;
257 has-mdio;
258 };
259
260 EMAC0: ethernet@ef600e00 {
261 linux,network-index = <0>;
262 device_type = "network";
263 compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
264 interrupt-parent = <&EMAC0>;
265 interrupts = <0 1>;
266 #interrupt-cells = <1>;
267 #address-cells = <0>;
268 #size-cells = <0>;
269 interrupt-map = </*Status*/ 0 &UIC0 18 4
270 /*Wake*/ 1 &UIC1 1d 4>;
271 reg = <ef600e00 70>;
272 local-mac-address = [000000000000];
273 mal-device = <&MAL0>;
274 mal-tx-channel = <0>;
275 mal-rx-channel = <0>;
276 cell-index = <0>;
277 max-frame-size = <5dc>;
278 rx-fifo-size = <1000>;
279 tx-fifo-size = <800>;
280 phy-mode = "rgmii";
281 phy-map = <00000000>;
282 zmii-device = <&ZMII0>;
283 zmii-channel = <0>;
284 rgmii-device = <&RGMII0>;
285 rgmii-channel = <0>;
286 has-inverted-stacr-oc;
287 has-new-stacr-staopc;
288 };
289
290 EMAC1: ethernet@ef600f00 {
291 linux,network-index = <1>;
292 device_type = "network";
293 compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
294 interrupt-parent = <&EMAC1>;
295 interrupts = <0 1>;
296 #interrupt-cells = <1>;
297 #address-cells = <0>;
298 #size-cells = <0>;
299 interrupt-map = </*Status*/ 0 &UIC0 19 4
300 /*Wake*/ 1 &UIC1 1f 4>;
301 reg = <ef600f00 70>;
302 local-mac-address = [000000000000];
303 mal-device = <&MAL0>;
304 mal-tx-channel = <1>;
305 mal-rx-channel = <1>;
306 cell-index = <1>;
307 max-frame-size = <5dc>;
308 rx-fifo-size = <1000>;
309 tx-fifo-size = <800>;
310 phy-mode = "rgmii";
311 phy-map = <00000000>;
312 zmii-device = <&ZMII0>;
313 zmii-channel = <1>;
314 rgmii-device = <&RGMII0>;
315 rgmii-channel = <1>;
316 has-inverted-stacr-oc;
317 has-new-stacr-staopc;
318 };
319 };
320
321 PCI0: pci@1ec000000 {
322 device_type = "pci";
323 #interrupt-cells = <1>;
324 #size-cells = <2>;
325 #address-cells = <3>;
326 compatible = "ibm,plb440grx-pci", "ibm,plb-pci";
327 primary;
328 reg = <1 eec00000 8 /* Config space access */
329 1 eed00000 4 /* IACK */
330 1 eed00000 4 /* Special cycle */
331 1 ef400000 40>; /* Internal registers */
332
333 /* Outbound ranges, one memory and one IO,
334 * later cannot be changed. Chip supports a second
335 * IO range but we don't use it for now
336 */
337 ranges = <02000000 0 80000000 1 80000000 0 10000000
338 01000000 0 00000000 1 e8000000 0 00100000>;
339
340 /* Inbound 2GB range starting at 0 */
341 dma-ranges = <42000000 0 0 0 0 0 80000000>;
342
343 /* All PCI interrupts are routed to IRQ 67 */
344 interrupt-map-mask = <0000 0 0 0>;
345 interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
346 };
347 };
348
349 chosen {
350 linux,stdout-path = "/plb/opb/serial@ef600300";
351 bootargs = "console=ttyS0,115200";
352 };
353};
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
new file mode 100644
index 000000000000..3839d4b7d6a7
--- /dev/null
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -0,0 +1,244 @@
1/*
2 * SBC8349E Device Tree Source
3 *
4 * Copyright 2007 Wind River Inc.
5 *
6 * Paul Gortmaker (see MAINTAINERS for contact information)
7 *
8 * -based largely on the Freescale MPC834x_MDS dts.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16/dts-v1/;
17
18/ {
19 model = "SBC8349E";
20 compatible = "SBC834xE";
21 #address-cells = <1>;
22 #size-cells = <1>;
23
24 aliases {
25 ethernet0 = &enet0;
26 ethernet1 = &enet1;
27 serial0 = &serial0;
28 serial1 = &serial1;
29 pci0 = &pci0;
30 };
31
32 cpus {
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 PowerPC,8349@0 {
37 device_type = "cpu";
38 reg = <0x0>;
39 d-cache-line-size = <32>;
40 i-cache-line-size = <32>;
41 d-cache-size = <32768>;
42 i-cache-size = <32768>;
43 timebase-frequency = <0>; // from bootloader
44 bus-frequency = <0>; // from bootloader
45 clock-frequency = <0>; // from bootloader
46 };
47 };
48
49 memory {
50 device_type = "memory";
51 reg = <0x00000000 0x10000000>; // 256MB at 0
52 };
53
54 soc8349@e0000000 {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 device_type = "soc";
58 ranges = <0x0 0xe0000000 0x00100000>;
59 reg = <0xe0000000 0x00000200>;
60 bus-frequency = <0>;
61
62 wdt@200 {
63 compatible = "mpc83xx_wdt";
64 reg = <0x200 0x100>;
65 };
66
67 i2c@3000 {
68 #address-cells = <1>;
69 #size-cells = <0>;
70 cell-index = <0>;
71 compatible = "fsl-i2c";
72 reg = <0x3000 0x100>;
73 interrupts = <14 0x8>;
74 interrupt-parent = <&ipic>;
75 dfsrr;
76 };
77
78 i2c@3100 {
79 #address-cells = <1>;
80 #size-cells = <0>;
81 cell-index = <1>;
82 compatible = "fsl-i2c";
83 reg = <0x3100 0x100>;
84 interrupts = <15 0x8>;
85 interrupt-parent = <&ipic>;
86 dfsrr;
87 };
88
89 spi@7000 {
90 cell-index = <0>;
91 compatible = "fsl,spi";
92 reg = <0x7000 0x1000>;
93 interrupts = <16 0x8>;
94 interrupt-parent = <&ipic>;
95 mode = "cpu";
96 };
97
98 /* phy type (ULPI or SERIAL) are only types supported for MPH */
99 /* port = 0 or 1 */
100 usb@22000 {
101 compatible = "fsl-usb2-mph";
102 reg = <0x22000 0x1000>;
103 #address-cells = <1>;
104 #size-cells = <0>;
105 interrupt-parent = <&ipic>;
106 interrupts = <39 0x8>;
107 phy_type = "ulpi";
108 port1;
109 };
110 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
111 usb@23000 {
112 device_type = "usb";
113 compatible = "fsl-usb2-dr";
114 reg = <0x23000 0x1000>;
115 #address-cells = <1>;
116 #size-cells = <0>;
117 interrupt-parent = <&ipic>;
118 interrupts = <38 0x8>;
119 dr_mode = "otg";
120 phy_type = "ulpi";
121 };
122
123 mdio@24520 {
124 #address-cells = <1>;
125 #size-cells = <0>;
126 compatible = "fsl,gianfar-mdio";
127 reg = <0x24520 0x20>;
128
129 phy0: ethernet-phy@19 {
130 interrupt-parent = <&ipic>;
131 interrupts = <20 0x8>;
132 reg = <0x19>;
133 device_type = "ethernet-phy";
134 };
135 phy1: ethernet-phy@1a {
136 interrupt-parent = <&ipic>;
137 interrupts = <21 0x8>;
138 reg = <0x1a>;
139 device_type = "ethernet-phy";
140 };
141 };
142
143 enet0: ethernet@24000 {
144 cell-index = <0>;
145 device_type = "network";
146 model = "TSEC";
147 compatible = "gianfar";
148 reg = <0x24000 0x1000>;
149 local-mac-address = [ 00 00 00 00 00 00 ];
150 interrupts = <32 0x8 33 0x8 34 0x8>;
151 interrupt-parent = <&ipic>;
152 phy-handle = <&phy0>;
153 linux,network-index = <0>;
154 };
155
156 enet1: ethernet@25000 {
157 cell-index = <1>;
158 device_type = "network";
159 model = "TSEC";
160 compatible = "gianfar";
161 reg = <0x25000 0x1000>;
162 local-mac-address = [ 00 00 00 00 00 00 ];
163 interrupts = <35 0x8 36 0x8 37 0x8>;
164 interrupt-parent = <&ipic>;
165 phy-handle = <&phy1>;
166 linux,network-index = <1>;
167 };
168
169 serial0: serial@4500 {
170 cell-index = <0>;
171 device_type = "serial";
172 compatible = "ns16550";
173 reg = <0x4500 0x100>;
174 clock-frequency = <0>;
175 interrupts = <9 0x8>;
176 interrupt-parent = <&ipic>;
177 };
178
179 serial1: serial@4600 {
180 cell-index = <1>;
181 device_type = "serial";
182 compatible = "ns16550";
183 reg = <0x4600 0x100>;
184 clock-frequency = <0>;
185 interrupts = <10 0x8>;
186 interrupt-parent = <&ipic>;
187 };
188
189 /* May need to remove if on a part without crypto engine */
190 crypto@30000 {
191 model = "SEC2";
192 compatible = "talitos";
193 reg = <0x30000 0x10000>;
194 interrupts = <11 0x8>;
195 interrupt-parent = <&ipic>;
196 num-channels = <4>;
197 channel-fifo-len = <24>;
198 exec-units-mask = <0x0000007e>;
199 /* desc mask is for rev2.0,
200 * we need runtime fixup for >2.0 */
201 descriptor-types-mask = <0x01010ebf>;
202 };
203
204 /* IPIC
205 * interrupts cell = <intr #, sense>
206 * sense values match linux IORESOURCE_IRQ_* defines:
207 * sense == 8: Level, low assertion
208 * sense == 2: Edge, high-to-low change
209 */
210 ipic: pic@700 {
211 interrupt-controller;
212 #address-cells = <0>;
213 #interrupt-cells = <2>;
214 reg = <0x700 0x100>;
215 device_type = "ipic";
216 };
217 };
218
219 pci0: pci@e0008500 {
220 cell-index = <1>;
221 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
222 interrupt-map = <
223
224 /* IDSEL 0x11 */
225 0x8800 0x0 0x0 0x1 &ipic 20 0x8
226 0x8800 0x0 0x0 0x2 &ipic 21 0x8
227 0x8800 0x0 0x0 0x3 &ipic 22 0x8
228 0x8800 0x0 0x0 0x4 &ipic 23 0x8>;
229
230 interrupt-parent = <&ipic>;
231 interrupts = <0x42 0x8>;
232 bus-range = <0 0>;
233 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
234 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
235 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
236 clock-frequency = <66666666>;
237 #interrupt-cells = <1>;
238 #size-cells = <2>;
239 #address-cells = <3>;
240 reg = <0xe0008500 0x100>;
241 compatible = "fsl,mpc8349-pci";
242 device_type = "pci";
243 };
244};
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
new file mode 100644
index 000000000000..14be38ad5d4b
--- /dev/null
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -0,0 +1,244 @@
1/*
2 * SBC8548 Device Tree Source
3 *
4 * Copyright 2007 Wind River Systems Inc.
5 *
6 * Paul Gortmaker (see MAINTAINERS for contact information)
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14
15/dts-v1/;
16
17/ {
18 model = "SBC8548";
19 compatible = "SBC8548";
20 #address-cells = <1>;
21 #size-cells = <1>;
22
23 aliases {
24 ethernet0 = &enet0;
25 ethernet1 = &enet1;
26 serial0 = &serial0;
27 serial1 = &serial1;
28 pci0 = &pci0;
29 /* pci1 doesn't have a corresponding physical connector */
30 pci2 = &pci2;
31 };
32
33 cpus {
34 #address-cells = <1>;
35 #size-cells = <0>;
36
37 PowerPC,8548@0 {
38 device_type = "cpu";
39 reg = <0>;
40 d-cache-line-size = <0x20>; // 32 bytes
41 i-cache-line-size = <0x20>; // 32 bytes
42 d-cache-size = <0x8000>; // L1, 32K
43 i-cache-size = <0x8000>; // L1, 32K
44 timebase-frequency = <0>; // From uboot
45 bus-frequency = <0>;
46 clock-frequency = <0>;
47 };
48 };
49
50 memory {
51 device_type = "memory";
52 reg = <0x00000000 0x10000000>;
53 };
54
55 soc8548@e0000000 {
56 #address-cells = <1>;
57 #size-cells = <1>;
58 device_type = "soc";
59 ranges = <0x00000000 0xe0000000 0x00100000>;
60 reg = <0xe0000000 0x00001000>; // CCSRBAR
61 bus-frequency = <0>;
62
63 memory-controller@2000 {
64 compatible = "fsl,8548-memory-controller";
65 reg = <0x2000 0x1000>;
66 interrupt-parent = <&mpic>;
67 interrupts = <0x12 0x2>;
68 };
69
70 l2-cache-controller@20000 {
71 compatible = "fsl,8548-l2-cache-controller";
72 reg = <0x20000 0x1000>;
73 cache-line-size = <0x20>; // 32 bytes
74 cache-size = <0x80000>; // L2, 512K
75 interrupt-parent = <&mpic>;
76 interrupts = <0x10 0x2>;
77 };
78
79 i2c@3000 {
80 #address-cells = <1>;
81 #size-cells = <0>;
82 cell-index = <0>;
83 compatible = "fsl-i2c";
84 reg = <0x3000 0x100>;
85 interrupts = <0x2b 0x2>;
86 interrupt-parent = <&mpic>;
87 dfsrr;
88 };
89
90 i2c@3100 {
91 #address-cells = <1>;
92 #size-cells = <0>;
93 cell-index = <1>;
94 compatible = "fsl-i2c";
95 reg = <0x3100 0x100>;
96 interrupts = <0x2b 0x2>;
97 interrupt-parent = <&mpic>;
98 dfsrr;
99 };
100
101 mdio@24520 {
102 #address-cells = <1>;
103 #size-cells = <0>;
104 compatible = "fsl,gianfar-mdio";
105 reg = <0x24520 0x20>;
106
107 phy0: ethernet-phy@19 {
108 interrupt-parent = <&mpic>;
109 interrupts = <0x6 0x1>;
110 reg = <0x19>;
111 device_type = "ethernet-phy";
112 };
113 phy1: ethernet-phy@1a {
114 interrupt-parent = <&mpic>;
115 interrupts = <0x7 0x1>;
116 reg = <0x1a>;
117 device_type = "ethernet-phy";
118 };
119 };
120
121 enet0: ethernet@24000 {
122 cell-index = <0>;
123 device_type = "network";
124 model = "eTSEC";
125 compatible = "gianfar";
126 reg = <0x24000 0x1000>;
127 local-mac-address = [ 00 00 00 00 00 00 ];
128 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
129 interrupt-parent = <&mpic>;
130 phy-handle = <&phy0>;
131 };
132
133 enet1: ethernet@25000 {
134 cell-index = <1>;
135 device_type = "network";
136 model = "eTSEC";
137 compatible = "gianfar";
138 reg = <0x25000 0x1000>;
139 local-mac-address = [ 00 00 00 00 00 00 ];
140 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
141 interrupt-parent = <&mpic>;
142 phy-handle = <&phy1>;
143 };
144
145 serial0: serial@4500 {
146 cell-index = <0>;
147 device_type = "serial";
148 compatible = "ns16550";
149 reg = <0x4500 0x100>; // reg base, size
150 clock-frequency = <0>; // should we fill in in uboot?
151 interrupts = <0x2a 0x2>;
152 interrupt-parent = <&mpic>;
153 };
154
155 serial1: serial@4600 {
156 cell-index = <1>;
157 device_type = "serial";
158 compatible = "ns16550";
159 reg = <0x4600 0x100>; // reg base, size
160 clock-frequency = <0>; // should we fill in in uboot?
161 interrupts = <0x2a 0x2>;
162 interrupt-parent = <&mpic>;
163 };
164
165 global-utilities@e0000 { //global utilities reg
166 compatible = "fsl,mpc8548-guts";
167 reg = <0xe0000 0x1000>;
168 fsl,has-rstcr;
169 };
170
171 mpic: pic@40000 {
172 interrupt-controller;
173 #address-cells = <0>;
174 #size-cells = <0>;
175 #interrupt-cells = <2>;
176 reg = <0x40000 0x40000>;
177 compatible = "chrp,open-pic";
178 device_type = "open-pic";
179 big-endian;
180 };
181 };
182
183 pci0: pci@e0008000 {
184 cell-index = <0>;
185 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
186 interrupt-map = <
187 /* IDSEL 0x01 (PCI-X slot) */
188 0x0800 0x0 0x0 0x1 &mpic 0x0 0x1
189 0x0800 0x0 0x0 0x2 &mpic 0x1 0x1
190 0x0800 0x0 0x0 0x3 &mpic 0x2 0x1
191 0x0800 0x0 0x0 0x4 &mpic 0x3 0x1>;
192
193 interrupt-parent = <&mpic>;
194 interrupts = <0x18 0x2>;
195 bus-range = <0 0>;
196 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000
197 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00800000>;
198 clock-frequency = <66666666>;
199 #interrupt-cells = <1>;
200 #size-cells = <2>;
201 #address-cells = <3>;
202 reg = <0xe0008000 0x1000>;
203 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
204 device_type = "pci";
205 };
206
207 pci2: pcie@e000a000 {
208 cell-index = <2>;
209 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
210 interrupt-map = <
211
212 /* IDSEL 0x0 (PEX) */
213 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1
214 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1
215 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1
216 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1>;
217
218 interrupt-parent = <&mpic>;
219 interrupts = <0x1a 0x2>;
220 bus-range = <0x0 0xff>;
221 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
222 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x08000000>;
223 clock-frequency = <33333333>;
224 #interrupt-cells = <1>;
225 #size-cells = <2>;
226 #address-cells = <3>;
227 reg = <0xe000a000 0x1000>;
228 compatible = "fsl,mpc8548-pcie";
229 device_type = "pci";
230 pcie@0 {
231 reg = <0x0 0x0 0x0 0x0 0x0>;
232 #size-cells = <2>;
233 #address-cells = <3>;
234 device_type = "pci";
235 ranges = <0x02000000 0x0 0xa0000000
236 0x02000000 0x0 0xa0000000
237 0x0 0x20000000
238
239 0x01000000 0x0 0x00000000
240 0x01000000 0x0 0x00000000
241 0x0 0x08000000>;
242 };
243 };
244};
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
new file mode 100644
index 000000000000..0476802fba60
--- /dev/null
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -0,0 +1,330 @@
1/*
2 * SBC8560 Device Tree Source
3 *
4 * Copyright 2007 Wind River Systems Inc.
5 *
6 * Paul Gortmaker (see MAINTAINERS for contact information)
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14/dts-v1/;
15
16/ {
17 model = "SBC8560";
18 compatible = "SBC8560";
19 #address-cells = <1>;
20 #size-cells = <1>;
21
22 aliases {
23 ethernet0 = &enet0;
24 ethernet1 = &enet1;
25 ethernet2 = &enet2;
26 ethernet3 = &enet3;
27 serial0 = &serial0;
28 serial1 = &serial1;
29 pci0 = &pci0;
30 };
31
32 cpus {
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 PowerPC,8560@0 {
37 device_type = "cpu";
38 reg = <0>;
39 d-cache-line-size = <0x20>; // 32 bytes
40 i-cache-line-size = <0x20>; // 32 bytes
41 d-cache-size = <0x8000>; // L1, 32K
42 i-cache-size = <0x8000>; // L1, 32K
43 timebase-frequency = <0>; // From uboot
44 bus-frequency = <0>;
45 clock-frequency = <0>;
46 };
47 };
48
49 memory {
50 device_type = "memory";
51 reg = <0x00000000 0x20000000>;
52 };
53
54 soc@ff700000 {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 device_type = "soc";
58 ranges = <0x0 0xff700000 0x00100000>;
59 reg = <0xff700000 0x00100000>;
60 clock-frequency = <0>;
61
62 memory-controller@2000 {
63 compatible = "fsl,8560-memory-controller";
64 reg = <0x2000 0x1000>;
65 interrupt-parent = <&mpic>;
66 interrupts = <0x12 0x2>;
67 };
68
69 l2-cache-controller@20000 {
70 compatible = "fsl,8560-l2-cache-controller";
71 reg = <0x20000 0x1000>;
72 cache-line-size = <0x20>; // 32 bytes
73 cache-size = <0x40000>; // L2, 256K
74 interrupt-parent = <&mpic>;
75 interrupts = <0x10 0x2>;
76 };
77
78 i2c@3000 {
79 #address-cells = <1>;
80 #size-cells = <0>;
81 cell-index = <0>;
82 compatible = "fsl-i2c";
83 reg = <0x3000 0x100>;
84 interrupts = <0x2b 0x2>;
85 interrupt-parent = <&mpic>;
86 dfsrr;
87 };
88
89 i2c@3100 {
90 #address-cells = <1>;
91 #size-cells = <0>;
92 cell-index = <1>;
93 compatible = "fsl-i2c";
94 reg = <0x3100 0x100>;
95 interrupts = <0x2b 0x2>;
96 interrupt-parent = <&mpic>;
97 dfsrr;
98 };
99
100 mdio@24520 {
101 #address-cells = <1>;
102 #size-cells = <0>;
103 compatible = "fsl,gianfar-mdio";
104 reg = <0x24520 0x20>;
105 phy0: ethernet-phy@19 {
106 interrupt-parent = <&mpic>;
107 interrupts = <0x6 0x1>;
108 reg = <0x19>;
109 device_type = "ethernet-phy";
110 };
111 phy1: ethernet-phy@1a {
112 interrupt-parent = <&mpic>;
113 interrupts = <0x7 0x1>;
114 reg = <0x1a>;
115 device_type = "ethernet-phy";
116 };
117 phy2: ethernet-phy@1b {
118 interrupt-parent = <&mpic>;
119 interrupts = <0x8 0x1>;
120 reg = <0x1b>;
121 device_type = "ethernet-phy";
122 };
123 phy3: ethernet-phy@1c {
124 interrupt-parent = <&mpic>;
125 interrupts = <0x8 0x1>;
126 reg = <0x1c>;
127 device_type = "ethernet-phy";
128 };
129 };
130
131 enet0: ethernet@24000 {
132 cell-index = <0>;
133 device_type = "network";
134 model = "TSEC";
135 compatible = "gianfar";
136 reg = <0x24000 0x1000>;
137 local-mac-address = [ 00 00 00 00 00 00 ];
138 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
139 interrupt-parent = <&mpic>;
140 phy-handle = <&phy0>;
141 };
142
143 enet1: ethernet@25000 {
144 cell-index = <1>;
145 device_type = "network";
146 model = "TSEC";
147 compatible = "gianfar";
148 reg = <0x25000 0x1000>;
149 local-mac-address = [ 00 00 00 00 00 00 ];
150 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
151 interrupt-parent = <&mpic>;
152 phy-handle = <&phy1>;
153 };
154
155 mpic: pic@40000 {
156 interrupt-controller;
157 #address-cells = <0>;
158 #size-cells = <0>;
159 #interrupt-cells = <2>;
160 reg = <0x40000 0x40000>;
161 device_type = "open-pic";
162 };
163
164 cpm@919c0 {
165 #address-cells = <1>;
166 #size-cells = <1>;
167 compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
168 reg = <0x919c0 0x30>;
169 ranges;
170
171 muram@80000 {
172 #address-cells = <1>;
173 #size-cells = <1>;
174 ranges = <0x0 0x80000 0x10000>;
175
176 data@0 {
177 compatible = "fsl,cpm-muram-data";
178 reg = <0x0 0x4000 0x9000 0x2000>;
179 };
180 };
181
182 brg@919f0 {
183 compatible = "fsl,mpc8560-brg",
184 "fsl,cpm2-brg",
185 "fsl,cpm-brg";
186 reg = <0x919f0 0x10 0x915f0 0x10>;
187 clock-frequency = <165000000>;
188 };
189
190 cpmpic: pic@90c00 {
191 interrupt-controller;
192 #address-cells = <0>;
193 #interrupt-cells = <2>;
194 interrupts = <0x2e 0x2>;
195 interrupt-parent = <&mpic>;
196 reg = <0x90c00 0x80>;
197 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
198 };
199
200 enet2: ethernet@91320 {
201 device_type = "network";
202 compatible = "fsl,mpc8560-fcc-enet",
203 "fsl,cpm2-fcc-enet";
204 reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
205 local-mac-address = [ 00 00 00 00 00 00 ];
206 fsl,cpm-command = <0x16200300>;
207 interrupts = <0x21 0x8>;
208 interrupt-parent = <&cpmpic>;
209 phy-handle = <&phy2>;
210 };
211
212 enet3: ethernet@91340 {
213 device_type = "network";
214 compatible = "fsl,mpc8560-fcc-enet",
215 "fsl,cpm2-fcc-enet";
216 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
217 local-mac-address = [ 00 00 00 00 00 00 ];
218 fsl,cpm-command = <0x1a400300>;
219 interrupts = <0x22 0x8>;
220 interrupt-parent = <&cpmpic>;
221 phy-handle = <&phy3>;
222 };
223 };
224
225 global-utilities@e0000 {
226 compatible = "fsl,mpc8560-guts";
227 reg = <0xe0000 0x1000>;
228 fsl,has-rstcr;
229 };
230 };
231
232 pci0: pci@ff708000 {
233 cell-index = <0>;
234 #interrupt-cells = <1>;
235 #size-cells = <2>;
236 #address-cells = <3>;
237 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
238 device_type = "pci";
239 reg = <0xff708000 0x1000>;
240 clock-frequency = <66666666>;
241 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
242 interrupt-map = <
243
244 /* IDSEL 0x02 */
245 0x1000 0x0 0x0 0x1 &mpic 0x2 0x1
246 0x1000 0x0 0x0 0x2 &mpic 0x3 0x1
247 0x1000 0x0 0x0 0x3 &mpic 0x4 0x1
248 0x1000 0x0 0x0 0x4 &mpic 0x5 0x1>;
249
250 interrupt-parent = <&mpic>;
251 interrupts = <0x18 0x2>;
252 bus-range = <0x0 0x0>;
253 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
254 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
255 };
256
257 localbus@ff705000 {
258 compatible = "fsl,mpc8560-localbus";
259 #address-cells = <2>;
260 #size-cells = <1>;
261 reg = <0xff705000 0x100>; // BRx, ORx, etc.
262
263 ranges = <
264 0x0 0x0 0xff800000 0x0800000 // 8MB boot flash
265 0x1 0x0 0xe4000000 0x4000000 // 64MB flash
266 0x3 0x0 0x20000000 0x4000000 // 64MB SDRAM
267 0x4 0x0 0x24000000 0x4000000 // 64MB SDRAM
268 0x5 0x0 0xfc000000 0x0c00000 // EPLD
269 0x6 0x0 0xe0000000 0x4000000 // 64MB flash
270 0x7 0x0 0x80000000 0x0200000 // ATM1,2
271 >;
272
273 epld@5,0 {
274 compatible = "wrs,epld-localbus";
275 #address-cells = <2>;
276 #size-cells = <1>;
277 reg = <0x5 0x0 0xc00000>;
278 ranges = <
279 0x0 0x0 0x5 0x000000 0x1fff // LED disp.
280 0x1 0x0 0x5 0x100000 0x1fff // switches
281 0x2 0x0 0x5 0x200000 0x1fff // ID reg.
282 0x3 0x0 0x5 0x300000 0x1fff // status reg.
283 0x4 0x0 0x5 0x400000 0x1fff // reset reg.
284 0x5 0x0 0x5 0x500000 0x1fff // Wind port
285 0x7 0x0 0x5 0x700000 0x1fff // UART #1
286 0x8 0x0 0x5 0x800000 0x1fff // UART #2
287 0x9 0x0 0x5 0x900000 0x1fff // RTC
288 0xb 0x0 0x5 0xb00000 0x1fff // EEPROM
289 >;
290
291 bidr@2,0 {
292 compatible = "wrs,sbc8560-bidr";
293 reg = <0x2 0x0 0x10>;
294 };
295
296 bcsr@3,0 {
297 compatible = "wrs,sbc8560-bcsr";
298 reg = <0x3 0x0 0x10>;
299 };
300
301 brstcr@4,0 {
302 compatible = "wrs,sbc8560-brstcr";
303 reg = <0x4 0x0 0x10>;
304 };
305
306 serial0: serial@7,0 {
307 device_type = "serial";
308 compatible = "ns16550";
309 reg = <0x7 0x0 0x100>;
310 clock-frequency = <1843200>;
311 interrupts = <0x9 0x2>;
312 interrupt-parent = <&mpic>;
313 };
314
315 serial1: serial@8,0 {
316 device_type = "serial";
317 compatible = "ns16550";
318 reg = <0x8 0x0 0x100>;
319 clock-frequency = <1843200>;
320 interrupts = <0xa 0x2>;
321 interrupt-parent = <&mpic>;
322 };
323
324 rtc@9,0 {
325 compatible = "m48t59";
326 reg = <0x9 0x0 0x1fff>;
327 };
328 };
329 };
330};
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts
index 10784ff45dd6..d9046c1adcbe 100644
--- a/arch/powerpc/boot/dts/sequoia.dts
+++ b/arch/powerpc/boot/dts/sequoia.dts
@@ -17,14 +17,24 @@
17 #size-cells = <1>; 17 #size-cells = <1>;
18 model = "amcc,sequoia"; 18 model = "amcc,sequoia";
19 compatible = "amcc,sequoia"; 19 compatible = "amcc,sequoia";
20 dcr-parent = <&/cpus/PowerPC,440EPx@0>; 20 dcr-parent = <&/cpus/cpu@0>;
21
22 aliases {
23 ethernet0 = &EMAC0;
24 ethernet1 = &EMAC1;
25 serial0 = &UART0;
26 serial1 = &UART1;
27 serial2 = &UART2;
28 serial3 = &UART3;
29 };
21 30
22 cpus { 31 cpus {
23 #address-cells = <1>; 32 #address-cells = <1>;
24 #size-cells = <0>; 33 #size-cells = <0>;
25 34
26 PowerPC,440EPx@0 { 35 cpu@0 {
27 device_type = "cpu"; 36 device_type = "cpu";
37 model = "PowerPC,440EPx";
28 reg = <0>; 38 reg = <0>;
29 clock-frequency = <0>; /* Filled in by zImage */ 39 clock-frequency = <0>; /* Filled in by zImage */
30 timebase-frequency = <0>; /* Filled in by zImage */ 40 timebase-frequency = <0>; /* Filled in by zImage */
@@ -94,7 +104,6 @@
94 clock-frequency = <0>; /* Filled in by zImage */ 104 clock-frequency = <0>; /* Filled in by zImage */
95 105
96 SDRAM0: sdram { 106 SDRAM0: sdram {
97 device_type = "memory-controller";
98 compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali"; 107 compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
99 dcr-reg = <010 2>; 108 dcr-reg = <010 2>;
100 }; 109 };
@@ -122,6 +131,13 @@
122 interrupt-map-mask = <ffffffff>; 131 interrupt-map-mask = <ffffffff>;
123 }; 132 };
124 133
134 USB1: usb@e0000400 {
135 compatible = "ohci-be";
136 reg = <0 e0000400 60>;
137 interrupt-parent = <&UIC0>;
138 interrupts = <15 8>;
139 };
140
125 POB0: opb { 141 POB0: opb {
126 compatible = "ibm,opb-440epx", "ibm,opb"; 142 compatible = "ibm,opb-440epx", "ibm,opb";
127 #address-cells = <1>; 143 #address-cells = <1>;
@@ -308,6 +324,33 @@
308 has-new-stacr-staopc; 324 has-new-stacr-staopc;
309 }; 325 };
310 }; 326 };
327
328 PCI0: pci@1ec000000 {
329 device_type = "pci";
330 #interrupt-cells = <1>;
331 #size-cells = <2>;
332 #address-cells = <3>;
333 compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
334 primary;
335 reg = <1 eec00000 8 /* Config space access */
336 1 eed00000 4 /* IACK */
337 1 eed00000 4 /* Special cycle */
338 1 ef400000 40>; /* Internal registers */
339
340 /* Outbound ranges, one memory and one IO,
341 * later cannot be changed. Chip supports a second
342 * IO range but we don't use it for now
343 */
344 ranges = <02000000 0 80000000 1 80000000 0 10000000
345 01000000 0 00000000 1 e8000000 0 00100000>;
346
347 /* Inbound 2GB range starting at 0 */
348 dma-ranges = <42000000 0 0 0 0 0 80000000>;
349
350 /* All PCI interrupts are routed to IRQ 67 */
351 interrupt-map-mask = <0000 0 0 0>;
352 interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
353 };
311 }; 354 };
312 355
313 chosen { 356 chosen {
diff --git a/arch/powerpc/boot/dts/storcenter.dts b/arch/powerpc/boot/dts/storcenter.dts
new file mode 100644
index 000000000000..2204874ac5f3
--- /dev/null
+++ b/arch/powerpc/boot/dts/storcenter.dts
@@ -0,0 +1,141 @@
1/*
2 * Device Tree Source for IOMEGA StorCenter
3 *
4 * Copyright 2007 Oyvind Repvik
5 * Copyright 2007 Jon Loeliger
6 *
7 * Based on the Kurobox DTS by G. Liakhovetski <g.liakhovetski@gmx.de>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14/dts-v1/;
15
16/ {
17 model = "StorCenter";
18 compatible = "storcenter";
19 #address-cells = <1>;
20 #size-cells = <1>;
21
22 aliases {
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
27
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 PowerPC,8241@0 {
33 device_type = "cpu";
34 reg = <0>;
35 clock-frequency = <200000000>;
36 timebase-frequency = <25000000>;
37 bus-frequency = <0>; /* from bootwrapper */
38 i-cache-line-size = <32>;
39 d-cache-line-size = <32>;
40 i-cache-size = <16384>;
41 d-cache-size = <16384>;
42 };
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0x00000000 0x04000000>; /* 64MB @ 0x0 */
48 };
49
50 soc@fc000000 {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 device_type = "soc";
54 compatible = "fsl,mpc8241", "mpc10x";
55 store-gathering = <0>; /* 0 == off, !0 == on */
56 ranges = <0x0 0xfc000000 0x100000>;
57 reg = <0xfc000000 0x100000>; /* EUMB */
58 bus-frequency = <0>; /* fixed by loader */
59
60 i2c@3000 {
61 #address-cells = <1>;
62 #size-cells = <0>;
63 compatible = "fsl-i2c";
64 reg = <0x3000 0x100>;
65 interrupts = <5 2>;
66 interrupt-parent = <&mpic>;
67
68 rtc@68 {
69 compatible = "dallas,ds1337";
70 reg = <68>;
71 };
72 };
73
74 serial0: serial@4500 {
75 cell-index = <0>;
76 device_type = "serial";
77 compatible = "ns16550";
78 reg = <0x4500 0x20>;
79 clock-frequency = <97553800>; /* Hz */
80 current-speed = <115200>;
81 interrupts = <9 2>;
82 interrupt-parent = <&mpic>;
83 };
84
85 serial1: serial@4600 {
86 cell-index = <1>;
87 device_type = "serial";
88 compatible = "ns16550";
89 reg = <0x4600 0x20>;
90 clock-frequency = <97553800>; /* Hz */
91 current-speed = <9600>;
92 interrupts = <10 2>;
93 interrupt-parent = <&mpic>;
94 };
95
96 mpic: interrupt-controller@40000 {
97 #interrupt-cells = <2>;
98 device_type = "open-pic";
99 compatible = "chrp,open-pic";
100 interrupt-controller;
101 reg = <0x40000 0x40000>;
102 };
103
104 };
105
106 pci0: pci@fe800000 {
107 #address-cells = <3>;
108 #size-cells = <2>;
109 #interrupt-cells = <1>;
110 device_type = "pci";
111 compatible = "mpc10x-pci";
112 reg = <0xfe800000 0x1000>;
113 ranges = <0x01000000 0x0 0x0 0xfe000000 0x0 0x00c00000
114 0x02000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
115 bus-range = <0 0xff>;
116 clock-frequency = <97553800>;
117 interrupt-parent = <&mpic>;
118 interrupt-map-mask = <0xf800 0 0 7>;
119 interrupt-map = <
120 /* IDSEL 13 - IDE */
121 0x6800 0 0 1 &mpic 0 1
122 0x6800 0 0 2 &mpic 0 1
123 0x6800 0 0 3 &mpic 0 1
124 0x6800 0 0 4 &mpic 0 1
125 /* IDSEL 14 - USB */
126 0x7000 0 0 1 &mpic 0 1
127 0x7000 0 0 2 &mpic 0 1
128 0x7000 0 0 3 &mpic 0 1
129 0x7000 0 0 4 &mpic 0 1
130 /* IDSEL 15 - ETH */
131 0x7800 0 0 1 &mpic 0 1
132 0x7800 0 0 2 &mpic 0 1
133 0x7800 0 0 3 &mpic 0 1
134 0x7800 0 0 4 &mpic 0 1
135 >;
136 };
137
138 chosen {
139 linux,stdout-path = "/soc/serial@4500";
140 };
141};
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts
new file mode 100644
index 000000000000..f81fd7fdb29e
--- /dev/null
+++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts
@@ -0,0 +1,228 @@
1/*
2 * STX GP3 - 8560 ADS Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "stx,gp3";
16 compatible = "stx,gp3-8560", "stx,gp3";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 pci0 = &pci0;
25 };
26
27 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30
31 PowerPC,8560@0 {
32 device_type = "cpu";
33 reg = <0>;
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>;
37 i-cache-size = <32768>;
38 timebase-frequency = <0>;
39 bus-frequency = <0>;
40 clock-frequency = <0>;
41 };
42 };
43
44 memory {
45 device_type = "memory";
46 reg = <0x00000000 0x10000000>;
47 };
48
49 soc@fdf00000 {
50 #address-cells = <1>;
51 #size-cells = <1>;
52 device_type = "soc";
53 ranges = <0 0xfdf00000 0x100000>;
54 reg = <0xfdf00000 0x1000>;
55 bus-frequency = <0>;
56 compatible = "fsl,mpc8560-immr", "simple-bus";
57
58 memory-controller@2000 {
59 compatible = "fsl,8540-memory-controller";
60 reg = <0x2000 0x1000>;
61 interrupt-parent = <&mpic>;
62 interrupts = <18 2>;
63 };
64
65 l2-cache-controller@20000 {
66 compatible = "fsl,8540-l2-cache-controller";
67 reg = <0x20000 0x1000>;
68 cache-line-size = <32>;
69 cache-size = <0x40000>; // L2, 256K
70 interrupt-parent = <&mpic>;
71 interrupts = <16 2>;
72 };
73
74 i2c@3000 {
75 #address-cells = <1>;
76 #size-cells = <0>;
77 cell-index = <0>;
78 compatible = "fsl-i2c";
79 reg = <0x3000 0x100>;
80 interrupts = <43 2>;
81 interrupt-parent = <&mpic>;
82 dfsrr;
83 };
84
85 mdio@24520 {
86 #address-cells = <1>;
87 #size-cells = <0>;
88 compatible = "fsl,gianfar-mdio";
89 reg = <0x24520 0x20>;
90
91 phy2: ethernet-phy@2 {
92 interrupt-parent = <&mpic>;
93 interrupts = <5 4>;
94 reg = <2>;
95 device_type = "ethernet-phy";
96 };
97 phy4: ethernet-phy@4 {
98 interrupt-parent = <&mpic>;
99 interrupts = <5 4>;
100 reg = <4>;
101 device_type = "ethernet-phy";
102 };
103 };
104
105 enet0: ethernet@24000 {
106 cell-index = <0>;
107 device_type = "network";
108 model = "TSEC";
109 compatible = "gianfar";
110 reg = <0x24000 0x1000>;
111 local-mac-address = [ 00 00 00 00 00 00 ];
112 interrupts = <29 2 30 2 34 2>;
113 interrupt-parent = <&mpic>;
114 phy-handle = <&phy2>;
115 };
116
117 enet1: ethernet@25000 {
118 cell-index = <1>;
119 device_type = "network";
120 model = "TSEC";
121 compatible = "gianfar";
122 reg = <0x25000 0x1000>;
123 local-mac-address = [ 00 00 00 00 00 00 ];
124 interrupts = <35 2 36 2 40 2>;
125 interrupt-parent = <&mpic>;
126 phy-handle = <&phy4>;
127 };
128
129 mpic: pic@40000 {
130 interrupt-controller;
131 #address-cells = <0>;
132 #interrupt-cells = <2>;
133 reg = <0x40000 0x40000>;
134 device_type = "open-pic";
135 };
136
137 cpm@919c0 {
138 #address-cells = <1>;
139 #size-cells = <1>;
140 compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
141 reg = <0x919c0 0x30>;
142 ranges;
143
144 muram@80000 {
145 #address-cells = <1>;
146 #size-cells = <1>;
147 ranges = <0 0x80000 0x10000>;
148
149 data@0 {
150 compatible = "fsl,cpm-muram-data";
151 reg = <0 0x4000 0x9000 0x2000>;
152 };
153 };
154
155 brg@919f0 {
156 compatible = "fsl,mpc8560-brg",
157 "fsl,cpm2-brg",
158 "fsl,cpm-brg";
159 reg = <0x919f0 0x10 0x915f0 0x10>;
160 clock-frequency = <0>;
161 };
162
163 cpmpic: pic@90c00 {
164 interrupt-controller;
165 #address-cells = <0>;
166 #interrupt-cells = <2>;
167 interrupts = <46 2>;
168 interrupt-parent = <&mpic>;
169 reg = <0x90c00 0x80>;
170 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
171 };
172
173 serial0: serial@91a20 {
174 device_type = "serial";
175 compatible = "fsl,mpc8560-scc-uart",
176 "fsl,cpm2-scc-uart";
177 reg = <0x91a20 0x20 0x88100 0x100>;
178 fsl,cpm-brg = <2>;
179 fsl,cpm-command = <0x4a00000>;
180 interrupts = <41 8>;
181 interrupt-parent = <&cpmpic>;
182 };
183 };
184 };
185
186 pci0: pci@fdf08000 {
187 cell-index = <0>;
188 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
189 interrupt-map = <
190
191 /* IDSEL 0x0c */
192 0x6000 0 0 1 &mpic 1 1
193 0x6000 0 0 2 &mpic 2 1
194 0x6000 0 0 3 &mpic 3 1
195 0x6000 0 0 4 &mpic 4 1
196
197 /* IDSEL 0x0d */
198 0x6800 0 0 1 &mpic 4 1
199 0x6800 0 0 2 &mpic 1 1
200 0x6800 0 0 3 &mpic 2 1
201 0x6800 0 0 4 &mpic 3 1
202
203 /* IDSEL 0x0e */
204 0x7000 0 0 1 &mpic 3 1
205 0x7000 0 0 2 &mpic 4 1
206 0x7000 0 0 3 &mpic 1 1
207 0x7000 0 0 4 &mpic 2 1
208
209 /* IDSEL 0x0f */
210 0x7800 0 0 1 &mpic 2 1
211 0x7800 0 0 2 &mpic 3 1
212 0x7800 0 0 3 &mpic 4 1
213 0x7800 0 0 4 &mpic 1 1>;
214
215 interrupt-parent = <&mpic>;
216 interrupts = <24 2>;
217 bus-range = <0 0>;
218 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
219 0x01000000 0 0x00000000 0xe2000000 0 0x00100000>;
220 clock-frequency = <66666666>;
221 #interrupt-cells = <1>;
222 #size-cells = <2>;
223 #address-cells = <3>;
224 reg = <0xfdf08000 0x1000>;
225 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
226 device_type = "pci";
227 };
228};
diff --git a/arch/powerpc/boot/dts/taishan.dts b/arch/powerpc/boot/dts/taishan.dts
new file mode 100644
index 000000000000..0706a4a13b9f
--- /dev/null
+++ b/arch/powerpc/boot/dts/taishan.dts
@@ -0,0 +1,383 @@
1/*
2 * Device Tree Source for IBM/AMCC Taishan
3 *
4 * Copyright 2007 IBM Corp.
5 * Hugh Blemings <hugh@au.ibm.com> based off code by
6 * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without
10 * any warranty of any kind, whether express or implied.
11 */
12
13/ {
14 #address-cells = <2>;
15 #size-cells = <1>;
16 model = "amcc,taishan";
17 compatible = "amcc,taishan";
18 dcr-parent = <&/cpus/cpu@0>;
19
20 aliases {
21 ethernet0 = &EMAC2;
22 ethernet1 = &EMAC3;
23 serial0 = &UART0;
24 serial1 = &UART1;
25 };
26
27 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30
31 cpu@0 {
32 device_type = "cpu";
33 model = "PowerPC,440GX";
34 reg = <0>;
35 clock-frequency = <2FAF0800>; // 800MHz
36 timebase-frequency = <0>; // Filled in by zImage
37 i-cache-line-size = <32>;
38 d-cache-line-size = <32>;
39 i-cache-size = <8000>; /* 32 kB */
40 d-cache-size = <8000>; /* 32 kB */
41 dcr-controller;
42 dcr-access-method = "native";
43 };
44 };
45
46 memory {
47 device_type = "memory";
48 reg = <0 0 0>; // Filled in by zImage
49 };
50
51
52 UICB0: interrupt-controller-base {
53 compatible = "ibm,uic-440gx", "ibm,uic";
54 interrupt-controller;
55 cell-index = <3>;
56 dcr-reg = <200 009>;
57 #address-cells = <0>;
58 #size-cells = <0>;
59 #interrupt-cells = <2>;
60 };
61
62
63 UIC0: interrupt-controller0 {
64 compatible = "ibm,uic-440gx", "ibm,uic";
65 interrupt-controller;
66 cell-index = <0>;
67 dcr-reg = <0c0 009>;
68 #address-cells = <0>;
69 #size-cells = <0>;
70 #interrupt-cells = <2>;
71 interrupts = <01 4 00 4>; /* cascade - first non-critical */
72 interrupt-parent = <&UICB0>;
73
74 };
75
76 UIC1: interrupt-controller1 {
77 compatible = "ibm,uic-440gx", "ibm,uic";
78 interrupt-controller;
79 cell-index = <1>;
80 dcr-reg = <0d0 009>;
81 #address-cells = <0>;
82 #size-cells = <0>;
83 #interrupt-cells = <2>;
84 interrupts = <03 4 02 4>; /* cascade */
85 interrupt-parent = <&UICB0>;
86 };
87
88 UIC2: interrupt-controller2 {
89 compatible = "ibm,uic-440gx", "ibm,uic";
90 interrupt-controller;
91 cell-index = <2>; /* was 1 */
92 dcr-reg = <210 009>;
93 #address-cells = <0>;
94 #size-cells = <0>;
95 #interrupt-cells = <2>;
96 interrupts = <05 4 04 4>; /* cascade */
97 interrupt-parent = <&UICB0>;
98 };
99
100
101 CPC0: cpc {
102 compatible = "ibm,cpc-440gp";
103 dcr-reg = <0b0 003 0e0 010>;
104 // FIXME: anything else?
105 };
106
107 plb {
108 compatible = "ibm,plb-440gx", "ibm,plb4";
109 #address-cells = <2>;
110 #size-cells = <1>;
111 ranges;
112 clock-frequency = <9896800>; // 160MHz
113
114 SDRAM0: memory-controller {
115 compatible = "ibm,sdram-440gp";
116 dcr-reg = <010 2>;
117 // FIXME: anything else?
118 };
119
120 SRAM0: sram {
121 compatible = "ibm,sram-440gp";
122 dcr-reg = <020 8 00a 1>;
123 };
124
125 DMA0: dma {
126 // FIXME: ???
127 compatible = "ibm,dma-440gp";
128 dcr-reg = <100 027>;
129 };
130
131 MAL0: mcmal {
132 compatible = "ibm,mcmal-440gx", "ibm,mcmal2";
133 dcr-reg = <180 62>;
134 num-tx-chans = <4>;
135 num-rx-chans = <4>;
136 interrupt-parent = <&MAL0>;
137 interrupts = <0 1 2 3 4>;
138 #interrupt-cells = <1>;
139 #address-cells = <0>;
140 #size-cells = <0>;
141 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
142 /*RXEOB*/ 1 &UIC0 b 4
143 /*SERR*/ 2 &UIC1 0 4
144 /*TXDE*/ 3 &UIC1 1 4
145 /*RXDE*/ 4 &UIC1 2 4>;
146 interrupt-map-mask = <ffffffff>;
147 };
148
149 POB0: opb {
150 compatible = "ibm,opb-440gx", "ibm,opb";
151 #address-cells = <1>;
152 #size-cells = <1>;
153 /* Wish there was a nicer way of specifying a full 32-bit
154 range */
155 ranges = <00000000 1 00000000 80000000
156 80000000 1 80000000 80000000>;
157 dcr-reg = <090 00b>;
158 interrupt-parent = <&UIC1>;
159 interrupts = <7 4>;
160 clock-frequency = <4C4B400>; // 80MHz
161
162
163 EBC0: ebc {
164 compatible = "ibm,ebc-440gx", "ibm,ebc";
165 dcr-reg = <012 2>;
166 #address-cells = <2>;
167 #size-cells = <1>;
168 clock-frequency = <4C4B400>; // 80MHz
169
170 /* ranges property is supplied by zImage
171 * based on firmware's configuration of the
172 * EBC bridge */
173
174 interrupts = <5 4>;
175 interrupt-parent = <&UIC1>;
176
177 /* TODO: Add other EBC devices */
178 };
179
180
181
182 UART0: serial@40000200 {
183 device_type = "serial";
184 compatible = "ns16550";
185 reg = <40000200 8>;
186 virtual-reg = <e0000200>;
187 clock-frequency = <A8C000>;
188 current-speed = <1C200>; /* 115200 */
189 interrupt-parent = <&UIC0>;
190 interrupts = <0 4>;
191 };
192
193 UART1: serial@40000300 {
194 device_type = "serial";
195 compatible = "ns16550";
196 reg = <40000300 8>;
197 virtual-reg = <e0000300>;
198 clock-frequency = <A8C000>;
199 current-speed = <1C200>; /* 115200 */
200 interrupt-parent = <&UIC0>;
201 interrupts = <1 4>;
202 };
203
204 IIC0: i2c@40000400 {
205 /* FIXME */
206 device_type = "i2c";
207 compatible = "ibm,iic-440gp", "ibm,iic";
208 reg = <40000400 14>;
209 interrupt-parent = <&UIC0>;
210 interrupts = <2 4>;
211 };
212 IIC1: i2c@40000500 {
213 /* FIXME */
214 device_type = "i2c";
215 compatible = "ibm,iic-440gp", "ibm,iic";
216 reg = <40000500 14>;
217 interrupt-parent = <&UIC0>;
218 interrupts = <3 4>;
219 };
220
221 GPIO0: gpio@40000700 {
222 /* FIXME */
223 compatible = "ibm,gpio-440gp";
224 reg = <40000700 20>;
225 };
226
227 ZMII0: emac-zmii@40000780 {
228 device_type = "zgmii-interface";
229 compatible = "ibm,zmii-440gx", "ibm,zmii";
230 reg = <40000780 c>;
231 };
232
233 RGMII0: emac-rgmii@40000790 {
234 device_type = "rgmii-interface";
235 compatible = "ibm,rgmii";
236 reg = <40000790 8>;
237 };
238
239
240 EMAC0: ethernet@40000800 {
241 unused = <1>;
242 linux,network-index = <2>;
243 device_type = "network";
244 compatible = "ibm,emac-440gx", "ibm,emac4";
245 interrupt-parent = <&UIC1>;
246 interrupts = <1c 4 1d 4>;
247 reg = <40000800 70>;
248 local-mac-address = [000000000000]; // Filled in by zImage
249 mal-device = <&MAL0>;
250 mal-tx-channel = <0>;
251 mal-rx-channel = <0>;
252 cell-index = <0>;
253 max-frame-size = <5dc>;
254 rx-fifo-size = <1000>;
255 tx-fifo-size = <800>;
256 phy-mode = "rmii";
257 phy-map = <00000001>;
258 zmii-device = <&ZMII0>;
259 zmii-channel = <0>;
260 };
261 EMAC1: ethernet@40000900 {
262 unused = <1>;
263 linux,network-index = <3>;
264 device_type = "network";
265 compatible = "ibm,emac-440gx", "ibm,emac4";
266 interrupt-parent = <&UIC1>;
267 interrupts = <1e 4 1f 4>;
268 reg = <40000900 70>;
269 local-mac-address = [000000000000]; // Filled in by zImage
270 mal-device = <&MAL0>;
271 mal-tx-channel = <1>;
272 mal-rx-channel = <1>;
273 cell-index = <1>;
274 max-frame-size = <5dc>;
275 rx-fifo-size = <1000>;
276 tx-fifo-size = <800>;
277 phy-mode = "rmii";
278 phy-map = <00000001>;
279 zmii-device = <&ZMII0>;
280 zmii-channel = <1>;
281 };
282
283 EMAC2: ethernet@40000c00 {
284 linux,network-index = <0>;
285 device_type = "network";
286 compatible = "ibm,emac-440gx", "ibm,emac4";
287 interrupt-parent = <&UIC2>;
288 interrupts = <0 4 1 4>;
289 reg = <40000c00 70>;
290 local-mac-address = [000000000000]; // Filled in by zImage
291 mal-device = <&MAL0>;
292 mal-tx-channel = <2>;
293 mal-rx-channel = <2>;
294 cell-index = <2>;
295 max-frame-size = <5dc>;
296 rx-fifo-size = <1000>;
297 tx-fifo-size = <800>;
298 phy-mode = "rgmii";
299 phy-map = <00000001>;
300 rgmii-device = <&RGMII0>;
301 rgmii-channel = <0>;
302 zmii-device = <&ZMII0>;
303 zmii-channel = <2>;
304 };
305
306 EMAC3: ethernet@40000e00 {
307 linux,network-index = <1>;
308 device_type = "network";
309 compatible = "ibm,emac-440gx", "ibm,emac4";
310 interrupt-parent = <&UIC2>;
311 interrupts = <2 4 3 4>;
312 reg = <40000e00 70>;
313 local-mac-address = [000000000000]; // Filled in by zImage
314 mal-device = <&MAL0>;
315 mal-tx-channel = <3>;
316 mal-rx-channel = <3>;
317 cell-index = <3>;
318 max-frame-size = <5dc>;
319 rx-fifo-size = <1000>;
320 tx-fifo-size = <800>;
321 phy-mode = "rgmii";
322 phy-map = <00000003>;
323 rgmii-device = <&RGMII0>;
324 rgmii-channel = <1>;
325 zmii-device = <&ZMII0>;
326 zmii-channel = <3>;
327 };
328
329
330 GPT0: gpt@40000a00 {
331 /* FIXME */
332 reg = <40000a00 d4>;
333 interrupt-parent = <&UIC0>;
334 interrupts = <12 4 13 4 14 4 15 4 16 4>;
335 };
336
337 };
338
339 PCIX0: pci@20ec00000 {
340 device_type = "pci";
341 #interrupt-cells = <1>;
342 #size-cells = <2>;
343 #address-cells = <3>;
344 compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
345 primary;
346 large-inbound-windows;
347 enable-msi-hole;
348 reg = <2 0ec00000 8 /* Config space access */
349 0 0 0 /* no IACK cycles */
350 2 0ed00000 4 /* Special cycles */
351 2 0ec80000 100 /* Internal registers */
352 2 0ec80100 fc>; /* Internal messaging registers */
353
354 /* Outbound ranges, one memory and one IO,
355 * later cannot be changed
356 */
357 ranges = <02000000 0 80000000 00000003 80000000 0 80000000
358 01000000 0 00000000 00000002 08000000 0 00010000>;
359
360 /* Inbound 2GB range starting at 0 */
361 dma-ranges = <42000000 0 0 0 0 0 80000000>;
362
363 interrupt-map-mask = <f800 0 0 7>;
364 interrupt-map = <
365 /* IDSEL 1 */
366 0800 0 0 1 &UIC0 17 8
367 0800 0 0 2 &UIC0 18 8
368 0800 0 0 3 &UIC0 19 8
369 0800 0 0 4 &UIC0 1a 8
370
371 /* IDSEL 2 */
372 1000 0 0 1 &UIC0 18 8
373 1000 0 0 2 &UIC0 19 8
374 1000 0 0 3 &UIC0 1a 8
375 1000 0 0 4 &UIC0 17 8
376 >;
377 };
378 };
379
380 chosen {
381 linux,stdout-path = "/plb/opb/serial@40000300";
382 };
383};
diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts
new file mode 100644
index 000000000000..c86464f007da
--- /dev/null
+++ b/arch/powerpc/boot/dts/tqm5200.dts
@@ -0,0 +1,177 @@
1/*
2 * TQM5200 board Device Tree Source
3 *
4 * Copyright (C) 2007 Semihalf
5 * Marian Balakowicz <m8@semihalf.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/ {
14 model = "tqc,tqm5200";
15 compatible = "tqc,tqm5200";
16 #address-cells = <1>;
17 #size-cells = <1>;
18
19 cpus {
20 #address-cells = <1>;
21 #size-cells = <0>;
22
23 PowerPC,5200@0 {
24 device_type = "cpu";
25 reg = <0>;
26 d-cache-line-size = <20>;
27 i-cache-line-size = <20>;
28 d-cache-size = <4000>; // L1, 16K
29 i-cache-size = <4000>; // L1, 16K
30 timebase-frequency = <0>; // from bootloader
31 bus-frequency = <0>; // from bootloader
32 clock-frequency = <0>; // from bootloader
33 };
34 };
35
36 memory {
37 device_type = "memory";
38 reg = <00000000 04000000>; // 64MB
39 };
40
41 soc5200@f0000000 {
42 #address-cells = <1>;
43 #size-cells = <1>;
44 compatible = "fsl,mpc5200-immr";
45 ranges = <0 f0000000 0000c000>;
46 reg = <f0000000 00000100>;
47 bus-frequency = <0>; // from bootloader
48 system-frequency = <0>; // from bootloader
49
50 cdm@200 {
51 compatible = "fsl,mpc5200-cdm";
52 reg = <200 38>;
53 };
54
55 mpc5200_pic: interrupt-controller@500 {
56 // 5200 interrupts are encoded into two levels;
57 interrupt-controller;
58 #interrupt-cells = <3>;
59 compatible = "fsl,mpc5200-pic";
60 reg = <500 80>;
61 };
62
63 timer@600 { // General Purpose Timer
64 compatible = "fsl,mpc5200-gpt";
65 reg = <600 10>;
66 interrupts = <1 9 0>;
67 interrupt-parent = <&mpc5200_pic>;
68 fsl,has-wdt;
69 };
70
71 gpio@b00 {
72 compatible = "fsl,mpc5200-gpio";
73 reg = <b00 40>;
74 interrupts = <1 7 0>;
75 interrupt-parent = <&mpc5200_pic>;
76 };
77
78 usb@1000 {
79 compatible = "fsl,mpc5200-ohci","ohci-be";
80 reg = <1000 ff>;
81 interrupts = <2 6 0>;
82 interrupt-parent = <&mpc5200_pic>;
83 };
84
85 dma-controller@1200 {
86 compatible = "fsl,mpc5200-bestcomm";
87 reg = <1200 80>;
88 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
89 3 4 0 3 5 0 3 6 0 3 7 0
90 3 8 0 3 9 0 3 a 0 3 b 0
91 3 c 0 3 d 0 3 e 0 3 f 0>;
92 interrupt-parent = <&mpc5200_pic>;
93 };
94
95 xlb@1f00 {
96 compatible = "fsl,mpc5200-xlb";
97 reg = <1f00 100>;
98 };
99
100 serial@2000 { // PSC1
101 device_type = "serial";
102 compatible = "fsl,mpc5200-psc-uart";
103 port-number = <0>; // Logical port assignment
104 reg = <2000 100>;
105 interrupts = <2 1 0>;
106 interrupt-parent = <&mpc5200_pic>;
107 };
108
109 serial@2200 { // PSC2
110 device_type = "serial";
111 compatible = "fsl,mpc5200-psc-uart";
112 port-number = <1>; // Logical port assignment
113 reg = <2200 100>;
114 interrupts = <2 2 0>;
115 interrupt-parent = <&mpc5200_pic>;
116 };
117
118 serial@2400 { // PSC3
119 device_type = "serial";
120 compatible = "fsl,mpc5200-psc-uart";
121 port-number = <2>; // Logical port assignment
122 reg = <2400 100>;
123 interrupts = <2 3 0>;
124 interrupt-parent = <&mpc5200_pic>;
125 };
126
127 ethernet@3000 {
128 device_type = "network";
129 compatible = "fsl,mpc5200-fec";
130 reg = <3000 800>;
131 local-mac-address = [ 00 00 00 00 00 00 ];
132 interrupts = <2 5 0>;
133 interrupt-parent = <&mpc5200_pic>;
134 };
135
136 ata@3a00 {
137 compatible = "fsl,mpc5200-ata";
138 reg = <3a00 100>;
139 interrupts = <2 7 0>;
140 interrupt-parent = <&mpc5200_pic>;
141 };
142
143 i2c@3d40 {
144 compatible = "fsl,mpc5200-i2c","fsl-i2c";
145 reg = <3d40 40>;
146 interrupts = <2 10 0>;
147 interrupt-parent = <&mpc5200_pic>;
148 fsl5200-clocking;
149 };
150
151 sram@8000 {
152 compatible = "fsl,mpc5200-sram";
153 reg = <8000 4000>;
154 };
155 };
156
157 pci@f0000d00 {
158 #interrupt-cells = <1>;
159 #size-cells = <2>;
160 #address-cells = <3>;
161 device_type = "pci";
162 compatible = "fsl,mpc5200-pci";
163 reg = <f0000d00 100>;
164 interrupt-map-mask = <f800 0 0 7>;
165 interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3
166 c000 0 0 2 &mpc5200_pic 0 0 3
167 c000 0 0 3 &mpc5200_pic 0 0 3
168 c000 0 0 4 &mpc5200_pic 0 0 3>;
169 clock-frequency = <0>; // From boot loader
170 interrupts = <2 8 0 2 9 0 2 a 0>;
171 interrupt-parent = <&mpc5200_pic>;
172 bus-range = <0 0>;
173 ranges = <42000000 0 80000000 80000000 0 10000000
174 02000000 0 90000000 90000000 0 10000000
175 01000000 0 00000000 a0000000 0 01000000>;
176 };
177};
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
new file mode 100644
index 000000000000..1addb3ae719e
--- /dev/null
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -0,0 +1,204 @@
1/*
2 * TQM 8540 Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "tqm,8540";
16 compatible = "tqm,8540", "tqm,85xx";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 ethernet2 = &enet2;
24 serial0 = &serial0;
25 serial1 = &serial1;
26 pci0 = &pci0;
27 };
28
29 cpus {
30 #address-cells = <1>;
31 #size-cells = <0>;
32
33 PowerPC,8540@0 {
34 device_type = "cpu";
35 reg = <0>;
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <32768>;
39 i-cache-size = <32768>;
40 timebase-frequency = <0>;
41 bus-frequency = <0>;
42 clock-frequency = <0>;
43 };
44 };
45
46 memory {
47 device_type = "memory";
48 reg = <0x00000000 0x10000000>;
49 };
50
51 soc@e0000000 {
52 #address-cells = <1>;
53 #size-cells = <1>;
54 device_type = "soc";
55 ranges = <0x0 0xe0000000 0x100000>;
56 reg = <0xe0000000 0x200>;
57 bus-frequency = <0>;
58 compatible = "fsl,mpc8540-immr", "simple-bus";
59
60 memory-controller@2000 {
61 compatible = "fsl,8540-memory-controller";
62 reg = <0x2000 0x1000>;
63 interrupt-parent = <&mpic>;
64 interrupts = <18 2>;
65 };
66
67 l2-cache-controller@20000 {
68 compatible = "fsl,8540-l2-cache-controller";
69 reg = <0x20000 0x1000>;
70 cache-line-size = <32>;
71 cache-size = <0x40000>; // L2, 256K
72 interrupt-parent = <&mpic>;
73 interrupts = <16 2>;
74 };
75
76 i2c@3000 {
77 #address-cells = <1>;
78 #size-cells = <0>;
79 cell-index = <0>;
80 compatible = "fsl-i2c";
81 reg = <0x3000 0x100>;
82 interrupts = <43 2>;
83 interrupt-parent = <&mpic>;
84 dfsrr;
85
86 rtc@68 {
87 compatible = "dallas,ds1337";
88 reg = <0x68>;
89 };
90 };
91
92 mdio@24520 {
93 #address-cells = <1>;
94 #size-cells = <0>;
95 compatible = "fsl,gianfar-mdio";
96 reg = <0x24520 0x20>;
97
98 phy1: ethernet-phy@1 {
99 interrupt-parent = <&mpic>;
100 interrupts = <8 1>;
101 reg = <1>;
102 device_type = "ethernet-phy";
103 };
104 phy2: ethernet-phy@2 {
105 interrupt-parent = <&mpic>;
106 interrupts = <8 1>;
107 reg = <2>;
108 device_type = "ethernet-phy";
109 };
110 phy3: ethernet-phy@3 {
111 interrupt-parent = <&mpic>;
112 interrupts = <8 1>;
113 reg = <3>;
114 device_type = "ethernet-phy";
115 };
116 };
117
118 enet0: ethernet@24000 {
119 cell-index = <0>;
120 device_type = "network";
121 model = "TSEC";
122 compatible = "gianfar";
123 reg = <0x24000 0x1000>;
124 local-mac-address = [ 00 00 00 00 00 00 ];
125 interrupts = <29 2 30 2 34 2>;
126 interrupt-parent = <&mpic>;
127 phy-handle = <&phy2>;
128 };
129
130 enet1: ethernet@25000 {
131 cell-index = <1>;
132 device_type = "network";
133 model = "TSEC";
134 compatible = "gianfar";
135 reg = <0x25000 0x1000>;
136 local-mac-address = [ 00 00 00 00 00 00 ];
137 interrupts = <35 2 36 2 40 2>;
138 interrupt-parent = <&mpic>;
139 phy-handle = <&phy1>;
140 };
141
142 enet2: ethernet@26000 {
143 cell-index = <2>;
144 device_type = "network";
145 model = "FEC";
146 compatible = "gianfar";
147 reg = <0x26000 0x1000>;
148 local-mac-address = [ 00 00 00 00 00 00 ];
149 interrupts = <41 2>;
150 interrupt-parent = <&mpic>;
151 phy-handle = <&phy3>;
152 };
153
154 serial0: serial@4500 {
155 cell-index = <0>;
156 device_type = "serial";
157 compatible = "ns16550";
158 reg = <0x4500 0x100>; // reg base, size
159 clock-frequency = <0>; // should we fill in in uboot?
160 interrupts = <42 2>;
161 interrupt-parent = <&mpic>;
162 };
163
164 serial1: serial@4600 {
165 cell-index = <1>;
166 device_type = "serial";
167 compatible = "ns16550";
168 reg = <0x4600 0x100>; // reg base, size
169 clock-frequency = <0>; // should we fill in in uboot?
170 interrupts = <42 2>;
171 interrupt-parent = <&mpic>;
172 };
173
174 mpic: pic@40000 {
175 interrupt-controller;
176 #address-cells = <0>;
177 #interrupt-cells = <2>;
178 reg = <0x40000 0x40000>;
179 device_type = "open-pic";
180 };
181 };
182
183 pci0: pci@e0008000 {
184 cell-index = <0>;
185 #interrupt-cells = <1>;
186 #size-cells = <2>;
187 #address-cells = <3>;
188 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
189 device_type = "pci";
190 reg = <0xe0008000 0x1000>;
191 clock-frequency = <66666666>;
192 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
193 interrupt-map = <
194 /* IDSEL 28 */
195 0xe000 0 0 1 &mpic 2 1
196 0xe000 0 0 2 &mpic 3 1>;
197
198 interrupt-parent = <&mpic>;
199 interrupts = <24 2>;
200 bus-range = <0 0>;
201 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
202 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
203 };
204};
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
new file mode 100644
index 000000000000..9e01093f496e
--- /dev/null
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -0,0 +1,228 @@
1/*
2 * TQM 8541 Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "tqm,8541";
16 compatible = "tqm,8541", "tqm,85xx";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
27
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 PowerPC,8541@0 {
33 device_type = "cpu";
34 reg = <0>;
35 d-cache-line-size = <32>;
36 i-cache-line-size = <32>;
37 d-cache-size = <32768>;
38 i-cache-size = <32768>;
39 timebase-frequency = <0>;
40 bus-frequency = <0>;
41 clock-frequency = <0>;
42 };
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0x00000000 0x10000000>;
48 };
49
50 soc@e0000000 {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 device_type = "soc";
54 ranges = <0x0 0xe0000000 0x100000>;
55 reg = <0xe0000000 0x200>;
56 bus-frequency = <0>;
57 compatible = "fsl,mpc8541-immr", "simple-bus";
58
59 memory-controller@2000 {
60 compatible = "fsl,8540-memory-controller";
61 reg = <0x2000 0x1000>;
62 interrupt-parent = <&mpic>;
63 interrupts = <18 2>;
64 };
65
66 l2-cache-controller@20000 {
67 compatible = "fsl,8540-l2-cache-controller";
68 reg = <0x20000 0x1000>;
69 cache-line-size = <32>;
70 cache-size = <0x40000>; // L2, 256K
71 interrupt-parent = <&mpic>;
72 interrupts = <16 2>;
73 };
74
75 i2c@3000 {
76 #address-cells = <1>;
77 #size-cells = <0>;
78 cell-index = <0>;
79 compatible = "fsl-i2c";
80 reg = <0x3000 0x100>;
81 interrupts = <43 2>;
82 interrupt-parent = <&mpic>;
83 dfsrr;
84
85 rtc@68 {
86 compatible = "dallas,ds1337";
87 reg = <0x68>;
88 };
89 };
90
91 mdio@24520 {
92 #address-cells = <1>;
93 #size-cells = <0>;
94 compatible = "fsl,gianfar-mdio";
95 reg = <0x24520 0x20>;
96
97 phy1: ethernet-phy@1 {
98 interrupt-parent = <&mpic>;
99 interrupts = <8 1>;
100 reg = <1>;
101 device_type = "ethernet-phy";
102 };
103 phy2: ethernet-phy@2 {
104 interrupt-parent = <&mpic>;
105 interrupts = <8 1>;
106 reg = <2>;
107 device_type = "ethernet-phy";
108 };
109 phy3: ethernet-phy@3 {
110 interrupt-parent = <&mpic>;
111 interrupts = <8 1>;
112 reg = <3>;
113 device_type = "ethernet-phy";
114 };
115 };
116
117 enet0: ethernet@24000 {
118 cell-index = <0>;
119 device_type = "network";
120 model = "TSEC";
121 compatible = "gianfar";
122 reg = <0x24000 0x1000>;
123 local-mac-address = [ 00 00 00 00 00 00 ];
124 interrupts = <29 2 30 2 34 2>;
125 interrupt-parent = <&mpic>;
126 phy-handle = <&phy2>;
127 };
128
129 enet1: ethernet@25000 {
130 cell-index = <1>;
131 device_type = "network";
132 model = "TSEC";
133 compatible = "gianfar";
134 reg = <0x25000 0x1000>;
135 local-mac-address = [ 00 00 00 00 00 00 ];
136 interrupts = <35 2 36 2 40 2>;
137 interrupt-parent = <&mpic>;
138 phy-handle = <&phy1>;
139 };
140
141 serial0: serial@4500 {
142 cell-index = <0>;
143 device_type = "serial";
144 compatible = "ns16550";
145 reg = <0x4500 0x100>; // reg base, size
146 clock-frequency = <0>; // should we fill in in uboot?
147 interrupts = <42 2>;
148 interrupt-parent = <&mpic>;
149 };
150
151 serial1: serial@4600 {
152 cell-index = <1>;
153 device_type = "serial";
154 compatible = "ns16550";
155 reg = <0x4600 0x100>; // reg base, size
156 clock-frequency = <0>; // should we fill in in uboot?
157 interrupts = <42 2>;
158 interrupt-parent = <&mpic>;
159 };
160
161 mpic: pic@40000 {
162 interrupt-controller;
163 #address-cells = <0>;
164 #interrupt-cells = <2>;
165 reg = <0x40000 0x40000>;
166 device_type = "open-pic";
167 };
168
169 cpm@919c0 {
170 #address-cells = <1>;
171 #size-cells = <1>;
172 compatible = "fsl,mpc8541-cpm", "fsl,cpm2", "simple-bus";
173 reg = <0x919c0 0x30>;
174 ranges;
175
176 muram@80000 {
177 #address-cells = <1>;
178 #size-cells = <1>;
179 ranges = <0 0x80000 0x10000>;
180
181 data@0 {
182 compatible = "fsl,cpm-muram-data";
183 reg = <0 0x2000 0x9000 0x1000>;
184 };
185 };
186
187 brg@919f0 {
188 compatible = "fsl,mpc8541-brg",
189 "fsl,cpm2-brg",
190 "fsl,cpm-brg";
191 reg = <0x919f0 0x10 0x915f0 0x10>;
192 clock-frequency = <0>;
193 };
194
195 cpmpic: pic@90c00 {
196 interrupt-controller;
197 #address-cells = <0>;
198 #interrupt-cells = <2>;
199 interrupts = <46 2>;
200 interrupt-parent = <&mpic>;
201 reg = <0x90c00 0x80>;
202 compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic";
203 };
204 };
205 };
206
207 pci0: pci@e0008000 {
208 cell-index = <0>;
209 #interrupt-cells = <1>;
210 #size-cells = <2>;
211 #address-cells = <3>;
212 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
213 device_type = "pci";
214 reg = <0xe0008000 0x1000>;
215 clock-frequency = <66666666>;
216 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
217 interrupt-map = <
218 /* IDSEL 28 */
219 0xe000 0 0 1 &mpic 2 1
220 0xe000 0 0 2 &mpic 3 1>;
221
222 interrupt-parent = <&mpic>;
223 interrupts = <24 2>;
224 bus-range = <0 0>;
225 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
226 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
227 };
228};
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
new file mode 100644
index 000000000000..a20eb06c482f
--- /dev/null
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -0,0 +1,228 @@
1/*
2 * TQM 8555 Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "tqm,8555";
16 compatible = "tqm,8555", "tqm,85xx";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 };
27
28 cpus {
29 #address-cells = <1>;
30 #size-cells = <0>;
31
32 PowerPC,8555@0 {
33 device_type = "cpu";
34 reg = <0>;
35 d-cache-line-size = <32>;
36 i-cache-line-size = <32>;
37 d-cache-size = <32768>;
38 i-cache-size = <32768>;
39 timebase-frequency = <0>;
40 bus-frequency = <0>;
41 clock-frequency = <0>;
42 };
43 };
44
45 memory {
46 device_type = "memory";
47 reg = <0x00000000 0x10000000>;
48 };
49
50 soc@e0000000 {
51 #address-cells = <1>;
52 #size-cells = <1>;
53 device_type = "soc";
54 ranges = <0x0 0xe0000000 0x100000>;
55 reg = <0xe0000000 0x200>;
56 bus-frequency = <0>;
57 compatible = "fsl,mpc8555-immr", "simple-bus";
58
59 memory-controller@2000 {
60 compatible = "fsl,8540-memory-controller";
61 reg = <0x2000 0x1000>;
62 interrupt-parent = <&mpic>;
63 interrupts = <18 2>;
64 };
65
66 l2-cache-controller@20000 {
67 compatible = "fsl,8540-l2-cache-controller";
68 reg = <0x20000 0x1000>;
69 cache-line-size = <32>;
70 cache-size = <0x40000>; // L2, 256K
71 interrupt-parent = <&mpic>;
72 interrupts = <16 2>;
73 };
74
75 i2c@3000 {
76 #address-cells = <1>;
77 #size-cells = <0>;
78 cell-index = <0>;
79 compatible = "fsl-i2c";
80 reg = <0x3000 0x100>;
81 interrupts = <43 2>;
82 interrupt-parent = <&mpic>;
83 dfsrr;
84
85 rtc@68 {
86 compatible = "dallas,ds1337";
87 reg = <0x68>;
88 };
89 };
90
91 mdio@24520 {
92 #address-cells = <1>;
93 #size-cells = <0>;
94 compatible = "fsl,gianfar-mdio";
95 reg = <0x24520 0x20>;
96
97 phy1: ethernet-phy@1 {
98 interrupt-parent = <&mpic>;
99 interrupts = <8 1>;
100 reg = <1>;
101 device_type = "ethernet-phy";
102 };
103 phy2: ethernet-phy@2 {
104 interrupt-parent = <&mpic>;
105 interrupts = <8 1>;
106 reg = <2>;
107 device_type = "ethernet-phy";
108 };
109 phy3: ethernet-phy@3 {
110 interrupt-parent = <&mpic>;
111 interrupts = <8 1>;
112 reg = <3>;
113 device_type = "ethernet-phy";
114 };
115 };
116
117 enet0: ethernet@24000 {
118 cell-index = <0>;
119 device_type = "network";
120 model = "TSEC";
121 compatible = "gianfar";
122 reg = <0x24000 0x1000>;
123 local-mac-address = [ 00 00 00 00 00 00 ];
124 interrupts = <29 2 30 2 34 2>;
125 interrupt-parent = <&mpic>;
126 phy-handle = <&phy2>;
127 };
128
129 enet1: ethernet@25000 {
130 cell-index = <1>;
131 device_type = "network";
132 model = "TSEC";
133 compatible = "gianfar";
134 reg = <0x25000 0x1000>;
135 local-mac-address = [ 00 00 00 00 00 00 ];
136 interrupts = <35 2 36 2 40 2>;
137 interrupt-parent = <&mpic>;
138 phy-handle = <&phy1>;
139 };
140
141 serial0: serial@4500 {
142 cell-index = <0>;
143 device_type = "serial";
144 compatible = "ns16550";
145 reg = <0x4500 0x100>; // reg base, size
146 clock-frequency = <0>; // should we fill in in uboot?
147 interrupts = <42 2>;
148 interrupt-parent = <&mpic>;
149 };
150
151 serial1: serial@4600 {
152 cell-index = <1>;
153 device_type = "serial";
154 compatible = "ns16550";
155 reg = <0x4600 0x100>; // reg base, size
156 clock-frequency = <0>; // should we fill in in uboot?
157 interrupts = <42 2>;
158 interrupt-parent = <&mpic>;
159 };
160
161 mpic: pic@40000 {
162 interrupt-controller;
163 #address-cells = <0>;
164 #interrupt-cells = <2>;
165 reg = <0x40000 0x40000>;
166 device_type = "open-pic";
167 };
168
169 cpm@919c0 {
170 #address-cells = <1>;
171 #size-cells = <1>;
172 compatible = "fsl,mpc8555-cpm", "fsl,cpm2", "simple-bus";
173 reg = <0x919c0 0x30>;
174 ranges;
175
176 muram@80000 {
177 #address-cells = <1>;
178 #size-cells = <1>;
179 ranges = <0 0x80000 0x10000>;
180
181 data@0 {
182 compatible = "fsl,cpm-muram-data";
183 reg = <0 0x2000 0x9000 0x1000>;
184 };
185 };
186
187 brg@919f0 {
188 compatible = "fsl,mpc8555-brg",
189 "fsl,cpm2-brg",
190 "fsl,cpm-brg";
191 reg = <0x919f0 0x10 0x915f0 0x10>;
192 clock-frequency = <0>;
193 };
194
195 cpmpic: pic@90c00 {
196 interrupt-controller;
197 #address-cells = <0>;
198 #interrupt-cells = <2>;
199 interrupts = <46 2>;
200 interrupt-parent = <&mpic>;
201 reg = <0x90c00 0x80>;
202 compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic";
203 };
204 };
205 };
206
207 pci0: pci@e0008000 {
208 cell-index = <0>;
209 #interrupt-cells = <1>;
210 #size-cells = <2>;
211 #address-cells = <3>;
212 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
213 device_type = "pci";
214 reg = <0xe0008000 0x1000>;
215 clock-frequency = <66666666>;
216 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
217 interrupt-map = <
218 /* IDSEL 28 */
219 0xe000 0 0 1 &mpic 2 1
220 0xe000 0 0 2 &mpic 3 1>;
221
222 interrupt-parent = <&mpic>;
223 interrupts = <24 2>;
224 bus-range = <0 0>;
225 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
226 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
227 };
228};
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
new file mode 100644
index 000000000000..b9ac6c943b89
--- /dev/null
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -0,0 +1,245 @@
1/*
2 * TQM 8560 Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "tqm,8560";
16 compatible = "tqm,8560", "tqm,85xx";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 ethernet2 = &enet2;
24 serial0 = &serial0;
25 serial1 = &serial1;
26 pci0 = &pci0;
27 };
28
29 cpus {
30 #address-cells = <1>;
31 #size-cells = <0>;
32
33 PowerPC,8560@0 {
34 device_type = "cpu";
35 reg = <0>;
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <32768>;
39 i-cache-size = <32768>;
40 timebase-frequency = <0>;
41 bus-frequency = <0>;
42 clock-frequency = <0>;
43 };
44 };
45
46 memory {
47 device_type = "memory";
48 reg = <0x00000000 0x10000000>;
49 };
50
51 soc@e0000000 {
52 #address-cells = <1>;
53 #size-cells = <1>;
54 device_type = "soc";
55 ranges = <0x0 0xe0000000 0x100000>;
56 reg = <0xe0000000 0x200>;
57 bus-frequency = <0>;
58 compatible = "fsl,mpc8560-immr", "simple-bus";
59
60 memory-controller@2000 {
61 compatible = "fsl,8540-memory-controller";
62 reg = <0x2000 0x1000>;
63 interrupt-parent = <&mpic>;
64 interrupts = <18 2>;
65 };
66
67 l2-cache-controller@20000 {
68 compatible = "fsl,8540-l2-cache-controller";
69 reg = <0x20000 0x1000>;
70 cache-line-size = <32>;
71 cache-size = <0x40000>; // L2, 256K
72 interrupt-parent = <&mpic>;
73 interrupts = <16 2>;
74 };
75
76 i2c@3000 {
77 #address-cells = <1>;
78 #size-cells = <0>;
79 cell-index = <0>;
80 compatible = "fsl-i2c";
81 reg = <0x3000 0x100>;
82 interrupts = <43 2>;
83 interrupt-parent = <&mpic>;
84 dfsrr;
85
86 rtc@68 {
87 compatible = "dallas,ds1337";
88 reg = <0x68>;
89 };
90 };
91
92 mdio@24520 {
93 #address-cells = <1>;
94 #size-cells = <0>;
95 compatible = "fsl,gianfar-mdio";
96 reg = <0x24520 0x20>;
97
98 phy1: ethernet-phy@1 {
99 interrupt-parent = <&mpic>;
100 interrupts = <8 1>;
101 reg = <1>;
102 device_type = "ethernet-phy";
103 };
104 phy2: ethernet-phy@2 {
105 interrupt-parent = <&mpic>;
106 interrupts = <8 1>;
107 reg = <2>;
108 device_type = "ethernet-phy";
109 };
110 phy3: ethernet-phy@3 {
111 interrupt-parent = <&mpic>;
112 interrupts = <8 1>;
113 reg = <3>;
114 device_type = "ethernet-phy";
115 };
116 };
117
118 enet0: ethernet@24000 {
119 cell-index = <0>;
120 device_type = "network";
121 model = "TSEC";
122 compatible = "gianfar";
123 reg = <0x24000 0x1000>;
124 local-mac-address = [ 00 00 00 00 00 00 ];
125 interrupts = <29 2 30 2 34 2>;
126 interrupt-parent = <&mpic>;
127 phy-handle = <&phy2>;
128 };
129
130 enet1: ethernet@25000 {
131 cell-index = <1>;
132 device_type = "network";
133 model = "TSEC";
134 compatible = "gianfar";
135 reg = <0x25000 0x1000>;
136 local-mac-address = [ 00 00 00 00 00 00 ];
137 interrupts = <35 2 36 2 40 2>;
138 interrupt-parent = <&mpic>;
139 phy-handle = <&phy1>;
140 };
141
142 mpic: pic@40000 {
143 interrupt-controller;
144 #address-cells = <0>;
145 #interrupt-cells = <2>;
146 reg = <0x40000 0x40000>;
147 device_type = "open-pic";
148 };
149
150 cpm@919c0 {
151 #address-cells = <1>;
152 #size-cells = <1>;
153 compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
154 reg = <0x919c0 0x30>;
155 ranges;
156
157 muram@80000 {
158 #address-cells = <1>;
159 #size-cells = <1>;
160 ranges = <0 0x80000 0x10000>;
161
162 data@0 {
163 compatible = "fsl,cpm-muram-data";
164 reg = <0 0x4000 0x9000 0x2000>;
165 };
166 };
167
168 brg@919f0 {
169 compatible = "fsl,mpc8560-brg",
170 "fsl,cpm2-brg",
171 "fsl,cpm-brg";
172 reg = <0x919f0 0x10 0x915f0 0x10>;
173 clock-frequency = <0>;
174 };
175
176 cpmpic: pic@90c00 {
177 interrupt-controller;
178 #address-cells = <0>;
179 #interrupt-cells = <2>;
180 interrupts = <46 2>;
181 interrupt-parent = <&mpic>;
182 reg = <0x90c00 0x80>;
183 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
184 };
185
186 serial0: serial@91a00 {
187 device_type = "serial";
188 compatible = "fsl,mpc8560-scc-uart",
189 "fsl,cpm2-scc-uart";
190 reg = <0x91a00 0x20 0x88000 0x100>;
191 fsl,cpm-brg = <1>;
192 fsl,cpm-command = <0x800000>;
193 current-speed = <115200>;
194 interrupts = <40 8>;
195 interrupt-parent = <&cpmpic>;
196 };
197
198 serial1: serial@91a20 {
199 device_type = "serial";
200 compatible = "fsl,mpc8560-scc-uart",
201 "fsl,cpm2-scc-uart";
202 reg = <0x91a20 0x20 0x88100 0x100>;
203 fsl,cpm-brg = <2>;
204 fsl,cpm-command = <0x4a00000>;
205 current-speed = <115200>;
206 interrupts = <41 8>;
207 interrupt-parent = <&cpmpic>;
208 };
209
210 enet2: ethernet@91340 {
211 device_type = "network";
212 compatible = "fsl,mpc8560-fcc-enet",
213 "fsl,cpm2-fcc-enet";
214 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
215 local-mac-address = [ 00 00 00 00 00 00 ];
216 fsl,cpm-command = <0x1a400300>;
217 interrupts = <34 8>;
218 interrupt-parent = <&cpmpic>;
219 phy-handle = <&phy3>;
220 };
221 };
222 };
223
224 pci0: pci@e0008000 {
225 cell-index = <0>;
226 #interrupt-cells = <1>;
227 #size-cells = <2>;
228 #address-cells = <3>;
229 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
230 device_type = "pci";
231 reg = <0xe0008000 0x1000>;
232 clock-frequency = <66666666>;
233 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
234 interrupt-map = <
235 /* IDSEL 28 */
236 0xe000 0 0 1 &mpic 2 1
237 0xe000 0 0 2 &mpic 3 1>;
238
239 interrupt-parent = <&mpic>;
240 interrupts = <24 2>;
241 bus-range = <0 0>;
242 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
243 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
244 };
245};
diff --git a/arch/powerpc/boot/dts/walnut.dts b/arch/powerpc/boot/dts/walnut.dts
index 754fa3960f83..dcc21b0438e5 100644
--- a/arch/powerpc/boot/dts/walnut.dts
+++ b/arch/powerpc/boot/dts/walnut.dts
@@ -14,14 +14,21 @@
14 #size-cells = <1>; 14 #size-cells = <1>;
15 model = "ibm,walnut"; 15 model = "ibm,walnut";
16 compatible = "ibm,walnut"; 16 compatible = "ibm,walnut";
17 dcr-parent = <&/cpus/PowerPC,405GP@0>; 17 dcr-parent = <&/cpus/cpu@0>;
18
19 aliases {
20 ethernet0 = &EMAC;
21 serial0 = &UART0;
22 serial1 = &UART1;
23 };
18 24
19 cpus { 25 cpus {
20 #address-cells = <1>; 26 #address-cells = <1>;
21 #size-cells = <0>; 27 #size-cells = <0>;
22 28
23 PowerPC,405GP@0 { 29 cpu@0 {
24 device_type = "cpu"; 30 device_type = "cpu";
31 model = "PowerPC,405GP";
25 reg = <0>; 32 reg = <0>;
26 clock-frequency = <bebc200>; /* Filled in by zImage */ 33 clock-frequency = <bebc200>; /* Filled in by zImage */
27 timebase-frequency = <0>; /* Filled in by zImage */ 34 timebase-frequency = <0>; /* Filled in by zImage */
@@ -168,9 +175,10 @@
168 }; 175 };
169 }; 176 };
170 177
171 ds1743@1,0 { 178 nvram@1,0 {
172 /* NVRAM and RTC */ 179 /* NVRAM and RTC */
173 compatible = "ds1743"; 180 compatible = "ds1743-nvram";
181 #bytes = <2000>;
174 reg = <1 0 2000>; 182 reg = <1 0 2000>;
175 }; 183 };
176 184
@@ -190,6 +198,45 @@
190 virtual-reg = <f0300005>; 198 virtual-reg = <f0300005>;
191 }; 199 };
192 }; 200 };
201
202 PCI0: pci@ec000000 {
203 device_type = "pci";
204 #interrupt-cells = <1>;
205 #size-cells = <2>;
206 #address-cells = <3>;
207 compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
208 primary;
209 reg = <eec00000 8 /* Config space access */
210 eed80000 4 /* IACK */
211 eed80000 4 /* Special cycle */
212 ef480000 40>; /* Internal registers */
213
214 /* Outbound ranges, one memory and one IO,
215 * later cannot be changed. Chip supports a second
216 * IO range but we don't use it for now
217 */
218 ranges = <02000000 0 80000000 80000000 0 20000000
219 01000000 0 00000000 e8000000 0 00010000>;
220
221 /* Inbound 2GB range starting at 0 */
222 dma-ranges = <42000000 0 0 0 0 80000000>;
223
224 /* Walnut has all 4 IRQ pins tied together per slot */
225 interrupt-map-mask = <f800 0 0 0>;
226 interrupt-map = <
227 /* IDSEL 1 */
228 0800 0 0 0 &UIC0 1c 8
229
230 /* IDSEL 2 */
231 1000 0 0 0 &UIC0 1d 8
232
233 /* IDSEL 3 */
234 1800 0 0 0 &UIC0 1e 8
235
236 /* IDSEL 4 */
237 2000 0 0 0 &UIC0 1f 8
238 >;
239 };
193 }; 240 };
194 241
195 chosen { 242 chosen {
diff --git a/arch/powerpc/boot/dts/warp.dts b/arch/powerpc/boot/dts/warp.dts
new file mode 100644
index 000000000000..dc1499d30f43
--- /dev/null
+++ b/arch/powerpc/boot/dts/warp.dts
@@ -0,0 +1,239 @@
1/*
2 * Device Tree Source for PIKA Warp
3 *
4 * Copyright (c) 2008 PIKA Technologies
5 * Sean MacLennan <smaclennan@pikatech.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without
9 * any warranty of any kind, whether express or implied.
10 */
11
12/ {
13 #address-cells = <2>;
14 #size-cells = <1>;
15 model = "pika,warp";
16 compatible = "pika,warp";
17 dcr-parent = <&/cpus/cpu@0>;
18
19 aliases {
20 ethernet0 = &EMAC0;
21 serial0 = &UART0;
22 };
23
24 cpus {
25 #address-cells = <1>;
26 #size-cells = <0>;
27
28 cpu@0 {
29 device_type = "cpu";
30 model = "PowerPC,440EP";
31 reg = <0>;
32 clock-frequency = <0>; /* Filled in by zImage */
33 timebase-frequency = <0>; /* Filled in by zImage */
34 i-cache-line-size = <20>;
35 d-cache-line-size = <20>;
36 i-cache-size = <8000>;
37 d-cache-size = <8000>;
38 dcr-controller;
39 dcr-access-method = "native";
40 };
41 };
42
43 memory {
44 device_type = "memory";
45 reg = <0 0 0>; /* Filled in by zImage */
46 };
47
48 UIC0: interrupt-controller0 {
49 compatible = "ibm,uic-440ep","ibm,uic";
50 interrupt-controller;
51 cell-index = <0>;
52 dcr-reg = <0c0 009>;
53 #address-cells = <0>;
54 #size-cells = <0>;
55 #interrupt-cells = <2>;
56 };
57
58 UIC1: interrupt-controller1 {
59 compatible = "ibm,uic-440ep","ibm,uic";
60 interrupt-controller;
61 cell-index = <1>;
62 dcr-reg = <0d0 009>;
63 #address-cells = <0>;
64 #size-cells = <0>;
65 #interrupt-cells = <2>;
66 interrupts = <1e 4 1f 4>; /* cascade */
67 interrupt-parent = <&UIC0>;
68 };
69
70 SDR0: sdr {
71 compatible = "ibm,sdr-440ep";
72 dcr-reg = <00e 002>;
73 };
74
75 CPR0: cpr {
76 compatible = "ibm,cpr-440ep";
77 dcr-reg = <00c 002>;
78 };
79
80 plb {
81 compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
82 #address-cells = <2>;
83 #size-cells = <1>;
84 ranges;
85 clock-frequency = <0>; /* Filled in by zImage */
86
87 SDRAM0: sdram {
88 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
89 dcr-reg = <010 2>;
90 };
91
92 DMA0: dma {
93 compatible = "ibm,dma-440ep", "ibm,dma-440gp";
94 dcr-reg = <100 027>;
95 };
96
97 MAL0: mcmal {
98 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
99 dcr-reg = <180 62>;
100 num-tx-chans = <4>;
101 num-rx-chans = <2>;
102 interrupt-parent = <&MAL0>;
103 interrupts = <0 1 2 3 4>;
104 #interrupt-cells = <1>;
105 #address-cells = <0>;
106 #size-cells = <0>;
107 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
108 /*RXEOB*/ 1 &UIC0 b 4
109 /*SERR*/ 2 &UIC1 0 4
110 /*TXDE*/ 3 &UIC1 1 4
111 /*RXDE*/ 4 &UIC1 2 4>;
112 };
113
114 POB0: opb {
115 compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
116 #address-cells = <1>;
117 #size-cells = <1>;
118 ranges = <00000000 0 00000000 80000000
119 80000000 0 80000000 80000000>;
120 interrupt-parent = <&UIC1>;
121 interrupts = <7 4>;
122 clock-frequency = <0>; /* Filled in by zImage */
123
124 EBC0: ebc {
125 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
126 dcr-reg = <012 2>;
127 #address-cells = <2>;
128 #size-cells = <1>;
129 clock-frequency = <0>; /* Filled in by zImage */
130 interrupts = <5 1>;
131 interrupt-parent = <&UIC1>;
132
133 fpga@2,0 {
134 compatible = "pika,fpga";
135 reg = <2 0 2200>;
136 interrupts = <18 8>;
137 interrupt-parent = <&UIC0>;
138 };
139
140 nor_flash@0,0 {
141 compatible = "amd,s29gl512n", "cfi-flash";
142 bank-width = <2>;
143 reg = <0 0 4000000>;
144 #address-cells = <1>;
145 #size-cells = <1>;
146 partition@0 {
147 label = "kernel";
148 reg = <0 180000>;
149 };
150 partition@180000 {
151 label = "root";
152 reg = <180000 3480000>;
153 };
154 partition@3600000 {
155 label = "user";
156 reg = <3600000 900000>;
157 };
158 partition@3f00000 {
159 label = "fpga";
160 reg = <3f00000 40000>;
161 };
162 partition@3f40000 {
163 label = "env";
164 reg = <3f40000 40000>;
165 };
166 partition@3f80000 {
167 label = "u-boot";
168 reg = <3f80000 80000>;
169 };
170 };
171 };
172
173 UART0: serial@ef600300 {
174 device_type = "serial";
175 compatible = "ns16550";
176 reg = <ef600300 8>;
177 virtual-reg = <ef600300>;
178 clock-frequency = <0>; /* Filled in by zImage */
179 current-speed = <1c200>;
180 interrupt-parent = <&UIC0>;
181 interrupts = <0 4>;
182 };
183
184 IIC0: i2c@ef600700 {
185 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
186 reg = <ef600700 14>;
187 interrupt-parent = <&UIC0>;
188 interrupts = <2 4>;
189 };
190
191 GPIO0: gpio@ef600b00 {
192 compatible = "ibm,gpio-440ep";
193 reg = <ef600b00 48>;
194 };
195
196 GPIO1: gpio@ef600c00 {
197 compatible = "ibm,gpio-440ep";
198 reg = <ef600c00 48>;
199 };
200
201 ZMII0: emac-zmii@ef600d00 {
202 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
203 reg = <ef600d00 c>;
204 };
205
206 EMAC0: ethernet@ef600e00 {
207 linux,network-index = <0>;
208 device_type = "network";
209 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
210 interrupt-parent = <&UIC1>;
211 interrupts = <1c 4 1d 4>;
212 reg = <ef600e00 70>;
213 local-mac-address = [000000000000];
214 mal-device = <&MAL0>;
215 mal-tx-channel = <0 1>;
216 mal-rx-channel = <0>;
217 cell-index = <0>;
218 max-frame-size = <5dc>;
219 rx-fifo-size = <1000>;
220 tx-fifo-size = <800>;
221 phy-mode = "rmii";
222 phy-map = <00000000>;
223 zmii-device = <&ZMII0>;
224 zmii-channel = <0>;
225 };
226
227 usb@ef601000 {
228 compatible = "ohci-be";
229 reg = <ef601000 80>;
230 interrupts = <8 1 9 1>;
231 interrupt-parent = < &UIC1 >;
232 };
233 };
234 };
235
236 chosen {
237 linux,stdout-path = "/plb/opb/serial@ef600300";
238 };
239};
diff --git a/arch/powerpc/boot/ebony.c b/arch/powerpc/boot/ebony.c
index 86c0f5df0a86..f61364c47a76 100644
--- a/arch/powerpc/boot/ebony.c
+++ b/arch/powerpc/boot/ebony.c
@@ -31,66 +31,6 @@
31 31
32static u8 *ebony_mac0, *ebony_mac1; 32static u8 *ebony_mac0, *ebony_mac1;
33 33
34/* Calculate 440GP clocks */
35void ibm440gp_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
36{
37 u32 sys0 = mfdcr(DCRN_CPC0_SYS0);
38 u32 cr0 = mfdcr(DCRN_CPC0_CR0);
39 u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
40 u32 opdv = CPC0_SYS0_OPDV(sys0);
41 u32 epdv = CPC0_SYS0_EPDV(sys0);
42
43 if (sys0 & CPC0_SYS0_BYPASS) {
44 /* Bypass system PLL */
45 cpu = plb = sysclk;
46 } else {
47 if (sys0 & CPC0_SYS0_EXTSL)
48 /* PerClk */
49 m = CPC0_SYS0_FWDVB(sys0) * opdv * epdv;
50 else
51 /* CPU clock */
52 m = CPC0_SYS0_FBDV(sys0) * CPC0_SYS0_FWDVA(sys0);
53 cpu = sysclk * m / CPC0_SYS0_FWDVA(sys0);
54 plb = sysclk * m / CPC0_SYS0_FWDVB(sys0);
55 }
56
57 opb = plb / opdv;
58 ebc = opb / epdv;
59
60 /* FIXME: Check if this is for all 440GP, or just Ebony */
61 if ((mfpvr() & 0xf0000fff) == 0x40000440)
62 /* Rev. B 440GP, use external system clock */
63 tb = sysclk;
64 else
65 /* Rev. C 440GP, errata force us to use internal clock */
66 tb = cpu;
67
68 if (cr0 & CPC0_CR0_U0EC)
69 /* External UART clock */
70 uart0 = ser_clk;
71 else
72 /* Internal UART clock */
73 uart0 = plb / CPC0_CR0_UDIV(cr0);
74
75 if (cr0 & CPC0_CR0_U1EC)
76 /* External UART clock */
77 uart1 = ser_clk;
78 else
79 /* Internal UART clock */
80 uart1 = plb / CPC0_CR0_UDIV(cr0);
81
82 printf("PPC440GP: SysClk = %dMHz (%x)\n\r",
83 (sysclk + 500000) / 1000000, sysclk);
84
85 dt_fixup_cpu_clocks(cpu, tb, 0);
86
87 dt_fixup_clock("/plb", plb);
88 dt_fixup_clock("/plb/opb", opb);
89 dt_fixup_clock("/plb/opb/ebc", ebc);
90 dt_fixup_clock("/plb/opb/serial@40000200", uart0);
91 dt_fixup_clock("/plb/opb/serial@40000300", uart1);
92}
93
94#define EBONY_FPGA_PATH "/plb/opb/ebc/fpga" 34#define EBONY_FPGA_PATH "/plb/opb/ebc/fpga"
95#define EBONY_FPGA_FLASH_SEL 0x01 35#define EBONY_FPGA_FLASH_SEL 0x01
96#define EBONY_SMALL_FLASH_PATH "/plb/opb/ebc/small-flash" 36#define EBONY_SMALL_FLASH_PATH "/plb/opb/ebc/small-flash"
@@ -134,7 +74,7 @@ static void ebony_fixups(void)
134 unsigned long sysclk = 33000000; 74 unsigned long sysclk = 33000000;
135 75
136 ibm440gp_fixup_clocks(sysclk, 6 * 1843200); 76 ibm440gp_fixup_clocks(sysclk, 6 * 1843200);
137 ibm4xx_fixup_memsize(); 77 ibm4xx_sdram_fixup_memsize();
138 dt_fixup_mac_addresses(ebony_mac0, ebony_mac1); 78 dt_fixup_mac_addresses(ebony_mac0, ebony_mac1);
139 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); 79 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
140 ebony_flashsel_fixup(); 80 ebony_flashsel_fixup();
@@ -146,6 +86,6 @@ void ebony_init(void *mac0, void *mac1)
146 platform_ops.exit = ibm44x_dbcr_reset; 86 platform_ops.exit = ibm44x_dbcr_reset;
147 ebony_mac0 = mac0; 87 ebony_mac0 = mac0;
148 ebony_mac1 = mac1; 88 ebony_mac1 = mac1;
149 ft_init(_dtb_start, _dtb_end - _dtb_start, 32); 89 fdt_init(_dtb_start);
150 serial_console_init(); 90 serial_console_init();
151} 91}
diff --git a/arch/powerpc/boot/ep405.c b/arch/powerpc/boot/ep405.c
new file mode 100644
index 000000000000..2d08a862cbea
--- /dev/null
+++ b/arch/powerpc/boot/ep405.c
@@ -0,0 +1,74 @@
1/*
2 * Embedded Planet EP405 with PlanetCore firmware
3 *
4 * (c) Benjamin Herrenschmidt <benh@kernel.crashing.org>, IBM Corp,\
5 *
6 * Based on ep88xc.c by
7 *
8 * Scott Wood <scottwood@freescale.com>
9 *
10 * Copyright (c) 2007 Freescale Semiconductor, Inc.
11 *
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License version 2 as published
14 * by the Free Software Foundation.
15 */
16
17#include "ops.h"
18#include "stdio.h"
19#include "planetcore.h"
20#include "dcr.h"
21#include "4xx.h"
22#include "io.h"
23
24static char *table;
25static u64 mem_size;
26
27static void platform_fixups(void)
28{
29 u64 val;
30 void *nvrtc;
31
32 dt_fixup_memory(0, mem_size);
33 planetcore_set_mac_addrs(table);
34
35 if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, &val)) {
36 printf("No PlanetCore crystal frequency key.\r\n");
37 return;
38 }
39 ibm405gp_fixup_clocks(val, 0xa8c000);
40 ibm4xx_quiesce_eth((u32 *)0xef600800, NULL);
41 ibm4xx_fixup_ebc_ranges("/plb/ebc");
42
43 if (!planetcore_get_decimal(table, PLANETCORE_KEY_KB_NVRAM, &val)) {
44 printf("No PlanetCore NVRAM size key.\r\n");
45 return;
46 }
47 nvrtc = finddevice("/plb/ebc/nvrtc@4,200000");
48 if (nvrtc != NULL) {
49 u32 reg[3] = { 4, 0x200000, 0};
50 getprop(nvrtc, "reg", reg, 3);
51 reg[2] = (val << 10) & 0xffffffff;
52 setprop(nvrtc, "reg", reg, 3);
53 }
54}
55
56void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
57 unsigned long r6, unsigned long r7)
58{
59 table = (char *)r3;
60 planetcore_prepare_table(table);
61
62 if (!planetcore_get_decimal(table, PLANETCORE_KEY_MB_RAM, &mem_size))
63 return;
64
65 mem_size *= 1024 * 1024;
66 simple_alloc_init(_end, mem_size - (unsigned long)_end, 32, 64);
67
68 fdt_init(_dtb_start);
69
70 planetcore_set_stdout_path(table);
71
72 serial_console_init();
73 platform_ops.fixups = platform_fixups;
74}
diff --git a/arch/powerpc/boot/ep8248e.c b/arch/powerpc/boot/ep8248e.c
new file mode 100644
index 000000000000..f57d14d0272b
--- /dev/null
+++ b/arch/powerpc/boot/ep8248e.c
@@ -0,0 +1,55 @@
1/*
2 * Embedded Planet EP8248E with PlanetCore firmware
3 *
4 * Author: Scott Wood <scottwood@freescale.com>
5 *
6 * Copyright (c) 2007 Freescale Semiconductor, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13#include "ops.h"
14#include "stdio.h"
15#include "planetcore.h"
16#include "pq2.h"
17
18static char *table;
19static u64 mem_size;
20
21#include <io.h>
22
23static void platform_fixups(void)
24{
25 u64 val;
26
27 dt_fixup_memory(0, mem_size);
28 planetcore_set_mac_addrs(table);
29
30 if (!planetcore_get_decimal(table, PLANETCORE_KEY_CRYSTAL_HZ, &val)) {
31 printf("No PlanetCore crystal frequency key.\r\n");
32 return;
33 }
34
35 pq2_fixup_clocks(val);
36}
37
38void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
39 unsigned long r6, unsigned long r7)
40{
41 table = (char *)r3;
42 planetcore_prepare_table(table);
43
44 if (!planetcore_get_decimal(table, PLANETCORE_KEY_MB_RAM, &mem_size))
45 return;
46
47 mem_size *= 1024 * 1024;
48 simple_alloc_init(_end, mem_size - (unsigned long)_end, 32, 64);
49
50 fdt_init(_dtb_start);
51
52 planetcore_set_stdout_path(table);
53 serial_console_init();
54 platform_ops.fixups = platform_fixups;
55}
diff --git a/arch/powerpc/boot/ep88xc.c b/arch/powerpc/boot/ep88xc.c
index 6b87cdce3fe7..a400f5407155 100644
--- a/arch/powerpc/boot/ep88xc.c
+++ b/arch/powerpc/boot/ep88xc.c
@@ -45,7 +45,7 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
45 mem_size *= 1024 * 1024; 45 mem_size *= 1024 * 1024;
46 simple_alloc_init(_end, mem_size - (unsigned long)_end, 32, 64); 46 simple_alloc_init(_end, mem_size - (unsigned long)_end, 32, 64);
47 47
48 ft_init(_dtb_start, _dtb_end - _dtb_start, 32); 48 fdt_init(_dtb_start);
49 49
50 planetcore_set_stdout_path(table); 50 planetcore_set_stdout_path(table);
51 51
diff --git a/arch/powerpc/boot/flatdevtree.c b/arch/powerpc/boot/flatdevtree.c
deleted file mode 100644
index cf30675c6116..000000000000
--- a/arch/powerpc/boot/flatdevtree.c
+++ /dev/null
@@ -1,1036 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 *
16 * Copyright Pantelis Antoniou 2006
17 * Copyright (C) IBM Corporation 2006
18 *
19 * Authors: Pantelis Antoniou <pantelis@embeddedalley.com>
20 * Hollis Blanchard <hollisb@us.ibm.com>
21 * Mark A. Greer <mgreer@mvista.com>
22 * Paul Mackerras <paulus@samba.org>
23 */
24
25#include <string.h>
26#include <stddef.h>
27#include "flatdevtree.h"
28#include "flatdevtree_env.h"
29
30#define _ALIGN(x, al) (((x) + (al) - 1) & ~((al) - 1))
31
32static char *ft_root_node(struct ft_cxt *cxt)
33{
34 return cxt->rgn[FT_STRUCT].start;
35}
36
37/* Routines for keeping node ptrs returned by ft_find_device current */
38/* First entry not used b/c it would return 0 and be taken as NULL/error */
39static void *ft_get_phandle(struct ft_cxt *cxt, char *node)
40{
41 unsigned int i;
42
43 if (!node)
44 return NULL;
45
46 for (i = 1; i < cxt->nodes_used; i++) /* already there? */
47 if (cxt->node_tbl[i] == node)
48 return (void *)i;
49
50 if (cxt->nodes_used < cxt->node_max) {
51 cxt->node_tbl[cxt->nodes_used] = node;
52 return (void *)cxt->nodes_used++;
53 }
54
55 return NULL;
56}
57
58static char *ft_node_ph2node(struct ft_cxt *cxt, const void *phandle)
59{
60 unsigned int i = (unsigned int)phandle;
61
62 if (i < cxt->nodes_used)
63 return cxt->node_tbl[i];
64 return NULL;
65}
66
67static void ft_node_update_before(struct ft_cxt *cxt, char *addr, int shift)
68{
69 unsigned int i;
70
71 if (shift == 0)
72 return;
73
74 for (i = 1; i < cxt->nodes_used; i++)
75 if (cxt->node_tbl[i] < addr)
76 cxt->node_tbl[i] += shift;
77}
78
79static void ft_node_update_after(struct ft_cxt *cxt, char *addr, int shift)
80{
81 unsigned int i;
82
83 if (shift == 0)
84 return;
85
86 for (i = 1; i < cxt->nodes_used; i++)
87 if (cxt->node_tbl[i] >= addr)
88 cxt->node_tbl[i] += shift;
89}
90
91/* Struct used to return info from ft_next() */
92struct ft_atom {
93 u32 tag;
94 const char *name;
95 void *data;
96 u32 size;
97};
98
99/* Set ptrs to current one's info; return addr of next one */
100static char *ft_next(struct ft_cxt *cxt, char *p, struct ft_atom *ret)
101{
102 u32 sz;
103
104 if (p >= cxt->rgn[FT_STRUCT].start + cxt->rgn[FT_STRUCT].size)
105 return NULL;
106
107 ret->tag = be32_to_cpu(*(u32 *) p);
108 p += 4;
109
110 switch (ret->tag) { /* Tag */
111 case OF_DT_BEGIN_NODE:
112 ret->name = p;
113 ret->data = (void *)(p - 4); /* start of node */
114 p += _ALIGN(strlen(p) + 1, 4);
115 break;
116 case OF_DT_PROP:
117 ret->size = sz = be32_to_cpu(*(u32 *) p);
118 ret->name = cxt->str_anchor + be32_to_cpu(*(u32 *) (p + 4));
119 ret->data = (void *)(p + 8);
120 p += 8 + _ALIGN(sz, 4);
121 break;
122 case OF_DT_END_NODE:
123 case OF_DT_NOP:
124 break;
125 case OF_DT_END:
126 default:
127 p = NULL;
128 break;
129 }
130
131 return p;
132}
133
134#define HDR_SIZE _ALIGN(sizeof(struct boot_param_header), 8)
135#define EXPAND_INCR 1024 /* alloc this much extra when expanding */
136
137/* Copy the tree to a newly-allocated region and put things in order */
138static int ft_reorder(struct ft_cxt *cxt, int nextra)
139{
140 unsigned long tot;
141 enum ft_rgn_id r;
142 char *p, *pend;
143 int stroff;
144
145 tot = HDR_SIZE + EXPAND_INCR;
146 for (r = FT_RSVMAP; r <= FT_STRINGS; ++r)
147 tot += cxt->rgn[r].size;
148 if (nextra > 0)
149 tot += nextra;
150 tot = _ALIGN(tot, 8);
151
152 if (!cxt->realloc)
153 return 0;
154 p = cxt->realloc(NULL, tot);
155 if (!p)
156 return 0;
157
158 memcpy(p, cxt->bph, sizeof(struct boot_param_header));
159 /* offsets get fixed up later */
160
161 cxt->bph = (struct boot_param_header *)p;
162 cxt->max_size = tot;
163 pend = p + tot;
164 p += HDR_SIZE;
165
166 memcpy(p, cxt->rgn[FT_RSVMAP].start, cxt->rgn[FT_RSVMAP].size);
167 cxt->rgn[FT_RSVMAP].start = p;
168 p += cxt->rgn[FT_RSVMAP].size;
169
170 memcpy(p, cxt->rgn[FT_STRUCT].start, cxt->rgn[FT_STRUCT].size);
171 ft_node_update_after(cxt, cxt->rgn[FT_STRUCT].start,
172 p - cxt->rgn[FT_STRUCT].start);
173 cxt->p += p - cxt->rgn[FT_STRUCT].start;
174 cxt->rgn[FT_STRUCT].start = p;
175
176 p = pend - cxt->rgn[FT_STRINGS].size;
177 memcpy(p, cxt->rgn[FT_STRINGS].start, cxt->rgn[FT_STRINGS].size);
178 stroff = cxt->str_anchor - cxt->rgn[FT_STRINGS].start;
179 cxt->rgn[FT_STRINGS].start = p;
180 cxt->str_anchor = p + stroff;
181
182 cxt->isordered = 1;
183 return 1;
184}
185
186static inline char *prev_end(struct ft_cxt *cxt, enum ft_rgn_id r)
187{
188 if (r > FT_RSVMAP)
189 return cxt->rgn[r - 1].start + cxt->rgn[r - 1].size;
190 return (char *)cxt->bph + HDR_SIZE;
191}
192
193static inline char *next_start(struct ft_cxt *cxt, enum ft_rgn_id r)
194{
195 if (r < FT_STRINGS)
196 return cxt->rgn[r + 1].start;
197 return (char *)cxt->bph + cxt->max_size;
198}
199
200/*
201 * See if we can expand region rgn by nextra bytes by using up
202 * free space after or before the region.
203 */
204static int ft_shuffle(struct ft_cxt *cxt, char **pp, enum ft_rgn_id rgn,
205 int nextra)
206{
207 char *p = *pp;
208 char *rgn_start, *rgn_end;
209
210 rgn_start = cxt->rgn[rgn].start;
211 rgn_end = rgn_start + cxt->rgn[rgn].size;
212 if (nextra <= 0 || rgn_end + nextra <= next_start(cxt, rgn)) {
213 /* move following stuff */
214 if (p < rgn_end) {
215 if (nextra < 0)
216 memmove(p, p - nextra, rgn_end - p + nextra);
217 else
218 memmove(p + nextra, p, rgn_end - p);
219 if (rgn == FT_STRUCT)
220 ft_node_update_after(cxt, p, nextra);
221 }
222 cxt->rgn[rgn].size += nextra;
223 if (rgn == FT_STRINGS)
224 /* assumes strings only added at beginning */
225 cxt->str_anchor += nextra;
226 return 1;
227 }
228 if (prev_end(cxt, rgn) <= rgn_start - nextra) {
229 /* move preceding stuff */
230 if (p > rgn_start) {
231 memmove(rgn_start - nextra, rgn_start, p - rgn_start);
232 if (rgn == FT_STRUCT)
233 ft_node_update_before(cxt, p, -nextra);
234 }
235 *pp -= nextra;
236 cxt->rgn[rgn].start -= nextra;
237 cxt->rgn[rgn].size += nextra;
238 return 1;
239 }
240 return 0;
241}
242
243static int ft_make_space(struct ft_cxt *cxt, char **pp, enum ft_rgn_id rgn,
244 int nextra)
245{
246 unsigned long size, ssize, tot;
247 char *str, *next;
248 enum ft_rgn_id r;
249
250 if (!cxt->isordered) {
251 unsigned long rgn_off = *pp - cxt->rgn[rgn].start;
252
253 if (!ft_reorder(cxt, nextra))
254 return 0;
255
256 *pp = cxt->rgn[rgn].start + rgn_off;
257 }
258 if (ft_shuffle(cxt, pp, rgn, nextra))
259 return 1;
260
261 /* See if there is space after the strings section */
262 ssize = cxt->rgn[FT_STRINGS].size;
263 if (cxt->rgn[FT_STRINGS].start + ssize
264 < (char *)cxt->bph + cxt->max_size) {
265 /* move strings up as far as possible */
266 str = (char *)cxt->bph + cxt->max_size - ssize;
267 cxt->str_anchor += str - cxt->rgn[FT_STRINGS].start;
268 memmove(str, cxt->rgn[FT_STRINGS].start, ssize);
269 cxt->rgn[FT_STRINGS].start = str;
270 /* enough space now? */
271 if (rgn >= FT_STRUCT && ft_shuffle(cxt, pp, rgn, nextra))
272 return 1;
273 }
274
275 /* how much total free space is there following this region? */
276 tot = 0;
277 for (r = rgn; r < FT_STRINGS; ++r) {
278 char *r_end = cxt->rgn[r].start + cxt->rgn[r].size;
279 tot += next_start(cxt, rgn) - r_end;
280 }
281
282 /* cast is to shut gcc up; we know nextra >= 0 */
283 if (tot < (unsigned int)nextra) {
284 /* have to reallocate */
285 char *newp, *new_start;
286 int shift;
287
288 if (!cxt->realloc)
289 return 0;
290 size = _ALIGN(cxt->max_size + (nextra - tot) + EXPAND_INCR, 8);
291 newp = cxt->realloc(cxt->bph, size);
292 if (!newp)
293 return 0;
294 cxt->max_size = size;
295 shift = newp - (char *)cxt->bph;
296
297 if (shift) { /* realloc can return same addr */
298 cxt->bph = (struct boot_param_header *)newp;
299 ft_node_update_after(cxt, cxt->rgn[FT_STRUCT].start,
300 shift);
301 for (r = FT_RSVMAP; r <= FT_STRINGS; ++r) {
302 new_start = cxt->rgn[r].start + shift;
303 cxt->rgn[r].start = new_start;
304 }
305 *pp += shift;
306 cxt->str_anchor += shift;
307 }
308
309 /* move strings up to the end */
310 str = newp + size - ssize;
311 cxt->str_anchor += str - cxt->rgn[FT_STRINGS].start;
312 memmove(str, cxt->rgn[FT_STRINGS].start, ssize);
313 cxt->rgn[FT_STRINGS].start = str;
314
315 if (ft_shuffle(cxt, pp, rgn, nextra))
316 return 1;
317 }
318
319 /* must be FT_RSVMAP and we need to move FT_STRUCT up */
320 if (rgn == FT_RSVMAP) {
321 next = cxt->rgn[FT_RSVMAP].start + cxt->rgn[FT_RSVMAP].size
322 + nextra;
323 ssize = cxt->rgn[FT_STRUCT].size;
324 if (next + ssize >= cxt->rgn[FT_STRINGS].start)
325 return 0; /* "can't happen" */
326 memmove(next, cxt->rgn[FT_STRUCT].start, ssize);
327 ft_node_update_after(cxt, cxt->rgn[FT_STRUCT].start, nextra);
328 cxt->rgn[FT_STRUCT].start = next;
329
330 if (ft_shuffle(cxt, pp, rgn, nextra))
331 return 1;
332 }
333
334 return 0; /* "can't happen" */
335}
336
337static void ft_put_word(struct ft_cxt *cxt, u32 v)
338{
339 *(u32 *) cxt->p = cpu_to_be32(v);
340 cxt->p += 4;
341}
342
343static void ft_put_bin(struct ft_cxt *cxt, const void *data, unsigned int sz)
344{
345 unsigned long sza = _ALIGN(sz, 4);
346
347 /* zero out the alignment gap if necessary */
348 if (sz < sza)
349 *(u32 *) (cxt->p + sza - 4) = 0;
350
351 /* copy in the data */
352 memcpy(cxt->p, data, sz);
353
354 cxt->p += sza;
355}
356
357char *ft_begin_node(struct ft_cxt *cxt, const char *name)
358{
359 unsigned long nlen = strlen(name) + 1;
360 unsigned long len = 8 + _ALIGN(nlen, 4);
361 char *ret;
362
363 if (!ft_make_space(cxt, &cxt->p, FT_STRUCT, len))
364 return NULL;
365
366 ret = cxt->p;
367
368 ft_put_word(cxt, OF_DT_BEGIN_NODE);
369 ft_put_bin(cxt, name, strlen(name) + 1);
370
371 return ret;
372}
373
374void ft_end_node(struct ft_cxt *cxt)
375{
376 ft_put_word(cxt, OF_DT_END_NODE);
377}
378
379void ft_nop(struct ft_cxt *cxt)
380{
381 if (ft_make_space(cxt, &cxt->p, FT_STRUCT, 4))
382 ft_put_word(cxt, OF_DT_NOP);
383}
384
385#define NO_STRING 0x7fffffff
386
387static int lookup_string(struct ft_cxt *cxt, const char *name)
388{
389 char *p, *end;
390
391 p = cxt->rgn[FT_STRINGS].start;
392 end = p + cxt->rgn[FT_STRINGS].size;
393 while (p < end) {
394 if (strcmp(p, (char *)name) == 0)
395 return p - cxt->str_anchor;
396 p += strlen(p) + 1;
397 }
398
399 return NO_STRING;
400}
401
402/* lookup string and insert if not found */
403static int map_string(struct ft_cxt *cxt, const char *name)
404{
405 int off;
406 char *p;
407
408 off = lookup_string(cxt, name);
409 if (off != NO_STRING)
410 return off;
411 p = cxt->rgn[FT_STRINGS].start;
412 if (!ft_make_space(cxt, &p, FT_STRINGS, strlen(name) + 1))
413 return NO_STRING;
414 strcpy(p, name);
415 return p - cxt->str_anchor;
416}
417
418int ft_prop(struct ft_cxt *cxt, const char *name, const void *data,
419 unsigned int sz)
420{
421 int off, len;
422
423 off = map_string(cxt, name);
424 if (off == NO_STRING)
425 return -1;
426
427 len = 12 + _ALIGN(sz, 4);
428 if (!ft_make_space(cxt, &cxt->p, FT_STRUCT, len))
429 return -1;
430
431 ft_put_word(cxt, OF_DT_PROP);
432 ft_put_word(cxt, sz);
433 ft_put_word(cxt, off);
434 ft_put_bin(cxt, data, sz);
435 return 0;
436}
437
438int ft_prop_str(struct ft_cxt *cxt, const char *name, const char *str)
439{
440 return ft_prop(cxt, name, str, strlen(str) + 1);
441}
442
443int ft_prop_int(struct ft_cxt *cxt, const char *name, unsigned int val)
444{
445 u32 v = cpu_to_be32((u32) val);
446
447 return ft_prop(cxt, name, &v, 4);
448}
449
450/* Calculate the size of the reserved map */
451static unsigned long rsvmap_size(struct ft_cxt *cxt)
452{
453 struct ft_reserve *res;
454
455 res = (struct ft_reserve *)cxt->rgn[FT_RSVMAP].start;
456 while (res->start || res->len)
457 ++res;
458 return (char *)(res + 1) - cxt->rgn[FT_RSVMAP].start;
459}
460
461/* Calculate the size of the struct region by stepping through it */
462static unsigned long struct_size(struct ft_cxt *cxt)
463{
464 char *p = cxt->rgn[FT_STRUCT].start;
465 char *next;
466 struct ft_atom atom;
467
468 /* make check in ft_next happy */
469 if (cxt->rgn[FT_STRUCT].size == 0)
470 cxt->rgn[FT_STRUCT].size = 0xfffffffful - (unsigned long)p;
471
472 while ((next = ft_next(cxt, p, &atom)) != NULL)
473 p = next;
474 return p + 4 - cxt->rgn[FT_STRUCT].start;
475}
476
477/* add `adj' on to all string offset values in the struct area */
478static void adjust_string_offsets(struct ft_cxt *cxt, int adj)
479{
480 char *p = cxt->rgn[FT_STRUCT].start;
481 char *next;
482 struct ft_atom atom;
483 int off;
484
485 while ((next = ft_next(cxt, p, &atom)) != NULL) {
486 if (atom.tag == OF_DT_PROP) {
487 off = be32_to_cpu(*(u32 *) (p + 8));
488 *(u32 *) (p + 8) = cpu_to_be32(off + adj);
489 }
490 p = next;
491 }
492}
493
494/* start construction of the flat OF tree from scratch */
495void ft_begin(struct ft_cxt *cxt, void *blob, unsigned int max_size,
496 void *(*realloc_fn) (void *, unsigned long))
497{
498 struct boot_param_header *bph = blob;
499 char *p;
500 struct ft_reserve *pres;
501
502 /* clear the cxt */
503 memset(cxt, 0, sizeof(*cxt));
504
505 cxt->bph = bph;
506 cxt->max_size = max_size;
507 cxt->realloc = realloc_fn;
508 cxt->isordered = 1;
509
510 /* zero everything in the header area */
511 memset(bph, 0, sizeof(*bph));
512
513 bph->magic = cpu_to_be32(OF_DT_HEADER);
514 bph->version = cpu_to_be32(0x10);
515 bph->last_comp_version = cpu_to_be32(0x10);
516
517 /* start pointers */
518 cxt->rgn[FT_RSVMAP].start = p = blob + HDR_SIZE;
519 cxt->rgn[FT_RSVMAP].size = sizeof(struct ft_reserve);
520 pres = (struct ft_reserve *)p;
521 cxt->rgn[FT_STRUCT].start = p += sizeof(struct ft_reserve);
522 cxt->rgn[FT_STRUCT].size = 4;
523 cxt->rgn[FT_STRINGS].start = blob + max_size;
524 cxt->rgn[FT_STRINGS].size = 0;
525
526 /* init rsvmap and struct */
527 pres->start = 0;
528 pres->len = 0;
529 *(u32 *) p = cpu_to_be32(OF_DT_END);
530
531 cxt->str_anchor = blob;
532}
533
534/* open up an existing blob to be examined or modified */
535int ft_open(struct ft_cxt *cxt, void *blob, unsigned int max_size,
536 unsigned int max_find_device,
537 void *(*realloc_fn) (void *, unsigned long))
538{
539 struct boot_param_header *bph = blob;
540
541 /* can't cope with version < 16 */
542 if (be32_to_cpu(bph->version) < 16)
543 return -1;
544
545 /* clear the cxt */
546 memset(cxt, 0, sizeof(*cxt));
547
548 /* alloc node_tbl to track node ptrs returned by ft_find_device */
549 ++max_find_device;
550 cxt->node_tbl = realloc_fn(NULL, max_find_device * sizeof(char *));
551 if (!cxt->node_tbl)
552 return -1;
553 memset(cxt->node_tbl, 0, max_find_device * sizeof(char *));
554 cxt->node_max = max_find_device;
555 cxt->nodes_used = 1; /* don't use idx 0 b/c looks like NULL */
556
557 cxt->bph = bph;
558 cxt->max_size = max_size;
559 cxt->realloc = realloc_fn;
560
561 cxt->rgn[FT_RSVMAP].start = blob + be32_to_cpu(bph->off_mem_rsvmap);
562 cxt->rgn[FT_RSVMAP].size = rsvmap_size(cxt);
563 cxt->rgn[FT_STRUCT].start = blob + be32_to_cpu(bph->off_dt_struct);
564 cxt->rgn[FT_STRUCT].size = struct_size(cxt);
565 cxt->rgn[FT_STRINGS].start = blob + be32_to_cpu(bph->off_dt_strings);
566 cxt->rgn[FT_STRINGS].size = be32_to_cpu(bph->dt_strings_size);
567
568 cxt->p = cxt->rgn[FT_STRUCT].start;
569 cxt->str_anchor = cxt->rgn[FT_STRINGS].start;
570
571 return 0;
572}
573
574/* add a reserver physical area to the rsvmap */
575int ft_add_rsvmap(struct ft_cxt *cxt, u64 physaddr, u64 size)
576{
577 char *p;
578 struct ft_reserve *pres;
579
580 p = cxt->rgn[FT_RSVMAP].start + cxt->rgn[FT_RSVMAP].size
581 - sizeof(struct ft_reserve);
582 if (!ft_make_space(cxt, &p, FT_RSVMAP, sizeof(struct ft_reserve)))
583 return -1;
584
585 pres = (struct ft_reserve *)p;
586 pres->start = cpu_to_be64(physaddr);
587 pres->len = cpu_to_be64(size);
588
589 return 0;
590}
591
592void ft_begin_tree(struct ft_cxt *cxt)
593{
594 cxt->p = ft_root_node(cxt);
595}
596
597void ft_end_tree(struct ft_cxt *cxt)
598{
599 struct boot_param_header *bph = cxt->bph;
600 char *p, *oldstr, *str, *endp;
601 unsigned long ssize;
602 int adj;
603
604 if (!cxt->isordered)
605 return; /* we haven't touched anything */
606
607 /* adjust string offsets */
608 oldstr = cxt->rgn[FT_STRINGS].start;
609 adj = cxt->str_anchor - oldstr;
610 if (adj)
611 adjust_string_offsets(cxt, adj);
612
613 /* make strings end on 8-byte boundary */
614 ssize = cxt->rgn[FT_STRINGS].size;
615 endp = (char *)_ALIGN((unsigned long)cxt->rgn[FT_STRUCT].start
616 + cxt->rgn[FT_STRUCT].size + ssize, 8);
617 str = endp - ssize;
618
619 /* move strings down to end of structs */
620 memmove(str, oldstr, ssize);
621 cxt->str_anchor = str;
622 cxt->rgn[FT_STRINGS].start = str;
623
624 /* fill in header fields */
625 p = (char *)bph;
626 bph->totalsize = cpu_to_be32(endp - p);
627 bph->off_mem_rsvmap = cpu_to_be32(cxt->rgn[FT_RSVMAP].start - p);
628 bph->off_dt_struct = cpu_to_be32(cxt->rgn[FT_STRUCT].start - p);
629 bph->off_dt_strings = cpu_to_be32(cxt->rgn[FT_STRINGS].start - p);
630 bph->dt_strings_size = cpu_to_be32(ssize);
631}
632
633void *ft_find_device(struct ft_cxt *cxt, const void *top, const char *srch_path)
634{
635 char *node;
636
637 if (top) {
638 node = ft_node_ph2node(cxt, top);
639 if (node == NULL)
640 return NULL;
641 } else {
642 node = ft_root_node(cxt);
643 }
644
645 node = ft_find_descendent(cxt, node, srch_path);
646 return ft_get_phandle(cxt, node);
647}
648
649void *ft_find_descendent(struct ft_cxt *cxt, void *top, const char *srch_path)
650{
651 struct ft_atom atom;
652 char *p;
653 const char *cp, *q;
654 int cl;
655 int depth = -1;
656 int dmatch = 0;
657 const char *path_comp[FT_MAX_DEPTH];
658
659 cp = srch_path;
660 cl = 0;
661 p = top;
662
663 while ((p = ft_next(cxt, p, &atom)) != NULL) {
664 switch (atom.tag) {
665 case OF_DT_BEGIN_NODE:
666 ++depth;
667 if (depth != dmatch)
668 break;
669 cxt->genealogy[depth] = atom.data;
670 cxt->genealogy[depth + 1] = NULL;
671 if (depth && !(strncmp(atom.name, cp, cl) == 0
672 && (atom.name[cl] == '/'
673 || atom.name[cl] == '\0'
674 || atom.name[cl] == '@')))
675 break;
676 path_comp[dmatch] = cp;
677 /* it matches so far, advance to next path component */
678 cp += cl;
679 /* skip slashes */
680 while (*cp == '/')
681 ++cp;
682 /* we're done if this is the end of the string */
683 if (*cp == 0)
684 return atom.data;
685 /* look for end of this component */
686 q = strchr(cp, '/');
687 if (q)
688 cl = q - cp;
689 else
690 cl = strlen(cp);
691 ++dmatch;
692 break;
693 case OF_DT_END_NODE:
694 if (depth == 0)
695 return NULL;
696 if (dmatch > depth) {
697 --dmatch;
698 cl = cp - path_comp[dmatch] - 1;
699 cp = path_comp[dmatch];
700 while (cl > 0 && cp[cl - 1] == '/')
701 --cl;
702 }
703 --depth;
704 break;
705 }
706 }
707 return NULL;
708}
709
710void *__ft_get_parent(struct ft_cxt *cxt, void *node)
711{
712 int d;
713 struct ft_atom atom;
714 char *p;
715
716 for (d = 0; cxt->genealogy[d] != NULL; ++d)
717 if (cxt->genealogy[d] == node)
718 return d > 0 ? cxt->genealogy[d - 1] : NULL;
719
720 /* have to do it the hard way... */
721 p = ft_root_node(cxt);
722 d = 0;
723 while ((p = ft_next(cxt, p, &atom)) != NULL) {
724 switch (atom.tag) {
725 case OF_DT_BEGIN_NODE:
726 cxt->genealogy[d] = atom.data;
727 if (node == atom.data) {
728 /* found it */
729 cxt->genealogy[d + 1] = NULL;
730 return d > 0 ? cxt->genealogy[d - 1] : NULL;
731 }
732 ++d;
733 break;
734 case OF_DT_END_NODE:
735 --d;
736 break;
737 }
738 }
739 return NULL;
740}
741
742void *ft_get_parent(struct ft_cxt *cxt, const void *phandle)
743{
744 void *node = ft_node_ph2node(cxt, phandle);
745 if (node == NULL)
746 return NULL;
747
748 node = __ft_get_parent(cxt, node);
749 return ft_get_phandle(cxt, node);
750}
751
752static const void *__ft_get_prop(struct ft_cxt *cxt, void *node,
753 const char *propname, unsigned int *len)
754{
755 struct ft_atom atom;
756 int depth = 0;
757
758 while ((node = ft_next(cxt, node, &atom)) != NULL) {
759 switch (atom.tag) {
760 case OF_DT_BEGIN_NODE:
761 ++depth;
762 break;
763
764 case OF_DT_PROP:
765 if (depth != 1 || strcmp(atom.name, propname))
766 break;
767
768 if (len)
769 *len = atom.size;
770
771 return atom.data;
772
773 case OF_DT_END_NODE:
774 if (--depth <= 0)
775 return NULL;
776 }
777 }
778
779 return NULL;
780}
781
782int ft_get_prop(struct ft_cxt *cxt, const void *phandle, const char *propname,
783 void *buf, const unsigned int buflen)
784{
785 const void *data;
786 unsigned int size;
787
788 void *node = ft_node_ph2node(cxt, phandle);
789 if (!node)
790 return -1;
791
792 data = __ft_get_prop(cxt, node, propname, &size);
793 if (data) {
794 unsigned int clipped_size = min(size, buflen);
795 memcpy(buf, data, clipped_size);
796 return size;
797 }
798
799 return -1;
800}
801
802void *__ft_find_node_by_prop_value(struct ft_cxt *cxt, void *prev,
803 const char *propname, const char *propval,
804 unsigned int proplen)
805{
806 struct ft_atom atom;
807 char *p = ft_root_node(cxt);
808 char *next;
809 int past_prev = prev ? 0 : 1;
810 int depth = -1;
811
812 while ((next = ft_next(cxt, p, &atom)) != NULL) {
813 const void *data;
814 unsigned int size;
815
816 switch (atom.tag) {
817 case OF_DT_BEGIN_NODE:
818 depth++;
819
820 if (prev == p) {
821 past_prev = 1;
822 break;
823 }
824
825 if (!past_prev || depth < 1)
826 break;
827
828 data = __ft_get_prop(cxt, p, propname, &size);
829 if (!data || size != proplen)
830 break;
831 if (memcmp(data, propval, size))
832 break;
833
834 return p;
835
836 case OF_DT_END_NODE:
837 if (depth-- == 0)
838 return NULL;
839
840 break;
841 }
842
843 p = next;
844 }
845
846 return NULL;
847}
848
849void *ft_find_node_by_prop_value(struct ft_cxt *cxt, const void *prev,
850 const char *propname, const char *propval,
851 int proplen)
852{
853 void *node = NULL;
854
855 if (prev) {
856 node = ft_node_ph2node(cxt, prev);
857
858 if (!node)
859 return NULL;
860 }
861
862 node = __ft_find_node_by_prop_value(cxt, node, propname,
863 propval, proplen);
864 return ft_get_phandle(cxt, node);
865}
866
867int ft_set_prop(struct ft_cxt *cxt, const void *phandle, const char *propname,
868 const void *buf, const unsigned int buflen)
869{
870 struct ft_atom atom;
871 void *node;
872 char *p, *next;
873 int nextra;
874
875 node = ft_node_ph2node(cxt, phandle);
876 if (node == NULL)
877 return -1;
878
879 next = ft_next(cxt, node, &atom);
880 if (atom.tag != OF_DT_BEGIN_NODE)
881 /* phandle didn't point to a node */
882 return -1;
883 p = next;
884
885 while ((next = ft_next(cxt, p, &atom)) != NULL) {
886 switch (atom.tag) {
887 case OF_DT_BEGIN_NODE: /* properties must go before subnodes */
888 case OF_DT_END_NODE:
889 /* haven't found the property, insert here */
890 cxt->p = p;
891 return ft_prop(cxt, propname, buf, buflen);
892 case OF_DT_PROP:
893 if (strcmp(atom.name, propname))
894 break;
895 /* found an existing property, overwrite it */
896 nextra = _ALIGN(buflen, 4) - _ALIGN(atom.size, 4);
897 cxt->p = atom.data;
898 if (nextra && !ft_make_space(cxt, &cxt->p, FT_STRUCT,
899 nextra))
900 return -1;
901 *(u32 *) (cxt->p - 8) = cpu_to_be32(buflen);
902 ft_put_bin(cxt, buf, buflen);
903 return 0;
904 }
905 p = next;
906 }
907 return -1;
908}
909
910int ft_del_prop(struct ft_cxt *cxt, const void *phandle, const char *propname)
911{
912 struct ft_atom atom;
913 void *node;
914 char *p, *next;
915 int size;
916
917 node = ft_node_ph2node(cxt, phandle);
918 if (node == NULL)
919 return -1;
920
921 p = node;
922 while ((next = ft_next(cxt, p, &atom)) != NULL) {
923 switch (atom.tag) {
924 case OF_DT_BEGIN_NODE:
925 case OF_DT_END_NODE:
926 return -1;
927 case OF_DT_PROP:
928 if (strcmp(atom.name, propname))
929 break;
930 /* found the property, remove it */
931 size = 12 + -_ALIGN(atom.size, 4);
932 cxt->p = p;
933 if (!ft_make_space(cxt, &cxt->p, FT_STRUCT, -size))
934 return -1;
935 return 0;
936 }
937 p = next;
938 }
939 return -1;
940}
941
942void *ft_create_node(struct ft_cxt *cxt, const void *parent, const char *name)
943{
944 struct ft_atom atom;
945 char *p, *next, *ret;
946 int depth = 0;
947
948 if (parent) {
949 p = ft_node_ph2node(cxt, parent);
950 if (!p)
951 return NULL;
952 } else {
953 p = ft_root_node(cxt);
954 }
955
956 while ((next = ft_next(cxt, p, &atom)) != NULL) {
957 switch (atom.tag) {
958 case OF_DT_BEGIN_NODE:
959 ++depth;
960 if (depth == 1 && strcmp(atom.name, name) == 0)
961 /* duplicate node name, return error */
962 return NULL;
963 break;
964 case OF_DT_END_NODE:
965 --depth;
966 if (depth > 0)
967 break;
968 /* end of node, insert here */
969 cxt->p = p;
970 ret = ft_begin_node(cxt, name);
971 ft_end_node(cxt);
972 return ft_get_phandle(cxt, ret);
973 }
974 p = next;
975 }
976 return NULL;
977}
978
979/* Returns the start of the path within the provided buffer, or NULL on
980 * error.
981 */
982char *ft_get_path(struct ft_cxt *cxt, const void *phandle,
983 char *buf, int len)
984{
985 const char *path_comp[FT_MAX_DEPTH];
986 struct ft_atom atom;
987 char *p, *next, *pos;
988 int depth = 0, i;
989 void *node;
990
991 node = ft_node_ph2node(cxt, phandle);
992 if (node == NULL)
993 return NULL;
994
995 p = ft_root_node(cxt);
996
997 while ((next = ft_next(cxt, p, &atom)) != NULL) {
998 switch (atom.tag) {
999 case OF_DT_BEGIN_NODE:
1000 path_comp[depth++] = atom.name;
1001 if (p == node)
1002 goto found;
1003
1004 break;
1005
1006 case OF_DT_END_NODE:
1007 if (--depth == 0)
1008 return NULL;
1009 }
1010
1011 p = next;
1012 }
1013
1014found:
1015 pos = buf;
1016 for (i = 1; i < depth; i++) {
1017 int this_len;
1018
1019 if (len <= 1)
1020 return NULL;
1021
1022 *pos++ = '/';
1023 len--;
1024
1025 strncpy(pos, path_comp[i], len);
1026
1027 if (pos[len - 1] != 0)
1028 return NULL;
1029
1030 this_len = strlen(pos);
1031 len -= this_len;
1032 pos += this_len;
1033 }
1034
1035 return buf;
1036}
diff --git a/arch/powerpc/boot/flatdevtree.h b/arch/powerpc/boot/flatdevtree.h
deleted file mode 100644
index b0957a2d967f..000000000000
--- a/arch/powerpc/boot/flatdevtree.h
+++ /dev/null
@@ -1,113 +0,0 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 */
16
17#ifndef FLATDEVTREE_H
18#define FLATDEVTREE_H
19
20#include "flatdevtree_env.h"
21
22/* Definitions used by the flattened device tree */
23#define OF_DT_HEADER 0xd00dfeed /* marker */
24#define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */
25#define OF_DT_END_NODE 0x2 /* End node */
26#define OF_DT_PROP 0x3 /* Property: name off, size, content */
27#define OF_DT_NOP 0x4 /* nop */
28#define OF_DT_END 0x9
29
30#define OF_DT_VERSION 0x10
31
32struct boot_param_header {
33 u32 magic; /* magic word OF_DT_HEADER */
34 u32 totalsize; /* total size of DT block */
35 u32 off_dt_struct; /* offset to structure */
36 u32 off_dt_strings; /* offset to strings */
37 u32 off_mem_rsvmap; /* offset to memory reserve map */
38 u32 version; /* format version */
39 u32 last_comp_version; /* last compatible version */
40 /* version 2 fields below */
41 u32 boot_cpuid_phys; /* Physical CPU id we're booting on */
42 /* version 3 fields below */
43 u32 dt_strings_size; /* size of the DT strings block */
44};
45
46struct ft_reserve {
47 u64 start;
48 u64 len;
49};
50
51struct ft_region {
52 char *start;
53 unsigned long size;
54};
55
56enum ft_rgn_id {
57 FT_RSVMAP,
58 FT_STRUCT,
59 FT_STRINGS,
60 FT_N_REGION
61};
62
63#define FT_MAX_DEPTH 50
64
65struct ft_cxt {
66 struct boot_param_header *bph;
67 int max_size; /* maximum size of tree */
68 int isordered; /* everything in standard order */
69 void *(*realloc)(void *, unsigned long);
70 char *str_anchor;
71 char *p; /* current insertion point in structs */
72 struct ft_region rgn[FT_N_REGION];
73 void *genealogy[FT_MAX_DEPTH+1];
74 char **node_tbl;
75 unsigned int node_max;
76 unsigned int nodes_used;
77};
78
79char *ft_begin_node(struct ft_cxt *cxt, const char *name);
80void ft_end_node(struct ft_cxt *cxt);
81
82void ft_begin_tree(struct ft_cxt *cxt);
83void ft_end_tree(struct ft_cxt *cxt);
84
85void ft_nop(struct ft_cxt *cxt);
86int ft_prop(struct ft_cxt *cxt, const char *name,
87 const void *data, unsigned int sz);
88int ft_prop_str(struct ft_cxt *cxt, const char *name, const char *str);
89int ft_prop_int(struct ft_cxt *cxt, const char *name, unsigned int val);
90void ft_begin(struct ft_cxt *cxt, void *blob, unsigned int max_size,
91 void *(*realloc_fn)(void *, unsigned long));
92int ft_open(struct ft_cxt *cxt, void *blob, unsigned int max_size,
93 unsigned int max_find_device,
94 void *(*realloc_fn)(void *, unsigned long));
95int ft_add_rsvmap(struct ft_cxt *cxt, u64 physaddr, u64 size);
96
97void ft_dump_blob(const void *bphp);
98void ft_merge_blob(struct ft_cxt *cxt, void *blob);
99void *ft_find_device(struct ft_cxt *cxt, const void *top,
100 const char *srch_path);
101void *ft_find_descendent(struct ft_cxt *cxt, void *top, const char *srch_path);
102int ft_get_prop(struct ft_cxt *cxt, const void *phandle, const char *propname,
103 void *buf, const unsigned int buflen);
104int ft_set_prop(struct ft_cxt *cxt, const void *phandle, const char *propname,
105 const void *buf, const unsigned int buflen);
106void *ft_get_parent(struct ft_cxt *cxt, const void *phandle);
107void *ft_find_node_by_prop_value(struct ft_cxt *cxt, const void *prev,
108 const char *propname, const char *propval,
109 int proplen);
110void *ft_create_node(struct ft_cxt *cxt, const void *parent, const char *name);
111char *ft_get_path(struct ft_cxt *cxt, const void *phandle, char *buf, int len);
112
113#endif /* FLATDEVTREE_H */
diff --git a/arch/powerpc/boot/flatdevtree_misc.c b/arch/powerpc/boot/flatdevtree_misc.c
deleted file mode 100644
index b3670096fa71..000000000000
--- a/arch/powerpc/boot/flatdevtree_misc.c
+++ /dev/null
@@ -1,79 +0,0 @@
1/*
2 * This file does the necessary interface mapping between the bootwrapper
3 * device tree operations and the interface provided by shared source
4 * files flatdevicetree.[ch].
5 *
6 * Author: Mark A. Greer <mgreer@mvista.com>
7 *
8 * 2006 (c) MontaVista Software, Inc. This file is licensed under
9 * the terms of the GNU General Public License version 2. This program
10 * is licensed "as is" without any warranty of any kind, whether express
11 * or implied.
12 */
13#include <stddef.h>
14#include "flatdevtree.h"
15#include "ops.h"
16
17static struct ft_cxt cxt;
18
19static void *fdtm_finddevice(const char *name)
20{
21 return ft_find_device(&cxt, NULL, name);
22}
23
24static int fdtm_getprop(const void *phandle, const char *propname,
25 void *buf, const int buflen)
26{
27 return ft_get_prop(&cxt, phandle, propname, buf, buflen);
28}
29
30static int fdtm_setprop(const void *phandle, const char *propname,
31 const void *buf, const int buflen)
32{
33 return ft_set_prop(&cxt, phandle, propname, buf, buflen);
34}
35
36static void *fdtm_get_parent(const void *phandle)
37{
38 return ft_get_parent(&cxt, phandle);
39}
40
41static void *fdtm_create_node(const void *phandle, const char *name)
42{
43 return ft_create_node(&cxt, phandle, name);
44}
45
46static void *fdtm_find_node_by_prop_value(const void *prev,
47 const char *propname,
48 const char *propval,
49 int proplen)
50{
51 return ft_find_node_by_prop_value(&cxt, prev, propname,
52 propval, proplen);
53}
54
55static unsigned long fdtm_finalize(void)
56{
57 ft_end_tree(&cxt);
58 return (unsigned long)cxt.bph;
59}
60
61static char *fdtm_get_path(const void *phandle, char *buf, int len)
62{
63 return ft_get_path(&cxt, phandle, buf, len);
64}
65
66int ft_init(void *dt_blob, unsigned int max_size, unsigned int max_find_device)
67{
68 dt_ops.finddevice = fdtm_finddevice;
69 dt_ops.getprop = fdtm_getprop;
70 dt_ops.setprop = fdtm_setprop;
71 dt_ops.get_parent = fdtm_get_parent;
72 dt_ops.create_node = fdtm_create_node;
73 dt_ops.find_node_by_prop_value = fdtm_find_node_by_prop_value;
74 dt_ops.finalize = fdtm_finalize;
75 dt_ops.get_path = fdtm_get_path;
76
77 return ft_open(&cxt, dt_blob, max_size, max_find_device,
78 platform_ops.realloc);
79}
diff --git a/arch/powerpc/boot/holly.c b/arch/powerpc/boot/holly.c
index 199e783aea4d..58013b923178 100644
--- a/arch/powerpc/boot/holly.c
+++ b/arch/powerpc/boot/holly.c
@@ -28,6 +28,6 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5)
28 u32 heapsize = 0x8000000 - (u32)_end; /* 128M */ 28 u32 heapsize = 0x8000000 - (u32)_end; /* 128M */
29 29
30 simple_alloc_init(_end, heapsize, 32, 64); 30 simple_alloc_init(_end, heapsize, 32, 64);
31 ft_init(_dtb_start, 0, 4); 31 fdt_init(_dtb_start);
32 serial_console_init(); 32 serial_console_init();
33} 33}
diff --git a/arch/powerpc/boot/libfdt-wrapper.c b/arch/powerpc/boot/libfdt-wrapper.c
new file mode 100644
index 000000000000..59016bef1391
--- /dev/null
+++ b/arch/powerpc/boot/libfdt-wrapper.c
@@ -0,0 +1,193 @@
1/*
2 * This file does the necessary interface mapping between the bootwrapper
3 * device tree operations and the interface provided by shared source
4 * files flatdevicetree.[ch].
5 *
6 * Copyright 2007 David Gibson, IBM Corporation.
7 *
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of the
11 * License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this library; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 */
23
24#include <stddef.h>
25#include <stdio.h>
26#include <page.h>
27#include <libfdt.h>
28#include "ops.h"
29
30#define DEBUG 0
31#define BAD_ERROR(err) (((err) < 0) \
32 && ((err) != -FDT_ERR_NOTFOUND) \
33 && ((err) != -FDT_ERR_EXISTS))
34
35#define check_err(err) \
36 ({ \
37 if (BAD_ERROR(err) || ((err < 0) && DEBUG)) \
38 printf("%s():%d %s\n\r", __FUNCTION__, __LINE__, \
39 fdt_strerror(err)); \
40 if (BAD_ERROR(err)) \
41 exit(); \
42 (err < 0) ? -1 : 0; \
43 })
44
45#define offset_devp(off) \
46 ({ \
47 int _offset = (off); \
48 check_err(_offset) ? NULL : (void *)(_offset+1); \
49 })
50
51#define devp_offset_find(devp) (((int)(devp))-1)
52#define devp_offset(devp) (devp ? ((int)(devp))-1 : 0)
53
54static void *fdt;
55static void *buf; /* = NULL */
56
57#define EXPAND_GRANULARITY 1024
58
59static void expand_buf(int minexpand)
60{
61 int size = fdt_totalsize(fdt);
62 int rc;
63
64 size = _ALIGN(size + minexpand, EXPAND_GRANULARITY);
65 buf = platform_ops.realloc(buf, size);
66 if (!buf)
67 fatal("Couldn't find %d bytes to expand device tree\n\r", size);
68 rc = fdt_open_into(fdt, buf, size);
69 if (rc != 0)
70 fatal("Couldn't expand fdt into new buffer: %s\n\r",
71 fdt_strerror(rc));
72
73 fdt = buf;
74}
75
76static void *fdt_wrapper_finddevice(const char *path)
77{
78 return offset_devp(fdt_path_offset(fdt, path));
79}
80
81static int fdt_wrapper_getprop(const void *devp, const char *name,
82 void *buf, const int buflen)
83{
84 const void *p;
85 int len;
86
87 p = fdt_getprop(fdt, devp_offset(devp), name, &len);
88 if (!p)
89 return check_err(len);
90 memcpy(buf, p, min(len, buflen));
91 return len;
92}
93
94static int fdt_wrapper_setprop(const void *devp, const char *name,
95 const void *buf, const int len)
96{
97 int rc;
98
99 rc = fdt_setprop(fdt, devp_offset(devp), name, buf, len);
100 if (rc == -FDT_ERR_NOSPACE) {
101 expand_buf(len + 16);
102 rc = fdt_setprop(fdt, devp_offset(devp), name, buf, len);
103 }
104
105 return check_err(rc);
106}
107
108static void *fdt_wrapper_get_parent(const void *devp)
109{
110 return offset_devp(fdt_parent_offset(fdt, devp_offset(devp)));
111}
112
113static void *fdt_wrapper_create_node(const void *devp, const char *name)
114{
115 int offset;
116
117 offset = fdt_add_subnode(fdt, devp_offset(devp), name);
118 if (offset == -FDT_ERR_NOSPACE) {
119 expand_buf(strlen(name) + 16);
120 offset = fdt_add_subnode(fdt, devp_offset(devp), name);
121 }
122
123 return offset_devp(offset);
124}
125
126static void *fdt_wrapper_find_node_by_prop_value(const void *prev,
127 const char *name,
128 const char *val,
129 int len)
130{
131 int offset = fdt_node_offset_by_prop_value(fdt, devp_offset_find(prev),
132 name, val, len);
133 return offset_devp(offset);
134}
135
136static void *fdt_wrapper_find_node_by_compatible(const void *prev,
137 const char *val)
138{
139 int offset = fdt_node_offset_by_compatible(fdt, devp_offset_find(prev),
140 val);
141 return offset_devp(offset);
142}
143
144static char *fdt_wrapper_get_path(const void *devp, char *buf, int len)
145{
146 int rc;
147
148 rc = fdt_get_path(fdt, devp_offset(devp), buf, len);
149 if (check_err(rc))
150 return NULL;
151 return buf;
152}
153
154static unsigned long fdt_wrapper_finalize(void)
155{
156 int rc;
157
158 rc = fdt_pack(fdt);
159 if (rc != 0)
160 fatal("Couldn't pack flat tree: %s\n\r",
161 fdt_strerror(rc));
162 return (unsigned long)fdt;
163}
164
165void fdt_init(void *blob)
166{
167 int err;
168
169 dt_ops.finddevice = fdt_wrapper_finddevice;
170 dt_ops.getprop = fdt_wrapper_getprop;
171 dt_ops.setprop = fdt_wrapper_setprop;
172 dt_ops.get_parent = fdt_wrapper_get_parent;
173 dt_ops.create_node = fdt_wrapper_create_node;
174 dt_ops.find_node_by_prop_value = fdt_wrapper_find_node_by_prop_value;
175 dt_ops.find_node_by_compatible = fdt_wrapper_find_node_by_compatible;
176 dt_ops.get_path = fdt_wrapper_get_path;
177 dt_ops.finalize = fdt_wrapper_finalize;
178
179 /* Make sure the dt blob is the right version and so forth */
180 fdt = blob;
181 err = fdt_open_into(fdt, fdt, fdt_totalsize(blob));
182 if (err == -FDT_ERR_NOSPACE) {
183 int bufsize = fdt_totalsize(fdt) + 4;
184 buf = malloc(bufsize);
185 err = fdt_open_into(fdt, buf, bufsize);
186 }
187
188 if (err != 0)
189 fatal("fdt_init(): %s\n\r", fdt_strerror(err));
190
191 if (buf)
192 fdt = buf;
193}
diff --git a/arch/powerpc/boot/libfdt/Makefile.libfdt b/arch/powerpc/boot/libfdt/Makefile.libfdt
new file mode 100644
index 000000000000..82f9c6a8287b
--- /dev/null
+++ b/arch/powerpc/boot/libfdt/Makefile.libfdt
@@ -0,0 +1,14 @@
1# Makefile.libfdt
2#
3# This is not a complete Makefile of itself. Instead, it is designed to
4# be easily embeddable into other systems of Makefiles.
5#
6LIBFDT_SRCS = fdt.c fdt_ro.c fdt_wip.c fdt_sw.c fdt_rw.c fdt_strerror.c
7LIBFDT_INCLUDES = fdt.h libfdt.h
8LIBFDT_EXTRA = libfdt_internal.h
9LIBFDT_LIB = libfdt/libfdt.a
10
11LIBFDT_OBJS = $(LIBFDT_SRCS:%.c=%.o)
12
13$(LIBFDT_objdir)/$(LIBFDT_LIB): $(addprefix $(LIBFDT_objdir)/,$(LIBFDT_OBJS))
14
diff --git a/arch/powerpc/boot/libfdt/fdt.c b/arch/powerpc/boot/libfdt/fdt.c
new file mode 100644
index 000000000000..586a36136db2
--- /dev/null
+++ b/arch/powerpc/boot/libfdt/fdt.c
@@ -0,0 +1,156 @@
1/*
2 * libfdt - Flat Device Tree manipulation
3 * Copyright (C) 2006 David Gibson, IBM Corporation.
4 *
5 * libfdt is dual licensed: you can use it either under the terms of
6 * the GPL, or the BSD license, at your option.
7 *
8 * a) This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of the
11 * License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public
19 * License along with this library; if not, write to the Free
20 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
21 * MA 02110-1301 USA
22 *
23 * Alternatively,
24 *
25 * b) Redistribution and use in source and binary forms, with or
26 * without modification, are permitted provided that the following
27 * conditions are met:
28 *
29 * 1. Redistributions of source code must retain the above
30 * copyright notice, this list of conditions and the following
31 * disclaimer.
32 * 2. Redistributions in binary form must reproduce the above
33 * copyright notice, this list of conditions and the following
34 * disclaimer in the documentation and/or other materials
35 * provided with the distribution.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
38 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
39 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
40 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
42 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
43 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
44 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
45 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
48 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
49 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
50 */
51#include "libfdt_env.h"
52
53#include <fdt.h>
54#include <libfdt.h>
55
56#include "libfdt_internal.h"
57
58int fdt_check_header(const void *fdt)
59{
60 if (fdt_magic(fdt) == FDT_MAGIC) {
61 /* Complete tree */
62 if (fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION)
63 return -FDT_ERR_BADVERSION;
64 if (fdt_last_comp_version(fdt) > FDT_LAST_SUPPORTED_VERSION)
65 return -FDT_ERR_BADVERSION;
66 } else if (fdt_magic(fdt) == SW_MAGIC) {
67 /* Unfinished sequential-write blob */
68 if (fdt_size_dt_struct(fdt) == 0)
69 return -FDT_ERR_BADSTATE;
70 } else {
71 return -FDT_ERR_BADMAGIC;
72 }
73
74 return 0;
75}
76
77const void *fdt_offset_ptr(const void *fdt, int offset, int len)
78{
79 const void *p;
80
81 if (fdt_version(fdt) >= 0x11)
82 if (((offset + len) < offset)
83 || ((offset + len) > fdt_size_dt_struct(fdt)))
84 return NULL;
85
86 p = _fdt_offset_ptr(fdt, offset);
87
88 if (p + len < p)
89 return NULL;
90 return p;
91}
92
93uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset)
94{
95 const uint32_t *tagp, *lenp;
96 uint32_t tag;
97 const char *p;
98
99 if (offset % FDT_TAGSIZE)
100 return -1;
101
102 tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE);
103 if (! tagp)
104 return FDT_END; /* premature end */
105 tag = fdt32_to_cpu(*tagp);
106 offset += FDT_TAGSIZE;
107
108 switch (tag) {
109 case FDT_BEGIN_NODE:
110 /* skip name */
111 do {
112 p = fdt_offset_ptr(fdt, offset++, 1);
113 } while (p && (*p != '\0'));
114 if (! p)
115 return FDT_END;
116 break;
117 case FDT_PROP:
118 lenp = fdt_offset_ptr(fdt, offset, sizeof(*lenp));
119 if (! lenp)
120 return FDT_END;
121 /* skip name offset, length and value */
122 offset += 2*FDT_TAGSIZE + fdt32_to_cpu(*lenp);
123 break;
124 }
125
126 if (nextoffset)
127 *nextoffset = ALIGN(offset, FDT_TAGSIZE);
128
129 return tag;
130}
131
132const char *_fdt_find_string(const char *strtab, int tabsize, const char *s)
133{
134 int len = strlen(s) + 1;
135 const char *last = strtab + tabsize - len;
136 const char *p;
137
138 for (p = strtab; p <= last; p++)
139 if (memeq(p, s, len))
140 return p;
141 return NULL;
142}
143
144int fdt_move(const void *fdt, void *buf, int bufsize)
145{
146 int err = fdt_check_header(fdt);
147
148 if (err)
149 return err;
150
151 if (fdt_totalsize(fdt) > bufsize)
152 return -FDT_ERR_NOSPACE;
153
154 memmove(buf, fdt, fdt_totalsize(fdt));
155 return 0;
156}
diff --git a/arch/powerpc/boot/libfdt/fdt.h b/arch/powerpc/boot/libfdt/fdt.h
new file mode 100644
index 000000000000..48ccfd910000
--- /dev/null
+++ b/arch/powerpc/boot/libfdt/fdt.h
@@ -0,0 +1,60 @@
1#ifndef _FDT_H
2#define _FDT_H
3
4#ifndef __ASSEMBLY__
5
6struct fdt_header {
7 uint32_t magic; /* magic word FDT_MAGIC */
8 uint32_t totalsize; /* total size of DT block */
9 uint32_t off_dt_struct; /* offset to structure */
10 uint32_t off_dt_strings; /* offset to strings */
11 uint32_t off_mem_rsvmap; /* offset to memory reserve map */
12 uint32_t version; /* format version */
13 uint32_t last_comp_version; /* last compatible version */
14
15 /* version 2 fields below */
16 uint32_t boot_cpuid_phys; /* Which physical CPU id we're
17 booting on */
18 /* version 3 fields below */
19 uint32_t size_dt_strings; /* size of the strings block */
20
21 /* version 17 fields below */
22 uint32_t size_dt_struct; /* size of the structure block */
23};
24
25struct fdt_reserve_entry {
26 uint64_t address;
27 uint64_t size;
28};
29
30struct fdt_node_header {
31 uint32_t tag;
32 char name[0];
33};
34
35struct fdt_property {
36 uint32_t tag;
37 uint32_t len;
38 uint32_t nameoff;
39 char data[0];
40};
41
42#endif /* !__ASSEMBLY */
43
44#define FDT_MAGIC 0xd00dfeed /* 4: version, 4: total size */
45#define FDT_TAGSIZE sizeof(uint32_t)
46
47#define FDT_BEGIN_NODE 0x1 /* Start node: full name */
48#define FDT_END_NODE 0x2 /* End node */
49#define FDT_PROP 0x3 /* Property: name off,
50 size, content */
51#define FDT_NOP 0x4 /* nop */
52#define FDT_END 0x9
53
54#define FDT_V1_SIZE (7*sizeof(uint32_t))
55#define FDT_V2_SIZE (FDT_V1_SIZE + sizeof(uint32_t))
56#define FDT_V3_SIZE (FDT_V2_SIZE + sizeof(uint32_t))
57#define FDT_V16_SIZE FDT_V3_SIZE
58#define FDT_V17_SIZE (FDT_V16_SIZE + sizeof(uint32_t))
59
60#endif /* _FDT_H */
diff --git a/arch/powerpc/boot/libfdt/fdt_ro.c b/arch/powerpc/boot/libfdt/fdt_ro.c
new file mode 100644
index 000000000000..12a37d59f96e
--- /dev/null
+++ b/arch/powerpc/boot/libfdt/fdt_ro.c
@@ -0,0 +1,583 @@
1/*
2 * libfdt - Flat Device Tree manipulation
3 * Copyright (C) 2006 David Gibson, IBM Corporation.
4 *
5 * libfdt is dual licensed: you can use it either under the terms of
6 * the GPL, or the BSD license, at your option.
7 *
8 * a) This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of the
11 * License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public
19 * License along with this library; if not, write to the Free
20 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
21 * MA 02110-1301 USA
22 *
23 * Alternatively,
24 *
25 * b) Redistribution and use in source and binary forms, with or
26 * without modification, are permitted provided that the following
27 * conditions are met:
28 *
29 * 1. Redistributions of source code must retain the above
30 * copyright notice, this list of conditions and the following
31 * disclaimer.
32 * 2. Redistributions in binary form must reproduce the above
33 * copyright notice, this list of conditions and the following
34 * disclaimer in the documentation and/or other materials
35 * provided with the distribution.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
38 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
39 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
40 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
42 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
43 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
44 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
45 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
48 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
49 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
50 */
51#include "libfdt_env.h"
52
53#include <fdt.h>
54#include <libfdt.h>
55
56#include "libfdt_internal.h"
57
58#define CHECK_HEADER(fdt) \
59 { \
60 int err; \
61 if ((err = fdt_check_header(fdt)) != 0) \
62 return err; \
63 }
64
65static int nodename_eq(const void *fdt, int offset,
66 const char *s, int len)
67{
68 const char *p = fdt_offset_ptr(fdt, offset, len+1);
69
70 if (! p)
71 /* short match */
72 return 0;
73
74 if (memcmp(p, s, len) != 0)
75 return 0;
76
77 if (p[len] == '\0')
78 return 1;
79 else if (!memchr(s, '@', len) && (p[len] == '@'))
80 return 1;
81 else
82 return 0;
83}
84
85const char *fdt_string(const void *fdt, int stroffset)
86{
87 return (char *)fdt + fdt_off_dt_strings(fdt) + stroffset;
88}
89
90int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size)
91{
92 CHECK_HEADER(fdt);
93 *address = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->address);
94 *size = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->size);
95 return 0;
96}
97
98int fdt_num_mem_rsv(const void *fdt)
99{
100 int i = 0;
101
102 while (fdt64_to_cpu(_fdt_mem_rsv(fdt, i)->size) != 0)
103 i++;
104 return i;
105}
106
107int fdt_subnode_offset_namelen(const void *fdt, int parentoffset,
108 const char *name, int namelen)
109{
110 int level = 0;
111 uint32_t tag;
112 int offset, nextoffset;
113
114 CHECK_HEADER(fdt);
115
116 tag = fdt_next_tag(fdt, parentoffset, &nextoffset);
117 if (tag != FDT_BEGIN_NODE)
118 return -FDT_ERR_BADOFFSET;
119
120 do {
121 offset = nextoffset;
122 tag = fdt_next_tag(fdt, offset, &nextoffset);
123
124 switch (tag) {
125 case FDT_END:
126 return -FDT_ERR_TRUNCATED;
127
128 case FDT_BEGIN_NODE:
129 level++;
130 if (level != 1)
131 continue;
132 if (nodename_eq(fdt, offset+FDT_TAGSIZE, name, namelen))
133 /* Found it! */
134 return offset;
135 break;
136
137 case FDT_END_NODE:
138 level--;
139 break;
140
141 case FDT_PROP:
142 case FDT_NOP:
143 break;
144
145 default:
146 return -FDT_ERR_BADSTRUCTURE;
147 }
148 } while (level >= 0);
149
150 return -FDT_ERR_NOTFOUND;
151}
152
153int fdt_subnode_offset(const void *fdt, int parentoffset,
154 const char *name)
155{
156 return fdt_subnode_offset_namelen(fdt, parentoffset, name, strlen(name));
157}
158
159int fdt_path_offset(const void *fdt, const char *path)
160{
161 const char *end = path + strlen(path);
162 const char *p = path;
163 int offset = 0;
164
165 CHECK_HEADER(fdt);
166
167 if (*path != '/')
168 return -FDT_ERR_BADPATH;
169
170 while (*p) {
171 const char *q;
172
173 while (*p == '/')
174 p++;
175 if (! *p)
176 return offset;
177 q = strchr(p, '/');
178 if (! q)
179 q = end;
180
181 offset = fdt_subnode_offset_namelen(fdt, offset, p, q-p);
182 if (offset < 0)
183 return offset;
184
185 p = q;
186 }
187
188 return offset;
189}
190
191const char *fdt_get_name(const void *fdt, int nodeoffset, int *len)
192{
193 const struct fdt_node_header *nh;
194 int err;
195
196 if ((err = fdt_check_header(fdt)) != 0)
197 goto fail;
198
199 err = -FDT_ERR_BADOFFSET;
200 nh = fdt_offset_ptr(fdt, nodeoffset, sizeof(*nh));
201 if (!nh || (fdt32_to_cpu(nh->tag) != FDT_BEGIN_NODE))
202 goto fail;
203
204 if (len)
205 *len = strlen(nh->name);
206
207 return nh->name;
208
209 fail:
210 if (len)
211 *len = err;
212 return NULL;
213}
214
215const struct fdt_property *fdt_get_property(const void *fdt,
216 int nodeoffset,
217 const char *name, int *lenp)
218{
219 uint32_t tag;
220 const struct fdt_property *prop;
221 int namestroff;
222 int offset, nextoffset;
223 int err;
224
225 if ((err = fdt_check_header(fdt)) != 0)
226 goto fail;
227
228 err = -FDT_ERR_BADOFFSET;
229 if (nodeoffset % FDT_TAGSIZE)
230 goto fail;
231
232 tag = fdt_next_tag(fdt, nodeoffset, &nextoffset);
233 if (tag != FDT_BEGIN_NODE)
234 goto fail;
235
236 do {
237 offset = nextoffset;
238
239 tag = fdt_next_tag(fdt, offset, &nextoffset);
240 switch (tag) {
241 case FDT_END:
242 err = -FDT_ERR_TRUNCATED;
243 goto fail;
244
245 case FDT_BEGIN_NODE:
246 case FDT_END_NODE:
247 case FDT_NOP:
248 break;
249
250 case FDT_PROP:
251 err = -FDT_ERR_BADSTRUCTURE;
252 prop = fdt_offset_ptr(fdt, offset, sizeof(*prop));
253 if (! prop)
254 goto fail;
255 namestroff = fdt32_to_cpu(prop->nameoff);
256 if (streq(fdt_string(fdt, namestroff), name)) {
257 /* Found it! */
258 int len = fdt32_to_cpu(prop->len);
259 prop = fdt_offset_ptr(fdt, offset,
260 sizeof(*prop)+len);
261 if (! prop)
262 goto fail;
263
264 if (lenp)
265 *lenp = len;
266
267 return prop;
268 }
269 break;
270
271 default:
272 err = -FDT_ERR_BADSTRUCTURE;
273 goto fail;
274 }
275 } while ((tag != FDT_BEGIN_NODE) && (tag != FDT_END_NODE));
276
277 err = -FDT_ERR_NOTFOUND;
278 fail:
279 if (lenp)
280 *lenp = err;
281 return NULL;
282}
283
284const void *fdt_getprop(const void *fdt, int nodeoffset,
285 const char *name, int *lenp)
286{
287 const struct fdt_property *prop;
288
289 prop = fdt_get_property(fdt, nodeoffset, name, lenp);
290 if (! prop)
291 return NULL;
292
293 return prop->data;
294}
295
296uint32_t fdt_get_phandle(const void *fdt, int nodeoffset)
297{
298 const uint32_t *php;
299 int len;
300
301 php = fdt_getprop(fdt, nodeoffset, "linux,phandle", &len);
302 if (!php || (len != sizeof(*php)))
303 return 0;
304
305 return fdt32_to_cpu(*php);
306}
307
308int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen)
309{
310 uint32_t tag;
311 int p = 0, overflow = 0;
312 int offset, nextoffset, namelen;
313 const char *name;
314
315 CHECK_HEADER(fdt);
316
317 tag = fdt_next_tag(fdt, 0, &nextoffset);
318 if (tag != FDT_BEGIN_NODE)
319 return -FDT_ERR_BADSTRUCTURE;
320
321 if (buflen < 2)
322 return -FDT_ERR_NOSPACE;
323 buf[0] = '/';
324 p = 1;
325
326 while (nextoffset <= nodeoffset) {
327 offset = nextoffset;
328 tag = fdt_next_tag(fdt, offset, &nextoffset);
329 switch (tag) {
330 case FDT_END:
331 return -FDT_ERR_BADOFFSET;
332
333 case FDT_BEGIN_NODE:
334 name = fdt_get_name(fdt, offset, &namelen);
335 if (!name)
336 return namelen;
337 if (overflow || ((p + namelen + 1) > buflen)) {
338 overflow++;
339 break;
340 }
341 memcpy(buf + p, name, namelen);
342 p += namelen;
343 buf[p++] = '/';
344 break;
345
346 case FDT_END_NODE:
347 if (overflow) {
348 overflow--;
349 break;
350 }
351 do {
352 p--;
353 } while (buf[p-1] != '/');
354 break;
355
356 case FDT_PROP:
357 case FDT_NOP:
358 break;
359
360 default:
361 return -FDT_ERR_BADSTRUCTURE;
362 }
363 }
364
365 if (overflow)
366 return -FDT_ERR_NOSPACE;
367
368 if (p > 1) /* special case so that root path is "/", not "" */
369 p--;
370 buf[p] = '\0';
371 return p;
372}
373
374int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset,
375 int supernodedepth, int *nodedepth)
376{
377 int level = -1;
378 uint32_t tag;
379 int offset, nextoffset = 0;
380 int supernodeoffset = -FDT_ERR_INTERNAL;
381
382 CHECK_HEADER(fdt);
383
384 if (supernodedepth < 0)
385 return -FDT_ERR_NOTFOUND;
386
387 do {
388 offset = nextoffset;
389 tag = fdt_next_tag(fdt, offset, &nextoffset);
390 switch (tag) {
391 case FDT_END:
392 return -FDT_ERR_BADOFFSET;
393
394 case FDT_BEGIN_NODE:
395 level++;
396 if (level == supernodedepth)
397 supernodeoffset = offset;
398 break;
399
400 case FDT_END_NODE:
401 level--;
402 break;
403
404 case FDT_PROP:
405 case FDT_NOP:
406 break;
407
408 default:
409 return -FDT_ERR_BADSTRUCTURE;
410 }
411 } while (offset < nodeoffset);
412
413 if (nodedepth)
414 *nodedepth = level;
415
416 if (supernodedepth > level)
417 return -FDT_ERR_NOTFOUND;
418 return supernodeoffset;
419}
420
421int fdt_node_depth(const void *fdt, int nodeoffset)
422{
423 int nodedepth;
424 int err;
425
426 err = fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, &nodedepth);
427 if (err)
428 return (err < 0) ? err : -FDT_ERR_INTERNAL;
429 return nodedepth;
430}
431
432int fdt_parent_offset(const void *fdt, int nodeoffset)
433{
434 int nodedepth = fdt_node_depth(fdt, nodeoffset);
435
436 if (nodedepth < 0)
437 return nodedepth;
438 return fdt_supernode_atdepth_offset(fdt, nodeoffset,
439 nodedepth - 1, NULL);
440}
441
442int fdt_node_offset_by_prop_value(const void *fdt, int startoffset,
443 const char *propname,
444 const void *propval, int proplen)
445{
446 uint32_t tag;
447 int offset, nextoffset;
448 const void *val;
449 int len;
450
451 CHECK_HEADER(fdt);
452
453 if (startoffset >= 0) {
454 tag = fdt_next_tag(fdt, startoffset, &nextoffset);
455 if (tag != FDT_BEGIN_NODE)
456 return -FDT_ERR_BADOFFSET;
457 } else {
458 nextoffset = 0;
459 }
460
461 /* FIXME: The algorithm here is pretty horrible: we scan each
462 * property of a node in fdt_getprop(), then if that didn't
463 * find what we want, we scan over them again making our way
464 * to the next node. Still it's the easiest to implement
465 * approach; performance can come later. */
466 do {
467 offset = nextoffset;
468 tag = fdt_next_tag(fdt, offset, &nextoffset);
469
470 switch (tag) {
471 case FDT_BEGIN_NODE:
472 val = fdt_getprop(fdt, offset, propname, &len);
473 if (val
474 && (len == proplen)
475 && (memcmp(val, propval, len) == 0))
476 return offset;
477 break;
478
479 case FDT_PROP:
480 case FDT_END:
481 case FDT_END_NODE:
482 case FDT_NOP:
483 break;
484
485 default:
486 return -FDT_ERR_BADSTRUCTURE;
487 }
488 } while (tag != FDT_END);
489
490 return -FDT_ERR_NOTFOUND;
491}
492
493int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle)
494{
495 if ((phandle == 0) || (phandle == -1))
496 return -FDT_ERR_BADPHANDLE;
497 phandle = cpu_to_fdt32(phandle);
498 return fdt_node_offset_by_prop_value(fdt, -1, "linux,phandle",
499 &phandle, sizeof(phandle));
500}
501
502int _stringlist_contains(const void *strlist, int listlen, const char *str)
503{
504 int len = strlen(str);
505 const void *p;
506
507 while (listlen >= len) {
508 if (memcmp(str, strlist, len+1) == 0)
509 return 1;
510 p = memchr(strlist, '\0', listlen);
511 if (!p)
512 return 0; /* malformed strlist.. */
513 listlen -= (p-strlist) + 1;
514 strlist = p + 1;
515 }
516 return 0;
517}
518
519int fdt_node_check_compatible(const void *fdt, int nodeoffset,
520 const char *compatible)
521{
522 const void *prop;
523 int len;
524
525 prop = fdt_getprop(fdt, nodeoffset, "compatible", &len);
526 if (!prop)
527 return len;
528 if (_stringlist_contains(prop, len, compatible))
529 return 0;
530 else
531 return 1;
532}
533
534int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
535 const char *compatible)
536{
537 uint32_t tag;
538 int offset, nextoffset;
539 int err;
540
541 CHECK_HEADER(fdt);
542
543 if (startoffset >= 0) {
544 tag = fdt_next_tag(fdt, startoffset, &nextoffset);
545 if (tag != FDT_BEGIN_NODE)
546 return -FDT_ERR_BADOFFSET;
547 } else {
548 nextoffset = 0;
549 }
550
551 /* FIXME: The algorithm here is pretty horrible: we scan each
552 * property of a node in fdt_node_check_compatible(), then if
553 * that didn't find what we want, we scan over them again
554 * making our way to the next node. Still it's the easiest to
555 * implement approach; performance can come later. */
556 do {
557 offset = nextoffset;
558 tag = fdt_next_tag(fdt, offset, &nextoffset);
559
560 switch (tag) {
561 case FDT_BEGIN_NODE:
562 err = fdt_node_check_compatible(fdt, offset,
563 compatible);
564 if ((err < 0)
565 && (err != -FDT_ERR_NOTFOUND))
566 return err;
567 else if (err == 0)
568 return offset;
569 break;
570
571 case FDT_PROP:
572 case FDT_END:
573 case FDT_END_NODE:
574 case FDT_NOP:
575 break;
576
577 default:
578 return -FDT_ERR_BADSTRUCTURE;
579 }
580 } while (tag != FDT_END);
581
582 return -FDT_ERR_NOTFOUND;
583}
diff --git a/arch/powerpc/boot/libfdt/fdt_rw.c b/arch/powerpc/boot/libfdt/fdt_rw.c
new file mode 100644
index 000000000000..6673f8ec962a
--- /dev/null
+++ b/arch/powerpc/boot/libfdt/fdt_rw.c
@@ -0,0 +1,447 @@
1/*
2 * libfdt - Flat Device Tree manipulation
3 * Copyright (C) 2006 David Gibson, IBM Corporation.
4 *
5 * libfdt is dual licensed: you can use it either under the terms of
6 * the GPL, or the BSD license, at your option.
7 *
8 * a) This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of the
11 * License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public
19 * License along with this library; if not, write to the Free
20 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
21 * MA 02110-1301 USA
22 *
23 * Alternatively,
24 *
25 * b) Redistribution and use in source and binary forms, with or
26 * without modification, are permitted provided that the following
27 * conditions are met:
28 *
29 * 1. Redistributions of source code must retain the above
30 * copyright notice, this list of conditions and the following
31 * disclaimer.
32 * 2. Redistributions in binary form must reproduce the above
33 * copyright notice, this list of conditions and the following
34 * disclaimer in the documentation and/or other materials
35 * provided with the distribution.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
38 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
39 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
40 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
42 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
43 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
44 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
45 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
48 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
49 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
50 */
51#include "libfdt_env.h"
52
53#include <fdt.h>
54#include <libfdt.h>
55
56#include "libfdt_internal.h"
57
58static int _blocks_misordered(const void *fdt,
59 int mem_rsv_size, int struct_size)
60{
61 return (fdt_off_mem_rsvmap(fdt) < ALIGN(sizeof(struct fdt_header), 8))
62 || (fdt_off_dt_struct(fdt) <
63 (fdt_off_mem_rsvmap(fdt) + mem_rsv_size))
64 || (fdt_off_dt_strings(fdt) <
65 (fdt_off_dt_struct(fdt) + struct_size))
66 || (fdt_totalsize(fdt) <
67 (fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt)));
68}
69
70static int rw_check_header(void *fdt)
71{
72 int err;
73
74 if ((err = fdt_check_header(fdt)))
75 return err;
76 if (fdt_version(fdt) < 17)
77 return -FDT_ERR_BADVERSION;
78 if (_blocks_misordered(fdt, sizeof(struct fdt_reserve_entry),
79 fdt_size_dt_struct(fdt)))
80 return -FDT_ERR_BADLAYOUT;
81 if (fdt_version(fdt) > 17)
82 fdt_set_version(fdt, 17);
83
84 return 0;
85}
86
87#define RW_CHECK_HEADER(fdt) \
88 { \
89 int err; \
90 if ((err = rw_check_header(fdt)) != 0) \
91 return err; \
92 }
93
94static inline int _blob_data_size(void *fdt)
95{
96 return fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt);
97}
98
99static int _blob_splice(void *fdt, void *p, int oldlen, int newlen)
100{
101 void *end = fdt + _blob_data_size(fdt);
102
103 if (((p + oldlen) < p) || ((p + oldlen) > end))
104 return -FDT_ERR_BADOFFSET;
105 if ((end - oldlen + newlen) > (fdt + fdt_totalsize(fdt)))
106 return -FDT_ERR_NOSPACE;
107 memmove(p + newlen, p + oldlen, end - p - oldlen);
108 return 0;
109}
110
111static int _blob_splice_mem_rsv(void *fdt, struct fdt_reserve_entry *p,
112 int oldn, int newn)
113{
114 int delta = (newn - oldn) * sizeof(*p);
115 int err;
116 err = _blob_splice(fdt, p, oldn * sizeof(*p), newn * sizeof(*p));
117 if (err)
118 return err;
119 fdt_set_off_dt_struct(fdt, fdt_off_dt_struct(fdt) + delta);
120 fdt_set_off_dt_strings(fdt, fdt_off_dt_strings(fdt) + delta);
121 return 0;
122}
123
124static int _blob_splice_struct(void *fdt, void *p,
125 int oldlen, int newlen)
126{
127 int delta = newlen - oldlen;
128 int err;
129
130 if ((err = _blob_splice(fdt, p, oldlen, newlen)))
131 return err;
132
133 fdt_set_size_dt_struct(fdt, fdt_size_dt_struct(fdt) + delta);
134 fdt_set_off_dt_strings(fdt, fdt_off_dt_strings(fdt) + delta);
135 return 0;
136}
137
138static int _blob_splice_string(void *fdt, int newlen)
139{
140 void *p = fdt + fdt_off_dt_strings(fdt) + fdt_size_dt_strings(fdt);
141 int err;
142
143 if ((err = _blob_splice(fdt, p, 0, newlen)))
144 return err;
145
146 fdt_set_size_dt_strings(fdt, fdt_size_dt_strings(fdt) + newlen);
147 return 0;
148}
149
150static int _find_add_string(void *fdt, const char *s)
151{
152 char *strtab = (char *)fdt + fdt_off_dt_strings(fdt);
153 const char *p;
154 char *new;
155 int len = strlen(s) + 1;
156 int err;
157
158 p = _fdt_find_string(strtab, fdt_size_dt_strings(fdt), s);
159 if (p)
160 /* found it */
161 return (p - strtab);
162
163 new = strtab + fdt_size_dt_strings(fdt);
164 err = _blob_splice_string(fdt, len);
165 if (err)
166 return err;
167
168 memcpy(new, s, len);
169 return (new - strtab);
170}
171
172int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size)
173{
174 struct fdt_reserve_entry *re;
175 int err;
176
177 if ((err = rw_check_header(fdt)))
178 return err;
179
180 re = _fdt_mem_rsv_w(fdt, fdt_num_mem_rsv(fdt));
181 err = _blob_splice_mem_rsv(fdt, re, 0, 1);
182 if (err)
183 return err;
184
185 re->address = cpu_to_fdt64(address);
186 re->size = cpu_to_fdt64(size);
187 return 0;
188}
189
190int fdt_del_mem_rsv(void *fdt, int n)
191{
192 struct fdt_reserve_entry *re = _fdt_mem_rsv_w(fdt, n);
193 int err;
194
195 if ((err = rw_check_header(fdt)))
196 return err;
197 if (n >= fdt_num_mem_rsv(fdt))
198 return -FDT_ERR_NOTFOUND;
199
200 err = _blob_splice_mem_rsv(fdt, re, 1, 0);
201 if (err)
202 return err;
203 return 0;
204}
205
206static int _resize_property(void *fdt, int nodeoffset, const char *name, int len,
207 struct fdt_property **prop)
208{
209 int oldlen;
210 int err;
211
212 *prop = fdt_get_property_w(fdt, nodeoffset, name, &oldlen);
213 if (! (*prop))
214 return oldlen;
215
216 if ((err = _blob_splice_struct(fdt, (*prop)->data,
217 ALIGN(oldlen, FDT_TAGSIZE),
218 ALIGN(len, FDT_TAGSIZE))))
219 return err;
220
221 (*prop)->len = cpu_to_fdt32(len);
222 return 0;
223}
224
225static int _add_property(void *fdt, int nodeoffset, const char *name, int len,
226 struct fdt_property **prop)
227{
228 uint32_t tag;
229 int proplen;
230 int nextoffset;
231 int namestroff;
232 int err;
233
234 tag = fdt_next_tag(fdt, nodeoffset, &nextoffset);
235 if (tag != FDT_BEGIN_NODE)
236 return -FDT_ERR_BADOFFSET;
237
238 namestroff = _find_add_string(fdt, name);
239 if (namestroff < 0)
240 return namestroff;
241
242 *prop = _fdt_offset_ptr_w(fdt, nextoffset);
243 proplen = sizeof(**prop) + ALIGN(len, FDT_TAGSIZE);
244
245 err = _blob_splice_struct(fdt, *prop, 0, proplen);
246 if (err)
247 return err;
248
249 (*prop)->tag = cpu_to_fdt32(FDT_PROP);
250 (*prop)->nameoff = cpu_to_fdt32(namestroff);
251 (*prop)->len = cpu_to_fdt32(len);
252 return 0;
253}
254
255int fdt_setprop(void *fdt, int nodeoffset, const char *name,
256 const void *val, int len)
257{
258 struct fdt_property *prop;
259 int err;
260
261 if ((err = rw_check_header(fdt)))
262 return err;
263
264 err = _resize_property(fdt, nodeoffset, name, len, &prop);
265 if (err == -FDT_ERR_NOTFOUND)
266 err = _add_property(fdt, nodeoffset, name, len, &prop);
267 if (err)
268 return err;
269
270 memcpy(prop->data, val, len);
271 return 0;
272}
273
274int fdt_delprop(void *fdt, int nodeoffset, const char *name)
275{
276 struct fdt_property *prop;
277 int len, proplen;
278
279 RW_CHECK_HEADER(fdt);
280
281 prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
282 if (! prop)
283 return len;
284
285 proplen = sizeof(*prop) + ALIGN(len, FDT_TAGSIZE);
286 return _blob_splice_struct(fdt, prop, proplen, 0);
287}
288
289int fdt_add_subnode_namelen(void *fdt, int parentoffset,
290 const char *name, int namelen)
291{
292 struct fdt_node_header *nh;
293 int offset, nextoffset;
294 int nodelen;
295 int err;
296 uint32_t tag;
297 uint32_t *endtag;
298
299 RW_CHECK_HEADER(fdt);
300
301 offset = fdt_subnode_offset_namelen(fdt, parentoffset, name, namelen);
302 if (offset >= 0)
303 return -FDT_ERR_EXISTS;
304 else if (offset != -FDT_ERR_NOTFOUND)
305 return offset;
306
307 /* Try to place the new node after the parent's properties */
308 fdt_next_tag(fdt, parentoffset, &nextoffset); /* skip the BEGIN_NODE */
309 do {
310 offset = nextoffset;
311 tag = fdt_next_tag(fdt, offset, &nextoffset);
312 } while (tag == FDT_PROP);
313
314 nh = _fdt_offset_ptr_w(fdt, offset);
315 nodelen = sizeof(*nh) + ALIGN(namelen+1, FDT_TAGSIZE) + FDT_TAGSIZE;
316
317 err = _blob_splice_struct(fdt, nh, 0, nodelen);
318 if (err)
319 return err;
320
321 nh->tag = cpu_to_fdt32(FDT_BEGIN_NODE);
322 memset(nh->name, 0, ALIGN(namelen+1, FDT_TAGSIZE));
323 memcpy(nh->name, name, namelen);
324 endtag = (uint32_t *)((void *)nh + nodelen - FDT_TAGSIZE);
325 *endtag = cpu_to_fdt32(FDT_END_NODE);
326
327 return offset;
328}
329
330int fdt_add_subnode(void *fdt, int parentoffset, const char *name)
331{
332 return fdt_add_subnode_namelen(fdt, parentoffset, name, strlen(name));
333}
334
335int fdt_del_node(void *fdt, int nodeoffset)
336{
337 int endoffset;
338
339 RW_CHECK_HEADER(fdt);
340
341 endoffset = _fdt_node_end_offset(fdt, nodeoffset);
342 if (endoffset < 0)
343 return endoffset;
344
345 return _blob_splice_struct(fdt, _fdt_offset_ptr_w(fdt, nodeoffset),
346 endoffset - nodeoffset, 0);
347}
348
349static void _packblocks(const void *fdt, void *buf,
350 int mem_rsv_size, int struct_size)
351{
352 int mem_rsv_off, struct_off, strings_off;
353
354 mem_rsv_off = ALIGN(sizeof(struct fdt_header), 8);
355 struct_off = mem_rsv_off + mem_rsv_size;
356 strings_off = struct_off + struct_size;
357
358 memmove(buf + mem_rsv_off, fdt + fdt_off_mem_rsvmap(fdt), mem_rsv_size);
359 fdt_set_off_mem_rsvmap(buf, mem_rsv_off);
360
361 memmove(buf + struct_off, fdt + fdt_off_dt_struct(fdt), struct_size);
362 fdt_set_off_dt_struct(buf, struct_off);
363 fdt_set_size_dt_struct(buf, struct_size);
364
365 memmove(buf + strings_off, fdt + fdt_off_dt_strings(fdt),
366 fdt_size_dt_strings(fdt));
367 fdt_set_off_dt_strings(buf, strings_off);
368 fdt_set_size_dt_strings(buf, fdt_size_dt_strings(fdt));
369}
370
371int fdt_open_into(const void *fdt, void *buf, int bufsize)
372{
373 int err;
374 int mem_rsv_size, struct_size;
375 int newsize;
376 void *tmp;
377
378 err = fdt_check_header(fdt);
379 if (err)
380 return err;
381
382 mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
383 * sizeof(struct fdt_reserve_entry);
384
385 if (fdt_version(fdt) >= 17) {
386 struct_size = fdt_size_dt_struct(fdt);
387 } else {
388 struct_size = 0;
389 while (fdt_next_tag(fdt, struct_size, &struct_size) != FDT_END)
390 ;
391 }
392
393 if (!_blocks_misordered(fdt, mem_rsv_size, struct_size)) {
394 /* no further work necessary */
395 err = fdt_move(fdt, buf, bufsize);
396 if (err)
397 return err;
398 fdt_set_version(buf, 17);
399 fdt_set_size_dt_struct(buf, struct_size);
400 fdt_set_totalsize(buf, bufsize);
401 return 0;
402 }
403
404 /* Need to reorder */
405 newsize = ALIGN(sizeof(struct fdt_header), 8) + mem_rsv_size
406 + struct_size + fdt_size_dt_strings(fdt);
407
408 if (bufsize < newsize)
409 return -FDT_ERR_NOSPACE;
410
411 if (((buf + newsize) <= fdt)
412 || (buf >= (fdt + fdt_totalsize(fdt)))) {
413 tmp = buf;
414 } else {
415 tmp = (void *)fdt + fdt_totalsize(fdt);
416 if ((tmp + newsize) > (buf + bufsize))
417 return -FDT_ERR_NOSPACE;
418 }
419
420 _packblocks(fdt, tmp, mem_rsv_size, struct_size);
421 memmove(buf, tmp, newsize);
422
423 fdt_set_magic(buf, FDT_MAGIC);
424 fdt_set_totalsize(buf, bufsize);
425 fdt_set_version(buf, 17);
426 fdt_set_last_comp_version(buf, 16);
427 fdt_set_boot_cpuid_phys(buf, fdt_boot_cpuid_phys(fdt));
428
429 return 0;
430}
431
432int fdt_pack(void *fdt)
433{
434 int mem_rsv_size;
435 int err;
436
437 err = rw_check_header(fdt);
438 if (err)
439 return err;
440
441 mem_rsv_size = (fdt_num_mem_rsv(fdt)+1)
442 * sizeof(struct fdt_reserve_entry);
443 _packblocks(fdt, fdt, mem_rsv_size, fdt_size_dt_struct(fdt));
444 fdt_set_totalsize(fdt, _blob_data_size(fdt));
445
446 return 0;
447}
diff --git a/arch/powerpc/boot/libfdt/fdt_strerror.c b/arch/powerpc/boot/libfdt/fdt_strerror.c
new file mode 100644
index 000000000000..f9d32ef5360a
--- /dev/null
+++ b/arch/powerpc/boot/libfdt/fdt_strerror.c
@@ -0,0 +1,96 @@
1/*
2 * libfdt - Flat Device Tree manipulation
3 * Copyright (C) 2006 David Gibson, IBM Corporation.
4 *
5 * libfdt is dual licensed: you can use it either under the terms of
6 * the GPL, or the BSD license, at your option.
7 *
8 * a) This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of the
11 * License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public
19 * License along with this library; if not, write to the Free
20 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
21 * MA 02110-1301 USA
22 *
23 * Alternatively,
24 *
25 * b) Redistribution and use in source and binary forms, with or
26 * without modification, are permitted provided that the following
27 * conditions are met:
28 *
29 * 1. Redistributions of source code must retain the above
30 * copyright notice, this list of conditions and the following
31 * disclaimer.
32 * 2. Redistributions in binary form must reproduce the above
33 * copyright notice, this list of conditions and the following
34 * disclaimer in the documentation and/or other materials
35 * provided with the distribution.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
38 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
39 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
40 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
42 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
43 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
44 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
45 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
48 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
49 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
50 */
51#include "libfdt_env.h"
52
53#include <fdt.h>
54#include <libfdt.h>
55
56#include "libfdt_internal.h"
57
58struct errtabent {
59 const char *str;
60};
61
62#define ERRTABENT(val) \
63 [(val)] = { .str = #val, }
64
65static struct errtabent errtable[] = {
66 ERRTABENT(FDT_ERR_NOTFOUND),
67 ERRTABENT(FDT_ERR_EXISTS),
68 ERRTABENT(FDT_ERR_NOSPACE),
69
70 ERRTABENT(FDT_ERR_BADOFFSET),
71 ERRTABENT(FDT_ERR_BADPATH),
72 ERRTABENT(FDT_ERR_BADSTATE),
73
74 ERRTABENT(FDT_ERR_TRUNCATED),
75 ERRTABENT(FDT_ERR_BADMAGIC),
76 ERRTABENT(FDT_ERR_BADVERSION),
77 ERRTABENT(FDT_ERR_BADSTRUCTURE),
78 ERRTABENT(FDT_ERR_BADLAYOUT),
79};
80#define ERRTABSIZE (sizeof(errtable) / sizeof(errtable[0]))
81
82const char *fdt_strerror(int errval)
83{
84 if (errval > 0)
85 return "<valid offset/length>";
86 else if (errval == 0)
87 return "<no error>";
88 else if (errval > -ERRTABSIZE) {
89 const char *s = errtable[-errval].str;
90
91 if (s)
92 return s;
93 }
94
95 return "<unknown error>";
96}
diff --git a/arch/powerpc/boot/libfdt/fdt_sw.c b/arch/powerpc/boot/libfdt/fdt_sw.c
new file mode 100644
index 000000000000..dda2de34b2e0
--- /dev/null
+++ b/arch/powerpc/boot/libfdt/fdt_sw.c
@@ -0,0 +1,258 @@
1/*
2 * libfdt - Flat Device Tree manipulation
3 * Copyright (C) 2006 David Gibson, IBM Corporation.
4 *
5 * libfdt is dual licensed: you can use it either under the terms of
6 * the GPL, or the BSD license, at your option.
7 *
8 * a) This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of the
11 * License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public
19 * License along with this library; if not, write to the Free
20 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
21 * MA 02110-1301 USA
22 *
23 * Alternatively,
24 *
25 * b) Redistribution and use in source and binary forms, with or
26 * without modification, are permitted provided that the following
27 * conditions are met:
28 *
29 * 1. Redistributions of source code must retain the above
30 * copyright notice, this list of conditions and the following
31 * disclaimer.
32 * 2. Redistributions in binary form must reproduce the above
33 * copyright notice, this list of conditions and the following
34 * disclaimer in the documentation and/or other materials
35 * provided with the distribution.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
38 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
39 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
40 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
42 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
43 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
44 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
45 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
48 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
49 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
50 */
51#include "libfdt_env.h"
52
53#include <fdt.h>
54#include <libfdt.h>
55
56#include "libfdt_internal.h"
57
58static int check_header_sw(void *fdt)
59{
60 if (fdt_magic(fdt) != SW_MAGIC)
61 return -FDT_ERR_BADMAGIC;
62 return 0;
63}
64
65static void *grab_space(void *fdt, int len)
66{
67 int offset = fdt_size_dt_struct(fdt);
68 int spaceleft;
69
70 spaceleft = fdt_totalsize(fdt) - fdt_off_dt_struct(fdt)
71 - fdt_size_dt_strings(fdt);
72
73 if ((offset + len < offset) || (offset + len > spaceleft))
74 return NULL;
75
76 fdt_set_size_dt_struct(fdt, offset + len);
77 return fdt_offset_ptr_w(fdt, offset, len);
78}
79
80int fdt_create(void *buf, int bufsize)
81{
82 void *fdt = buf;
83
84 if (bufsize < sizeof(struct fdt_header))
85 return -FDT_ERR_NOSPACE;
86
87 memset(buf, 0, bufsize);
88
89 fdt_set_magic(fdt, SW_MAGIC);
90 fdt_set_version(fdt, FDT_LAST_SUPPORTED_VERSION);
91 fdt_set_last_comp_version(fdt, FDT_FIRST_SUPPORTED_VERSION);
92 fdt_set_totalsize(fdt, bufsize);
93
94 fdt_set_off_mem_rsvmap(fdt, ALIGN(sizeof(struct fdt_header),
95 sizeof(struct fdt_reserve_entry)));
96 fdt_set_off_dt_struct(fdt, fdt_off_mem_rsvmap(fdt));
97 fdt_set_off_dt_strings(fdt, bufsize);
98
99 return 0;
100}
101
102int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size)
103{
104 struct fdt_reserve_entry *re;
105 int err = check_header_sw(fdt);
106 int offset;
107
108 if (err)
109 return err;
110 if (fdt_size_dt_struct(fdt))
111 return -FDT_ERR_BADSTATE;
112
113 offset = fdt_off_dt_struct(fdt);
114 if ((offset + sizeof(*re)) > fdt_totalsize(fdt))
115 return -FDT_ERR_NOSPACE;
116
117 re = (struct fdt_reserve_entry *)(fdt + offset);
118 re->address = cpu_to_fdt64(addr);
119 re->size = cpu_to_fdt64(size);
120
121 fdt_set_off_dt_struct(fdt, offset + sizeof(*re));
122
123 return 0;
124}
125
126int fdt_finish_reservemap(void *fdt)
127{
128 return fdt_add_reservemap_entry(fdt, 0, 0);
129}
130
131int fdt_begin_node(void *fdt, const char *name)
132{
133 struct fdt_node_header *nh;
134 int err = check_header_sw(fdt);
135 int namelen = strlen(name) + 1;
136
137 if (err)
138 return err;
139
140 nh = grab_space(fdt, sizeof(*nh) + ALIGN(namelen, FDT_TAGSIZE));
141 if (! nh)
142 return -FDT_ERR_NOSPACE;
143
144 nh->tag = cpu_to_fdt32(FDT_BEGIN_NODE);
145 memcpy(nh->name, name, namelen);
146 return 0;
147}
148
149int fdt_end_node(void *fdt)
150{
151 uint32_t *en;
152 int err = check_header_sw(fdt);
153
154 if (err)
155 return err;
156
157 en = grab_space(fdt, FDT_TAGSIZE);
158 if (! en)
159 return -FDT_ERR_NOSPACE;
160
161 *en = cpu_to_fdt32(FDT_END_NODE);
162 return 0;
163}
164
165static int find_add_string(void *fdt, const char *s)
166{
167 char *strtab = (char *)fdt + fdt_totalsize(fdt);
168 const char *p;
169 int strtabsize = fdt_size_dt_strings(fdt);
170 int len = strlen(s) + 1;
171 int struct_top, offset;
172
173 p = _fdt_find_string(strtab - strtabsize, strtabsize, s);
174 if (p)
175 return p - strtab;
176
177 /* Add it */
178 offset = -strtabsize - len;
179 struct_top = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
180 if (fdt_totalsize(fdt) + offset < struct_top)
181 return 0; /* no more room :( */
182
183 memcpy(strtab + offset, s, len);
184 fdt_set_size_dt_strings(fdt, strtabsize + len);
185 return offset;
186}
187
188int fdt_property(void *fdt, const char *name, const void *val, int len)
189{
190 struct fdt_property *prop;
191 int err = check_header_sw(fdt);
192 int nameoff;
193
194 if (err)
195 return err;
196
197 nameoff = find_add_string(fdt, name);
198 if (nameoff == 0)
199 return -FDT_ERR_NOSPACE;
200
201 prop = grab_space(fdt, sizeof(*prop) + ALIGN(len, FDT_TAGSIZE));
202 if (! prop)
203 return -FDT_ERR_NOSPACE;
204
205 prop->tag = cpu_to_fdt32(FDT_PROP);
206 prop->nameoff = cpu_to_fdt32(nameoff);
207 prop->len = cpu_to_fdt32(len);
208 memcpy(prop->data, val, len);
209 return 0;
210}
211
212int fdt_finish(void *fdt)
213{
214 int err = check_header_sw(fdt);
215 char *p = (char *)fdt;
216 uint32_t *end;
217 int oldstroffset, newstroffset;
218 uint32_t tag;
219 int offset, nextoffset;
220
221 if (err)
222 return err;
223
224 /* Add terminator */
225 end = grab_space(fdt, sizeof(*end));
226 if (! end)
227 return -FDT_ERR_NOSPACE;
228 *end = cpu_to_fdt32(FDT_END);
229
230 /* Relocate the string table */
231 oldstroffset = fdt_totalsize(fdt) - fdt_size_dt_strings(fdt);
232 newstroffset = fdt_off_dt_struct(fdt) + fdt_size_dt_struct(fdt);
233 memmove(p + newstroffset, p + oldstroffset, fdt_size_dt_strings(fdt));
234 fdt_set_off_dt_strings(fdt, newstroffset);
235
236 /* Walk the structure, correcting string offsets */
237 offset = 0;
238 while ((tag = fdt_next_tag(fdt, offset, &nextoffset)) != FDT_END) {
239 if (tag == FDT_PROP) {
240 struct fdt_property *prop =
241 fdt_offset_ptr_w(fdt, offset, sizeof(*prop));
242 int nameoff;
243
244 if (! prop)
245 return -FDT_ERR_BADSTRUCTURE;
246
247 nameoff = fdt32_to_cpu(prop->nameoff);
248 nameoff += fdt_size_dt_strings(fdt);
249 prop->nameoff = cpu_to_fdt32(nameoff);
250 }
251 offset = nextoffset;
252 }
253
254 /* Finally, adjust the header */
255 fdt_set_totalsize(fdt, newstroffset + fdt_size_dt_strings(fdt));
256 fdt_set_magic(fdt, FDT_MAGIC);
257 return 0;
258}
diff --git a/arch/powerpc/boot/libfdt/fdt_wip.c b/arch/powerpc/boot/libfdt/fdt_wip.c
new file mode 100644
index 000000000000..88e24b8318f4
--- /dev/null
+++ b/arch/powerpc/boot/libfdt/fdt_wip.c
@@ -0,0 +1,144 @@
1/*
2 * libfdt - Flat Device Tree manipulation
3 * Copyright (C) 2006 David Gibson, IBM Corporation.
4 *
5 * libfdt is dual licensed: you can use it either under the terms of
6 * the GPL, or the BSD license, at your option.
7 *
8 * a) This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of the
11 * License, or (at your option) any later version.
12 *
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public
19 * License along with this library; if not, write to the Free
20 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
21 * MA 02110-1301 USA
22 *
23 * Alternatively,
24 *
25 * b) Redistribution and use in source and binary forms, with or
26 * without modification, are permitted provided that the following
27 * conditions are met:
28 *
29 * 1. Redistributions of source code must retain the above
30 * copyright notice, this list of conditions and the following
31 * disclaimer.
32 * 2. Redistributions in binary form must reproduce the above
33 * copyright notice, this list of conditions and the following
34 * disclaimer in the documentation and/or other materials
35 * provided with the distribution.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
38 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
39 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
40 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
41 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
42 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
43 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
44 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
45 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
46 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
47 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
48 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
49 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
50 */
51#include "libfdt_env.h"
52
53#include <fdt.h>
54#include <libfdt.h>
55
56#include "libfdt_internal.h"
57
58int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
59 const void *val, int len)
60{
61 void *propval;
62 int proplen;
63
64 propval = fdt_getprop_w(fdt, nodeoffset, name, &proplen);
65 if (! propval)
66 return proplen;
67
68 if (proplen != len)
69 return -FDT_ERR_NOSPACE;
70
71 memcpy(propval, val, len);
72 return 0;
73}
74
75static void nop_region(void *start, int len)
76{
77 uint32_t *p;
78
79 for (p = start; (void *)p < (start + len); p++)
80 *p = cpu_to_fdt32(FDT_NOP);
81}
82
83int fdt_nop_property(void *fdt, int nodeoffset, const char *name)
84{
85 struct fdt_property *prop;
86 int len;
87
88 prop = fdt_get_property_w(fdt, nodeoffset, name, &len);
89 if (! prop)
90 return len;
91
92 nop_region(prop, len + sizeof(*prop));
93
94 return 0;
95}
96
97int _fdt_node_end_offset(void *fdt, int nodeoffset)
98{
99 int level = 0;
100 uint32_t tag;
101 int offset, nextoffset;
102
103 tag = fdt_next_tag(fdt, nodeoffset, &nextoffset);
104 if (tag != FDT_BEGIN_NODE)
105 return -FDT_ERR_BADOFFSET;
106 do {
107 offset = nextoffset;
108 tag = fdt_next_tag(fdt, offset, &nextoffset);
109
110 switch (tag) {
111 case FDT_END:
112 return offset;
113
114 case FDT_BEGIN_NODE:
115 level++;
116 break;
117
118 case FDT_END_NODE:
119 level--;
120 break;
121
122 case FDT_PROP:
123 case FDT_NOP:
124 break;
125
126 default:
127 return -FDT_ERR_BADSTRUCTURE;
128 }
129 } while (level >= 0);
130
131 return nextoffset;
132}
133
134int fdt_nop_node(void *fdt, int nodeoffset)
135{
136 int endoffset;
137
138 endoffset = _fdt_node_end_offset(fdt, nodeoffset);
139 if (endoffset < 0)
140 return endoffset;
141
142 nop_region(fdt_offset_ptr_w(fdt, nodeoffset, 0), endoffset - nodeoffset);
143 return 0;
144}
diff --git a/arch/powerpc/boot/libfdt/libfdt.h b/arch/powerpc/boot/libfdt/libfdt.h
new file mode 100644
index 000000000000..6b2fb92ea357
--- /dev/null
+++ b/arch/powerpc/boot/libfdt/libfdt.h
@@ -0,0 +1,721 @@
1#ifndef _LIBFDT_H
2#define _LIBFDT_H
3/*
4 * libfdt - Flat Device Tree manipulation
5 * Copyright (C) 2006 David Gibson, IBM Corporation.
6 *
7 * libfdt is dual licensed: you can use it either under the terms of
8 * the GPL, or the BSD license, at your option.
9 *
10 * a) This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public
21 * License along with this library; if not, write to the Free
22 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
23 * MA 02110-1301 USA
24 *
25 * Alternatively,
26 *
27 * b) Redistribution and use in source and binary forms, with or
28 * without modification, are permitted provided that the following
29 * conditions are met:
30 *
31 * 1. Redistributions of source code must retain the above
32 * copyright notice, this list of conditions and the following
33 * disclaimer.
34 * 2. Redistributions in binary form must reproduce the above
35 * copyright notice, this list of conditions and the following
36 * disclaimer in the documentation and/or other materials
37 * provided with the distribution.
38 *
39 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
40 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
41 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
42 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
43 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
44 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
45 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
46 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
47 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
48 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
49 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
50 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
51 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
52 */
53
54#include <libfdt_env.h>
55#include <fdt.h>
56
57#define FDT_FIRST_SUPPORTED_VERSION 0x10
58#define FDT_LAST_SUPPORTED_VERSION 0x11
59
60/* Error codes: informative error codes */
61#define FDT_ERR_NOTFOUND 1
62 /* FDT_ERR_NOTFOUND: The requested node or property does not exist */
63#define FDT_ERR_EXISTS 2
64 /* FDT_ERR_EXISTS: Attemped to create a node or property which
65 * already exists */
66#define FDT_ERR_NOSPACE 3
67 /* FDT_ERR_NOSPACE: Operation needed to expand the device
68 * tree, but its buffer did not have sufficient space to
69 * contain the expanded tree. Use fdt_open_into() to move the
70 * device tree to a buffer with more space. */
71
72/* Error codes: codes for bad parameters */
73#define FDT_ERR_BADOFFSET 4
74 /* FDT_ERR_BADOFFSET: Function was passed a structure block
75 * offset which is out-of-bounds, or which points to an
76 * unsuitable part of the structure for the operation. */
77#define FDT_ERR_BADPATH 5
78 /* FDT_ERR_BADPATH: Function was passed a badly formatted path
79 * (e.g. missing a leading / for a function which requires an
80 * absolute path) */
81#define FDT_ERR_BADPHANDLE 6
82 /* FDT_ERR_BADPHANDLE: Function was passed an invalid phandle
83 * value. phandle values of 0 and -1 are not permitted. */
84#define FDT_ERR_BADSTATE 7
85 /* FDT_ERR_BADSTATE: Function was passed an incomplete device
86 * tree created by the sequential-write functions, which is
87 * not sufficiently complete for the requested operation. */
88
89/* Error codes: codes for bad device tree blobs */
90#define FDT_ERR_TRUNCATED 8
91 /* FDT_ERR_TRUNCATED: Structure block of the given device tree
92 * ends without an FDT_END tag. */
93#define FDT_ERR_BADMAGIC 9
94 /* FDT_ERR_BADMAGIC: Given "device tree" appears not to be a
95 * device tree at all - it is missing the flattened device
96 * tree magic number. */
97#define FDT_ERR_BADVERSION 10
98 /* FDT_ERR_BADVERSION: Given device tree has a version which
99 * can't be handled by the requested operation. For
100 * read-write functions, this may mean that fdt_open_into() is
101 * required to convert the tree to the expected version. */
102#define FDT_ERR_BADSTRUCTURE 11
103 /* FDT_ERR_BADSTRUCTURE: Given device tree has a corrupt
104 * structure block or other serious error (e.g. misnested
105 * nodes, or subnodes preceding properties). */
106#define FDT_ERR_BADLAYOUT 12
107 /* FDT_ERR_BADLAYOUT: For read-write functions, the given
108 * device tree has it's sub-blocks in an order that the
109 * function can't handle (memory reserve map, then structure,
110 * then strings). Use fdt_open_into() to reorganize the tree
111 * into a form suitable for the read-write operations. */
112
113/* "Can't happen" error indicating a bug in libfdt */
114#define FDT_ERR_INTERNAL 13
115 /* FDT_ERR_INTERNAL: libfdt has failed an internal assertion.
116 * Should never be returned, if it is, it indicates a bug in
117 * libfdt itself. */
118
119#define FDT_ERR_MAX 13
120
121/**********************************************************************/
122/* Low-level functions (you probably don't need these) */
123/**********************************************************************/
124
125const void *fdt_offset_ptr(const void *fdt, int offset, int checklen);
126static inline void *fdt_offset_ptr_w(void *fdt, int offset, int checklen)
127{
128 return (void *)fdt_offset_ptr(fdt, offset, checklen);
129}
130
131uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset);
132
133/**********************************************************************/
134/* General functions */
135/**********************************************************************/
136
137#define fdt_get_header(fdt, field) \
138 (fdt32_to_cpu(((const struct fdt_header *)(fdt))->field))
139#define fdt_magic(fdt) (fdt_get_header(fdt, magic))
140#define fdt_totalsize(fdt) (fdt_get_header(fdt, totalsize))
141#define fdt_off_dt_struct(fdt) (fdt_get_header(fdt, off_dt_struct))
142#define fdt_off_dt_strings(fdt) (fdt_get_header(fdt, off_dt_strings))
143#define fdt_off_mem_rsvmap(fdt) (fdt_get_header(fdt, off_mem_rsvmap))
144#define fdt_version(fdt) (fdt_get_header(fdt, version))
145#define fdt_last_comp_version(fdt) (fdt_get_header(fdt, last_comp_version))
146#define fdt_boot_cpuid_phys(fdt) (fdt_get_header(fdt, boot_cpuid_phys))
147#define fdt_size_dt_strings(fdt) (fdt_get_header(fdt, size_dt_strings))
148#define fdt_size_dt_struct(fdt) (fdt_get_header(fdt, size_dt_struct))
149
150#define __fdt_set_hdr(name) \
151 static inline void fdt_set_##name(void *fdt, uint32_t val) \
152 { \
153 struct fdt_header *fdth = fdt; \
154 fdth->name = cpu_to_fdt32(val); \
155 }
156__fdt_set_hdr(magic);
157__fdt_set_hdr(totalsize);
158__fdt_set_hdr(off_dt_struct);
159__fdt_set_hdr(off_dt_strings);
160__fdt_set_hdr(off_mem_rsvmap);
161__fdt_set_hdr(version);
162__fdt_set_hdr(last_comp_version);
163__fdt_set_hdr(boot_cpuid_phys);
164__fdt_set_hdr(size_dt_strings);
165__fdt_set_hdr(size_dt_struct);
166#undef __fdt_set_hdr
167
168/**
169 * fdt_check_header - sanity check a device tree or possible device tree
170 * @fdt: pointer to data which might be a flattened device tree
171 *
172 * fdt_check_header() checks that the given buffer contains what
173 * appears to be a flattened device tree with sane information in its
174 * header.
175 *
176 * returns:
177 * 0, if the buffer appears to contain a valid device tree
178 * -FDT_ERR_BADMAGIC,
179 * -FDT_ERR_BADVERSION,
180 * -FDT_ERR_BADSTATE, standard meanings, as above
181 */
182int fdt_check_header(const void *fdt);
183
184/**
185 * fdt_move - move a device tree around in memory
186 * @fdt: pointer to the device tree to move
187 * @buf: pointer to memory where the device is to be moved
188 * @bufsize: size of the memory space at buf
189 *
190 * fdt_move() relocates, if possible, the device tree blob located at
191 * fdt to the buffer at buf of size bufsize. The buffer may overlap
192 * with the existing device tree blob at fdt. Therefore,
193 * fdt_move(fdt, fdt, fdt_totalsize(fdt))
194 * should always succeed.
195 *
196 * returns:
197 * 0, on success
198 * -FDT_ERR_NOSPACE, bufsize is insufficient to contain the device tree
199 * -FDT_ERR_BADMAGIC,
200 * -FDT_ERR_BADVERSION,
201 * -FDT_ERR_BADSTATE, standard meanings
202 */
203int fdt_move(const void *fdt, void *buf, int bufsize);
204
205/**********************************************************************/
206/* Read-only functions */
207/**********************************************************************/
208
209/**
210 * fdt_string - retreive a string from the strings block of a device tree
211 * @fdt: pointer to the device tree blob
212 * @stroffset: offset of the string within the strings block (native endian)
213 *
214 * fdt_string() retrieves a pointer to a single string from the
215 * strings block of the device tree blob at fdt.
216 *
217 * returns:
218 * a pointer to the string, on success
219 * NULL, if stroffset is out of bounds
220 */
221const char *fdt_string(const void *fdt, int stroffset);
222
223/**
224 * fdt_num_mem_rsv - retreive the number of memory reserve map entries
225 * @fdt: pointer to the device tree blob
226 *
227 * Returns the number of entries in the device tree blob's memory
228 * reservation map. This does not include the terminating 0,0 entry
229 * or any other (0,0) entries reserved for expansion.
230 *
231 * returns:
232 * the number of entries
233 */
234int fdt_num_mem_rsv(const void *fdt);
235
236/**
237 * fdt_get_mem_rsv - retreive one memory reserve map entry
238 * @fdt: pointer to the device tree blob
239 * @address, @size: pointers to 64-bit variables
240 *
241 * On success, *address and *size will contain the address and size of
242 * the n-th reserve map entry from the device tree blob, in
243 * native-endian format.
244 *
245 * returns:
246 * 0, on success
247 * -FDT_ERR_BADMAGIC,
248 * -FDT_ERR_BADVERSION,
249 * -FDT_ERR_BADSTATE, standard meanings
250 */
251int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size);
252
253/**
254 * fdt_subnode_offset_namelen - find a subnode based on substring
255 * @fdt: pointer to the device tree blob
256 * @parentoffset: structure block offset of a node
257 * @name: name of the subnode to locate
258 * @namelen: number of characters of name to consider
259 *
260 * Identical to fdt_subnode_offset(), but only examine the first
261 * namelen characters of name for matching the subnode name. This is
262 * useful for finding subnodes based on a portion of a larger string,
263 * such as a full path.
264 */
265int fdt_subnode_offset_namelen(const void *fdt, int parentoffset,
266 const char *name, int namelen);
267/**
268 * fdt_subnode_offset - find a subnode of a given node
269 * @fdt: pointer to the device tree blob
270 * @parentoffset: structure block offset of a node
271 * @name: name of the subnode to locate
272 *
273 * fdt_subnode_offset() finds a subnode of the node at structure block
274 * offset parentoffset with the given name. name may include a unit
275 * address, in which case fdt_subnode_offset() will find the subnode
276 * with that unit address, or the unit address may be omitted, in
277 * which case fdt_subnode_offset() will find an arbitrary subnode
278 * whose name excluding unit address matches the given name.
279 *
280 * returns:
281 * structure block offset of the requested subnode (>=0), on success
282 * -FDT_ERR_NOTFOUND, if the requested subnode does not exist
283 * -FDT_ERR_BADOFFSET, if parentoffset did not point to an FDT_BEGIN_NODE tag
284 * -FDT_ERR_BADMAGIC,
285 * -FDT_ERR_BADVERSION,
286 * -FDT_ERR_BADSTATE,
287 * -FDT_ERR_BADSTRUCTURE,
288 * -FDT_ERR_TRUNCATED, standard meanings.
289 */
290int fdt_subnode_offset(const void *fdt, int parentoffset, const char *name);
291
292/**
293 * fdt_path_offset - find a tree node by its full path
294 * @fdt: pointer to the device tree blob
295 * @path: full path of the node to locate
296 *
297 * fdt_path_offset() finds a node of a given path in the device tree.
298 * Each path component may omit the unit address portion, but the
299 * results of this are undefined if any such path component is
300 * ambiguous (that is if there are multiple nodes at the relevant
301 * level matching the given component, differentiated only by unit
302 * address).
303 *
304 * returns:
305 * structure block offset of the node with the requested path (>=0), on success
306 * -FDT_ERR_BADPATH, given path does not begin with '/' or is invalid
307 * -FDT_ERR_NOTFOUND, if the requested node does not exist
308 * -FDT_ERR_BADMAGIC,
309 * -FDT_ERR_BADVERSION,
310 * -FDT_ERR_BADSTATE,
311 * -FDT_ERR_BADSTRUCTURE,
312 * -FDT_ERR_TRUNCATED, standard meanings.
313 */
314int fdt_path_offset(const void *fdt, const char *path);
315
316/**
317 * fdt_get_name - retreive the name of a given node
318 * @fdt: pointer to the device tree blob
319 * @nodeoffset: structure block offset of the starting node
320 * @lenp: pointer to an integer variable (will be overwritten) or NULL
321 *
322 * fdt_get_name() retrieves the name (including unit address) of the
323 * device tree node at structure block offset nodeoffset. If lenp is
324 * non-NULL, the length of this name is also returned, in the integer
325 * pointed to by lenp.
326 *
327 * returns:
328 * pointer to the node's name, on success
329 * If lenp is non-NULL, *lenp contains the length of that name (>=0)
330 * NULL, on error
331 * if lenp is non-NULL *lenp contains an error code (<0):
332 * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
333 * -FDT_ERR_BADMAGIC,
334 * -FDT_ERR_BADVERSION,
335 * -FDT_ERR_BADSTATE, standard meanings
336 */
337const char *fdt_get_name(const void *fdt, int nodeoffset, int *lenp);
338
339/**
340 * fdt_get_property - find a given property in a given node
341 * @fdt: pointer to the device tree blob
342 * @nodeoffset: offset of the node whose property to find
343 * @name: name of the property to find
344 * @lenp: pointer to an integer variable (will be overwritten) or NULL
345 *
346 * fdt_get_property() retrieves a pointer to the fdt_property
347 * structure within the device tree blob corresponding to the property
348 * named 'name' of the node at offset nodeoffset. If lenp is
349 * non-NULL, the length of the property value also returned, in the
350 * integer pointed to by lenp.
351 *
352 * returns:
353 * pointer to the structure representing the property
354 * if lenp is non-NULL, *lenp contains the length of the property
355 * value (>=0)
356 * NULL, on error
357 * if lenp is non-NULL, *lenp contains an error code (<0):
358 * -FDT_ERR_NOTFOUND, node does not have named property
359 * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
360 * -FDT_ERR_BADMAGIC,
361 * -FDT_ERR_BADVERSION,
362 * -FDT_ERR_BADSTATE,
363 * -FDT_ERR_BADSTRUCTURE,
364 * -FDT_ERR_TRUNCATED, standard meanings
365 */
366const struct fdt_property *fdt_get_property(const void *fdt, int nodeoffset,
367 const char *name, int *lenp);
368static inline struct fdt_property *fdt_get_property_w(void *fdt, int nodeoffset,
369 const char *name,
370 int *lenp)
371{
372 return (struct fdt_property *)fdt_get_property(fdt, nodeoffset,
373 name, lenp);
374}
375
376/**
377 * fdt_getprop - retrieve the value of a given property
378 * @fdt: pointer to the device tree blob
379 * @nodeoffset: offset of the node whose property to find
380 * @name: name of the property to find
381 * @lenp: pointer to an integer variable (will be overwritten) or NULL
382 *
383 * fdt_getprop() retrieves a pointer to the value of the property
384 * named 'name' of the node at offset nodeoffset (this will be a
385 * pointer to within the device blob itself, not a copy of the value).
386 * If lenp is non-NULL, the length of the property value also
387 * returned, in the integer pointed to by lenp.
388 *
389 * returns:
390 * pointer to the property's value
391 * if lenp is non-NULL, *lenp contains the length of the property
392 * value (>=0)
393 * NULL, on error
394 * if lenp is non-NULL, *lenp contains an error code (<0):
395 * -FDT_ERR_NOTFOUND, node does not have named property
396 * -FDT_ERR_BADOFFSET, nodeoffset did not point to FDT_BEGIN_NODE tag
397 * -FDT_ERR_BADMAGIC,
398 * -FDT_ERR_BADVERSION,
399 * -FDT_ERR_BADSTATE,
400 * -FDT_ERR_BADSTRUCTURE,
401 * -FDT_ERR_TRUNCATED, standard meanings
402 */
403const void *fdt_getprop(const void *fdt, int nodeoffset,
404 const char *name, int *lenp);
405static inline void *fdt_getprop_w(void *fdt, int nodeoffset,
406 const char *name, int *lenp)
407{
408 return (void *)fdt_getprop(fdt, nodeoffset, name, lenp);
409}
410
411/**
412 * fdt_get_phandle - retreive the phandle of a given node
413 * @fdt: pointer to the device tree blob
414 * @nodeoffset: structure block offset of the node
415 *
416 * fdt_get_phandle() retrieves the phandle of the device tree node at
417 * structure block offset nodeoffset.
418 *
419 * returns:
420 * the phandle of the node at nodeoffset, on succes (!= 0, != -1)
421 * 0, if the node has no phandle, or another error occurs
422 */
423uint32_t fdt_get_phandle(const void *fdt, int nodeoffset);
424
425/**
426 * fdt_get_path - determine the full path of a node
427 * @fdt: pointer to the device tree blob
428 * @nodeoffset: offset of the node whose path to find
429 * @buf: character buffer to contain the returned path (will be overwritten)
430 * @buflen: size of the character buffer at buf
431 *
432 * fdt_get_path() computes the full path of the node at offset
433 * nodeoffset, and records that path in the buffer at buf.
434 *
435 * NOTE: This function is expensive, as it must scan the device tree
436 * structure from the start to nodeoffset.
437 *
438 * returns:
439 * 0, on success
440 * buf contains the absolute path of the node at
441 * nodeoffset, as a NUL-terminated string.
442 * -FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
443 * -FDT_ERR_NOSPACE, the path of the given node is longer than (bufsize-1)
444 * characters and will not fit in the given buffer.
445 * -FDT_ERR_BADMAGIC,
446 * -FDT_ERR_BADVERSION,
447 * -FDT_ERR_BADSTATE,
448 * -FDT_ERR_BADSTRUCTURE, standard meanings
449 */
450int fdt_get_path(const void *fdt, int nodeoffset, char *buf, int buflen);
451
452/**
453 * fdt_supernode_atdepth_offset - find a specific ancestor of a node
454 * @fdt: pointer to the device tree blob
455 * @nodeoffset: offset of the node whose parent to find
456 * @supernodedepth: depth of the ancestor to find
457 * @nodedepth: pointer to an integer variable (will be overwritten) or NULL
458 *
459 * fdt_supernode_atdepth_offset() finds an ancestor of the given node
460 * at a specific depth from the root (where the root itself has depth
461 * 0, its immediate subnodes depth 1 and so forth). So
462 * fdt_supernode_atdepth_offset(fdt, nodeoffset, 0, NULL);
463 * will always return 0, the offset of the root node. If the node at
464 * nodeoffset has depth D, then:
465 * fdt_supernode_atdepth_offset(fdt, nodeoffset, D, NULL);
466 * will return nodeoffset itself.
467 *
468 * NOTE: This function is expensive, as it must scan the device tree
469 * structure from the start to nodeoffset.
470 *
471 * returns:
472
473 * structure block offset of the node at node offset's ancestor
474 * of depth supernodedepth (>=0), on success
475 * -FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
476* -FDT_ERR_NOTFOUND, supernodedepth was greater than the depth of nodeoffset
477 * -FDT_ERR_BADMAGIC,
478 * -FDT_ERR_BADVERSION,
479 * -FDT_ERR_BADSTATE,
480 * -FDT_ERR_BADSTRUCTURE, standard meanings
481 */
482int fdt_supernode_atdepth_offset(const void *fdt, int nodeoffset,
483 int supernodedepth, int *nodedepth);
484
485/**
486 * fdt_node_depth - find the depth of a given node
487 * @fdt: pointer to the device tree blob
488 * @nodeoffset: offset of the node whose parent to find
489 *
490 * fdt_node_depth() finds the depth of a given node. The root node
491 * has depth 0, its immediate subnodes depth 1 and so forth.
492 *
493 * NOTE: This function is expensive, as it must scan the device tree
494 * structure from the start to nodeoffset.
495 *
496 * returns:
497 * depth of the node at nodeoffset (>=0), on success
498 * -FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
499 * -FDT_ERR_BADMAGIC,
500 * -FDT_ERR_BADVERSION,
501 * -FDT_ERR_BADSTATE,
502 * -FDT_ERR_BADSTRUCTURE, standard meanings
503 */
504int fdt_node_depth(const void *fdt, int nodeoffset);
505
506/**
507 * fdt_parent_offset - find the parent of a given node
508 * @fdt: pointer to the device tree blob
509 * @nodeoffset: offset of the node whose parent to find
510 *
511 * fdt_parent_offset() locates the parent node of a given node (that
512 * is, it finds the offset of the node which contains the node at
513 * nodeoffset as a subnode).
514 *
515 * NOTE: This function is expensive, as it must scan the device tree
516 * structure from the start to nodeoffset, *twice*.
517 *
518 * returns:
519 * stucture block offset of the parent of the node at nodeoffset
520 * (>=0), on success
521 * -FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
522 * -FDT_ERR_BADMAGIC,
523 * -FDT_ERR_BADVERSION,
524 * -FDT_ERR_BADSTATE,
525 * -FDT_ERR_BADSTRUCTURE, standard meanings
526 */
527int fdt_parent_offset(const void *fdt, int nodeoffset);
528
529/**
530 * fdt_node_offset_by_prop_value - find nodes with a given property value
531 * @fdt: pointer to the device tree blob
532 * @startoffset: only find nodes after this offset
533 * @propname: property name to check
534 * @propval: property value to search for
535 * @proplen: length of the value in propval
536 *
537 * fdt_node_offset_by_prop_value() returns the offset of the first
538 * node after startoffset, which has a property named propname whose
539 * value is of length proplen and has value equal to propval; or if
540 * startoffset is -1, the very first such node in the tree.
541 *
542 * To iterate through all nodes matching the criterion, the following
543 * idiom can be used:
544 * offset = fdt_node_offset_by_prop_value(fdt, -1, propname,
545 * propval, proplen);
546 * while (offset != -FDT_ERR_NOTFOUND) {
547 * // other code here
548 * offset = fdt_node_offset_by_prop_value(fdt, offset, propname,
549 * propval, proplen);
550 * }
551 *
552 * Note the -1 in the first call to the function, if 0 is used here
553 * instead, the function will never locate the root node, even if it
554 * matches the criterion.
555 *
556 * returns:
557 * structure block offset of the located node (>= 0, >startoffset),
558 * on success
559 * -FDT_ERR_NOTFOUND, no node matching the criterion exists in the
560 * tree after startoffset
561 * -FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
562 * -FDT_ERR_BADMAGIC,
563 * -FDT_ERR_BADVERSION,
564 * -FDT_ERR_BADSTATE,
565 * -FDT_ERR_BADSTRUCTURE, standard meanings
566 */
567int fdt_node_offset_by_prop_value(const void *fdt, int startoffset,
568 const char *propname,
569 const void *propval, int proplen);
570
571/**
572 * fdt_node_offset_by_phandle - find the node with a given phandle
573 * @fdt: pointer to the device tree blob
574 * @phandle: phandle value
575 *
576 * fdt_node_offset_by_prop_value() returns the offset of the node
577 * which has the given phandle value. If there is more than one node
578 * in the tree with the given phandle (an invalid tree), results are
579 * undefined.
580 *
581 * returns:
582 * structure block offset of the located node (>= 0), on success
583 * -FDT_ERR_NOTFOUND, no node with that phandle exists
584 * -FDT_ERR_BADPHANDLE, given phandle value was invalid (0 or -1)
585 * -FDT_ERR_BADMAGIC,
586 * -FDT_ERR_BADVERSION,
587 * -FDT_ERR_BADSTATE,
588 * -FDT_ERR_BADSTRUCTURE, standard meanings
589 */
590int fdt_node_offset_by_phandle(const void *fdt, uint32_t phandle);
591
592/**
593 * fdt_node_check_compatible: check a node's compatible property
594 * @fdt: pointer to the device tree blob
595 * @nodeoffset: offset of a tree node
596 * @compatible: string to match against
597 *
598 *
599 * fdt_node_check_compatible() returns 0 if the given node contains a
600 * 'compatible' property with the given string as one of its elements,
601 * it returns non-zero otherwise, or on error.
602 *
603 * returns:
604 * 0, if the node has a 'compatible' property listing the given string
605 * 1, if the node has a 'compatible' property, but it does not list
606 * the given string
607 * -FDT_ERR_NOTFOUND, if the given node has no 'compatible' property
608 * -FDT_ERR_BADOFFSET, if nodeoffset does not refer to a BEGIN_NODE tag
609 * -FDT_ERR_BADMAGIC,
610 * -FDT_ERR_BADVERSION,
611 * -FDT_ERR_BADSTATE,
612 * -FDT_ERR_BADSTRUCTURE, standard meanings
613 */
614int fdt_node_check_compatible(const void *fdt, int nodeoffset,
615 const char *compatible);
616
617/**
618 * fdt_node_offset_by_compatible - find nodes with a given 'compatible' value
619 * @fdt: pointer to the device tree blob
620 * @startoffset: only find nodes after this offset
621 * @compatible: 'compatible' string to match against
622 *
623 * fdt_node_offset_by_compatible() returns the offset of the first
624 * node after startoffset, which has a 'compatible' property which
625 * lists the given compatible string; or if startoffset is -1, the
626 * very first such node in the tree.
627 *
628 * To iterate through all nodes matching the criterion, the following
629 * idiom can be used:
630 * offset = fdt_node_offset_by_compatible(fdt, -1, compatible);
631 * while (offset != -FDT_ERR_NOTFOUND) {
632 * // other code here
633 * offset = fdt_node_offset_by_compatible(fdt, offset, compatible);
634 * }
635 *
636 * Note the -1 in the first call to the function, if 0 is used here
637 * instead, the function will never locate the root node, even if it
638 * matches the criterion.
639 *
640 * returns:
641 * structure block offset of the located node (>= 0, >startoffset),
642 * on success
643 * -FDT_ERR_NOTFOUND, no node matching the criterion exists in the
644 * tree after startoffset
645 * -FDT_ERR_BADOFFSET, nodeoffset does not refer to a BEGIN_NODE tag
646 * -FDT_ERR_BADMAGIC,
647 * -FDT_ERR_BADVERSION,
648 * -FDT_ERR_BADSTATE,
649 * -FDT_ERR_BADSTRUCTURE, standard meanings
650 */
651int fdt_node_offset_by_compatible(const void *fdt, int startoffset,
652 const char *compatible);
653
654/**********************************************************************/
655/* Write-in-place functions */
656/**********************************************************************/
657
658int fdt_setprop_inplace(void *fdt, int nodeoffset, const char *name,
659 const void *val, int len);
660static inline int fdt_setprop_inplace_cell(void *fdt, int nodeoffset,
661 const char *name, uint32_t val)
662{
663 val = cpu_to_fdt32(val);
664 return fdt_setprop_inplace(fdt, nodeoffset, name, &val, sizeof(val));
665}
666
667int fdt_nop_property(void *fdt, int nodeoffset, const char *name);
668int fdt_nop_node(void *fdt, int nodeoffset);
669
670/**********************************************************************/
671/* Sequential write functions */
672/**********************************************************************/
673
674int fdt_create(void *buf, int bufsize);
675int fdt_add_reservemap_entry(void *fdt, uint64_t addr, uint64_t size);
676int fdt_finish_reservemap(void *fdt);
677int fdt_begin_node(void *fdt, const char *name);
678int fdt_property(void *fdt, const char *name, const void *val, int len);
679static inline int fdt_property_cell(void *fdt, const char *name, uint32_t val)
680{
681 val = cpu_to_fdt32(val);
682 return fdt_property(fdt, name, &val, sizeof(val));
683}
684#define fdt_property_string(fdt, name, str) \
685 fdt_property(fdt, name, str, strlen(str)+1)
686int fdt_end_node(void *fdt);
687int fdt_finish(void *fdt);
688
689/**********************************************************************/
690/* Read-write functions */
691/**********************************************************************/
692
693int fdt_open_into(const void *fdt, void *buf, int bufsize);
694int fdt_pack(void *fdt);
695
696int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size);
697int fdt_del_mem_rsv(void *fdt, int n);
698
699int fdt_setprop(void *fdt, int nodeoffset, const char *name,
700 const void *val, int len);
701static inline int fdt_setprop_cell(void *fdt, int nodeoffset, const char *name,
702 uint32_t val)
703{
704 val = cpu_to_fdt32(val);
705 return fdt_setprop(fdt, nodeoffset, name, &val, sizeof(val));
706}
707#define fdt_setprop_string(fdt, nodeoffset, name, str) \
708 fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
709int fdt_delprop(void *fdt, int nodeoffset, const char *name);
710int fdt_add_subnode_namelen(void *fdt, int parentoffset,
711 const char *name, int namelen);
712int fdt_add_subnode(void *fdt, int parentoffset, const char *name);
713int fdt_del_node(void *fdt, int nodeoffset);
714
715/**********************************************************************/
716/* Debugging / informational functions */
717/**********************************************************************/
718
719const char *fdt_strerror(int errval);
720
721#endif /* _LIBFDT_H */
diff --git a/arch/powerpc/boot/libfdt/libfdt_internal.h b/arch/powerpc/boot/libfdt/libfdt_internal.h
new file mode 100644
index 000000000000..1e60936beb5b
--- /dev/null
+++ b/arch/powerpc/boot/libfdt/libfdt_internal.h
@@ -0,0 +1,89 @@
1#ifndef _LIBFDT_INTERNAL_H
2#define _LIBFDT_INTERNAL_H
3/*
4 * libfdt - Flat Device Tree manipulation
5 * Copyright (C) 2006 David Gibson, IBM Corporation.
6 *
7 * libfdt is dual licensed: you can use it either under the terms of
8 * the GPL, or the BSD license, at your option.
9 *
10 * a) This library is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of the
13 * License, or (at your option) any later version.
14 *
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public
21 * License along with this library; if not, write to the Free
22 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
23 * MA 02110-1301 USA
24 *
25 * Alternatively,
26 *
27 * b) Redistribution and use in source and binary forms, with or
28 * without modification, are permitted provided that the following
29 * conditions are met:
30 *
31 * 1. Redistributions of source code must retain the above
32 * copyright notice, this list of conditions and the following
33 * disclaimer.
34 * 2. Redistributions in binary form must reproduce the above
35 * copyright notice, this list of conditions and the following
36 * disclaimer in the documentation and/or other materials
37 * provided with the distribution.
38 *
39 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
40 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
41 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
42 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
43 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
44 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
45 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
46 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
47 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
48 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
49 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
50 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
51 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
52 */
53#include <fdt.h>
54
55#define ALIGN(x, a) (((x) + (a) - 1) & ~((a) - 1))
56#define PALIGN(p, a) ((void *)ALIGN((unsigned long)(p), (a)))
57
58#define memeq(p, q, n) (memcmp((p), (q), (n)) == 0)
59#define streq(p, q) (strcmp((p), (q)) == 0)
60
61uint32_t _fdt_next_tag(const void *fdt, int startoffset, int *nextoffset);
62const char *_fdt_find_string(const char *strtab, int tabsize, const char *s);
63int _fdt_node_end_offset(void *fdt, int nodeoffset);
64
65static inline const void *_fdt_offset_ptr(const void *fdt, int offset)
66{
67 return fdt + fdt_off_dt_struct(fdt) + offset;
68}
69
70static inline void *_fdt_offset_ptr_w(void *fdt, int offset)
71{
72 return (void *)_fdt_offset_ptr(fdt, offset);
73}
74
75static inline const struct fdt_reserve_entry *_fdt_mem_rsv(const void *fdt, int n)
76{
77 const struct fdt_reserve_entry *rsv_table =
78 fdt + fdt_off_mem_rsvmap(fdt);
79
80 return rsv_table + n;
81}
82static inline struct fdt_reserve_entry *_fdt_mem_rsv_w(void *fdt, int n)
83{
84 return (void *)_fdt_mem_rsv(fdt, n);
85}
86
87#define SW_MAGIC (~FDT_MAGIC)
88
89#endif /* _LIBFDT_INTERNAL_H */
diff --git a/arch/powerpc/boot/libfdt_env.h b/arch/powerpc/boot/libfdt_env.h
new file mode 100644
index 000000000000..a4b0fc959ece
--- /dev/null
+++ b/arch/powerpc/boot/libfdt_env.h
@@ -0,0 +1,17 @@
1#ifndef _ARCH_POWERPC_BOOT_LIBFDT_ENV_H
2#define _ARCH_POWERPC_BOOT_LIBFDT_ENV_H
3
4#include <types.h>
5#include <string.h>
6
7typedef u32 uint32_t;
8typedef u64 uint64_t;
9
10#define fdt16_to_cpu(x) (x)
11#define cpu_to_fdt16(x) (x)
12#define fdt32_to_cpu(x) (x)
13#define cpu_to_fdt32(x) (x)
14#define fdt64_to_cpu(x) (x)
15#define cpu_to_fdt64(x) (x)
16
17#endif /* _ARCH_POWERPC_BOOT_LIBFDT_ENV_H */
diff --git a/arch/powerpc/boot/main.c b/arch/powerpc/boot/main.c
index 1b496b37eca0..9e7f3ddd9913 100644
--- a/arch/powerpc/boot/main.c
+++ b/arch/powerpc/boot/main.c
@@ -16,7 +16,6 @@
16#include "stdio.h" 16#include "stdio.h"
17#include "ops.h" 17#include "ops.h"
18#include "gunzip_util.h" 18#include "gunzip_util.h"
19#include "flatdevtree.h"
20#include "reg.h" 19#include "reg.h"
21 20
22static struct gunzip_state gzstate; 21static struct gunzip_state gzstate;
diff --git a/arch/powerpc/boot/ops.h b/arch/powerpc/boot/ops.h
index a180b6505f47..4b0544b03c64 100644
--- a/arch/powerpc/boot/ops.h
+++ b/arch/powerpc/boot/ops.h
@@ -46,6 +46,8 @@ struct dt_ops {
46 void *(*find_node_by_prop_value)(const void *prev, 46 void *(*find_node_by_prop_value)(const void *prev,
47 const char *propname, 47 const char *propname,
48 const char *propval, int proplen); 48 const char *propval, int proplen);
49 void *(*find_node_by_compatible)(const void *prev,
50 const char *compat);
49 unsigned long (*finalize)(void); 51 unsigned long (*finalize)(void);
50 char *(*get_path)(const void *phandle, char *buf, int len); 52 char *(*get_path)(const void *phandle, char *buf, int len);
51}; 53};
@@ -79,7 +81,7 @@ struct loader_info {
79extern struct loader_info loader_info; 81extern struct loader_info loader_info;
80 82
81void start(void); 83void start(void);
82int ft_init(void *dt_blob, unsigned int max_size, unsigned int max_find_device); 84void fdt_init(void *blob);
83int serial_console_init(void); 85int serial_console_init(void);
84int ns16550_console_init(void *devp, struct serial_console_data *scdp); 86int ns16550_console_init(void *devp, struct serial_console_data *scdp);
85int mpsc_console_init(void *devp, struct serial_console_data *scdp); 87int mpsc_console_init(void *devp, struct serial_console_data *scdp);
@@ -159,9 +161,32 @@ static inline void *find_node_by_devtype(const void *prev,
159 return find_node_by_prop_value_str(prev, "device_type", type); 161 return find_node_by_prop_value_str(prev, "device_type", type);
160} 162}
161 163
164static inline void *find_node_by_alias(const char *alias)
165{
166 void *devp = finddevice("/aliases");
167
168 if (devp) {
169 char path[MAX_PATH_LEN];
170 if (getprop(devp, alias, path, MAX_PATH_LEN) > 0)
171 return finddevice(path);
172 }
173
174 return NULL;
175}
176
177static inline void *find_node_by_compatible(const void *prev,
178 const char *compat)
179{
180 if (dt_ops.find_node_by_compatible)
181 return dt_ops.find_node_by_compatible(prev, compat);
182
183 return NULL;
184}
185
162void dt_fixup_memory(u64 start, u64 size); 186void dt_fixup_memory(u64 start, u64 size);
163void dt_fixup_cpu_clocks(u32 cpufreq, u32 tbfreq, u32 busfreq); 187void dt_fixup_cpu_clocks(u32 cpufreq, u32 tbfreq, u32 busfreq);
164void dt_fixup_clock(const char *path, u32 freq); 188void dt_fixup_clock(const char *path, u32 freq);
189void dt_fixup_mac_address_by_alias(const char *alias, const u8 *addr);
165void dt_fixup_mac_address(u32 index, const u8 *addr); 190void dt_fixup_mac_address(u32 index, const u8 *addr);
166void __dt_fixup_mac_addresses(u32 startindex, ...); 191void __dt_fixup_mac_addresses(u32 startindex, ...);
167#define dt_fixup_mac_addresses(...) \ 192#define dt_fixup_mac_addresses(...) \
diff --git a/arch/powerpc/boot/prpmc2800.c b/arch/powerpc/boot/prpmc2800.c
index 9614e1db9dae..05c3245b30d7 100644
--- a/arch/powerpc/boot/prpmc2800.c
+++ b/arch/powerpc/boot/prpmc2800.c
@@ -547,8 +547,7 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
547 if (!dtb) 547 if (!dtb)
548 exit(); 548 exit();
549 memmove(dtb, _dtb_start, dt_size); 549 memmove(dtb, _dtb_start, dt_size);
550 if (ft_init(dtb, dt_size, 16)) 550 fdt_init(dtb);
551 exit();
552 551
553 bridge_base = mv64x60_get_bridge_base(); 552 bridge_base = mv64x60_get_bridge_base();
554 553
diff --git a/arch/powerpc/boot/ps3.c b/arch/powerpc/boot/ps3.c
index d6661151b494..3b0ac4d006ec 100644
--- a/arch/powerpc/boot/ps3.c
+++ b/arch/powerpc/boot/ps3.c
@@ -131,7 +131,7 @@ void platform_init(void)
131 printf("\n-- PS3 bootwrapper --\n"); 131 printf("\n-- PS3 bootwrapper --\n");
132 132
133 simple_alloc_init(_end, heapsize, 32, 64); 133 simple_alloc_init(_end, heapsize, 32, 64);
134 ft_init(_dtb_start, 0, 4); 134 fdt_init(_dtb_start);
135 135
136 chosen = finddevice("/chosen"); 136 chosen = finddevice("/chosen");
137 137
diff --git a/arch/powerpc/boot/redboot-8xx.c b/arch/powerpc/boot/redboot-8xx.c
new file mode 100644
index 000000000000..f7945adc8004
--- /dev/null
+++ b/arch/powerpc/boot/redboot-8xx.c
@@ -0,0 +1,58 @@
1/*
2 * RedBoot firmware support
3 *
4 * Author: Scott Wood <scottwood@freescale.com>
5 *
6 * Copyright (c) 2007 Freescale Semiconductor, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13#include "ops.h"
14#include "stdio.h"
15#include "redboot.h"
16#include "fsl-soc.h"
17#include "io.h"
18
19static bd_t bd;
20BSS_STACK(4096);
21
22#define MHZ(x) ((x + 500000) / 1000000)
23
24static void platform_fixups(void)
25{
26 void *node;
27
28 dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
29 dt_fixup_mac_addresses(bd.bi_enetaddr);
30 dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 16, bd.bi_busfreq);
31
32 node = finddevice("/soc/cpm/brg");
33 if (node) {
34 printf("BRG clock-frequency <- 0x%x (%dMHz)\r\n",
35 bd.bi_busfreq, MHZ(bd.bi_busfreq));
36 setprop(node, "clock-frequency", &bd.bi_busfreq, 4);
37 }
38}
39
40void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
41 unsigned long r6, unsigned long r7)
42{
43 memcpy(&bd, (char *)r3, sizeof(bd));
44
45 if (bd.bi_tag != 0x42444944)
46 return;
47
48 simple_alloc_init(_end,
49 bd.bi_memstart + bd.bi_memsize - (unsigned long)_end,
50 32, 64);
51
52 fdt_init(_dtb_start);
53 serial_console_init();
54 platform_ops.fixups = platform_fixups;
55
56 loader_info.cmdline = (char *)bd.bi_cmdline;
57 loader_info.cmdline_len = strlen((char *)bd.bi_cmdline);
58}
diff --git a/arch/powerpc/boot/redboot.h b/arch/powerpc/boot/redboot.h
new file mode 100644
index 000000000000..ace0b7fed8eb
--- /dev/null
+++ b/arch/powerpc/boot/redboot.h
@@ -0,0 +1,56 @@
1#ifndef _PPC_REDBOOT_H
2#define _PPC_REDBOOT_H
3
4//=========================================================================
5// include/asm-ppc/redboot.h
6// Copyright (c) 2002, 2003 Gary Thomas (<gary@mlbassoc.com>
7// Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
8
9//
10// Board specific details, as provided by RedBoot
11//
12
13/* A Board Information structure that is given to a program when
14 * RedBoot starts it up. Note: not all fields make sense for all
15 * architectures and it's up to the platform specific code to fill
16 * in the details.
17 */
18typedef struct bd_info {
19 unsigned int bi_tag; /* Should be 0x42444944 "BDID" */
20 unsigned int bi_size; /* Size of this structure */
21 unsigned int bi_revision; /* revision of this structure */
22 unsigned int bi_bdate; /* bootstrap date, i.e. 0x19971106 */
23 unsigned int bi_memstart; /* Memory start address */
24 unsigned int bi_memsize; /* Memory (end) size in bytes */
25 unsigned int bi_intfreq; /* Internal Freq, in Hz */
26 unsigned int bi_busfreq; /* Bus Freq, in Hz */
27 unsigned int bi_cpmfreq; /* CPM Freq, in Hz */
28 unsigned int bi_brgfreq; /* BRG Freq, in Hz */
29 unsigned int bi_vco; /* VCO Out from PLL */
30 unsigned int bi_pci_freq; /* PCI Freq, in Hz */
31 unsigned int bi_baudrate; /* Default console baud rate */
32 unsigned int bi_immr; /* IMMR when called from boot rom */
33 unsigned char bi_enetaddr[6];
34 unsigned int bi_flashbase; /* Physical address of FLASH memory */
35 unsigned int bi_flashsize; /* Length of FLASH memory */
36 int bi_flashwidth; /* Width (8,16,32,64) */
37 unsigned char *bi_cmdline; /* Pointer to command line */
38 unsigned char bi_esa[3][6]; /* Ethernet station addresses */
39 unsigned int bi_ramdisk_begin, bi_ramdisk_end;
40 struct { /* Information about [main] video screen */
41 short x_res; /* Horizontal resolution in pixels */
42 short y_res; /* Vertical resolution in pixels */
43 short bpp; /* Bits/pixel */
44 short mode; /* Type of pixels (packed, indexed) */
45 unsigned long fb; /* Pointer to frame buffer (pixel) memory */
46 } bi_video;
47 void (*bi_cputc)(char); /* Write a character to the RedBoot console */
48 char (*bi_cgetc)(void); /* Read a character from the RedBoot console */
49 int (*bi_ctstc)(void); /* Test for input on the RedBoot console */
50} bd_t;
51
52#define BI_REV 0x0102 /* Version 1.02 */
53
54#define bi_pci_busfreq bi_pci_freq
55#define bi_immr_base bi_immr
56#endif
diff --git a/arch/powerpc/boot/reg.h b/arch/powerpc/boot/reg.h
index d3cd9ee98afb..9c2c9978e0eb 100644
--- a/arch/powerpc/boot/reg.h
+++ b/arch/powerpc/boot/reg.h
@@ -16,6 +16,14 @@ static inline u32 mfpvr(void)
16 return pvr; 16 return pvr;
17} 17}
18 18
19#define __stringify_1(x) #x
20#define __stringify(x) __stringify_1(x)
21
22#define mfspr(rn) ({unsigned long rval; \
23 asm volatile("mfspr %0," __stringify(rn) \
24 : "=r" (rval)); rval; })
25#define mtspr(rn, v) asm volatile("mtspr " __stringify(rn) ",%0" : : "r" (v))
26
19register void *__stack_pointer asm("r1"); 27register void *__stack_pointer asm("r1");
20#define get_sp() (__stack_pointer) 28#define get_sp() (__stack_pointer)
21 29
diff --git a/arch/powerpc/boot/serial.c b/arch/powerpc/boot/serial.c
index cafeece20ac7..9960421eb6b9 100644
--- a/arch/powerpc/boot/serial.c
+++ b/arch/powerpc/boot/serial.c
@@ -126,9 +126,10 @@ int serial_console_init(void)
126 dt_is_compatible(devp, "fsl,cpm2-scc-uart") || 126 dt_is_compatible(devp, "fsl,cpm2-scc-uart") ||
127 dt_is_compatible(devp, "fsl,cpm2-smc-uart")) 127 dt_is_compatible(devp, "fsl,cpm2-smc-uart"))
128 rc = cpm_console_init(devp, &serial_cd); 128 rc = cpm_console_init(devp, &serial_cd);
129 else if (dt_is_compatible(devp, "mpc5200-psc-uart")) 129 else if (dt_is_compatible(devp, "fsl,mpc5200-psc-uart"))
130 rc = mpc5200_psc_console_init(devp, &serial_cd); 130 rc = mpc5200_psc_console_init(devp, &serial_cd);
131 else if (dt_is_compatible(devp, "xilinx,uartlite")) 131 else if (dt_is_compatible(devp, "xlnx,opb-uartlite-1.00.b") ||
132 dt_is_compatible(devp, "xlnx,xps-uartlite-1.00.a"))
132 rc = uartlite_console_init(devp, &serial_cd); 133 rc = uartlite_console_init(devp, &serial_cd);
133 134
134 /* Add other serial console driver calls here */ 135 /* Add other serial console driver calls here */
diff --git a/arch/powerpc/boot/treeboot-walnut.c b/arch/powerpc/boot/treeboot-walnut.c
index bb2c309d70fc..472e36605a52 100644
--- a/arch/powerpc/boot/treeboot-walnut.c
+++ b/arch/powerpc/boot/treeboot-walnut.c
@@ -20,55 +20,6 @@
20 20
21BSS_STACK(4096); 21BSS_STACK(4096);
22 22
23void ibm405gp_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
24{
25 u32 pllmr = mfdcr(DCRN_CPC0_PLLMR);
26 u32 cpc0_cr0 = mfdcr(DCRN_405_CPC0_CR0);
27 u32 cpc0_cr1 = mfdcr(DCRN_405_CPC0_CR1);
28 u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
29 u32 fwdv, fbdv, cbdv, opdv, epdv, udiv;
30
31 fwdv = (8 - ((pllmr & 0xe0000000) >> 29));
32 fbdv = (pllmr & 0x1e000000) >> 25;
33 cbdv = ((pllmr & 0x00060000) >> 17) + 1;
34 opdv = ((pllmr & 0x00018000) >> 15) + 1;
35 epdv = ((pllmr & 0x00001800) >> 13) + 2;
36 udiv = ((cpc0_cr0 & 0x3e) >> 1) + 1;
37
38 m = fwdv * fbdv * cbdv;
39
40 cpu = sysclk * m / fwdv;
41 plb = cpu / cbdv;
42 opb = plb / opdv;
43 ebc = plb / epdv;
44
45 if (cpc0_cr0 & 0x80) {
46 /* uart0 uses the external clock */
47 uart0 = ser_clk;
48 } else {
49 uart0 = cpu / udiv;
50 }
51
52 if (cpc0_cr0 & 0x40) {
53 /* uart1 uses the external clock */
54 uart1 = ser_clk;
55 } else {
56 uart1 = cpu / udiv;
57 }
58
59 /* setup the timebase clock to tick at the cpu frequency */
60 cpc0_cr1 = cpc0_cr1 & ~0x00800000;
61 mtdcr(DCRN_405_CPC0_CR1, cpc0_cr1);
62 tb = cpu;
63
64 dt_fixup_cpu_clocks(cpu, tb, 0);
65 dt_fixup_clock("/plb", plb);
66 dt_fixup_clock("/plb/opb", opb);
67 dt_fixup_clock("/plb/ebc", ebc);
68 dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
69 dt_fixup_clock("/plb/opb/serial@ef600400", uart1);
70}
71
72static void walnut_flashsel_fixup(void) 23static void walnut_flashsel_fixup(void)
73{ 24{
74 void *devp, *sram; 25 void *devp, *sram;
@@ -112,7 +63,7 @@ static void walnut_flashsel_fixup(void)
112#define WALNUT_OPENBIOS_MAC_OFF 0xfffffe0b 63#define WALNUT_OPENBIOS_MAC_OFF 0xfffffe0b
113static void walnut_fixups(void) 64static void walnut_fixups(void)
114{ 65{
115 ibm4xx_fixup_memsize(); 66 ibm4xx_sdram_fixup_memsize();
116 ibm405gp_fixup_clocks(33330000, 0xa8c000); 67 ibm405gp_fixup_clocks(33330000, 0xa8c000);
117 ibm4xx_quiesce_eth((u32 *)0xef600800, NULL); 68 ibm4xx_quiesce_eth((u32 *)0xef600800, NULL);
118 ibm4xx_fixup_ebc_ranges("/plb/ebc"); 69 ibm4xx_fixup_ebc_ranges("/plb/ebc");
@@ -128,6 +79,6 @@ void platform_init(void)
128 simple_alloc_init(_end, avail_ram, 32, 32); 79 simple_alloc_init(_end, avail_ram, 32, 32);
129 platform_ops.fixups = walnut_fixups; 80 platform_ops.fixups = walnut_fixups;
130 platform_ops.exit = ibm40x_dbcr_reset; 81 platform_ops.exit = ibm40x_dbcr_reset;
131 ft_init(_dtb_start, _dtb_end - _dtb_start, 32); 82 fdt_init(_dtb_start);
132 serial_console_init(); 83 serial_console_init();
133} 84}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 31147a037728..763a0c46f441 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -45,6 +45,7 @@ CROSS=
45 45
46# directory for object and other files used by this script 46# directory for object and other files used by this script
47object=arch/powerpc/boot 47object=arch/powerpc/boot
48objbin=$object
48 49
49# directory for working files 50# directory for working files
50tmpdir=. 51tmpdir=.
@@ -95,6 +96,7 @@ while [ "$#" -gt 0 ]; do
95 shift 96 shift
96 [ "$#" -gt 0 ] || usage 97 [ "$#" -gt 0 ] || usage
97 object="$1" 98 object="$1"
99 objbin="$1"
98 ;; 100 ;;
99 -W) 101 -W)
100 shift 102 shift
@@ -116,10 +118,13 @@ while [ "$#" -gt 0 ]; do
116done 118done
117 119
118if [ -n "$dts" ]; then 120if [ -n "$dts" ]; then
121 if [ ! -r "$dts" -a -r "$object/dts/$dts" ]; then
122 dts="$object/dts/$dts"
123 fi
119 if [ -z "$dtb" ]; then 124 if [ -z "$dtb" ]; then
120 dtb="$platform.dtb" 125 dtb="$platform.dtb"
121 fi 126 fi
122 dtc -O dtb -o "$dtb" -b 0 -V 16 "$dts" 127 $object/dtc -O dtb -o "$dtb" -b 0 "$dts"
123fi 128fi
124 129
125if [ -z "$kernel" ]; then 130if [ -z "$kernel" ]; then
@@ -163,7 +168,7 @@ ps3)
163 ksection=.kernel:vmlinux.bin 168 ksection=.kernel:vmlinux.bin
164 isection=.kernel:initrd 169 isection=.kernel:initrd
165 ;; 170 ;;
166ep88xc) 171ep88xc|ep405|redboot*|ep8248e)
167 platformo="$object/fixed-head.o $object/$platform.o" 172 platformo="$object/fixed-head.o $object/$platform.o"
168 binary=y 173 binary=y
169 ;; 174 ;;
@@ -246,11 +251,11 @@ fi
246# post-processing needed for some platforms 251# post-processing needed for some platforms
247case "$platform" in 252case "$platform" in
248pseries|chrp) 253pseries|chrp)
249 $object/addnote "$ofile" 254 $objbin/addnote "$ofile"
250 ;; 255 ;;
251coff) 256coff)
252 ${CROSS}objcopy -O aixcoff-rs6000 --set-start "$entry" "$ofile" 257 ${CROSS}objcopy -O aixcoff-rs6000 --set-start "$entry" "$ofile"
253 $object/hack-coff "$ofile" 258 $objbin/hack-coff "$ofile"
254 ;; 259 ;;
255cuboot*) 260cuboot*)
256 gzip -f -9 "$ofile" 261 gzip -f -9 "$ofile"
@@ -259,7 +264,7 @@ cuboot*)
259 ;; 264 ;;
260treeboot*) 265treeboot*)
261 mv "$ofile" "$ofile.elf" 266 mv "$ofile" "$ofile.elf"
262 $object/mktree "$ofile.elf" "$ofile" "$base" "$entry" 267 $objbin/mktree "$ofile.elf" "$ofile" "$base" "$entry"
263 if [ -z "$cacheit" ]; then 268 if [ -z "$cacheit" ]; then
264 rm -f "$ofile.elf" 269 rm -f "$ofile.elf"
265 fi 270 fi
@@ -287,8 +292,6 @@ ps3)
287 overlay_dest="256" 292 overlay_dest="256"
288 overlay_size="256" 293 overlay_size="256"
289 294
290 rm -f "$object/otheros.bld"
291
292 ${CROSS}objcopy -O binary "$ofile" "$ofile.bin" 295 ${CROSS}objcopy -O binary "$ofile" "$ofile.bin"
293 296
294 dd if="$ofile.bin" of="$ofile.bin" conv=notrunc \ 297 dd if="$ofile.bin" of="$ofile.bin" conv=notrunc \
@@ -299,6 +302,8 @@ ps3)
299 skip=$system_reset_overlay seek=$overlay_dest \ 302 skip=$system_reset_overlay seek=$overlay_dest \
300 count=$overlay_size bs=1 303 count=$overlay_size bs=1
301 304
302 gzip --force -9 --stdout "$ofile.bin" > "$object/otheros.bld" 305 odir="$(dirname "$ofile.bin")"
306 rm -f "$odir/otheros.bld"
307 gzip --force -9 --stdout "$ofile.bin" > "$odir/otheros.bld"
303 ;; 308 ;;
304esac 309esac