powerpc: Convert some mftb/mftbu into mfspr

Some CPUs (such as e500v1/v2) don't implement mftb and will take a
trap.  mfspr should work on everything that has a timebase, and is the
preferred instruction according to ISA v2.06.

Currently we get away with mftb on 85xx because the assembler converts
it to mfspr due to -Wa,-me500.  However, that flag has other effects
that are undesireable for certain targets (e.g.  lwsync is converted to
sync), and is hostile to multiplatform kernels.  Thus we would like to
stop setting it for all e500-family builds.

mftb/mftbu instances which are in 85xx code or common code are
converted.  Instances which will never run on 85xx are left alone.

Signed-off-by: Scott Wood <scottwood@freescale.com>

1 files changed, 5 insertions, 5 deletions

diff --git a/arch/powerpc/boot/util.S b/arch/powerpc/boot/util.S
index 427ddfc11991..5143228e3e5f 100644
--- a/arch/powerpc/boot/util.S
+++ b/arch/powerpc/boot/util.S
@@ -71,18 +71,18 @@ udelay:
         add     r4,r4,r5
         addi    r4,r4,-1
         divw    r4,r4,r5        /* BUS ticks */
-1:      mftbu   r5
-        mftb    r6
-        mftbu   r7
+1:      mfspr   r5, SPRN_TBRU
+        mfspr   r6, SPRN_TBRL
+        mfspr   r7, SPRN_TBRU
         cmpw    0,r5,r7
         bne     1b              /* Get [synced] base time */
         addc    r9,r6,r4        /* Compute end time */
         addze   r8,r5
-2:      mftbu   r5
+2:      mfspr   r5, SPRN_TBRU
         cmpw    0,r5,r8
         blt     2b
         bgt     3f
-        mftb    r6
+        mfspr   r6, SPRN_TBRL
         cmpw    0,r6,r9
         blt     2b
 3:      blr