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authorKumar Gala <galak@kernel.crashing.org>2007-09-12 12:52:31 -0400
committerKumar Gala <galak@kernel.crashing.org>2007-09-14 09:53:16 -0400
commitf0c8ac8083cbd9347b398bfddcca20f1e2786016 (patch)
tree7fb8b26ef9242dfba1db898a476437ed234f7989 /arch/powerpc/boot/dts/mpc8548cds.dts
parent5d54ddcbcf931bf07cd1ce262bda4674ebd1427f (diff)
[POWERPC] DTS cleanup
Removed the following cruft from .dts files: * 32-bit in cpu node -- doesn't exist in any spec and not used by kernel * removed built-in (chrp legacy) * Removed #interrupt-cells in places they don't need to be set * Fixed ranges on lite5200* * Removed clock-frequency from i8259 pic node, not sure where this came from * Removed big-endian from i8259 pic nodes, this was just bogus Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8548cds.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8548cds.dts5
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index d215d21fff42..11b823595a08 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -30,7 +30,6 @@
30 timebase-frequency = <0>; // 33 MHz, from uboot 30 timebase-frequency = <0>; // 33 MHz, from uboot
31 bus-frequency = <0>; // 166 MHz 31 bus-frequency = <0>; // 166 MHz
32 clock-frequency = <0>; // 825 MHz, from uboot 32 clock-frequency = <0>; // 825 MHz, from uboot
33 32-bit;
34 }; 33 };
35 }; 34 };
36 35
@@ -42,7 +41,6 @@
42 soc8548@e0000000 { 41 soc8548@e0000000 {
43 #address-cells = <1>; 42 #address-cells = <1>;
44 #size-cells = <1>; 43 #size-cells = <1>;
45 #interrupt-cells = <2>;
46 device_type = "soc"; 44 device_type = "soc";
47 ranges = <00001000 e0001000 000ff000 45 ranges = <00001000 e0001000 000ff000
48 80000000 80000000 10000000 46 80000000 80000000 10000000
@@ -318,7 +316,6 @@
318 interrupt-parent = <&i8259>; 316 interrupt-parent = <&i8259>;
319 317
320 i8259: interrupt-controller@20 { 318 i8259: interrupt-controller@20 {
321 clock-frequency = <0>;
322 interrupt-controller; 319 interrupt-controller;
323 device_type = "interrupt-controller"; 320 device_type = "interrupt-controller";
324 reg = <1 20 2 321 reg = <1 20 2
@@ -326,7 +323,6 @@
326 1 4d0 2>; 323 1 4d0 2>;
327 #address-cells = <0>; 324 #address-cells = <0>;
328 #interrupt-cells = <2>; 325 #interrupt-cells = <2>;
329 built-in;
330 compatible = "chrp,iic"; 326 compatible = "chrp,iic";
331 interrupts = <0 1>; 327 interrupts = <0 1>;
332 interrupt-parent = <&mpic>; 328 interrupt-parent = <&mpic>;
@@ -394,7 +390,6 @@
394 #address-cells = <0>; 390 #address-cells = <0>;
395 #interrupt-cells = <2>; 391 #interrupt-cells = <2>;
396 reg = <40000 40000>; 392 reg = <40000 40000>;
397 built-in;
398 compatible = "chrp,open-pic"; 393 compatible = "chrp,open-pic";
399 device_type = "open-pic"; 394 device_type = "open-pic";
400 big-endian; 395 big-endian;