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authorKumar Gala <galak@kernel.crashing.org>2007-02-17 17:04:23 -0500
committerKumar Gala <galak@kernel.crashing.org>2007-02-17 17:06:27 -0500
commit520948796335111cf91970efabca7e5d064db344 (patch)
tree60be45c7b1ab1a56c842acf49802cbbaa4f0686b /arch/powerpc/boot/dts/mpc8548cds.dts
parent975b89399679dcf8587288d46d3f21d4286af167 (diff)
[POWERPC] 85xx: Cleaned up platform dts files
* Fixed up top level compatible property for all boards * Removed explicit linux,phandle usage. Use references and labels now * Fixed phy-phandles for TSEC3/4 in mpc8548cds.dts Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8548cds.dts')
-rw-r--r--arch/powerpc/boot/dts/mpc8548cds.dts129
1 files changed, 58 insertions, 71 deletions
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index 893d7957c174..7eb5d81d5eec 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -12,16 +12,14 @@
12 12
13/ { 13/ {
14 model = "MPC8548CDS"; 14 model = "MPC8548CDS";
15 compatible = "MPC85xxCDS"; 15 compatible = "MPC8548CDS", "MPC85xxCDS";
16 #address-cells = <1>; 16 #address-cells = <1>;
17 #size-cells = <1>; 17 #size-cells = <1>;
18 linux,phandle = <100>;
19 18
20 cpus { 19 cpus {
21 #cpus = <1>; 20 #cpus = <1>;
22 #address-cells = <1>; 21 #address-cells = <1>;
23 #size-cells = <0>; 22 #size-cells = <0>;
24 linux,phandle = <200>;
25 23
26 PowerPC,8548@0 { 24 PowerPC,8548@0 {
27 device_type = "cpu"; 25 device_type = "cpu";
@@ -34,13 +32,11 @@
34 bus-frequency = <0>; // 166 MHz 32 bus-frequency = <0>; // 166 MHz
35 clock-frequency = <0>; // 825 MHz, from uboot 33 clock-frequency = <0>; // 825 MHz, from uboot
36 32-bit; 34 32-bit;
37 linux,phandle = <201>;
38 }; 35 };
39 }; 36 };
40 37
41 memory { 38 memory {
42 device_type = "memory"; 39 device_type = "memory";
43 linux,phandle = <300>;
44 reg = <00000000 08000000>; // 128M at 0x0 40 reg = <00000000 08000000>; // 128M at 0x0
45 }; 41 };
46 42
@@ -58,7 +54,7 @@
58 compatible = "fsl-i2c"; 54 compatible = "fsl-i2c";
59 reg = <3000 100>; 55 reg = <3000 100>;
60 interrupts = <1b 2>; 56 interrupts = <1b 2>;
61 interrupt-parent = <40000>; 57 interrupt-parent = <&mpic>;
62 dfsrr; 58 dfsrr;
63 }; 59 };
64 60
@@ -68,32 +64,26 @@
68 device_type = "mdio"; 64 device_type = "mdio";
69 compatible = "gianfar"; 65 compatible = "gianfar";
70 reg = <24520 20>; 66 reg = <24520 20>;
71 linux,phandle = <24520>; 67 phy0: ethernet-phy@0 {
72 ethernet-phy@0 { 68 interrupt-parent = <&mpic>;
73 linux,phandle = <2452000>;
74 interrupt-parent = <40000>;
75 interrupts = <35 0>; 69 interrupts = <35 0>;
76 reg = <0>; 70 reg = <0>;
77 device_type = "ethernet-phy"; 71 device_type = "ethernet-phy";
78 }; 72 };
79 ethernet-phy@1 { 73 phy1: ethernet-phy@1 {
80 linux,phandle = <2452001>; 74 interrupt-parent = <&mpic>;
81 interrupt-parent = <40000>;
82 interrupts = <35 0>; 75 interrupts = <35 0>;
83 reg = <1>; 76 reg = <1>;
84 device_type = "ethernet-phy"; 77 device_type = "ethernet-phy";
85 }; 78 };
86 79 phy2: ethernet-phy@2 {
87 ethernet-phy@2 { 80 interrupt-parent = <&mpic>;
88 linux,phandle = <2452002>;
89 interrupt-parent = <40000>;
90 interrupts = <35 0>; 81 interrupts = <35 0>;
91 reg = <2>; 82 reg = <2>;
92 device_type = "ethernet-phy"; 83 device_type = "ethernet-phy";
93 }; 84 };
94 ethernet-phy@3 { 85 phy3: ethernet-phy@3 {
95 linux,phandle = <2452003>; 86 interrupt-parent = <&mpic>;
96 interrupt-parent = <40000>;
97 interrupts = <35 0>; 87 interrupts = <35 0>;
98 reg = <3>; 88 reg = <3>;
99 device_type = "ethernet-phy"; 89 device_type = "ethernet-phy";
@@ -109,8 +99,8 @@
109 reg = <24000 1000>; 99 reg = <24000 1000>;
110 local-mac-address = [ 00 E0 0C 00 73 00 ]; 100 local-mac-address = [ 00 E0 0C 00 73 00 ];
111 interrupts = <d 2 e 2 12 2>; 101 interrupts = <d 2 e 2 12 2>;
112 interrupt-parent = <40000>; 102 interrupt-parent = <&mpic>;
113 phy-handle = <2452000>; 103 phy-handle = <&phy0>;
114 }; 104 };
115 105
116 ethernet@25000 { 106 ethernet@25000 {
@@ -122,10 +112,11 @@
122 reg = <25000 1000>; 112 reg = <25000 1000>;
123 local-mac-address = [ 00 E0 0C 00 73 01 ]; 113 local-mac-address = [ 00 E0 0C 00 73 01 ];
124 interrupts = <13 2 14 2 18 2>; 114 interrupts = <13 2 14 2 18 2>;
125 interrupt-parent = <40000>; 115 interrupt-parent = <&mpic>;
126 phy-handle = <2452001>; 116 phy-handle = <&phy1>;
127 }; 117 };
128 118
119/* eTSEC 3/4 are currently broken
129 ethernet@26000 { 120 ethernet@26000 {
130 #address-cells = <1>; 121 #address-cells = <1>;
131 #size-cells = <0>; 122 #size-cells = <0>;
@@ -135,11 +126,10 @@
135 reg = <26000 1000>; 126 reg = <26000 1000>;
136 local-mac-address = [ 00 E0 0C 00 73 02 ]; 127 local-mac-address = [ 00 E0 0C 00 73 02 ];
137 interrupts = <f 2 10 2 11 2>; 128 interrupts = <f 2 10 2 11 2>;
138 interrupt-parent = <40000>; 129 interrupt-parent = <&mpic>;
139 phy-handle = <2452001>; 130 phy-handle = <&phy2>;
140 }; 131 };
141 132
142/* eTSEC 4 is currently broken
143 ethernet@27000 { 133 ethernet@27000 {
144 #address-cells = <1>; 134 #address-cells = <1>;
145 #size-cells = <0>; 135 #size-cells = <0>;
@@ -149,8 +139,8 @@
149 reg = <27000 1000>; 139 reg = <27000 1000>;
150 local-mac-address = [ 00 E0 0C 00 73 03 ]; 140 local-mac-address = [ 00 E0 0C 00 73 03 ];
151 interrupts = <15 2 16 2 17 2>; 141 interrupts = <15 2 16 2 17 2>;
152 interrupt-parent = <40000>; 142 interrupt-parent = <&mpic>;
153 phy-handle = <2452001>; 143 phy-handle = <&phy3>;
154 }; 144 };
155 */ 145 */
156 146
@@ -160,7 +150,7 @@
160 reg = <4500 100>; // reg base, size 150 reg = <4500 100>; // reg base, size
161 clock-frequency = <0>; // should we fill in in uboot? 151 clock-frequency = <0>; // should we fill in in uboot?
162 interrupts = <1a 2>; 152 interrupts = <1a 2>;
163 interrupt-parent = <40000>; 153 interrupt-parent = <&mpic>;
164 }; 154 };
165 155
166 serial@4600 { 156 serial@4600 {
@@ -169,57 +159,56 @@
169 reg = <4600 100>; // reg base, size 159 reg = <4600 100>; // reg base, size
170 clock-frequency = <0>; // should we fill in in uboot? 160 clock-frequency = <0>; // should we fill in in uboot?
171 interrupts = <1a 2>; 161 interrupts = <1a 2>;
172 interrupt-parent = <40000>; 162 interrupt-parent = <&mpic>;
173 }; 163 };
174 164
175 pci@8000 { 165 pci1: pci@8000 {
176 linux,phandle = <8000>;
177 interrupt-map-mask = <1f800 0 0 7>; 166 interrupt-map-mask = <1f800 0 0 7>;
178 interrupt-map = < 167 interrupt-map = <
179 168
180 /* IDSEL 0x10 */ 169 /* IDSEL 0x10 */
181 08000 0 0 1 40000 30 1 170 08000 0 0 1 &mpic 30 1
182 08000 0 0 2 40000 31 1 171 08000 0 0 2 &mpic 31 1
183 08000 0 0 3 40000 32 1 172 08000 0 0 3 &mpic 32 1
184 08000 0 0 4 40000 33 1 173 08000 0 0 4 &mpic 33 1
185 174
186 /* IDSEL 0x11 */ 175 /* IDSEL 0x11 */
187 08800 0 0 1 40000 30 1 176 08800 0 0 1 &mpic 30 1
188 08800 0 0 2 40000 31 1 177 08800 0 0 2 &mpic 31 1
189 08800 0 0 3 40000 32 1 178 08800 0 0 3 &mpic 32 1
190 08800 0 0 4 40000 33 1 179 08800 0 0 4 &mpic 33 1
191 180
192 /* IDSEL 0x12 (Slot 1) */ 181 /* IDSEL 0x12 (Slot 1) */
193 09000 0 0 1 40000 30 1 182 09000 0 0 1 &mpic 30 1
194 09000 0 0 2 40000 31 1 183 09000 0 0 2 &mpic 31 1
195 09000 0 0 3 40000 32 1 184 09000 0 0 3 &mpic 32 1
196 09000 0 0 4 40000 33 1 185 09000 0 0 4 &mpic 33 1
197 186
198 /* IDSEL 0x13 (Slot 2) */ 187 /* IDSEL 0x13 (Slot 2) */
199 09800 0 0 1 40000 31 1 188 09800 0 0 1 &mpic 31 1
200 09800 0 0 2 40000 32 1 189 09800 0 0 2 &mpic 32 1
201 09800 0 0 3 40000 33 1 190 09800 0 0 3 &mpic 33 1
202 09800 0 0 4 40000 30 1 191 09800 0 0 4 &mpic 30 1
203 192
204 /* IDSEL 0x14 (Slot 3) */ 193 /* IDSEL 0x14 (Slot 3) */
205 0a000 0 0 1 40000 32 1 194 0a000 0 0 1 &mpic 32 1
206 0a000 0 0 2 40000 33 1 195 0a000 0 0 2 &mpic 33 1
207 0a000 0 0 3 40000 30 1 196 0a000 0 0 3 &mpic 30 1
208 0a000 0 0 4 40000 31 1 197 0a000 0 0 4 &mpic 31 1
209 198
210 /* IDSEL 0x15 (Slot 4) */ 199 /* IDSEL 0x15 (Slot 4) */
211 0a800 0 0 1 40000 33 1 200 0a800 0 0 1 &mpic 33 1
212 0a800 0 0 2 40000 30 1 201 0a800 0 0 2 &mpic 30 1
213 0a800 0 0 3 40000 31 1 202 0a800 0 0 3 &mpic 31 1
214 0a800 0 0 4 40000 32 1 203 0a800 0 0 4 &mpic 32 1
215 204
216 /* Bus 1 (Tundra Bridge) */ 205 /* Bus 1 (Tundra Bridge) */
217 /* IDSEL 0x12 (ISA bridge) */ 206 /* IDSEL 0x12 (ISA bridge) */
218 19000 0 0 1 40000 30 1 207 19000 0 0 1 &mpic 30 1
219 19000 0 0 2 40000 31 1 208 19000 0 0 2 &mpic 31 1
220 19000 0 0 3 40000 32 1 209 19000 0 0 3 &mpic 32 1
221 19000 0 0 4 40000 33 1>; 210 19000 0 0 4 &mpic 33 1>;
222 interrupt-parent = <40000>; 211 interrupt-parent = <&mpic>;
223 interrupts = <08 2>; 212 interrupts = <08 2>;
224 bus-range = <0 0>; 213 bus-range = <0 0>;
225 ranges = <02000000 0 80000000 80000000 0 20000000 214 ranges = <02000000 0 80000000 80000000 0 20000000
@@ -243,21 +232,20 @@
243 compatible = "chrp,iic"; 232 compatible = "chrp,iic";
244 big-endian; 233 big-endian;
245 interrupts = <1>; 234 interrupts = <1>;
246 interrupt-parent = <8000>; 235 interrupt-parent = <&pci1>;
247 }; 236 };
248 }; 237 };
249 238
250 pci@9000 { 239 pci@9000 {
251 linux,phandle = <9000>;
252 interrupt-map-mask = <f800 0 0 7>; 240 interrupt-map-mask = <f800 0 0 7>;
253 interrupt-map = < 241 interrupt-map = <
254 242
255 /* IDSEL 0x15 */ 243 /* IDSEL 0x15 */
256 a800 0 0 1 40000 3b 1 244 a800 0 0 1 &mpic 3b 1
257 a800 0 0 2 40000 3b 1 245 a800 0 0 2 &mpic 3b 1
258 a800 0 0 3 40000 3b 1 246 a800 0 0 3 &mpic 3b 1
259 a800 0 0 4 40000 3b 1>; 247 a800 0 0 4 &mpic 3b 1>;
260 interrupt-parent = <40000>; 248 interrupt-parent = <&mpic>;
261 interrupts = <09 2>; 249 interrupts = <09 2>;
262 bus-range = <0 0>; 250 bus-range = <0 0>;
263 ranges = <02000000 0 a0000000 a0000000 0 20000000 251 ranges = <02000000 0 a0000000 a0000000 0 20000000
@@ -271,8 +259,7 @@
271 device_type = "pci"; 259 device_type = "pci";
272 }; 260 };
273 261
274 pic@40000 { 262 mpic: pic@40000 {
275 linux,phandle = <40000>;
276 clock-frequency = <0>; 263 clock-frequency = <0>;
277 interrupt-controller; 264 interrupt-controller;
278 #address-cells = <0>; 265 #address-cells = <0>;
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-11 01:36:20 -0400