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authorKumar Gala <galak@kernel.crashing.org>2011-11-04 00:24:12 -0400
committerKumar Gala <galak@kernel.crashing.org>2011-11-24 03:01:36 -0500
commitb7f817547d7e1b56c1afbf4411df6fd73a0d78e9 (patch)
treedfbf2777fd5bd86448a8f5c099886b4a5b06daa0 /arch/powerpc/boot/dts/mpc8544ds.dtsi
parent2e8685a491c1063a4126598b10ecb78d1d20f537 (diff)
powerpc/85xx: Rework MPC8544DS device tree
Utilize new split between board & SoC, and new SoC device trees split into pre & post utilizing 'template' includes for SoC IP blocks. Other changes include: * Moved to a standard 2 #address-cells & #size-cells at top-level * Moved to specifying interrupt-parent for mpic at root * Moved to 4-cell mpic interrupt cells to support MPIC timers * Removed CPU properties setup by u-boot to match other .dts * Added localbus node, but no chipselect details at this point * Reworked PCIe nodes to allow supportin IRQs for controller (errors) and moved PCI device IRQs down to virtual bridge level * Moved mdio nodes up one level instead of under tsec nodes * Updated ethernet 'model' to 'eTSEC' as that's what on MPC8544 * Dropping "fsl,mpc8544-IP..." from compatibles for standard blocks Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/mpc8544ds.dtsi')
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dtsi161
1 files changed, 161 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dtsi b/arch/powerpc/boot/dts/mpc8544ds.dtsi
new file mode 100644
index 000000000000..270f64b90f4e
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8544ds.dtsi
@@ -0,0 +1,161 @@
1/*
2 * MPC8544DS Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2011 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&board_soc {
36 enet0: ethernet@24000 {
37 phy-handle = <&phy0>;
38 tbi-handle = <&tbi0>;
39 phy-connection-type = "rgmii-id";
40 };
41
42 mdio@24520 {
43 phy0: ethernet-phy@0 {
44 interrupts = <10 1 0 0>;
45 reg = <0x0>;
46 device_type = "ethernet-phy";
47 };
48 phy1: ethernet-phy@1 {
49 interrupts = <10 1 0 0>;
50 reg = <0x1>;
51 device_type = "ethernet-phy";
52 };
53
54 tbi0: tbi-phy@11 {
55 reg = <0x11>;
56 device_type = "tbi-phy";
57 };
58 };
59
60 enet2: ethernet@26000 {
61 phy-handle = <&phy1>;
62 tbi-handle = <&tbi1>;
63 phy-connection-type = "rgmii-id";
64 };
65
66 mdio@26520 {
67 tbi1: tbi-phy@11 {
68 reg = <0x11>;
69 device_type = "tbi-phy";
70 };
71 };
72};
73
74&board_pci3 {
75 pcie@0 {
76 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
77 interrupt-map = <
78 // IDSEL 0x1c USB
79 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
80 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
81 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
82 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
83
84 // IDSEL 0x1d Audio
85 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
86
87 // IDSEL 0x1e Legacy
88 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
89 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
90
91 // IDSEL 0x1f IDE/SATA
92 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
93 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
94 >;
95
96
97 uli1575@0 {
98 reg = <0x0 0x0 0x0 0x0 0x0>;
99 #size-cells = <2>;
100 #address-cells = <3>;
101 ranges = <0x2000000 0x0 0xb0000000
102 0x2000000 0x0 0xb0000000
103 0x0 0x100000
104
105 0x1000000 0x0 0x0
106 0x1000000 0x0 0x0
107 0x0 0x100000>;
108 isa@1e {
109 device_type = "isa";
110 #interrupt-cells = <2>;
111 #size-cells = <1>;
112 #address-cells = <2>;
113 reg = <0xf000 0x0 0x0 0x0 0x0>;
114 ranges = <0x1 0x0 0x1000000 0x0 0x0
115 0x1000>;
116 interrupt-parent = <&i8259>;
117
118 i8259: interrupt-controller@20 {
119 reg = <0x1 0x20 0x2
120 0x1 0xa0 0x2
121 0x1 0x4d0 0x2>;
122 interrupt-controller;
123 device_type = "interrupt-controller";
124 #address-cells = <0>;
125 #interrupt-cells = <2>;
126 compatible = "chrp,iic";
127 interrupts = <9 2 0 0>;
128 interrupt-parent = <&mpic>;
129 };
130
131 i8042@60 {
132 #size-cells = <0>;
133 #address-cells = <1>;
134 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
135 interrupts = <1 3 12 3>;
136 interrupt-parent =
137 <&i8259>;
138
139 keyboard@0 {
140 reg = <0x0>;
141 compatible = "pnpPNP,303";
142 };
143
144 mouse@1 {
145 reg = <0x1>;
146 compatible = "pnpPNP,f03";
147 };
148 };
149
150 rtc@70 {
151 compatible = "pnpPNP,b00";
152 reg = <0x1 0x70 0x2>;
153 };
154
155 gpio@400 {
156 reg = <0x1 0x400 0x80>;
157 };
158 };
159 };
160 };
161};
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